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4a18b92c 1/** @file \r
f449affe 2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.\r
4a18b92c 3\r
f449affe 4 Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>\r
4a18b92c
JY		 5 This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12**/\r
13\r
14#ifndef _ACPI_5_0_H_\r
15#define _ACPI_5_0_H_\r
16\r
17#include <IndustryStandard/Acpi40.h>\r
18\r
19//\r
20// Define for Desriptor\r
21//\r
22#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A\r
23#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C\r
24#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E\r
25\r
26#define ACPI_FIXED_DMA_DESCRIPTOR 0x55\r
27#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C\r
28#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E\r
29\r
30#pragma pack(1)\r
31\r
32///\r
33/// Generic DMA Descriptor.\r
34///\r
35typedef PACKED struct {\r
36 ACPI_SMALL_RESOURCE_HEADER Header;\r
37 UINT16 DmaRequestLine;\r
38 UINT16 DmaChannel;\r
39 UINT8 DmaTransferWidth;\r
40} EFI_ACPI_FIXED_DMA_DESCRIPTOR;\r
41\r
42///\r
43/// GPIO Connection Descriptor\r
44///\r
45typedef PACKED struct {\r
46 ACPI_LARGE_RESOURCE_HEADER Header;\r
47 UINT8 RevisionId;\r
48 UINT8 ConnectionType;\r
49 UINT16 GeneralFlags;\r
50 UINT16 InterruptFlags;\r
51 UINT8 PinConfiguration;\r
52 UINT16 OutputDriveStrength;\r
53 UINT16 DebounceTimeout;\r
54 UINT16 PinTableOffset;\r
55 UINT8 ResourceSourceIndex;\r
56 UINT16 ResourceSourceNameOffset;\r
57 UINT16 VendorDataOffset;\r
58 UINT16 VendorDataLength;\r
59} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;\r
60\r
61#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0\r
62#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1\r
63\r
64///\r
65/// Serial Bus Resource Descriptor (Generic)\r
66///\r
67typedef PACKED struct {\r
68 ACPI_LARGE_RESOURCE_HEADER Header;\r
69 UINT8 RevisionId;\r
70 UINT8 ResourceSourceIndex;\r
71 UINT8 SerialBusType;\r
72 UINT8 GeneralFlags;\r
73 UINT16 TypeSpecificFlags;\r
74 UINT8 TypeSpecificRevisionId;\r
75 UINT16 TypeDataLength;\r
76// Type specific data\r
77} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;\r
78\r
79#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1\r
80#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2\r
81#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3\r
82\r
83///\r
84/// Serial Bus Resource Descriptor (I2C)\r
85///\r
86typedef PACKED struct {\r
87 ACPI_LARGE_RESOURCE_HEADER Header;\r
88 UINT8 RevisionId;\r
89 UINT8 ResourceSourceIndex;\r
90 UINT8 SerialBusType;\r
91 UINT8 GeneralFlags;\r
92 UINT16 TypeSpecificFlags;\r
93 UINT8 TypeSpecificRevisionId;\r
94 UINT16 TypeDataLength;\r
95 UINT32 ConnectionSpeed;\r
96 UINT16 SlaveAddress;\r
97} EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;\r
98\r
99///\r
100/// Serial Bus Resource Descriptor (SPI)\r
101///\r
102typedef PACKED struct {\r
103 ACPI_LARGE_RESOURCE_HEADER Header;\r
104 UINT8 RevisionId;\r
105 UINT8 ResourceSourceIndex;\r
106 UINT8 SerialBusType;\r
107 UINT8 GeneralFlags;\r
108 UINT16 TypeSpecificFlags;\r
109 UINT8 TypeSpecificRevisionId;\r
110 UINT16 TypeDataLength;\r
111 UINT32 ConnectionSpeed;\r
112 UINT8 DataBitLength;\r
113 UINT8 Phase;\r
114 UINT8 Polarity;\r
115 UINT16 DeviceSelection;\r
116} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;\r
117\r
118///\r
119/// Serial Bus Resource Descriptor (UART)\r
120///\r
121typedef PACKED struct {\r
122 ACPI_LARGE_RESOURCE_HEADER Header;\r
123 UINT8 RevisionId;\r
124 UINT8 ResourceSourceIndex;\r
125 UINT8 SerialBusType;\r
126 UINT8 GeneralFlags;\r
127 UINT16 TypeSpecificFlags;\r
128 UINT8 TypeSpecificRevisionId;\r
129 UINT16 TypeDataLength;\r
130 UINT32 DefaultBaudRate;\r
131 UINT16 RxFIFO;\r
132 UINT16 TxFIFO;\r
133 UINT8 Parity;\r
134 UINT8 SerialLinesEnabled;\r
135} EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;\r
136\r
137#pragma pack()\r
138\r
139//\r
140// Ensure proper structure formats\r
141//\r
142#pragma pack(1)\r
143\r
144///\r
145/// ACPI 5.0 Generic Address Space definition\r
146///\r
147typedef struct {\r
148 UINT8 AddressSpaceId;\r
149 UINT8 RegisterBitWidth;\r
150 UINT8 RegisterBitOffset;\r
151 UINT8 AccessSize;\r
152 UINT64 Address;\r
153} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;\r
154\r
155//\r
156// Generic Address Space Address IDs\r
157//\r
158#define EFI_ACPI_5_0_SYSTEM_MEMORY 0\r
159#define EFI_ACPI_5_0_SYSTEM_IO 1\r
160#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2\r
161#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3\r
162#define EFI_ACPI_5_0_SMBUS 4\r
f449affe
JY		 163#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
164#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
4a18b92c
JY		 165\r
166//\r
167// Generic Address Space Access Sizes\r
168//\r
169#define EFI_ACPI_5_0_UNDEFINED 0\r
170#define EFI_ACPI_5_0_BYTE 1\r
171#define EFI_ACPI_5_0_WORD 2\r
172#define EFI_ACPI_5_0_DWORD 3\r
173#define EFI_ACPI_5_0_QWORD 4\r
174\r
175//\r
176// ACPI 5.0 table structures\r
177//\r
178\r
179///\r
180/// Root System Description Pointer Structure\r
181///\r
182typedef struct {\r
183 UINT64 Signature;\r
184 UINT8 Checksum;\r
185 UINT8 OemId[6];\r
186 UINT8 Revision;\r
187 UINT32 RsdtAddress;\r
188 UINT32 Length;\r
189 UINT64 XsdtAddress;\r
190 UINT8 ExtendedChecksum;\r
191 UINT8 Reserved[3];\r
192} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
193\r
194///\r
195/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)\r
196///\r
197#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2\r
198\r
199///\r
200/// Common table header, this prefaces all ACPI tables, including FACS, but\r
201/// excluding the RSD PTR structure\r
202///\r
203typedef struct {\r
204 UINT32 Signature;\r
205 UINT32 Length;\r
206} EFI_ACPI_5_0_COMMON_HEADER;\r
207\r
208//\r
209// Root System Description Table\r
210// No definition needed as it is a common description table header, the same with \r
211// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
212//\r
213\r
214///\r
215/// RSDT Revision (as defined in ACPI 5.0 spec.)\r
216///\r
217#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
218\r
219//\r
220// Extended System Description Table\r
221// No definition needed as it is a common description table header, the same with \r
222// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
223//\r
224\r
225///\r
226/// XSDT Revision (as defined in ACPI 5.0 spec.)\r
227///\r
228#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
229\r
230///\r
231/// Fixed ACPI Description Table Structure (FADT)\r
232///\r
233typedef struct {\r
234 EFI_ACPI_DESCRIPTION_HEADER Header;\r
235 UINT32 FirmwareCtrl;\r
236 UINT32 Dsdt;\r
237 UINT8 Reserved0;\r
238 UINT8 PreferredPmProfile;\r
239 UINT16 SciInt;\r
240 UINT32 SmiCmd;\r
241 UINT8 AcpiEnable;\r
242 UINT8 AcpiDisable;\r
243 UINT8 S4BiosReq;\r
244 UINT8 PstateCnt;\r
245 UINT32 Pm1aEvtBlk;\r
246 UINT32 Pm1bEvtBlk;\r
247 UINT32 Pm1aCntBlk;\r
248 UINT32 Pm1bCntBlk;\r
249 UINT32 Pm2CntBlk;\r
250 UINT32 PmTmrBlk;\r
251 UINT32 Gpe0Blk;\r
252 UINT32 Gpe1Blk;\r
253 UINT8 Pm1EvtLen;\r
254 UINT8 Pm1CntLen;\r
255 UINT8 Pm2CntLen;\r
256 UINT8 PmTmrLen;\r
257 UINT8 Gpe0BlkLen;\r
258 UINT8 Gpe1BlkLen;\r
259 UINT8 Gpe1Base;\r
260 UINT8 CstCnt;\r
261 UINT16 PLvl2Lat;\r
262 UINT16 PLvl3Lat;\r
263 UINT16 FlushSize;\r
264 UINT16 FlushStride;\r
265 UINT8 DutyOffset;\r
266 UINT8 DutyWidth;\r
267 UINT8 DayAlrm;\r
268 UINT8 MonAlrm;\r
269 UINT8 Century;\r
270 UINT16 IaPcBootArch;\r
271 UINT8 Reserved1;\r
272 UINT32 Flags;\r
273 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
274 UINT8 ResetValue;\r
275 UINT8 Reserved2[3];\r
276 UINT64 XFirmwareCtrl;\r
277 UINT64 XDsdt;\r
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
287 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
288} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
289\r
290///\r
291/// FADT Version (as defined in ACPI 5.0 spec.)\r
292///\r
293#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
294\r
295//\r
296// Fixed ACPI Description Table Preferred Power Management Profile\r
297//\r
298#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0\r
299#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1\r
300#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2\r
301#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3\r
302#define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
303#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5\r
304#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6\r
305#define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7\r
306#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8\r
307\r
308//\r
309// Fixed ACPI Description Table Boot Architecture Flags\r
310// All other bits are reserved and must be set to 0.\r
311//\r
312#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0\r
313#define EFI_ACPI_5_0_8042 BIT1\r
314#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2\r
315#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3\r
316#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4\r
317#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5\r
318\r
319//\r
320// Fixed ACPI Description Table Fixed Feature Flags\r
321// All other bits are reserved and must be set to 0.\r
322//\r
323#define EFI_ACPI_5_0_WBINVD BIT0\r
324#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1\r
325#define EFI_ACPI_5_0_PROC_C1 BIT2\r
326#define EFI_ACPI_5_0_P_LVL2_UP BIT3\r
327#define EFI_ACPI_5_0_PWR_BUTTON BIT4\r
328#define EFI_ACPI_5_0_SLP_BUTTON BIT5\r
329#define EFI_ACPI_5_0_FIX_RTC BIT6\r
330#define EFI_ACPI_5_0_RTC_S4 BIT7\r
331#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8\r
332#define EFI_ACPI_5_0_DCK_CAP BIT9\r
333#define EFI_ACPI_5_0_RESET_REG_SUP BIT10\r
334#define EFI_ACPI_5_0_SEALED_CASE BIT11\r
335#define EFI_ACPI_5_0_HEADLESS BIT12\r
336#define EFI_ACPI_5_0_CPU_SW_SLP BIT13\r
337#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14\r
338#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15\r
339#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16\r
340#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17\r
341#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18\r
342#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
343#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20\r
344#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
345\r
346///\r
347/// Firmware ACPI Control Structure\r
348///\r
349typedef struct {\r
350 UINT32 Signature;\r
351 UINT32 Length;\r
352 UINT32 HardwareSignature;\r
353 UINT32 FirmwareWakingVector;\r
354 UINT32 GlobalLock;\r
355 UINT32 Flags;\r
356 UINT64 XFirmwareWakingVector;\r
357 UINT8 Version;\r
358 UINT8 Reserved0[3];\r
359 UINT32 OspmFlags;\r
360 UINT8 Reserved1[24];\r
361} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
362\r
363///\r
364/// FACS Version (as defined in ACPI 5.0 spec.)\r
365///\r
366#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
367\r
368///\r
369/// Firmware Control Structure Feature Flags\r
370/// All other bits are reserved and must be set to 0.\r
371///\r
372#define EFI_ACPI_5_0_S4BIOS_F BIT0\r
373#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1\r
374\r
375///\r
376/// OSPM Enabled Firmware Control Structure Flags\r
377/// All other bits are reserved and must be set to 0.\r
378///\r
379#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0\r
380\r
381//\r
382// Differentiated System Description Table,\r
383// Secondary System Description Table\r
384// and Persistent System Description Table,\r
385// no definition needed as they are common description table header, the same with\r
386// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
387//\r
388#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
389#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
390\r
391///\r
392/// Multiple APIC Description Table header definition. The rest of the table\r
393/// must be defined in a platform specific manner.\r
394///\r
395typedef struct {\r
396 EFI_ACPI_DESCRIPTION_HEADER Header;\r
397 UINT32 LocalApicAddress;\r
398 UINT32 Flags;\r
399} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
400\r
401///\r
402/// MADT Revision (as defined in ACPI 5.0 spec.)\r
403///\r
404#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
405\r
406///\r
407/// Multiple APIC Flags\r
408/// All other bits are reserved and must be set to 0.\r
409///\r
410#define EFI_ACPI_5_0_PCAT_COMPAT BIT0\r
411\r
412//\r
413// Multiple APIC Description Table APIC structure types\r
414// All other values between 0x0D and 0x7F are reserved and\r
415// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
416//\r
417#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00\r
418#define EFI_ACPI_5_0_IO_APIC 0x01\r
419#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
420#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
421#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04\r
422#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
423#define EFI_ACPI_5_0_IO_SAPIC 0x06\r
424#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07\r
425#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
426#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09\r
427#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A\r
428#define EFI_ACPI_5_0_GIC 0x0B\r
429#define EFI_ACPI_5_0_GICD 0x0C\r
430\r
431//\r
432// APIC Structure Definitions\r
433//\r
434\r
435///\r
436/// Processor Local APIC Structure Definition\r
437///\r
438typedef struct {\r
439 UINT8 Type;\r
440 UINT8 Length;\r
441 UINT8 AcpiProcessorId;\r
442 UINT8 ApicId;\r
443 UINT32 Flags;\r
444} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
445\r
446///\r
447/// Local APIC Flags. All other bits are reserved and must be 0.\r
448///\r
449#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0\r
450\r
451///\r
452/// IO APIC Structure\r
453///\r
454typedef struct {\r
455 UINT8 Type;\r
456 UINT8 Length;\r
457 UINT8 IoApicId;\r
458 UINT8 Reserved;\r
459 UINT32 IoApicAddress;\r
460 UINT32 GlobalSystemInterruptBase;\r
461} EFI_ACPI_5_0_IO_APIC_STRUCTURE;\r
462\r
463///\r
464/// Interrupt Source Override Structure\r
465///\r
466typedef struct {\r
467 UINT8 Type;\r
468 UINT8 Length;\r
469 UINT8 Bus;\r
470 UINT8 Source;\r
471 UINT32 GlobalSystemInterrupt;\r
472 UINT16 Flags;\r
473} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
474\r
475///\r
476/// Platform Interrupt Sources Structure Definition\r
477///\r
478typedef struct {\r
479 UINT8 Type;\r
480 UINT8 Length;\r
481 UINT16 Flags;\r
482 UINT8 InterruptType;\r
483 UINT8 ProcessorId;\r
484 UINT8 ProcessorEid;\r
485 UINT8 IoSapicVector;\r
486 UINT32 GlobalSystemInterrupt;\r
487 UINT32 PlatformInterruptSourceFlags;\r
488 UINT8 CpeiProcessorOverride;\r
489 UINT8 Reserved[31];\r
490} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
491\r
492//\r
493// MPS INTI flags.\r
494// All other bits are reserved and must be set to 0.\r
495//\r
496#define EFI_ACPI_5_0_POLARITY (3 << 0)\r
497#define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)\r
498\r
499///\r
500/// Non-Maskable Interrupt Source Structure\r
501///\r
502typedef struct {\r
503 UINT8 Type;\r
504 UINT8 Length;\r
505 UINT16 Flags;\r
506 UINT32 GlobalSystemInterrupt;\r
507} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
508\r
509///\r
510/// Local APIC NMI Structure\r
511///\r
512typedef struct {\r
513 UINT8 Type;\r
514 UINT8 Length;\r
515 UINT8 AcpiProcessorId;\r
516 UINT16 Flags;\r
517 UINT8 LocalApicLint;\r
518} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;\r
519\r
520///\r
521/// Local APIC Address Override Structure\r
522///\r
523typedef struct {\r
524 UINT8 Type;\r
525 UINT8 Length;\r
526 UINT16 Reserved;\r
527 UINT64 LocalApicAddress;\r
528} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
529\r
530///\r
531/// IO SAPIC Structure\r
532///\r
533typedef struct {\r
534 UINT8 Type;\r
535 UINT8 Length;\r
536 UINT8 IoApicId;\r
537 UINT8 Reserved;\r
538 UINT32 GlobalSystemInterruptBase;\r
539 UINT64 IoSapicAddress;\r
540} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;\r
541\r
542///\r
543/// Local SAPIC Structure\r
544/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
545///\r
546typedef struct {\r
547 UINT8 Type;\r
548 UINT8 Length;\r
549 UINT8 AcpiProcessorId;\r
550 UINT8 LocalSapicId;\r
551 UINT8 LocalSapicEid;\r
552 UINT8 Reserved[3];\r
553 UINT32 Flags;\r
554 UINT32 ACPIProcessorUIDValue;\r
555} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
556\r
557///\r
558/// Platform Interrupt Sources Structure\r
559///\r
560typedef struct {\r
561 UINT8 Type;\r
562 UINT8 Length;\r
563 UINT16 Flags;\r
564 UINT8 InterruptType;\r
565 UINT8 ProcessorId;\r
566 UINT8 ProcessorEid;\r
567 UINT8 IoSapicVector;\r
568 UINT32 GlobalSystemInterrupt;\r
569 UINT32 PlatformInterruptSourceFlags;\r
570} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
571\r
572///\r
573/// Platform Interrupt Source Flags.\r
574/// All other bits are reserved and must be set to 0.\r
575///\r
576#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0\r
577\r
578///\r
579/// Processor Local x2APIC Structure Definition\r
580///\r
581typedef struct {\r
582 UINT8 Type;\r
583 UINT8 Length;\r
584 UINT8 Reserved[2];\r
585 UINT32 X2ApicId;\r
586 UINT32 Flags;\r
587 UINT32 AcpiProcessorUid;\r
588} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
589\r
590///\r
591/// Local x2APIC NMI Structure\r
592///\r
593typedef struct {\r
594 UINT8 Type;\r
595 UINT8 Length;\r
596 UINT16 Flags;\r
597 UINT32 AcpiProcessorUid;\r
598 UINT8 LocalX2ApicLint;\r
599 UINT8 Reserved[3];\r
600} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;\r
601\r
602///\r
603/// GIC Structure\r
604///\r
605typedef struct {\r
606 UINT8 Type;\r
607 UINT8 Length;\r
608 UINT16 Reserved;\r
609 UINT32 GicId;\r
610 UINT32 AcpiProcessorUid;\r
611 UINT32 Flags;\r
612 UINT32 ParkingProtocolVersion;\r
613 UINT32 PerformanceInterruptGsiv;\r
614 UINT64 ParkedAddress;\r
615 UINT64 PhysicalBaseAddress;\r
616} EFI_ACPI_5_0_GIC_STRUCTURE;\r
617\r
618///\r
619/// GIC Flags. All other bits are reserved and must be 0.\r
620///\r
621#define EFI_ACPI_5_0_GIC_ENABLED BIT0\r
622#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1\r
623\r
624///\r
625/// GIC Distributor Structure\r
626///\r
627typedef struct {\r
628 UINT8 Type;\r
629 UINT8 Length;\r
630 UINT16 Reserved1;\r
631 UINT32 GicId;\r
632 UINT64 PhysicalBaseAddress;\r
633 UINT32 SystemVectorBase;\r
634 UINT32 Reserved2;\r
635} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;\r
636\r
637///\r
638/// Smart Battery Description Table (SBST)\r
639///\r
640typedef struct {\r
641 EFI_ACPI_DESCRIPTION_HEADER Header;\r
642 UINT32 WarningEnergyLevel;\r
643 UINT32 LowEnergyLevel;\r
644 UINT32 CriticalEnergyLevel;\r
645} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
646\r
647///\r
648/// SBST Version (as defined in ACPI 5.0 spec.)\r
649///\r
650#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
651\r
652///\r
653/// Embedded Controller Boot Resources Table (ECDT)\r
654/// The table is followed by a null terminated ASCII string that contains\r
655/// a fully qualified reference to the name space object.\r
656///\r
657typedef struct {\r
658 EFI_ACPI_DESCRIPTION_HEADER Header;\r
659 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
660 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
661 UINT32 Uid;\r
662 UINT8 GpeBit;\r
663} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
664\r
665///\r
666/// ECDT Version (as defined in ACPI 5.0 spec.)\r
667///\r
668#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
669\r
670///\r
671/// System Resource Affinity Table (SRAT). The rest of the table\r
672/// must be defined in a platform specific manner.\r
673///\r
674typedef struct {\r
675 EFI_ACPI_DESCRIPTION_HEADER Header;\r
676 UINT32 Reserved1; ///< Must be set to 1\r
677 UINT64 Reserved2;\r
678} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
679\r
680///\r
681/// SRAT Version (as defined in ACPI 5.0 spec.)\r
682///\r
683#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
684\r
685//\r
686// SRAT structure types.\r
687// All other values between 0x03 an 0xFF are reserved and\r
688// will be ignored by OSPM.\r
689//\r
690#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
691#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01\r
692#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
693\r
694///\r
695/// Processor Local APIC/SAPIC Affinity Structure Definition\r
696///\r
697typedef struct {\r
698 UINT8 Type;\r
699 UINT8 Length;\r
700 UINT8 ProximityDomain7To0;\r
701 UINT8 ApicId;\r
702 UINT32 Flags;\r
703 UINT8 LocalSapicEid;\r
704 UINT8 ProximityDomain31To8[3];\r
705 UINT32 ClockDomain;\r
706} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
707\r
708///\r
709/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
710///\r
711#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
712\r
713///\r
714/// Memory Affinity Structure Definition\r
715///\r
716typedef struct {\r
717 UINT8 Type;\r
718 UINT8 Length;\r
719 UINT32 ProximityDomain;\r
720 UINT16 Reserved1;\r
721 UINT32 AddressBaseLow;\r
722 UINT32 AddressBaseHigh;\r
723 UINT32 LengthLow;\r
724 UINT32 LengthHigh;\r
725 UINT32 Reserved2;\r
726 UINT32 Flags;\r
727 UINT64 Reserved3;\r
728} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;\r
729\r
730//\r
731// Memory Flags. All other bits are reserved and must be 0.\r
732//\r
733#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)\r
734#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)\r
735#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)\r
736\r
737///\r
738/// Processor Local x2APIC Affinity Structure Definition\r
739///\r
740typedef struct {\r
741 UINT8 Type;\r
742 UINT8 Length;\r
743 UINT8 Reserved1[2];\r
744 UINT32 ProximityDomain;\r
745 UINT32 X2ApicId;\r
746 UINT32 Flags;\r
747 UINT32 ClockDomain;\r
748 UINT8 Reserved2[4];\r
749} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
750\r
751///\r
752/// System Locality Distance Information Table (SLIT).\r
753/// The rest of the table is a matrix.\r
754///\r
755typedef struct {\r
756 EFI_ACPI_DESCRIPTION_HEADER Header;\r
757 UINT64 NumberOfSystemLocalities;\r
758} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
759\r
760///\r
761/// SLIT Version (as defined in ACPI 5.0 spec.)\r
762///\r
763#define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
764\r
765///\r
766/// Corrected Platform Error Polling Table (CPEP)\r
767///\r
768typedef struct {\r
769 EFI_ACPI_DESCRIPTION_HEADER Header;\r
770 UINT8 Reserved[8];\r
771} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
772\r
773///\r
774/// CPEP Version (as defined in ACPI 5.0 spec.)\r
775///\r
776#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
777\r
778//\r
779// CPEP processor structure types.\r
780//\r
781#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
782\r
783///\r
784/// Corrected Platform Error Polling Processor Structure Definition\r
785///\r
786typedef struct {\r
787 UINT8 Type;\r
788 UINT8 Length;\r
789 UINT8 ProcessorId;\r
790 UINT8 ProcessorEid;\r
791 UINT32 PollingInterval;\r
792} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
793\r
794///\r
795/// Maximum System Characteristics Table (MSCT)\r
796///\r
797typedef struct {\r
798 EFI_ACPI_DESCRIPTION_HEADER Header;\r
799 UINT32 OffsetProxDomInfo;\r
800 UINT32 MaximumNumberOfProximityDomains;\r
801 UINT32 MaximumNumberOfClockDomains;\r
802 UINT64 MaximumPhysicalAddress;\r
803} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
804\r
805///\r
806/// MSCT Version (as defined in ACPI 5.0 spec.)\r
807///\r
808#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
809\r
810///\r
811/// Maximum Proximity Domain Information Structure Definition\r
812///\r
813typedef struct {\r
814 UINT8 Revision;\r
815 UINT8 Length;\r
816 UINT32 ProximityDomainRangeLow;\r
817 UINT32 ProximityDomainRangeHigh;\r
818 UINT32 MaximumProcessorCapacity;\r
819 UINT64 MaximumMemoryCapacity;\r
820} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
821\r
822///\r
823/// ACPI RAS Feature Table definition.\r
824///\r
825typedef struct {\r
826 EFI_ACPI_DESCRIPTION_HEADER Header;\r
827 UINT8 PlatformCommunicationChannelIdentifier[12];\r
828} EFI_ACPI_5_0_RAS_FEATURE_TABLE;\r
829\r
830///\r
831/// RASF Version (as defined in ACPI 5.0 spec.)\r
832///\r
833#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01\r
834\r
835///\r
836/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
837///\r
838typedef struct {\r
839 UINT32 Signature;\r
840 UINT16 Command;\r
841 UINT16 Status;\r
842 UINT16 Version;\r
843 UINT8 RASCapabilities[16];\r
844 UINT8 SetRASCapabilities[16];\r
845 UINT16 NumberOfRASFParameterBlocks;\r
846 UINT32 SetRASCapabilitiesStatus;\r
847} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
848\r
849///\r
850/// ACPI RASF PCC command code\r
851///\r
852#define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
853\r
854///\r
855/// ACPI RASF Platform RAS Capabilities\r
856///\r
857#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
858#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
859\r
860///\r
861/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
862///\r
863typedef struct {\r
864 UINT16 Type;\r
865 UINT16 Version;\r
866 UINT16 Length;\r
867 UINT16 PatrolScrubCommand;\r
868 UINT64 RequestedAddressRange[2];\r
869 UINT64 ActualAddressRange[2];\r
870 UINT16 Flags;\r
871 UINT8 RequestedSpeed;\r
872} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
873\r
874///\r
875/// ACPI RASF Patrol Scrub command\r
876///\r
877#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
878#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
879#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
880\r
881///\r
882/// Memory Power State Table definition.\r
883///\r
884typedef struct {\r
885 EFI_ACPI_DESCRIPTION_HEADER Header;\r
886 UINT8 PlatformCommunicationChannelIdentifier;\r
887 UINT8 Reserved[3];\r
888// Memory Power Node Structure\r
889// Memory Power State Characteristics\r
890} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;\r
891\r
892///\r
893/// MPST Version (as defined in ACPI 5.0 spec.)\r
894///\r
895#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
896\r
897///\r
898/// MPST Platform Communication Channel Shared Memory Region definition.\r
899///\r
900typedef struct {\r
901 UINT32 Signature;\r
902 UINT16 Command;\r
903 UINT16 Status;\r
904 UINT32 MemoryPowerCommandRegister;\r
905 UINT32 MemoryPowerStatusRegister;\r
906 UINT32 PowerStateId;\r
907 UINT32 MemoryPowerNodeId;\r
908 UINT64 MemoryEnergyConsumed;\r
909 UINT64 ExpectedAveragePowerComsuned;\r
910} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
911\r
912///\r
913/// ACPI MPST PCC command code\r
914///\r
915#define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
916\r
917///\r
918/// ACPI MPST Memory Power command\r
919///\r
920#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
921#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
922#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
923#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
924\r
925///\r
926/// MPST Memory Power Node Table\r
927///\r
928typedef struct {\r
929 UINT8 PowerStateValue;\r
930 UINT8 PowerStateInformationIndex;\r
931} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;\r
932\r
933typedef struct {\r
934 UINT8 Flag;\r
935 UINT8 Reserved;\r
936 UINT16 MemoryPowerNodeId;\r
937 UINT32 Length;\r
938 UINT64 AddressBase;\r
939 UINT64 AddressLength;\r
940 UINT32 NumberOfPowerStates;\r
941 UINT32 NumberOfPhysicalComponents;\r
942//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
943//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
944} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;\r
945\r
946#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
947#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
948#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
949\r
950typedef struct {\r
951 UINT16 MemoryPowerNodeCount;\r
952 UINT8 Reserved[2];\r
953} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;\r
954\r
955///\r
956/// MPST Memory Power State Characteristics Table\r
957///\r
958typedef struct {\r
959 UINT8 PowerStateStructureID;\r
960 UINT8 Flag;\r
961 UINT16 Reserved;\r
962 UINT32 AveragePowerConsumedInMPS0;\r
963 UINT32 RelativePowerSavingToMPS0;\r
964 UINT64 ExitLatencyToMPS0;\r
965} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
966\r
967#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
968#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
969#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
970\r
971typedef struct {\r
972 UINT16 MemoryPowerStateCharacteristicsCount;\r
973 UINT8 Reserved[2];\r
974} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
975\r
976///\r
977/// Memory Topology Table definition.\r
978///\r
979typedef struct {\r
980 EFI_ACPI_DESCRIPTION_HEADER Header;\r
981 UINT32 Reserved;\r
982} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;\r
983\r
984///\r
985/// PMTT Version (as defined in ACPI 5.0 spec.)\r
986///\r
987#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
988\r
989///\r
990/// Common Memory Aggregator Device Structure.\r
991///\r
992typedef struct {\r
993 UINT8 Type;\r
994 UINT8 Reserved;\r
995 UINT16 Length;\r
996 UINT16 Flags;\r
997 UINT16 Reserved1;\r
998} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
999\r
1000///\r
1001/// Memory Aggregator Device Type\r
1002///\r
1003#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1004#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1005#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1006\r
1007///\r
1008/// Socket Memory Aggregator Device Structure.\r
1009///\r
1010typedef struct {\r
1011 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
fa8801f5
JY		 1012 UINT16 SocketIdentifier;\r
1013 UINT16 Reserved;\r
4a18b92c
JY		 1014//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1015} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1016\r
1017///\r
1018/// MemoryController Memory Aggregator Device Structure.\r
1019///\r
1020typedef struct {\r
1021 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1022 UINT32 ReadLatency;\r
1023 UINT32 WriteLatency;\r
1024 UINT32 ReadBandwidth;\r
1025 UINT32 WriteBandwidth;\r
1026 UINT16 OptimalAccessUnit;\r
1027 UINT16 OptimalAccessAlignment;\r
1028 UINT16 Reserved;\r
1029 UINT16 NumberOfProximityDomains;\r
1030//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1031//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1032} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1033\r
1034///\r
1035/// DIMM Memory Aggregator Device Structure.\r
1036///\r
1037typedef struct {\r
1038 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1039 UINT16 PhysicalComponentIdentifier;\r
1040 UINT16 Reserved;\r
1041 UINT32 SizeOfDimm;\r
1042 UINT32 SmbiosHandle;\r
1043} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1044\r
1045///\r
1046/// Boot Graphics Resource Table definition.\r
1047///\r
1048typedef struct {\r
1049 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1050 ///\r
1051 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1052 ///\r
1053 UINT16 Version;\r
1054 ///\r
1055 /// 1-byte status field indicating current status about the table.\r
1056 /// Bits[7:1] = Reserved (must be zero)\r
1057 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1058 ///\r
1059 UINT8 Status;\r
1060 ///\r
1061 /// 1-byte enumerated type field indicating format of the image.\r
1062 /// 0 = Bitmap\r
1063 /// 1 - 255 Reserved (for future use)\r
1064 ///\r
1065 UINT8 ImageType;\r
1066 ///\r
1067 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1068 /// of the image bitmap.\r
1069 ///\r
1070 UINT64 ImageAddress;\r
1071 ///\r
1072 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1073 /// (X, Y) display offset of the top left corner of the boot image.\r
1074 /// The top left corner of the display is at offset (0, 0).\r
1075 ///\r
1076 UINT32 ImageOffsetX;\r
1077 ///\r
1078 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1079 /// (X, Y) display offset of the top left corner of the boot image.\r
1080 /// The top left corner of the display is at offset (0, 0).\r
1081 ///\r
1082 UINT32 ImageOffsetY;\r
1083} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1084\r
1085///\r
1086/// BGRT Revision\r
1087///\r
1088#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1089\r
1090///\r
1091/// BGRT Version\r
1092///\r
1093#define EFI_ACPI_5_0_BGRT_VERSION 0x01\r
1094\r
1095///\r
1096/// BGRT Status\r
1097///\r
f449affe
JY		 1098#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1099#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01\r
1100#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED\r
1101#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED\r
4a18b92c
JY		 1102\r
1103///\r
1104/// BGRT Image Type\r
1105///\r
1106#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00\r
1107\r
1108///\r
1109/// FPDT Version (as defined in ACPI 5.0 spec.)\r
1110///\r
1111#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1112\r
1113///\r
1114/// FPDT Performance Record Types\r
1115///\r
1116#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1117#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1118\r
1119///\r
1120/// FPDT Performance Record Revision\r
1121///\r
1122#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1123#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1124\r
1125///\r
1126/// FPDT Runtime Performance Record Types\r
1127///\r
1128#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1129#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1130#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1131\r
1132///\r
1133/// FPDT Runtime Performance Record Revision\r
1134///\r
1135#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1136#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1137#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1138\r
1139///\r
1140/// FPDT Performance Record header\r
1141///\r
1142typedef struct {\r
1143 UINT16 Type;\r
1144 UINT8 Length;\r
1145 UINT8 Revision;\r
1146} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;\r
1147\r
1148///\r
1149/// FPDT Performance Table header\r
1150///\r
1151typedef struct {\r
1152 UINT32 Signature;\r
1153 UINT32 Length;\r
1154} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;\r
1155\r
1156///\r
1157/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1158///\r
1159typedef struct {\r
1160 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1161 UINT32 Reserved;\r
1162 ///\r
1163 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1164 ///\r
1165 UINT64 BootPerformanceTablePointer;\r
1166} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1167\r
1168///\r
1169/// FPDT S3 Performance Table Pointer Record Structure\r
1170///\r
1171typedef struct {\r
1172 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1173 UINT32 Reserved;\r
1174 ///\r
1175 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1176 ///\r
1177 UINT64 S3PerformanceTablePointer;\r
1178} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1179\r
1180///\r
1181/// FPDT Firmware Basic Boot Performance Record Structure\r
1182///\r
1183typedef struct {\r
1184 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1185 UINT32 Reserved;\r
1186 ///\r
1187 /// Timer value logged at the beginning of firmware image execution.\r
1188 /// This may not always be zero or near zero.\r
1189 ///\r
1190 UINT64 ResetEnd;\r
1191 ///\r
1192 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1193 /// For non-UEFI compatible boots, this field must be zero.\r
1194 ///\r
1195 UINT64 OsLoaderLoadImageStart;\r
1196 ///\r
1197 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1198 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1199 /// to the INT 19h handler invocation.\r
1200 ///\r
1201 UINT64 OsLoaderStartImageStart;\r
1202 ///\r
1203 /// Timer value logged at the point when the OS loader calls the\r
1204 /// ExitBootServices function for UEFI compatible firmware.\r
1205 /// For non-UEFI compatible boots, this field must be zero.\r
1206 ///\r
1207 UINT64 ExitBootServicesEntry;\r
1208 ///\r
1209 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1210 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1211 /// For non-UEFI compatible boots, this field must be zero.\r
1212 ///\r
1213 UINT64 ExitBootServicesExit;\r
1214} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1215\r
1216///\r
1217/// FPDT Firmware Basic Boot Performance Table signature\r
1218///\r
1219#define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1220\r
1221//\r
1222// FPDT Firmware Basic Boot Performance Table\r
1223//\r
1224typedef struct {\r
1225 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1226 //\r
1227 // one or more Performance Records.\r
1228 //\r
1229} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1230\r
1231///\r
1232/// FPDT "S3PT" S3 Performance Table\r
1233///\r
1234#define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1235\r
1236//\r
1237// FPDT Firmware S3 Boot Performance Table\r
1238//\r
1239typedef struct {\r
1240 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1241 //\r
1242 // one or more Performance Records.\r
1243 //\r
1244} EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1245\r
1246///\r
1247/// FPDT Basic S3 Resume Performance Record\r
1248///\r
1249typedef struct {\r
1250 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1251 ///\r
1252 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1253 ///\r
1254 UINT32 ResumeCount;\r
1255 ///\r
1256 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1257 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1258 ///\r
1259 UINT64 FullResume;\r
1260 ///\r
1261 /// Average timer value of all resume cycles logged since the last full boot\r
1262 /// sequence, including the most recent resume. Note that the entire log of\r
1263 /// timer values does not need to be retained in order to calculate this average.\r
1264 ///\r
1265 UINT64 AverageResume;\r
1266} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;\r
1267\r
1268///\r
1269/// FPDT Basic S3 Suspend Performance Record\r
1270///\r
1271typedef struct {\r
1272 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1273 ///\r
1274 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1275 /// Only the most recent suspend cycle's timer value is retained.\r
1276 ///\r
1277 UINT64 SuspendStart;\r
1278 ///\r
1279 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1280 /// mechanism) used to trigger hardware entry to S3.\r
1281 /// Only the most recent suspend cycle's timer value is retained.\r
1282 ///\r
1283 UINT64 SuspendEnd;\r
1284} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;\r
1285\r
1286///\r
1287/// Firmware Performance Record Table definition.\r
1288///\r
1289typedef struct {\r
1290 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1291} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1292\r
1293///\r
1294/// Generic Timer Description Table definition.\r
1295///\r
1296typedef struct {\r
1297 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1298 UINT64 PhysicalAddress;\r
1299 UINT32 GlobalFlags;\r
1300 UINT32 SecurePL1TimerGSIV;\r
1301 UINT32 SecurePL1TimerFlags;\r
1302 UINT32 NonSecurePL1TimerGSIV;\r
1303 UINT32 NonSecurePL1TimerFlags;\r
1304 UINT32 VirtualTimerGSIV;\r
1305 UINT32 VirtualTimerFlags;\r
1306 UINT32 NonSecurePL2TimerGSIV;\r
1307 UINT32 NonSecurePL2TimerFlags;\r
1308} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1309\r
1310///\r
1311/// GTDT Version (as defined in ACPI 5.0 spec.)\r
1312///\r
1313#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1314\r
1315///\r
1316/// Global Flags. All other bits are reserved and must be 0.\r
1317///\r
1318#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0\r
1319#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1\r
1320\r
1321///\r
1322/// Timer Flags. All other bits are reserved and must be 0.\r
1323///\r
1324#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1325#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1326\r
1327///\r
1328/// Boot Error Record Table (BERT)\r
1329///\r
1330typedef struct {\r
1331 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1332 UINT32 BootErrorRegionLength;\r
1333 UINT64 BootErrorRegion;\r
1334} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1335\r
1336///\r
1337/// BERT Version (as defined in ACPI 5.0 spec.)\r
1338///\r
1339#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1340\r
1341///\r
1342/// Boot Error Region Block Status Definition\r
1343///\r
1344typedef struct {\r
1345 UINT32 UncorrectableErrorValid:1;\r
1346 UINT32 CorrectableErrorValid:1;\r
1347 UINT32 MultipleUncorrectableErrors:1;\r
1348 UINT32 MultipleCorrectableErrors:1;\r
1349 UINT32 ErrorDataEntryCount:10;\r
1350 UINT32 Reserved:18;\r
1351} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;\r
1352\r
1353///\r
1354/// Boot Error Region Definition\r
1355///\r
1356typedef struct {\r
1357 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1358 UINT32 RawDataOffset;\r
1359 UINT32 RawDataLength;\r
1360 UINT32 DataLength;\r
1361 UINT32 ErrorSeverity;\r
1362} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;\r
1363\r
1364//\r
1365// Boot Error Severity types\r
1366//\r
1367#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00\r
1368#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01\r
1369#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02\r
1370#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03\r
1371\r
1372///\r
1373/// Generic Error Data Entry Definition\r
1374///\r
1375typedef struct {\r
1376 UINT8 SectionType[16];\r
1377 UINT32 ErrorSeverity;\r
1378 UINT16 Revision;\r
1379 UINT8 ValidationBits;\r
1380 UINT8 Flags;\r
1381 UINT32 ErrorDataLength;\r
1382 UINT8 FruId[16];\r
1383 UINT8 FruText[20];\r
1384} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1385\r
1386///\r
1387/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)\r
1388///\r
1389#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1390\r
1391///\r
1392/// HEST - Hardware Error Source Table\r
1393///\r
1394typedef struct {\r
1395 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1396 UINT32 ErrorSourceCount;\r
1397} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1398\r
1399///\r
1400/// HEST Version (as defined in ACPI 5.0 spec.)\r
1401///\r
1402#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1403\r
1404//\r
1405// Error Source structure types.\r
1406//\r
1407#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1408#define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1409#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1410#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1411#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07\r
1412#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08\r
1413#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09\r
1414\r
1415//\r
1416// Error Source structure flags.\r
1417//\r
1418#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1419#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1420\r
1421///\r
1422/// IA-32 Architecture Machine Check Exception Structure Definition\r
1423///\r
1424typedef struct {\r
1425 UINT16 Type;\r
1426 UINT16 SourceId;\r
1427 UINT8 Reserved0[2];\r
1428 UINT8 Flags;\r
1429 UINT8 Enabled;\r
1430 UINT32 NumberOfRecordsToPreAllocate;\r
1431 UINT32 MaxSectionsPerRecord;\r
1432 UINT64 GlobalCapabilityInitData;\r
1433 UINT64 GlobalControlInitData;\r
1434 UINT8 NumberOfHardwareBanks;\r
1435 UINT8 Reserved1[7];\r
1436} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1437\r
1438///\r
1439/// IA-32 Architecture Machine Check Bank Structure Definition\r
1440///\r
1441typedef struct {\r
1442 UINT8 BankNumber;\r
1443 UINT8 ClearStatusOnInitialization;\r
1444 UINT8 StatusDataFormat;\r
1445 UINT8 Reserved0;\r
1446 UINT32 ControlRegisterMsrAddress;\r
1447 UINT64 ControlInitData;\r
1448 UINT32 StatusRegisterMsrAddress;\r
1449 UINT32 AddressRegisterMsrAddress;\r
1450 UINT32 MiscRegisterMsrAddress;\r
1451} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1452\r
1453///\r
1454/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1455///\r
1456#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1457#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1458#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1459\r
1460//\r
1461// Hardware Error Notification types. All other values are reserved\r
1462//\r
1463#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1464#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1465#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1466#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1467#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1468\r
1469///\r
1470/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1471///\r
1472typedef struct {\r
1473 UINT16 Type:1;\r
1474 UINT16 PollInterval:1;\r
1475 UINT16 SwitchToPollingThresholdValue:1;\r
1476 UINT16 SwitchToPollingThresholdWindow:1;\r
1477 UINT16 ErrorThresholdValue:1;\r
1478 UINT16 ErrorThresholdWindow:1;\r
1479 UINT16 Reserved:10;\r
1480} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1481\r
1482///\r
1483/// Hardware Error Notification Structure Definition\r
1484///\r
1485typedef struct {\r
1486 UINT8 Type;\r
1487 UINT8 Length;\r
1488 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1489 UINT32 PollInterval;\r
1490 UINT32 Vector;\r
1491 UINT32 SwitchToPollingThresholdValue;\r
1492 UINT32 SwitchToPollingThresholdWindow;\r
1493 UINT32 ErrorThresholdValue;\r
1494 UINT32 ErrorThresholdWindow;\r
1495} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1496\r
1497///\r
1498/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1499///\r
1500typedef struct {\r
1501 UINT16 Type;\r
1502 UINT16 SourceId;\r
1503 UINT8 Reserved0[2];\r
1504 UINT8 Flags;\r
1505 UINT8 Enabled;\r
1506 UINT32 NumberOfRecordsToPreAllocate;\r
1507 UINT32 MaxSectionsPerRecord;\r
1508 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1509 UINT8 NumberOfHardwareBanks;\r
1510 UINT8 Reserved1[3];\r
1511} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1512\r
1513///\r
1514/// IA-32 Architecture NMI Error Structure Definition\r
1515///\r
1516typedef struct {\r
1517 UINT16 Type;\r
1518 UINT16 SourceId;\r
1519 UINT8 Reserved0[2];\r
1520 UINT32 NumberOfRecordsToPreAllocate;\r
1521 UINT32 MaxSectionsPerRecord;\r
1522 UINT32 MaxRawDataLength;\r
1523} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1524\r
1525///\r
1526/// PCI Express Root Port AER Structure Definition\r
1527///\r
1528typedef struct {\r
1529 UINT16 Type;\r
1530 UINT16 SourceId;\r
1531 UINT8 Reserved0[2];\r
1532 UINT8 Flags;\r
1533 UINT8 Enabled;\r
1534 UINT32 NumberOfRecordsToPreAllocate;\r
1535 UINT32 MaxSectionsPerRecord;\r
1536 UINT32 Bus;\r
1537 UINT16 Device;\r
1538 UINT16 Function;\r
1539 UINT16 DeviceControl;\r
1540 UINT8 Reserved1[2];\r
1541 UINT32 UncorrectableErrorMask;\r
1542 UINT32 UncorrectableErrorSeverity;\r
1543 UINT32 CorrectableErrorMask;\r
1544 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1545 UINT32 RootErrorCommand;\r
1546} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1547\r
1548///\r
1549/// PCI Express Device AER Structure Definition\r
1550///\r
1551typedef struct {\r
1552 UINT16 Type;\r
1553 UINT16 SourceId;\r
1554 UINT8 Reserved0[2];\r
1555 UINT8 Flags;\r
1556 UINT8 Enabled;\r
1557 UINT32 NumberOfRecordsToPreAllocate;\r
1558 UINT32 MaxSectionsPerRecord;\r
1559 UINT32 Bus;\r
1560 UINT16 Device;\r
1561 UINT16 Function;\r
1562 UINT16 DeviceControl;\r
1563 UINT8 Reserved1[2];\r
1564 UINT32 UncorrectableErrorMask;\r
1565 UINT32 UncorrectableErrorSeverity;\r
1566 UINT32 CorrectableErrorMask;\r
1567 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1568} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1569\r
1570///\r
1571/// PCI Express Bridge AER Structure Definition\r
1572///\r
1573typedef struct {\r
1574 UINT16 Type;\r
1575 UINT16 SourceId;\r
1576 UINT8 Reserved0[2];\r
1577 UINT8 Flags;\r
1578 UINT8 Enabled;\r
1579 UINT32 NumberOfRecordsToPreAllocate;\r
1580 UINT32 MaxSectionsPerRecord;\r
1581 UINT32 Bus;\r
1582 UINT16 Device;\r
1583 UINT16 Function;\r
1584 UINT16 DeviceControl;\r
1585 UINT8 Reserved1[2];\r
1586 UINT32 UncorrectableErrorMask;\r
1587 UINT32 UncorrectableErrorSeverity;\r
1588 UINT32 CorrectableErrorMask;\r
1589 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1590 UINT32 SecondaryUncorrectableErrorMask;\r
1591 UINT32 SecondaryUncorrectableErrorSeverity;\r
1592 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1593} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1594\r
1595///\r
1596/// Generic Hardware Error Source Structure Definition\r
1597///\r
1598typedef struct {\r
1599 UINT16 Type;\r
1600 UINT16 SourceId;\r
1601 UINT16 RelatedSourceId;\r
1602 UINT8 Flags;\r
1603 UINT8 Enabled;\r
1604 UINT32 NumberOfRecordsToPreAllocate;\r
1605 UINT32 MaxSectionsPerRecord;\r
1606 UINT32 MaxRawDataLength;\r
1607 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1608 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1609 UINT32 ErrorStatusBlockLength;\r
1610} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1611\r
1612///\r
1613/// Generic Error Status Definition\r
1614///\r
1615typedef struct {\r
1616 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1617 UINT32 RawDataOffset;\r
1618 UINT32 RawDataLength;\r
1619 UINT32 DataLength;\r
1620 UINT32 ErrorSeverity;\r
1621} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;\r
1622\r
1623///\r
1624/// ERST - Error Record Serialization Table\r
1625///\r
1626typedef struct {\r
1627 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1628 UINT32 SerializationHeaderSize;\r
1629 UINT8 Reserved0[4];\r
1630 UINT32 InstructionEntryCount;\r
1631} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1632\r
1633///\r
1634/// ERST Version (as defined in ACPI 5.0 spec.)\r
1635///\r
1636#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1637\r
1638///\r
1639/// ERST Serialization Actions\r
1640///\r
1641#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00\r
1642#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01\r
1643#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1644#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03\r
1645#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04\r
1646#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05\r
1647#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06\r
1648#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07\r
1649#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08\r
1650#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09\r
1651#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A\r
1652#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1653#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1654#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1655#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1656\r
1657///\r
1658/// ERST Action Command Status\r
1659///\r
1660#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00\r
1661#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1662#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1663#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03\r
1664#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1665#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1666\r
1667///\r
1668/// ERST Serialization Instructions\r
1669///\r
1670#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00\r
1671#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01\r
1672#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02\r
1673#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03\r
1674#define EFI_ACPI_5_0_ERST_NOOP 0x04\r
1675#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05\r
1676#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06\r
1677#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07\r
1678#define EFI_ACPI_5_0_ERST_ADD 0x08\r
1679#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09\r
1680#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A\r
1681#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B\r
1682#define EFI_ACPI_5_0_ERST_STALL 0x0C\r
1683#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D\r
1684#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1685#define EFI_ACPI_5_0_ERST_GOTO 0x0F\r
1686#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1687#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11\r
1688#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12\r
1689\r
1690///\r
1691/// ERST Instruction Flags\r
1692///\r
1693#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01\r
1694\r
1695///\r
1696/// ERST Serialization Instruction Entry\r
1697///\r
1698typedef struct {\r
1699 UINT8 SerializationAction;\r
1700 UINT8 Instruction;\r
1701 UINT8 Flags;\r
1702 UINT8 Reserved0;\r
1703 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1704 UINT64 Value;\r
1705 UINT64 Mask;\r
1706} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1707\r
1708///\r
1709/// EINJ - Error Injection Table\r
1710///\r
1711typedef struct {\r
1712 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1713 UINT32 InjectionHeaderSize;\r
1714 UINT8 InjectionFlags;\r
1715 UINT8 Reserved0[3];\r
1716 UINT32 InjectionEntryCount;\r
1717} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;\r
1718\r
1719///\r
1720/// EINJ Version (as defined in ACPI 5.0 spec.)\r
1721///\r
1722#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01\r
1723\r
1724///\r
1725/// EINJ Error Injection Actions\r
1726///\r
1727#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1728#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1729#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02\r
1730#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03\r
1731#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04\r
1732#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05\r
1733#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06\r
1734#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07\r
1735#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF\r
1736\r
1737///\r
1738/// EINJ Action Command Status\r
1739///\r
1740#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00\r
1741#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1742#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02\r
1743\r
1744///\r
1745/// EINJ Error Type Definition\r
1746///\r
1747#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1748#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1749#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1750#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1751#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1752#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1753#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1754#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1755#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1756#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1757#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1758#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1759\r
1760///\r
1761/// EINJ Injection Instructions\r
1762///\r
1763#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00\r
1764#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01\r
1765#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02\r
1766#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03\r
1767#define EFI_ACPI_5_0_EINJ_NOOP 0x04\r
1768\r
1769///\r
1770/// EINJ Instruction Flags\r
1771///\r
1772#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01\r
1773\r
1774///\r
1775/// EINJ Injection Instruction Entry\r
1776///\r
1777typedef struct {\r
1778 UINT8 InjectionAction;\r
1779 UINT8 Instruction;\r
1780 UINT8 Flags;\r
1781 UINT8 Reserved0;\r
1782 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1783 UINT64 Value;\r
1784 UINT64 Mask;\r
1785} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1786\r
1787///\r
1788/// EINJ Trigger Action Table\r
1789///\r
1790typedef struct {\r
1791 UINT32 HeaderSize;\r
1792 UINT32 Revision;\r
1793 UINT32 TableSize;\r
1794 UINT32 EntryCount;\r
1795} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;\r
1796\r
1797///\r
1798/// Platform Communications Channel Table (PCCT)\r
1799///\r
1800typedef struct {\r
1801 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1802 UINT32 Flags;\r
17aa79bf 1803 UINT64 Reserved;\r
4a18b92c
JY		 1804} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1805\r
1806///\r
1807/// PCCT Version (as defined in ACPI 5.0 spec.)\r
1808///\r
1809#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1810\r
1811///\r
1812/// PCCT Global Flags\r
1813///\r
1814#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1815\r
1816//\r
1817// PCCT Subspace type\r
1818//\r
1819#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1820\r
1821///\r
1822/// PCC Subspace Structure Header\r
1823///\r
1824typedef struct {\r
1825 UINT8 Type;\r
1826 UINT8 Length;\r
1827} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;\r
1828\r
1829///\r
1830/// Generic Communications Subspace Structure\r
1831///\r
1832typedef struct {\r
1833 UINT8 Type;\r
1834 UINT8 Length;\r
1835 UINT8 Reserved[6];\r
1836 UINT64 BaseAddress;\r
1837 UINT64 AddressLength;\r
1838 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1839 UINT64 DoorbellPreserve;\r
1840 UINT64 DoorbellWrite;\r
83218902
JY		 1841 UINT32 NominalLatency;\r
1842 UINT32 MaximumPeriodicAccessRate;\r
1843 UINT16 MinimumRequestTurnaroundTime;\r
4a18b92c
JY		 1844} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;\r
1845\r
1846///\r
1847/// Generic Communications Channel Shared Memory Region\r
1848///\r
1849\r
1850typedef struct {\r
1851 UINT8 Command;\r
1852 UINT8 Reserved:7;\r
1853 UINT8 GenerateSci:1;\r
1854} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1855\r
1856typedef struct {\r
1857 UINT8 CommandComplete:1;\r
1858 UINT8 SciDoorbell:1;\r
1859 UINT8 Error:1;\r
1860 UINT8 Reserved:5;\r
1861 UINT8 Reserved1;\r
1862} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1863\r
1864typedef struct {\r
1865 UINT32 Signature;\r
1866 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1867 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1868} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1869\r
1870//\r
1871// Known table signatures\r
1872//\r
1873\r
1874///\r
1875/// "RSD PTR " Root System Description Pointer\r
1876///\r
1877#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') \r
1878\r
1879///\r
1880/// "APIC" Multiple APIC Description Table\r
1881///\r
1882#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1883\r
1884///\r
1885/// "BERT" Boot Error Record Table\r
1886///\r
1887#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1888\r
1889///\r
1890/// "BGRT" Boot Graphics Resource Table\r
1891///\r
1892#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1893\r
1894///\r
1895/// "CPEP" Corrected Platform Error Polling Table\r
1896///\r
1897#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1898\r
1899///\r
1900/// "DSDT" Differentiated System Description Table\r
1901///\r
1902#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1903\r
1904///\r
1905/// "ECDT" Embedded Controller Boot Resources Table\r
1906///\r
1907#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1908\r
1909///\r
1910/// "EINJ" Error Injection Table\r
1911///\r
1912#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1913\r
1914///\r
1915/// "ERST" Error Record Serialization Table\r
1916///\r
1917#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1918\r
1919///\r
1920/// "FACP" Fixed ACPI Description Table\r
1921///\r
1922#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1923\r
1924///\r
1925/// "FACS" Firmware ACPI Control Structure\r
1926///\r
1927#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1928\r
1929///\r
1930/// "FPDT" Firmware Performance Data Table\r
1931///\r
1932#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1933\r
1934///\r
1935/// "GTDT" Generic Timer Description Table\r
1936///\r
1937#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1938\r
1939///\r
1940/// "HEST" Hardware Error Source Table\r
1941///\r
1942#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1943\r
1944///\r
1945/// "MPST" Memory Power State Table\r
1946///\r
1947#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1948\r
1949///\r
1950/// "MSCT" Maximum System Characteristics Table\r
1951///\r
1952#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1953\r
1954///\r
1955/// "PMTT" Platform Memory Topology Table\r
1956///\r
1957#define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1958\r
1959///\r
1960/// "PSDT" Persistent System Description Table\r
1961///\r
1962#define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1963\r
1964///\r
1965/// "RASF" ACPI RAS Feature Table\r
1966///\r
1967#define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1968\r
1969///\r
1970/// "RSDT" Root System Description Table\r
1971///\r
1972#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1973\r
1974///\r
1975/// "SBST" Smart Battery Specification Table\r
1976///\r
1977#define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1978\r
1979///\r
1980/// "SLIT" System Locality Information Table\r
1981///\r
1982#define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1983\r
1984///\r
1985/// "SRAT" System Resource Affinity Table\r
1986///\r
1987#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1988\r
1989///\r
1990/// "SSDT" Secondary System Description Table\r
1991///\r
1992#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
1993\r
1994///\r
1995/// "XSDT" Extended System Description Table\r
1996///\r
1997#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
1998\r
1999///\r
2000/// "BOOT" MS Simple Boot Spec\r
2001///\r
2002#define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2003\r
2004///\r
2005/// "CSRT" MS Core System Resource Table\r
2006///\r
2007#define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2008\r
2009///\r
2010/// "DBG2" MS Debug Port 2 Spec\r
2011///\r
2012#define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2013\r
2014///\r
2015/// "DBGP" MS Debug Port Spec\r
2016///\r
2017#define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2018\r
2019///\r
2020/// "DMAR" DMA Remapping Table\r
2021///\r
2022#define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2023\r
f449affe
JY		 2024///\r
2025/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2026///\r
2027#define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2028\r
4a18b92c
JY		 2029///\r
2030/// "ETDT" Event Timer Description Table\r
2031///\r
2032#define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2033\r
2034///\r
2035/// "HPET" IA-PC High Precision Event Timer Table\r
2036///\r
2037#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2038\r
2039///\r
2040/// "iBFT" iSCSI Boot Firmware Table\r
2041///\r
2042#define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2043\r
2044///\r
2045/// "IVRS" I/O Virtualization Reporting Structure\r
2046///\r
2047#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2048\r
2049///\r
2050/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2051///\r
2052#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2053\r
2054///\r
2055/// "MCHI" Management Controller Host Interface Table\r
2056///\r
2057#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2058\r
2059///\r
2060/// "MSDM" MS Data Management Table\r
2061///\r
2062#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2063\r
2064///\r
2065/// "SLIC" MS Software Licensing Table Specification\r
2066///\r
2067#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2068\r
2069///\r
2070/// "SPCR" Serial Port Concole Redirection Table\r
2071///\r
2072#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2073\r
2074///\r
2075/// "SPMI" Server Platform Management Interface Table\r
2076///\r
2077#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2078\r
2079///\r
2080/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2081///\r
2082#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2083\r
2084///\r
2085/// "TPM2" Trusted Computing Platform 1 Table\r
2086///\r
2087#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2088\r
2089///\r
2090/// "UEFI" UEFI ACPI Data Table\r
2091///\r
2092#define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2093\r
2094///\r
f449affe 2095/// "WAET" Windows ACPI Emulated Devices Table\r
4a18b92c 2096///\r
f449affe
JY		 2097#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2098#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE\r
4a18b92c
JY		 2099\r
2100///\r
2101/// "WDAT" Watchdog Action Table\r
2102///\r
2103#define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2104\r
2105///\r
2106/// "WDRT" Watchdog Resource Table\r
2107///\r
2108#define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2109\r
2110///\r
2111/// "WPBT" MS Platform Binary Table\r
2112///\r
2113#define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2114\r
2115#pragma pack()\r
2116\r
2117#endif\r
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