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9095d37b 1/** @file\r
f449affe 2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.\r
4a18b92c 3\r
a71c80b6 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r
9095d37b
LG		 5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
6 This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
4a18b92c
JY		 13**/\r
14\r
15#ifndef _ACPI_5_0_H_\r
16#define _ACPI_5_0_H_\r
17\r
18#include <IndustryStandard/Acpi40.h>\r
19\r
20//\r
21// Define for Desriptor\r
22//\r
23#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A\r
24#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C\r
25#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E\r
26\r
27#define ACPI_FIXED_DMA_DESCRIPTOR 0x55\r
28#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C\r
29#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E\r
30\r
31#pragma pack(1)\r
32\r
33///\r
34/// Generic DMA Descriptor.\r
35///\r
36typedef PACKED struct {\r
37 ACPI_SMALL_RESOURCE_HEADER Header;\r
38 UINT16 DmaRequestLine;\r
39 UINT16 DmaChannel;\r
40 UINT8 DmaTransferWidth;\r
41} EFI_ACPI_FIXED_DMA_DESCRIPTOR;\r
42\r
43///\r
44/// GPIO Connection Descriptor\r
45///\r
46typedef PACKED struct {\r
47 ACPI_LARGE_RESOURCE_HEADER Header;\r
48 UINT8 RevisionId;\r
49 UINT8 ConnectionType;\r
50 UINT16 GeneralFlags;\r
51 UINT16 InterruptFlags;\r
52 UINT8 PinConfiguration;\r
53 UINT16 OutputDriveStrength;\r
54 UINT16 DebounceTimeout;\r
55 UINT16 PinTableOffset;\r
56 UINT8 ResourceSourceIndex;\r
57 UINT16 ResourceSourceNameOffset;\r
58 UINT16 VendorDataOffset;\r
59 UINT16 VendorDataLength;\r
60} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;\r
61\r
62#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0\r
63#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1\r
64\r
65///\r
66/// Serial Bus Resource Descriptor (Generic)\r
67///\r
68typedef PACKED struct {\r
69 ACPI_LARGE_RESOURCE_HEADER Header;\r
70 UINT8 RevisionId;\r
71 UINT8 ResourceSourceIndex;\r
72 UINT8 SerialBusType;\r
73 UINT8 GeneralFlags;\r
74 UINT16 TypeSpecificFlags;\r
75 UINT8 TypeSpecificRevisionId;\r
76 UINT16 TypeDataLength;\r
77// Type specific data\r
78} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;\r
79\r
80#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1\r
81#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2\r
82#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3\r
83\r
84///\r
85/// Serial Bus Resource Descriptor (I2C)\r
86///\r
87typedef PACKED struct {\r
88 ACPI_LARGE_RESOURCE_HEADER Header;\r
89 UINT8 RevisionId;\r
90 UINT8 ResourceSourceIndex;\r
91 UINT8 SerialBusType;\r
92 UINT8 GeneralFlags;\r
93 UINT16 TypeSpecificFlags;\r
94 UINT8 TypeSpecificRevisionId;\r
95 UINT16 TypeDataLength;\r
96 UINT32 ConnectionSpeed;\r
97 UINT16 SlaveAddress;\r
98} EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;\r
99\r
100///\r
101/// Serial Bus Resource Descriptor (SPI)\r
102///\r
103typedef PACKED struct {\r
104 ACPI_LARGE_RESOURCE_HEADER Header;\r
105 UINT8 RevisionId;\r
106 UINT8 ResourceSourceIndex;\r
107 UINT8 SerialBusType;\r
108 UINT8 GeneralFlags;\r
109 UINT16 TypeSpecificFlags;\r
110 UINT8 TypeSpecificRevisionId;\r
111 UINT16 TypeDataLength;\r
112 UINT32 ConnectionSpeed;\r
113 UINT8 DataBitLength;\r
114 UINT8 Phase;\r
115 UINT8 Polarity;\r
116 UINT16 DeviceSelection;\r
117} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;\r
118\r
119///\r
120/// Serial Bus Resource Descriptor (UART)\r
121///\r
122typedef PACKED struct {\r
123 ACPI_LARGE_RESOURCE_HEADER Header;\r
124 UINT8 RevisionId;\r
125 UINT8 ResourceSourceIndex;\r
126 UINT8 SerialBusType;\r
127 UINT8 GeneralFlags;\r
128 UINT16 TypeSpecificFlags;\r
129 UINT8 TypeSpecificRevisionId;\r
130 UINT16 TypeDataLength;\r
131 UINT32 DefaultBaudRate;\r
132 UINT16 RxFIFO;\r
133 UINT16 TxFIFO;\r
134 UINT8 Parity;\r
135 UINT8 SerialLinesEnabled;\r
136} EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;\r
137\r
138#pragma pack()\r
139\r
140//\r
141// Ensure proper structure formats\r
142//\r
143#pragma pack(1)\r
144\r
145///\r
146/// ACPI 5.0 Generic Address Space definition\r
147///\r
148typedef struct {\r
149 UINT8 AddressSpaceId;\r
150 UINT8 RegisterBitWidth;\r
151 UINT8 RegisterBitOffset;\r
152 UINT8 AccessSize;\r
153 UINT64 Address;\r
154} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;\r
155\r
156//\r
157// Generic Address Space Address IDs\r
158//\r
159#define EFI_ACPI_5_0_SYSTEM_MEMORY 0\r
160#define EFI_ACPI_5_0_SYSTEM_IO 1\r
161#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2\r
162#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3\r
163#define EFI_ACPI_5_0_SMBUS 4\r
f449affe
JY		 164#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
165#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
4a18b92c
JY		 166\r
167//\r
168// Generic Address Space Access Sizes\r
169//\r
170#define EFI_ACPI_5_0_UNDEFINED 0\r
171#define EFI_ACPI_5_0_BYTE 1\r
172#define EFI_ACPI_5_0_WORD 2\r
173#define EFI_ACPI_5_0_DWORD 3\r
174#define EFI_ACPI_5_0_QWORD 4\r
175\r
176//\r
177// ACPI 5.0 table structures\r
178//\r
179\r
180///\r
181/// Root System Description Pointer Structure\r
182///\r
183typedef struct {\r
184 UINT64 Signature;\r
185 UINT8 Checksum;\r
186 UINT8 OemId[6];\r
187 UINT8 Revision;\r
188 UINT32 RsdtAddress;\r
189 UINT32 Length;\r
190 UINT64 XsdtAddress;\r
191 UINT8 ExtendedChecksum;\r
192 UINT8 Reserved[3];\r
193} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
194\r
195///\r
196/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)\r
197///\r
198#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2\r
199\r
200///\r
201/// Common table header, this prefaces all ACPI tables, including FACS, but\r
202/// excluding the RSD PTR structure\r
203///\r
204typedef struct {\r
205 UINT32 Signature;\r
206 UINT32 Length;\r
207} EFI_ACPI_5_0_COMMON_HEADER;\r
208\r
209//\r
210// Root System Description Table\r
9095d37b 211// No definition needed as it is a common description table header, the same with\r
4a18b92c
JY		 212// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
213//\r
214\r
215///\r
216/// RSDT Revision (as defined in ACPI 5.0 spec.)\r
217///\r
218#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
219\r
220//\r
221// Extended System Description Table\r
9095d37b 222// No definition needed as it is a common description table header, the same with\r
4a18b92c
JY		 223// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
224//\r
225\r
226///\r
227/// XSDT Revision (as defined in ACPI 5.0 spec.)\r
228///\r
229#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
230\r
231///\r
232/// Fixed ACPI Description Table Structure (FADT)\r
233///\r
234typedef struct {\r
235 EFI_ACPI_DESCRIPTION_HEADER Header;\r
236 UINT32 FirmwareCtrl;\r
237 UINT32 Dsdt;\r
238 UINT8 Reserved0;\r
239 UINT8 PreferredPmProfile;\r
240 UINT16 SciInt;\r
241 UINT32 SmiCmd;\r
242 UINT8 AcpiEnable;\r
243 UINT8 AcpiDisable;\r
244 UINT8 S4BiosReq;\r
245 UINT8 PstateCnt;\r
246 UINT32 Pm1aEvtBlk;\r
247 UINT32 Pm1bEvtBlk;\r
248 UINT32 Pm1aCntBlk;\r
249 UINT32 Pm1bCntBlk;\r
250 UINT32 Pm2CntBlk;\r
251 UINT32 PmTmrBlk;\r
252 UINT32 Gpe0Blk;\r
253 UINT32 Gpe1Blk;\r
254 UINT8 Pm1EvtLen;\r
255 UINT8 Pm1CntLen;\r
256 UINT8 Pm2CntLen;\r
257 UINT8 PmTmrLen;\r
258 UINT8 Gpe0BlkLen;\r
259 UINT8 Gpe1BlkLen;\r
260 UINT8 Gpe1Base;\r
261 UINT8 CstCnt;\r
262 UINT16 PLvl2Lat;\r
263 UINT16 PLvl3Lat;\r
264 UINT16 FlushSize;\r
265 UINT16 FlushStride;\r
266 UINT8 DutyOffset;\r
267 UINT8 DutyWidth;\r
268 UINT8 DayAlrm;\r
269 UINT8 MonAlrm;\r
270 UINT8 Century;\r
271 UINT16 IaPcBootArch;\r
272 UINT8 Reserved1;\r
273 UINT32 Flags;\r
274 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
275 UINT8 ResetValue;\r
276 UINT8 Reserved2[3];\r
277 UINT64 XFirmwareCtrl;\r
278 UINT64 XDsdt;\r
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
283 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
284 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
285 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
286 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
287 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
288 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
289} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
290\r
291///\r
292/// FADT Version (as defined in ACPI 5.0 spec.)\r
293///\r
294#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
295\r
296//\r
297// Fixed ACPI Description Table Preferred Power Management Profile\r
298//\r
299#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0\r
300#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1\r
301#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2\r
302#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3\r
303#define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
304#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5\r
305#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6\r
306#define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7\r
307#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8\r
308\r
309//\r
310// Fixed ACPI Description Table Boot Architecture Flags\r
311// All other bits are reserved and must be set to 0.\r
312//\r
313#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0\r
314#define EFI_ACPI_5_0_8042 BIT1\r
315#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2\r
316#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3\r
317#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4\r
318#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5\r
319\r
320//\r
321// Fixed ACPI Description Table Fixed Feature Flags\r
322// All other bits are reserved and must be set to 0.\r
323//\r
324#define EFI_ACPI_5_0_WBINVD BIT0\r
325#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1\r
326#define EFI_ACPI_5_0_PROC_C1 BIT2\r
327#define EFI_ACPI_5_0_P_LVL2_UP BIT3\r
328#define EFI_ACPI_5_0_PWR_BUTTON BIT4\r
329#define EFI_ACPI_5_0_SLP_BUTTON BIT5\r
330#define EFI_ACPI_5_0_FIX_RTC BIT6\r
331#define EFI_ACPI_5_0_RTC_S4 BIT7\r
332#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8\r
333#define EFI_ACPI_5_0_DCK_CAP BIT9\r
334#define EFI_ACPI_5_0_RESET_REG_SUP BIT10\r
335#define EFI_ACPI_5_0_SEALED_CASE BIT11\r
336#define EFI_ACPI_5_0_HEADLESS BIT12\r
337#define EFI_ACPI_5_0_CPU_SW_SLP BIT13\r
338#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14\r
339#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15\r
340#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16\r
341#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17\r
342#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18\r
343#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
344#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20\r
345#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
346\r
347///\r
348/// Firmware ACPI Control Structure\r
349///\r
350typedef struct {\r
351 UINT32 Signature;\r
352 UINT32 Length;\r
353 UINT32 HardwareSignature;\r
354 UINT32 FirmwareWakingVector;\r
355 UINT32 GlobalLock;\r
356 UINT32 Flags;\r
357 UINT64 XFirmwareWakingVector;\r
358 UINT8 Version;\r
359 UINT8 Reserved0[3];\r
360 UINT32 OspmFlags;\r
361 UINT8 Reserved1[24];\r
362} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
363\r
364///\r
365/// FACS Version (as defined in ACPI 5.0 spec.)\r
366///\r
367#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
368\r
369///\r
370/// Firmware Control Structure Feature Flags\r
371/// All other bits are reserved and must be set to 0.\r
372///\r
373#define EFI_ACPI_5_0_S4BIOS_F BIT0\r
374#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1\r
375\r
376///\r
377/// OSPM Enabled Firmware Control Structure Flags\r
378/// All other bits are reserved and must be set to 0.\r
379///\r
380#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0\r
381\r
382//\r
383// Differentiated System Description Table,\r
384// Secondary System Description Table\r
385// and Persistent System Description Table,\r
386// no definition needed as they are common description table header, the same with\r
387// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
388//\r
389#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
390#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
391\r
392///\r
393/// Multiple APIC Description Table header definition. The rest of the table\r
394/// must be defined in a platform specific manner.\r
395///\r
396typedef struct {\r
397 EFI_ACPI_DESCRIPTION_HEADER Header;\r
398 UINT32 LocalApicAddress;\r
399 UINT32 Flags;\r
400} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
401\r
402///\r
403/// MADT Revision (as defined in ACPI 5.0 spec.)\r
404///\r
405#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
406\r
407///\r
408/// Multiple APIC Flags\r
409/// All other bits are reserved and must be set to 0.\r
410///\r
411#define EFI_ACPI_5_0_PCAT_COMPAT BIT0\r
412\r
413//\r
414// Multiple APIC Description Table APIC structure types\r
415// All other values between 0x0D and 0x7F are reserved and\r
416// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
417//\r
418#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00\r
419#define EFI_ACPI_5_0_IO_APIC 0x01\r
420#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
421#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
422#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04\r
423#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
424#define EFI_ACPI_5_0_IO_SAPIC 0x06\r
425#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07\r
426#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
427#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09\r
428#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A\r
429#define EFI_ACPI_5_0_GIC 0x0B\r
430#define EFI_ACPI_5_0_GICD 0x0C\r
431\r
432//\r
433// APIC Structure Definitions\r
434//\r
435\r
436///\r
437/// Processor Local APIC Structure Definition\r
438///\r
439typedef struct {\r
440 UINT8 Type;\r
441 UINT8 Length;\r
442 UINT8 AcpiProcessorId;\r
443 UINT8 ApicId;\r
444 UINT32 Flags;\r
445} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
446\r
447///\r
448/// Local APIC Flags. All other bits are reserved and must be 0.\r
449///\r
450#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0\r
451\r
452///\r
453/// IO APIC Structure\r
454///\r
455typedef struct {\r
456 UINT8 Type;\r
457 UINT8 Length;\r
458 UINT8 IoApicId;\r
459 UINT8 Reserved;\r
460 UINT32 IoApicAddress;\r
461 UINT32 GlobalSystemInterruptBase;\r
462} EFI_ACPI_5_0_IO_APIC_STRUCTURE;\r
463\r
464///\r
465/// Interrupt Source Override Structure\r
466///\r
467typedef struct {\r
468 UINT8 Type;\r
469 UINT8 Length;\r
470 UINT8 Bus;\r
471 UINT8 Source;\r
472 UINT32 GlobalSystemInterrupt;\r
473 UINT16 Flags;\r
474} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
475\r
476///\r
477/// Platform Interrupt Sources Structure Definition\r
478///\r
479typedef struct {\r
480 UINT8 Type;\r
481 UINT8 Length;\r
482 UINT16 Flags;\r
483 UINT8 InterruptType;\r
484 UINT8 ProcessorId;\r
485 UINT8 ProcessorEid;\r
486 UINT8 IoSapicVector;\r
487 UINT32 GlobalSystemInterrupt;\r
488 UINT32 PlatformInterruptSourceFlags;\r
489 UINT8 CpeiProcessorOverride;\r
490 UINT8 Reserved[31];\r
491} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
492\r
493//\r
494// MPS INTI flags.\r
495// All other bits are reserved and must be set to 0.\r
496//\r
497#define EFI_ACPI_5_0_POLARITY (3 << 0)\r
498#define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)\r
499\r
500///\r
501/// Non-Maskable Interrupt Source Structure\r
502///\r
503typedef struct {\r
504 UINT8 Type;\r
505 UINT8 Length;\r
506 UINT16 Flags;\r
507 UINT32 GlobalSystemInterrupt;\r
508} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
509\r
510///\r
511/// Local APIC NMI Structure\r
512///\r
513typedef struct {\r
514 UINT8 Type;\r
515 UINT8 Length;\r
516 UINT8 AcpiProcessorId;\r
517 UINT16 Flags;\r
518 UINT8 LocalApicLint;\r
519} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;\r
520\r
521///\r
522/// Local APIC Address Override Structure\r
523///\r
524typedef struct {\r
525 UINT8 Type;\r
526 UINT8 Length;\r
527 UINT16 Reserved;\r
528 UINT64 LocalApicAddress;\r
529} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
530\r
531///\r
532/// IO SAPIC Structure\r
533///\r
534typedef struct {\r
535 UINT8 Type;\r
536 UINT8 Length;\r
537 UINT8 IoApicId;\r
538 UINT8 Reserved;\r
539 UINT32 GlobalSystemInterruptBase;\r
540 UINT64 IoSapicAddress;\r
541} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;\r
542\r
543///\r
544/// Local SAPIC Structure\r
545/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
546///\r
547typedef struct {\r
548 UINT8 Type;\r
549 UINT8 Length;\r
550 UINT8 AcpiProcessorId;\r
551 UINT8 LocalSapicId;\r
552 UINT8 LocalSapicEid;\r
553 UINT8 Reserved[3];\r
554 UINT32 Flags;\r
555 UINT32 ACPIProcessorUIDValue;\r
556} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
557\r
558///\r
559/// Platform Interrupt Sources Structure\r
560///\r
561typedef struct {\r
562 UINT8 Type;\r
563 UINT8 Length;\r
564 UINT16 Flags;\r
565 UINT8 InterruptType;\r
566 UINT8 ProcessorId;\r
567 UINT8 ProcessorEid;\r
568 UINT8 IoSapicVector;\r
569 UINT32 GlobalSystemInterrupt;\r
570 UINT32 PlatformInterruptSourceFlags;\r
571} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
572\r
573///\r
574/// Platform Interrupt Source Flags.\r
575/// All other bits are reserved and must be set to 0.\r
576///\r
577#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0\r
578\r
579///\r
580/// Processor Local x2APIC Structure Definition\r
581///\r
582typedef struct {\r
583 UINT8 Type;\r
584 UINT8 Length;\r
585 UINT8 Reserved[2];\r
586 UINT32 X2ApicId;\r
587 UINT32 Flags;\r
588 UINT32 AcpiProcessorUid;\r
589} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
590\r
591///\r
592/// Local x2APIC NMI Structure\r
593///\r
594typedef struct {\r
595 UINT8 Type;\r
596 UINT8 Length;\r
597 UINT16 Flags;\r
598 UINT32 AcpiProcessorUid;\r
599 UINT8 LocalX2ApicLint;\r
600 UINT8 Reserved[3];\r
601} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;\r
602\r
603///\r
604/// GIC Structure\r
605///\r
606typedef struct {\r
607 UINT8 Type;\r
608 UINT8 Length;\r
609 UINT16 Reserved;\r
610 UINT32 GicId;\r
611 UINT32 AcpiProcessorUid;\r
612 UINT32 Flags;\r
613 UINT32 ParkingProtocolVersion;\r
614 UINT32 PerformanceInterruptGsiv;\r
615 UINT64 ParkedAddress;\r
616 UINT64 PhysicalBaseAddress;\r
617} EFI_ACPI_5_0_GIC_STRUCTURE;\r
618\r
619///\r
620/// GIC Flags. All other bits are reserved and must be 0.\r
621///\r
622#define EFI_ACPI_5_0_GIC_ENABLED BIT0\r
623#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1\r
624\r
625///\r
626/// GIC Distributor Structure\r
627///\r
628typedef struct {\r
629 UINT8 Type;\r
630 UINT8 Length;\r
631 UINT16 Reserved1;\r
632 UINT32 GicId;\r
633 UINT64 PhysicalBaseAddress;\r
634 UINT32 SystemVectorBase;\r
635 UINT32 Reserved2;\r
636} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;\r
637\r
638///\r
639/// Smart Battery Description Table (SBST)\r
640///\r
641typedef struct {\r
642 EFI_ACPI_DESCRIPTION_HEADER Header;\r
643 UINT32 WarningEnergyLevel;\r
644 UINT32 LowEnergyLevel;\r
645 UINT32 CriticalEnergyLevel;\r
646} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
647\r
648///\r
649/// SBST Version (as defined in ACPI 5.0 spec.)\r
650///\r
651#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
652\r
653///\r
654/// Embedded Controller Boot Resources Table (ECDT)\r
655/// The table is followed by a null terminated ASCII string that contains\r
656/// a fully qualified reference to the name space object.\r
657///\r
658typedef struct {\r
659 EFI_ACPI_DESCRIPTION_HEADER Header;\r
660 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
661 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
662 UINT32 Uid;\r
663 UINT8 GpeBit;\r
664} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
665\r
666///\r
667/// ECDT Version (as defined in ACPI 5.0 spec.)\r
668///\r
669#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
670\r
671///\r
672/// System Resource Affinity Table (SRAT). The rest of the table\r
673/// must be defined in a platform specific manner.\r
674///\r
675typedef struct {\r
676 EFI_ACPI_DESCRIPTION_HEADER Header;\r
677 UINT32 Reserved1; ///< Must be set to 1\r
678 UINT64 Reserved2;\r
679} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
680\r
681///\r
682/// SRAT Version (as defined in ACPI 5.0 spec.)\r
683///\r
684#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
685\r
686//\r
687// SRAT structure types.\r
688// All other values between 0x03 an 0xFF are reserved and\r
689// will be ignored by OSPM.\r
690//\r
691#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
692#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01\r
693#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
694\r
695///\r
696/// Processor Local APIC/SAPIC Affinity Structure Definition\r
697///\r
698typedef struct {\r
699 UINT8 Type;\r
700 UINT8 Length;\r
701 UINT8 ProximityDomain7To0;\r
702 UINT8 ApicId;\r
703 UINT32 Flags;\r
704 UINT8 LocalSapicEid;\r
705 UINT8 ProximityDomain31To8[3];\r
706 UINT32 ClockDomain;\r
707} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
708\r
709///\r
710/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
711///\r
712#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
713\r
714///\r
715/// Memory Affinity Structure Definition\r
716///\r
717typedef struct {\r
718 UINT8 Type;\r
719 UINT8 Length;\r
720 UINT32 ProximityDomain;\r
721 UINT16 Reserved1;\r
722 UINT32 AddressBaseLow;\r
723 UINT32 AddressBaseHigh;\r
724 UINT32 LengthLow;\r
725 UINT32 LengthHigh;\r
726 UINT32 Reserved2;\r
727 UINT32 Flags;\r
728 UINT64 Reserved3;\r
729} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;\r
730\r
731//\r
732// Memory Flags. All other bits are reserved and must be 0.\r
733//\r
734#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)\r
735#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)\r
736#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)\r
737\r
738///\r
739/// Processor Local x2APIC Affinity Structure Definition\r
740///\r
741typedef struct {\r
742 UINT8 Type;\r
743 UINT8 Length;\r
744 UINT8 Reserved1[2];\r
745 UINT32 ProximityDomain;\r
746 UINT32 X2ApicId;\r
747 UINT32 Flags;\r
748 UINT32 ClockDomain;\r
749 UINT8 Reserved2[4];\r
750} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
751\r
752///\r
753/// System Locality Distance Information Table (SLIT).\r
754/// The rest of the table is a matrix.\r
755///\r
756typedef struct {\r
757 EFI_ACPI_DESCRIPTION_HEADER Header;\r
758 UINT64 NumberOfSystemLocalities;\r
759} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
760\r
761///\r
762/// SLIT Version (as defined in ACPI 5.0 spec.)\r
763///\r
764#define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
765\r
766///\r
767/// Corrected Platform Error Polling Table (CPEP)\r
768///\r
769typedef struct {\r
770 EFI_ACPI_DESCRIPTION_HEADER Header;\r
771 UINT8 Reserved[8];\r
772} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
773\r
774///\r
775/// CPEP Version (as defined in ACPI 5.0 spec.)\r
776///\r
777#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
778\r
779//\r
780// CPEP processor structure types.\r
781//\r
782#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
783\r
784///\r
785/// Corrected Platform Error Polling Processor Structure Definition\r
786///\r
787typedef struct {\r
788 UINT8 Type;\r
789 UINT8 Length;\r
790 UINT8 ProcessorId;\r
791 UINT8 ProcessorEid;\r
792 UINT32 PollingInterval;\r
793} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
794\r
795///\r
796/// Maximum System Characteristics Table (MSCT)\r
797///\r
798typedef struct {\r
799 EFI_ACPI_DESCRIPTION_HEADER Header;\r
800 UINT32 OffsetProxDomInfo;\r
801 UINT32 MaximumNumberOfProximityDomains;\r
802 UINT32 MaximumNumberOfClockDomains;\r
803 UINT64 MaximumPhysicalAddress;\r
804} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
805\r
806///\r
807/// MSCT Version (as defined in ACPI 5.0 spec.)\r
808///\r
809#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
810\r
811///\r
812/// Maximum Proximity Domain Information Structure Definition\r
813///\r
814typedef struct {\r
815 UINT8 Revision;\r
816 UINT8 Length;\r
817 UINT32 ProximityDomainRangeLow;\r
818 UINT32 ProximityDomainRangeHigh;\r
819 UINT32 MaximumProcessorCapacity;\r
820 UINT64 MaximumMemoryCapacity;\r
821} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
822\r
823///\r
824/// ACPI RAS Feature Table definition.\r
825///\r
826typedef struct {\r
827 EFI_ACPI_DESCRIPTION_HEADER Header;\r
828 UINT8 PlatformCommunicationChannelIdentifier[12];\r
829} EFI_ACPI_5_0_RAS_FEATURE_TABLE;\r
830\r
831///\r
832/// RASF Version (as defined in ACPI 5.0 spec.)\r
833///\r
834#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01\r
835\r
836///\r
837/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
838///\r
839typedef struct {\r
840 UINT32 Signature;\r
841 UINT16 Command;\r
842 UINT16 Status;\r
843 UINT16 Version;\r
844 UINT8 RASCapabilities[16];\r
845 UINT8 SetRASCapabilities[16];\r
846 UINT16 NumberOfRASFParameterBlocks;\r
847 UINT32 SetRASCapabilitiesStatus;\r
848} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
849\r
850///\r
851/// ACPI RASF PCC command code\r
852///\r
853#define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
854\r
855///\r
856/// ACPI RASF Platform RAS Capabilities\r
857///\r
858#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
859#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
860\r
861///\r
862/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
863///\r
864typedef struct {\r
865 UINT16 Type;\r
866 UINT16 Version;\r
867 UINT16 Length;\r
868 UINT16 PatrolScrubCommand;\r
869 UINT64 RequestedAddressRange[2];\r
870 UINT64 ActualAddressRange[2];\r
871 UINT16 Flags;\r
872 UINT8 RequestedSpeed;\r
873} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
874\r
875///\r
876/// ACPI RASF Patrol Scrub command\r
877///\r
878#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
879#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
880#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
881\r
882///\r
883/// Memory Power State Table definition.\r
884///\r
885typedef struct {\r
886 EFI_ACPI_DESCRIPTION_HEADER Header;\r
887 UINT8 PlatformCommunicationChannelIdentifier;\r
888 UINT8 Reserved[3];\r
889// Memory Power Node Structure\r
890// Memory Power State Characteristics\r
891} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;\r
892\r
893///\r
894/// MPST Version (as defined in ACPI 5.0 spec.)\r
895///\r
896#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
897\r
898///\r
899/// MPST Platform Communication Channel Shared Memory Region definition.\r
900///\r
901typedef struct {\r
902 UINT32 Signature;\r
903 UINT16 Command;\r
904 UINT16 Status;\r
905 UINT32 MemoryPowerCommandRegister;\r
906 UINT32 MemoryPowerStatusRegister;\r
907 UINT32 PowerStateId;\r
908 UINT32 MemoryPowerNodeId;\r
909 UINT64 MemoryEnergyConsumed;\r
910 UINT64 ExpectedAveragePowerComsuned;\r
911} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
912\r
913///\r
914/// ACPI MPST PCC command code\r
915///\r
916#define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
917\r
918///\r
919/// ACPI MPST Memory Power command\r
920///\r
921#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
922#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
923#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
924#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
925\r
926///\r
927/// MPST Memory Power Node Table\r
928///\r
929typedef struct {\r
930 UINT8 PowerStateValue;\r
931 UINT8 PowerStateInformationIndex;\r
932} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;\r
933\r
934typedef struct {\r
935 UINT8 Flag;\r
936 UINT8 Reserved;\r
937 UINT16 MemoryPowerNodeId;\r
938 UINT32 Length;\r
939 UINT64 AddressBase;\r
940 UINT64 AddressLength;\r
941 UINT32 NumberOfPowerStates;\r
942 UINT32 NumberOfPhysicalComponents;\r
943//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
944//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
945} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;\r
946\r
947#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
948#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
949#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
950\r
951typedef struct {\r
952 UINT16 MemoryPowerNodeCount;\r
953 UINT8 Reserved[2];\r
954} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;\r
955\r
956///\r
957/// MPST Memory Power State Characteristics Table\r
958///\r
959typedef struct {\r
960 UINT8 PowerStateStructureID;\r
961 UINT8 Flag;\r
962 UINT16 Reserved;\r
963 UINT32 AveragePowerConsumedInMPS0;\r
964 UINT32 RelativePowerSavingToMPS0;\r
965 UINT64 ExitLatencyToMPS0;\r
966} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
967\r
968#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
969#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
970#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
971\r
972typedef struct {\r
973 UINT16 MemoryPowerStateCharacteristicsCount;\r
974 UINT8 Reserved[2];\r
975} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
976\r
977///\r
978/// Memory Topology Table definition.\r
979///\r
980typedef struct {\r
981 EFI_ACPI_DESCRIPTION_HEADER Header;\r
982 UINT32 Reserved;\r
983} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;\r
984\r
985///\r
986/// PMTT Version (as defined in ACPI 5.0 spec.)\r
987///\r
988#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
989\r
990///\r
991/// Common Memory Aggregator Device Structure.\r
992///\r
993typedef struct {\r
994 UINT8 Type;\r
995 UINT8 Reserved;\r
996 UINT16 Length;\r
997 UINT16 Flags;\r
998 UINT16 Reserved1;\r
999} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1000\r
1001///\r
1002/// Memory Aggregator Device Type\r
1003///\r
1004#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1005#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1006#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1007\r
1008///\r
1009/// Socket Memory Aggregator Device Structure.\r
1010///\r
1011typedef struct {\r
1012 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
fa8801f5
JY		 1013 UINT16 SocketIdentifier;\r
1014 UINT16 Reserved;\r
4a18b92c
JY		 1015//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1016} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1017\r
1018///\r
1019/// MemoryController Memory Aggregator Device Structure.\r
1020///\r
1021typedef struct {\r
1022 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1023 UINT32 ReadLatency;\r
1024 UINT32 WriteLatency;\r
1025 UINT32 ReadBandwidth;\r
1026 UINT32 WriteBandwidth;\r
1027 UINT16 OptimalAccessUnit;\r
1028 UINT16 OptimalAccessAlignment;\r
1029 UINT16 Reserved;\r
1030 UINT16 NumberOfProximityDomains;\r
1031//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1032//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1033} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1034\r
1035///\r
1036/// DIMM Memory Aggregator Device Structure.\r
1037///\r
1038typedef struct {\r
1039 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1040 UINT16 PhysicalComponentIdentifier;\r
1041 UINT16 Reserved;\r
1042 UINT32 SizeOfDimm;\r
1043 UINT32 SmbiosHandle;\r
1044} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1045\r
1046///\r
1047/// Boot Graphics Resource Table definition.\r
1048///\r
1049typedef struct {\r
1050 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1051 ///\r
1052 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1053 ///\r
1054 UINT16 Version;\r
1055 ///\r
1056 /// 1-byte status field indicating current status about the table.\r
1057 /// Bits[7:1] = Reserved (must be zero)\r
1058 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1059 ///\r
1060 UINT8 Status;\r
1061 ///\r
1062 /// 1-byte enumerated type field indicating format of the image.\r
1063 /// 0 = Bitmap\r
1064 /// 1 - 255 Reserved (for future use)\r
1065 ///\r
1066 UINT8 ImageType;\r
1067 ///\r
1068 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1069 /// of the image bitmap.\r
1070 ///\r
1071 UINT64 ImageAddress;\r
1072 ///\r
1073 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1074 /// (X, Y) display offset of the top left corner of the boot image.\r
1075 /// The top left corner of the display is at offset (0, 0).\r
1076 ///\r
1077 UINT32 ImageOffsetX;\r
1078 ///\r
1079 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1080 /// (X, Y) display offset of the top left corner of the boot image.\r
1081 /// The top left corner of the display is at offset (0, 0).\r
1082 ///\r
1083 UINT32 ImageOffsetY;\r
1084} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1085\r
1086///\r
1087/// BGRT Revision\r
1088///\r
1089#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1090\r
1091///\r
1092/// BGRT Version\r
1093///\r
1094#define EFI_ACPI_5_0_BGRT_VERSION 0x01\r
1095\r
1096///\r
1097/// BGRT Status\r
1098///\r
f449affe
JY		 1099#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1100#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01\r
1101#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED\r
1102#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED\r
4a18b92c
JY		 1103\r
1104///\r
1105/// BGRT Image Type\r
1106///\r
1107#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00\r
1108\r
1109///\r
1110/// FPDT Version (as defined in ACPI 5.0 spec.)\r
1111///\r
1112#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1113\r
1114///\r
1115/// FPDT Performance Record Types\r
1116///\r
1117#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1118#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1119\r
1120///\r
1121/// FPDT Performance Record Revision\r
1122///\r
1123#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1124#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1125\r
1126///\r
1127/// FPDT Runtime Performance Record Types\r
1128///\r
1129#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1130#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1131#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1132\r
1133///\r
1134/// FPDT Runtime Performance Record Revision\r
1135///\r
1136#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1137#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1138#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1139\r
1140///\r
1141/// FPDT Performance Record header\r
1142///\r
1143typedef struct {\r
1144 UINT16 Type;\r
1145 UINT8 Length;\r
1146 UINT8 Revision;\r
1147} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;\r
1148\r
1149///\r
1150/// FPDT Performance Table header\r
1151///\r
1152typedef struct {\r
1153 UINT32 Signature;\r
1154 UINT32 Length;\r
1155} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;\r
1156\r
1157///\r
1158/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1159///\r
1160typedef struct {\r
1161 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1162 UINT32 Reserved;\r
1163 ///\r
1164 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1165 ///\r
1166 UINT64 BootPerformanceTablePointer;\r
1167} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1168\r
1169///\r
1170/// FPDT S3 Performance Table Pointer Record Structure\r
1171///\r
1172typedef struct {\r
1173 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1174 UINT32 Reserved;\r
1175 ///\r
1176 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1177 ///\r
1178 UINT64 S3PerformanceTablePointer;\r
1179} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1180\r
1181///\r
1182/// FPDT Firmware Basic Boot Performance Record Structure\r
1183///\r
1184typedef struct {\r
1185 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1186 UINT32 Reserved;\r
1187 ///\r
1188 /// Timer value logged at the beginning of firmware image execution.\r
1189 /// This may not always be zero or near zero.\r
1190 ///\r
1191 UINT64 ResetEnd;\r
1192 ///\r
1193 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1194 /// For non-UEFI compatible boots, this field must be zero.\r
1195 ///\r
1196 UINT64 OsLoaderLoadImageStart;\r
1197 ///\r
1198 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1199 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1200 /// to the INT 19h handler invocation.\r
1201 ///\r
1202 UINT64 OsLoaderStartImageStart;\r
1203 ///\r
1204 /// Timer value logged at the point when the OS loader calls the\r
1205 /// ExitBootServices function for UEFI compatible firmware.\r
1206 /// For non-UEFI compatible boots, this field must be zero.\r
1207 ///\r
1208 UINT64 ExitBootServicesEntry;\r
1209 ///\r
1210 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1211 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1212 /// For non-UEFI compatible boots, this field must be zero.\r
1213 ///\r
1214 UINT64 ExitBootServicesExit;\r
1215} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1216\r
1217///\r
1218/// FPDT Firmware Basic Boot Performance Table signature\r
1219///\r
1220#define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1221\r
1222//\r
1223// FPDT Firmware Basic Boot Performance Table\r
1224//\r
1225typedef struct {\r
1226 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1227 //\r
1228 // one or more Performance Records.\r
1229 //\r
1230} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1231\r
1232///\r
1233/// FPDT "S3PT" S3 Performance Table\r
1234///\r
1235#define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1236\r
1237//\r
1238// FPDT Firmware S3 Boot Performance Table\r
1239//\r
1240typedef struct {\r
1241 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1242 //\r
1243 // one or more Performance Records.\r
1244 //\r
1245} EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1246\r
1247///\r
1248/// FPDT Basic S3 Resume Performance Record\r
1249///\r
1250typedef struct {\r
1251 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1252 ///\r
1253 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1254 ///\r
1255 UINT32 ResumeCount;\r
1256 ///\r
1257 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1258 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1259 ///\r
1260 UINT64 FullResume;\r
1261 ///\r
1262 /// Average timer value of all resume cycles logged since the last full boot\r
1263 /// sequence, including the most recent resume. Note that the entire log of\r
1264 /// timer values does not need to be retained in order to calculate this average.\r
1265 ///\r
1266 UINT64 AverageResume;\r
1267} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;\r
1268\r
1269///\r
1270/// FPDT Basic S3 Suspend Performance Record\r
1271///\r
1272typedef struct {\r
1273 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1274 ///\r
1275 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1276 /// Only the most recent suspend cycle's timer value is retained.\r
1277 ///\r
1278 UINT64 SuspendStart;\r
1279 ///\r
1280 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1281 /// mechanism) used to trigger hardware entry to S3.\r
1282 /// Only the most recent suspend cycle's timer value is retained.\r
1283 ///\r
1284 UINT64 SuspendEnd;\r
1285} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;\r
1286\r
1287///\r
1288/// Firmware Performance Record Table definition.\r
1289///\r
1290typedef struct {\r
1291 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1292} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1293\r
1294///\r
1295/// Generic Timer Description Table definition.\r
1296///\r
1297typedef struct {\r
1298 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1299 UINT64 PhysicalAddress;\r
1300 UINT32 GlobalFlags;\r
1301 UINT32 SecurePL1TimerGSIV;\r
1302 UINT32 SecurePL1TimerFlags;\r
1303 UINT32 NonSecurePL1TimerGSIV;\r
1304 UINT32 NonSecurePL1TimerFlags;\r
1305 UINT32 VirtualTimerGSIV;\r
1306 UINT32 VirtualTimerFlags;\r
1307 UINT32 NonSecurePL2TimerGSIV;\r
1308 UINT32 NonSecurePL2TimerFlags;\r
1309} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1310\r
1311///\r
1312/// GTDT Version (as defined in ACPI 5.0 spec.)\r
1313///\r
1314#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1315\r
1316///\r
1317/// Global Flags. All other bits are reserved and must be 0.\r
1318///\r
1319#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0\r
1320#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1\r
1321\r
1322///\r
1323/// Timer Flags. All other bits are reserved and must be 0.\r
1324///\r
1325#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1326#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1327\r
1328///\r
1329/// Boot Error Record Table (BERT)\r
1330///\r
1331typedef struct {\r
1332 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1333 UINT32 BootErrorRegionLength;\r
1334 UINT64 BootErrorRegion;\r
1335} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1336\r
1337///\r
1338/// BERT Version (as defined in ACPI 5.0 spec.)\r
1339///\r
1340#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1341\r
1342///\r
1343/// Boot Error Region Block Status Definition\r
1344///\r
1345typedef struct {\r
1346 UINT32 UncorrectableErrorValid:1;\r
1347 UINT32 CorrectableErrorValid:1;\r
1348 UINT32 MultipleUncorrectableErrors:1;\r
1349 UINT32 MultipleCorrectableErrors:1;\r
1350 UINT32 ErrorDataEntryCount:10;\r
1351 UINT32 Reserved:18;\r
1352} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;\r
1353\r
1354///\r
1355/// Boot Error Region Definition\r
1356///\r
1357typedef struct {\r
1358 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1359 UINT32 RawDataOffset;\r
1360 UINT32 RawDataLength;\r
1361 UINT32 DataLength;\r
1362 UINT32 ErrorSeverity;\r
1363} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;\r
1364\r
1365//\r
1366// Boot Error Severity types\r
1367//\r
1368#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00\r
1369#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01\r
1370#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02\r
1371#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03\r
1372\r
1373///\r
1374/// Generic Error Data Entry Definition\r
1375///\r
1376typedef struct {\r
1377 UINT8 SectionType[16];\r
1378 UINT32 ErrorSeverity;\r
1379 UINT16 Revision;\r
1380 UINT8 ValidationBits;\r
1381 UINT8 Flags;\r
1382 UINT32 ErrorDataLength;\r
1383 UINT8 FruId[16];\r
1384 UINT8 FruText[20];\r
1385} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1386\r
1387///\r
1388/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)\r
1389///\r
1390#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1391\r
1392///\r
1393/// HEST - Hardware Error Source Table\r
1394///\r
1395typedef struct {\r
1396 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1397 UINT32 ErrorSourceCount;\r
1398} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1399\r
1400///\r
1401/// HEST Version (as defined in ACPI 5.0 spec.)\r
1402///\r
1403#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1404\r
1405//\r
1406// Error Source structure types.\r
1407//\r
1408#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1409#define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1410#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1411#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1412#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07\r
1413#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08\r
1414#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09\r
1415\r
1416//\r
1417// Error Source structure flags.\r
1418//\r
1419#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1420#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1421\r
1422///\r
1423/// IA-32 Architecture Machine Check Exception Structure Definition\r
1424///\r
1425typedef struct {\r
1426 UINT16 Type;\r
1427 UINT16 SourceId;\r
1428 UINT8 Reserved0[2];\r
1429 UINT8 Flags;\r
1430 UINT8 Enabled;\r
1431 UINT32 NumberOfRecordsToPreAllocate;\r
1432 UINT32 MaxSectionsPerRecord;\r
1433 UINT64 GlobalCapabilityInitData;\r
1434 UINT64 GlobalControlInitData;\r
1435 UINT8 NumberOfHardwareBanks;\r
1436 UINT8 Reserved1[7];\r
1437} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1438\r
1439///\r
1440/// IA-32 Architecture Machine Check Bank Structure Definition\r
1441///\r
1442typedef struct {\r
1443 UINT8 BankNumber;\r
1444 UINT8 ClearStatusOnInitialization;\r
1445 UINT8 StatusDataFormat;\r
1446 UINT8 Reserved0;\r
1447 UINT32 ControlRegisterMsrAddress;\r
1448 UINT64 ControlInitData;\r
1449 UINT32 StatusRegisterMsrAddress;\r
1450 UINT32 AddressRegisterMsrAddress;\r
1451 UINT32 MiscRegisterMsrAddress;\r
1452} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1453\r
1454///\r
1455/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1456///\r
1457#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1458#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1459#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1460\r
1461//\r
1462// Hardware Error Notification types. All other values are reserved\r
1463//\r
1464#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1465#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1466#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1467#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1468#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1469\r
1470///\r
1471/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1472///\r
1473typedef struct {\r
1474 UINT16 Type:1;\r
1475 UINT16 PollInterval:1;\r
1476 UINT16 SwitchToPollingThresholdValue:1;\r
1477 UINT16 SwitchToPollingThresholdWindow:1;\r
1478 UINT16 ErrorThresholdValue:1;\r
1479 UINT16 ErrorThresholdWindow:1;\r
1480 UINT16 Reserved:10;\r
1481} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1482\r
1483///\r
1484/// Hardware Error Notification Structure Definition\r
1485///\r
1486typedef struct {\r
1487 UINT8 Type;\r
1488 UINT8 Length;\r
1489 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1490 UINT32 PollInterval;\r
1491 UINT32 Vector;\r
1492 UINT32 SwitchToPollingThresholdValue;\r
1493 UINT32 SwitchToPollingThresholdWindow;\r
1494 UINT32 ErrorThresholdValue;\r
1495 UINT32 ErrorThresholdWindow;\r
1496} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1497\r
1498///\r
1499/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1500///\r
1501typedef struct {\r
1502 UINT16 Type;\r
1503 UINT16 SourceId;\r
1504 UINT8 Reserved0[2];\r
1505 UINT8 Flags;\r
1506 UINT8 Enabled;\r
1507 UINT32 NumberOfRecordsToPreAllocate;\r
1508 UINT32 MaxSectionsPerRecord;\r
1509 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1510 UINT8 NumberOfHardwareBanks;\r
1511 UINT8 Reserved1[3];\r
1512} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1513\r
1514///\r
1515/// IA-32 Architecture NMI Error Structure Definition\r
1516///\r
1517typedef struct {\r
1518 UINT16 Type;\r
1519 UINT16 SourceId;\r
1520 UINT8 Reserved0[2];\r
1521 UINT32 NumberOfRecordsToPreAllocate;\r
1522 UINT32 MaxSectionsPerRecord;\r
1523 UINT32 MaxRawDataLength;\r
1524} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1525\r
1526///\r
1527/// PCI Express Root Port AER Structure Definition\r
1528///\r
1529typedef struct {\r
1530 UINT16 Type;\r
1531 UINT16 SourceId;\r
1532 UINT8 Reserved0[2];\r
1533 UINT8 Flags;\r
1534 UINT8 Enabled;\r
1535 UINT32 NumberOfRecordsToPreAllocate;\r
1536 UINT32 MaxSectionsPerRecord;\r
1537 UINT32 Bus;\r
1538 UINT16 Device;\r
1539 UINT16 Function;\r
1540 UINT16 DeviceControl;\r
1541 UINT8 Reserved1[2];\r
1542 UINT32 UncorrectableErrorMask;\r
1543 UINT32 UncorrectableErrorSeverity;\r
1544 UINT32 CorrectableErrorMask;\r
1545 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1546 UINT32 RootErrorCommand;\r
1547} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1548\r
1549///\r
1550/// PCI Express Device AER Structure Definition\r
1551///\r
1552typedef struct {\r
1553 UINT16 Type;\r
1554 UINT16 SourceId;\r
1555 UINT8 Reserved0[2];\r
1556 UINT8 Flags;\r
1557 UINT8 Enabled;\r
1558 UINT32 NumberOfRecordsToPreAllocate;\r
1559 UINT32 MaxSectionsPerRecord;\r
1560 UINT32 Bus;\r
1561 UINT16 Device;\r
1562 UINT16 Function;\r
1563 UINT16 DeviceControl;\r
1564 UINT8 Reserved1[2];\r
1565 UINT32 UncorrectableErrorMask;\r
1566 UINT32 UncorrectableErrorSeverity;\r
1567 UINT32 CorrectableErrorMask;\r
1568 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1569} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1570\r
1571///\r
1572/// PCI Express Bridge AER Structure Definition\r
1573///\r
1574typedef struct {\r
1575 UINT16 Type;\r
1576 UINT16 SourceId;\r
1577 UINT8 Reserved0[2];\r
1578 UINT8 Flags;\r
1579 UINT8 Enabled;\r
1580 UINT32 NumberOfRecordsToPreAllocate;\r
1581 UINT32 MaxSectionsPerRecord;\r
1582 UINT32 Bus;\r
1583 UINT16 Device;\r
1584 UINT16 Function;\r
1585 UINT16 DeviceControl;\r
1586 UINT8 Reserved1[2];\r
1587 UINT32 UncorrectableErrorMask;\r
1588 UINT32 UncorrectableErrorSeverity;\r
1589 UINT32 CorrectableErrorMask;\r
1590 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1591 UINT32 SecondaryUncorrectableErrorMask;\r
1592 UINT32 SecondaryUncorrectableErrorSeverity;\r
1593 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1594} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1595\r
1596///\r
1597/// Generic Hardware Error Source Structure Definition\r
1598///\r
1599typedef struct {\r
1600 UINT16 Type;\r
1601 UINT16 SourceId;\r
1602 UINT16 RelatedSourceId;\r
1603 UINT8 Flags;\r
1604 UINT8 Enabled;\r
1605 UINT32 NumberOfRecordsToPreAllocate;\r
1606 UINT32 MaxSectionsPerRecord;\r
1607 UINT32 MaxRawDataLength;\r
1608 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1609 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1610 UINT32 ErrorStatusBlockLength;\r
1611} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1612\r
1613///\r
1614/// Generic Error Status Definition\r
1615///\r
1616typedef struct {\r
1617 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1618 UINT32 RawDataOffset;\r
1619 UINT32 RawDataLength;\r
1620 UINT32 DataLength;\r
1621 UINT32 ErrorSeverity;\r
1622} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;\r
1623\r
1624///\r
1625/// ERST - Error Record Serialization Table\r
1626///\r
1627typedef struct {\r
1628 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1629 UINT32 SerializationHeaderSize;\r
1630 UINT8 Reserved0[4];\r
1631 UINT32 InstructionEntryCount;\r
1632} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1633\r
1634///\r
1635/// ERST Version (as defined in ACPI 5.0 spec.)\r
1636///\r
1637#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1638\r
1639///\r
1640/// ERST Serialization Actions\r
1641///\r
1642#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00\r
1643#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01\r
1644#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1645#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03\r
1646#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04\r
1647#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05\r
1648#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06\r
1649#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07\r
1650#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08\r
1651#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09\r
1652#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A\r
1653#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1654#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1655#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1656#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1657\r
1658///\r
1659/// ERST Action Command Status\r
1660///\r
1661#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00\r
1662#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1663#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1664#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03\r
1665#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1666#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1667\r
1668///\r
1669/// ERST Serialization Instructions\r
1670///\r
1671#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00\r
1672#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01\r
1673#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02\r
1674#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03\r
1675#define EFI_ACPI_5_0_ERST_NOOP 0x04\r
1676#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05\r
1677#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06\r
1678#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07\r
1679#define EFI_ACPI_5_0_ERST_ADD 0x08\r
1680#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09\r
1681#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A\r
1682#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B\r
1683#define EFI_ACPI_5_0_ERST_STALL 0x0C\r
1684#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D\r
1685#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1686#define EFI_ACPI_5_0_ERST_GOTO 0x0F\r
1687#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1688#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11\r
1689#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12\r
1690\r
1691///\r
1692/// ERST Instruction Flags\r
1693///\r
1694#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01\r
1695\r
1696///\r
1697/// ERST Serialization Instruction Entry\r
1698///\r
1699typedef struct {\r
1700 UINT8 SerializationAction;\r
1701 UINT8 Instruction;\r
1702 UINT8 Flags;\r
1703 UINT8 Reserved0;\r
1704 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1705 UINT64 Value;\r
1706 UINT64 Mask;\r
1707} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1708\r
1709///\r
1710/// EINJ - Error Injection Table\r
1711///\r
1712typedef struct {\r
1713 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1714 UINT32 InjectionHeaderSize;\r
1715 UINT8 InjectionFlags;\r
1716 UINT8 Reserved0[3];\r
1717 UINT32 InjectionEntryCount;\r
1718} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;\r
1719\r
1720///\r
1721/// EINJ Version (as defined in ACPI 5.0 spec.)\r
1722///\r
1723#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01\r
1724\r
1725///\r
1726/// EINJ Error Injection Actions\r
1727///\r
1728#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1729#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1730#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02\r
1731#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03\r
1732#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04\r
1733#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05\r
1734#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06\r
1735#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07\r
1736#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF\r
1737\r
1738///\r
1739/// EINJ Action Command Status\r
1740///\r
1741#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00\r
1742#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1743#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02\r
1744\r
1745///\r
1746/// EINJ Error Type Definition\r
1747///\r
1748#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1749#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1750#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1751#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1752#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1753#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1754#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1755#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1756#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1757#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1758#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1759#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1760\r
1761///\r
1762/// EINJ Injection Instructions\r
1763///\r
1764#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00\r
1765#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01\r
1766#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02\r
1767#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03\r
1768#define EFI_ACPI_5_0_EINJ_NOOP 0x04\r
1769\r
1770///\r
1771/// EINJ Instruction Flags\r
1772///\r
1773#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01\r
1774\r
1775///\r
1776/// EINJ Injection Instruction Entry\r
1777///\r
1778typedef struct {\r
1779 UINT8 InjectionAction;\r
1780 UINT8 Instruction;\r
1781 UINT8 Flags;\r
1782 UINT8 Reserved0;\r
1783 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1784 UINT64 Value;\r
1785 UINT64 Mask;\r
1786} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1787\r
1788///\r
1789/// EINJ Trigger Action Table\r
1790///\r
1791typedef struct {\r
1792 UINT32 HeaderSize;\r
1793 UINT32 Revision;\r
1794 UINT32 TableSize;\r
1795 UINT32 EntryCount;\r
1796} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;\r
1797\r
1798///\r
1799/// Platform Communications Channel Table (PCCT)\r
1800///\r
1801typedef struct {\r
1802 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1803 UINT32 Flags;\r
17aa79bf 1804 UINT64 Reserved;\r
4a18b92c
JY		 1805} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1806\r
1807///\r
1808/// PCCT Version (as defined in ACPI 5.0 spec.)\r
1809///\r
1810#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1811\r
1812///\r
1813/// PCCT Global Flags\r
1814///\r
1815#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1816\r
1817//\r
1818// PCCT Subspace type\r
1819//\r
1820#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1821\r
1822///\r
1823/// PCC Subspace Structure Header\r
1824///\r
1825typedef struct {\r
1826 UINT8 Type;\r
1827 UINT8 Length;\r
1828} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;\r
1829\r
1830///\r
1831/// Generic Communications Subspace Structure\r
1832///\r
1833typedef struct {\r
1834 UINT8 Type;\r
1835 UINT8 Length;\r
1836 UINT8 Reserved[6];\r
1837 UINT64 BaseAddress;\r
1838 UINT64 AddressLength;\r
1839 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1840 UINT64 DoorbellPreserve;\r
1841 UINT64 DoorbellWrite;\r
83218902
JY		 1842 UINT32 NominalLatency;\r
1843 UINT32 MaximumPeriodicAccessRate;\r
1844 UINT16 MinimumRequestTurnaroundTime;\r
4a18b92c
JY		 1845} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;\r
1846\r
1847///\r
1848/// Generic Communications Channel Shared Memory Region\r
1849///\r
1850\r
1851typedef struct {\r
1852 UINT8 Command;\r
1853 UINT8 Reserved:7;\r
1854 UINT8 GenerateSci:1;\r
1855} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1856\r
1857typedef struct {\r
1858 UINT8 CommandComplete:1;\r
1859 UINT8 SciDoorbell:1;\r
1860 UINT8 Error:1;\r
a71c80b6
SEHM		 1861 UINT8 PlatformNotification:1;\r
1862 UINT8 Reserved:4;\r
4a18b92c
JY		 1863 UINT8 Reserved1;\r
1864} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1865\r
1866typedef struct {\r
1867 UINT32 Signature;\r
1868 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1869 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1870} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1871\r
1872//\r
1873// Known table signatures\r
1874//\r
1875\r
1876///\r
1877/// "RSD PTR " Root System Description Pointer\r
1878///\r
9095d37b 1879#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
4a18b92c
JY		 1880\r
1881///\r
1882/// "APIC" Multiple APIC Description Table\r
1883///\r
1884#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1885\r
1886///\r
1887/// "BERT" Boot Error Record Table\r
1888///\r
1889#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1890\r
1891///\r
1892/// "BGRT" Boot Graphics Resource Table\r
1893///\r
1894#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1895\r
1896///\r
1897/// "CPEP" Corrected Platform Error Polling Table\r
1898///\r
1899#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1900\r
1901///\r
1902/// "DSDT" Differentiated System Description Table\r
1903///\r
1904#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1905\r
1906///\r
1907/// "ECDT" Embedded Controller Boot Resources Table\r
1908///\r
1909#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1910\r
1911///\r
1912/// "EINJ" Error Injection Table\r
1913///\r
1914#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1915\r
1916///\r
1917/// "ERST" Error Record Serialization Table\r
1918///\r
1919#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1920\r
1921///\r
1922/// "FACP" Fixed ACPI Description Table\r
1923///\r
1924#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1925\r
1926///\r
1927/// "FACS" Firmware ACPI Control Structure\r
1928///\r
1929#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1930\r
1931///\r
1932/// "FPDT" Firmware Performance Data Table\r
1933///\r
1934#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1935\r
1936///\r
1937/// "GTDT" Generic Timer Description Table\r
1938///\r
1939#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1940\r
1941///\r
1942/// "HEST" Hardware Error Source Table\r
1943///\r
1944#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1945\r
1946///\r
1947/// "MPST" Memory Power State Table\r
1948///\r
1949#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1950\r
1951///\r
1952/// "MSCT" Maximum System Characteristics Table\r
1953///\r
1954#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1955\r
1956///\r
1957/// "PMTT" Platform Memory Topology Table\r
1958///\r
1959#define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1960\r
1961///\r
1962/// "PSDT" Persistent System Description Table\r
1963///\r
1964#define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1965\r
1966///\r
1967/// "RASF" ACPI RAS Feature Table\r
1968///\r
1969#define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1970\r
1971///\r
1972/// "RSDT" Root System Description Table\r
1973///\r
1974#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1975\r
1976///\r
1977/// "SBST" Smart Battery Specification Table\r
1978///\r
1979#define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1980\r
1981///\r
1982/// "SLIT" System Locality Information Table\r
1983///\r
1984#define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1985\r
1986///\r
1987/// "SRAT" System Resource Affinity Table\r
1988///\r
1989#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1990\r
1991///\r
1992/// "SSDT" Secondary System Description Table\r
1993///\r
1994#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
1995\r
1996///\r
1997/// "XSDT" Extended System Description Table\r
1998///\r
1999#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2000\r
2001///\r
2002/// "BOOT" MS Simple Boot Spec\r
2003///\r
2004#define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2005\r
2006///\r
2007/// "CSRT" MS Core System Resource Table\r
2008///\r
2009#define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2010\r
2011///\r
2012/// "DBG2" MS Debug Port 2 Spec\r
2013///\r
2014#define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2015\r
2016///\r
2017/// "DBGP" MS Debug Port Spec\r
2018///\r
2019#define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2020\r
2021///\r
2022/// "DMAR" DMA Remapping Table\r
2023///\r
2024#define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2025\r
f449affe
JY		 2026///\r
2027/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2028///\r
2029#define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2030\r
4a18b92c
JY		 2031///\r
2032/// "ETDT" Event Timer Description Table\r
2033///\r
2034#define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2035\r
2036///\r
2037/// "HPET" IA-PC High Precision Event Timer Table\r
2038///\r
2039#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2040\r
2041///\r
2042/// "iBFT" iSCSI Boot Firmware Table\r
2043///\r
2044#define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2045\r
2046///\r
2047/// "IVRS" I/O Virtualization Reporting Structure\r
2048///\r
2049#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2050\r
2051///\r
2052/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2053///\r
2054#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2055\r
2056///\r
2057/// "MCHI" Management Controller Host Interface Table\r
2058///\r
2059#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2060\r
2061///\r
2062/// "MSDM" MS Data Management Table\r
2063///\r
2064#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2065\r
2066///\r
2067/// "SLIC" MS Software Licensing Table Specification\r
2068///\r
2069#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2070\r
2071///\r
2072/// "SPCR" Serial Port Concole Redirection Table\r
2073///\r
2074#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2075\r
2076///\r
2077/// "SPMI" Server Platform Management Interface Table\r
2078///\r
2079#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2080\r
2081///\r
2082/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2083///\r
2084#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2085\r
2086///\r
2087/// "TPM2" Trusted Computing Platform 1 Table\r
2088///\r
2089#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2090\r
2091///\r
2092/// "UEFI" UEFI ACPI Data Table\r
2093///\r
2094#define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2095\r
2096///\r
f449affe 2097/// "WAET" Windows ACPI Emulated Devices Table\r
4a18b92c 2098///\r
f449affe
JY		 2099#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2100#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE\r
4a18b92c
JY		 2101\r
2102///\r
2103/// "WDAT" Watchdog Action Table\r
2104///\r
2105#define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2106\r
2107///\r
2108/// "WDRT" Watchdog Resource Table\r
2109///\r
2110#define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2111\r
2112///\r
2113/// "WPBT" MS Platform Binary Table\r
2114///\r
2115#define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2116\r
2117#pragma pack()\r
2118\r
2119#endif\r
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