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JY		 1/** @file \r
2 ACPI 6.0 definitions from the ACPI Specification Revision 6.0 April, 2015.\r
3\r
4 Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12**/\r
13\r
14#ifndef _ACPI_6_0_H_\r
15#define _ACPI_6_0_H_\r
16\r
17#include <IndustryStandard/Acpi51.h>\r
18\r
19//\r
20// Ensure proper structure formats\r
21//\r
22#pragma pack(1)\r
23\r
24///\r
25/// ACPI 6.0 Generic Address Space definition\r
26///\r
27typedef struct {\r
28 UINT8 AddressSpaceId;\r
29 UINT8 RegisterBitWidth;\r
30 UINT8 RegisterBitOffset;\r
31 UINT8 AccessSize;\r
32 UINT64 Address;\r
33} EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE;\r
34\r
35//\r
36// Generic Address Space Address IDs\r
37//\r
38#define EFI_ACPI_6_0_SYSTEM_MEMORY 0\r
39#define EFI_ACPI_6_0_SYSTEM_IO 1\r
40#define EFI_ACPI_6_0_PCI_CONFIGURATION_SPACE 2\r
41#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER 3\r
42#define EFI_ACPI_6_0_SMBUS 4\r
43#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
44#define EFI_ACPI_6_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
45\r
46//\r
47// Generic Address Space Access Sizes\r
48//\r
49#define EFI_ACPI_6_0_UNDEFINED 0\r
50#define EFI_ACPI_6_0_BYTE 1\r
51#define EFI_ACPI_6_0_WORD 2\r
52#define EFI_ACPI_6_0_DWORD 3\r
53#define EFI_ACPI_6_0_QWORD 4\r
54\r
55//\r
56// ACPI 6.0 table structures\r
57//\r
58\r
59///\r
60/// Root System Description Pointer Structure\r
61///\r
62typedef struct {\r
63 UINT64 Signature;\r
64 UINT8 Checksum;\r
65 UINT8 OemId[6];\r
66 UINT8 Revision;\r
67 UINT32 RsdtAddress;\r
68 UINT32 Length;\r
69 UINT64 XsdtAddress;\r
70 UINT8 ExtendedChecksum;\r
71 UINT8 Reserved[3];\r
72} EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
73\r
74///\r
75/// RSD_PTR Revision (as defined in ACPI 6.0 spec.)\r
76///\r
77#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.0) says current value is 2\r
78\r
79///\r
80/// Common table header, this prefaces all ACPI tables, including FACS, but\r
81/// excluding the RSD PTR structure\r
82///\r
83typedef struct {\r
84 UINT32 Signature;\r
85 UINT32 Length;\r
86} EFI_ACPI_6_0_COMMON_HEADER;\r
87\r
88//\r
89// Root System Description Table\r
90// No definition needed as it is a common description table header, the same with \r
91// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
92//\r
93\r
94///\r
95/// RSDT Revision (as defined in ACPI 6.0 spec.)\r
96///\r
97#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
98\r
99//\r
100// Extended System Description Table\r
101// No definition needed as it is a common description table header, the same with \r
102// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
103//\r
104\r
105///\r
106/// XSDT Revision (as defined in ACPI 6.0 spec.)\r
107///\r
108#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
109\r
110///\r
111/// Fixed ACPI Description Table Structure (FADT)\r
112///\r
113typedef struct {\r
114 EFI_ACPI_DESCRIPTION_HEADER Header;\r
115 UINT32 FirmwareCtrl;\r
116 UINT32 Dsdt;\r
117 UINT8 Reserved0;\r
118 UINT8 PreferredPmProfile;\r
119 UINT16 SciInt;\r
120 UINT32 SmiCmd;\r
121 UINT8 AcpiEnable;\r
122 UINT8 AcpiDisable;\r
123 UINT8 S4BiosReq;\r
124 UINT8 PstateCnt;\r
125 UINT32 Pm1aEvtBlk;\r
126 UINT32 Pm1bEvtBlk;\r
127 UINT32 Pm1aCntBlk;\r
128 UINT32 Pm1bCntBlk;\r
129 UINT32 Pm2CntBlk;\r
130 UINT32 PmTmrBlk;\r
131 UINT32 Gpe0Blk;\r
132 UINT32 Gpe1Blk;\r
133 UINT8 Pm1EvtLen;\r
134 UINT8 Pm1CntLen;\r
135 UINT8 Pm2CntLen;\r
136 UINT8 PmTmrLen;\r
137 UINT8 Gpe0BlkLen;\r
138 UINT8 Gpe1BlkLen;\r
139 UINT8 Gpe1Base;\r
140 UINT8 CstCnt;\r
141 UINT16 PLvl2Lat;\r
142 UINT16 PLvl3Lat;\r
143 UINT16 FlushSize;\r
144 UINT16 FlushStride;\r
145 UINT8 DutyOffset;\r
146 UINT8 DutyWidth;\r
147 UINT8 DayAlrm;\r
148 UINT8 MonAlrm;\r
149 UINT8 Century;\r
150 UINT16 IaPcBootArch;\r
151 UINT8 Reserved1;\r
152 UINT32 Flags;\r
153 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
154 UINT8 ResetValue;\r
155 UINT16 ArmBootArch;\r
156 UINT8 MinorVersion;\r
157 UINT64 XFirmwareCtrl;\r
158 UINT64 XDsdt;\r
159 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
160 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
161 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
162 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
163 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
164 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
165 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
166 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
167 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
168 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
169 UINT64 HypervisorVendorIdentity;\r
170} EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
171\r
172///\r
173/// FADT Version (as defined in ACPI 6.0 spec.)\r
174///\r
175#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
176#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x00\r
177\r
178//\r
179// Fixed ACPI Description Table Preferred Power Management Profile\r
180//\r
181#define EFI_ACPI_6_0_PM_PROFILE_UNSPECIFIED 0\r
182#define EFI_ACPI_6_0_PM_PROFILE_DESKTOP 1\r
183#define EFI_ACPI_6_0_PM_PROFILE_MOBILE 2\r
184#define EFI_ACPI_6_0_PM_PROFILE_WORKSTATION 3\r
185#define EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
186#define EFI_ACPI_6_0_PM_PROFILE_SOHO_SERVER 5\r
187#define EFI_ACPI_6_0_PM_PROFILE_APPLIANCE_PC 6\r
188#define EFI_ACPI_6_0_PM_PROFILE_PERFORMANCE_SERVER 7\r
189#define EFI_ACPI_6_0_PM_PROFILE_TABLET 8\r
190\r
191//\r
192// Fixed ACPI Description Table Boot Architecture Flags\r
193// All other bits are reserved and must be set to 0.\r
194//\r
195#define EFI_ACPI_6_0_LEGACY_DEVICES BIT0\r
196#define EFI_ACPI_6_0_8042 BIT1\r
197#define EFI_ACPI_6_0_VGA_NOT_PRESENT BIT2\r
198#define EFI_ACPI_6_0_MSI_NOT_SUPPORTED BIT3\r
199#define EFI_ACPI_6_0_PCIE_ASPM_CONTROLS BIT4\r
200#define EFI_ACPI_6_0_CMOS_RTC_NOT_PRESENT BIT5\r
201\r
202//\r
203// Fixed ACPI Description Table Arm Boot Architecture Flags\r
204// All other bits are reserved and must be set to 0.\r
205//\r
206#define EFI_ACPI_6_0_ARM_PSCI_COMPLIANT BIT0\r
207#define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1\r
208\r
209//\r
210// Fixed ACPI Description Table Fixed Feature Flags\r
211// All other bits are reserved and must be set to 0.\r
212//\r
213#define EFI_ACPI_6_0_WBINVD BIT0\r
214#define EFI_ACPI_6_0_WBINVD_FLUSH BIT1\r
215#define EFI_ACPI_6_0_PROC_C1 BIT2\r
216#define EFI_ACPI_6_0_P_LVL2_UP BIT3\r
217#define EFI_ACPI_6_0_PWR_BUTTON BIT4\r
218#define EFI_ACPI_6_0_SLP_BUTTON BIT5\r
219#define EFI_ACPI_6_0_FIX_RTC BIT6\r
220#define EFI_ACPI_6_0_RTC_S4 BIT7\r
221#define EFI_ACPI_6_0_TMR_VAL_EXT BIT8\r
222#define EFI_ACPI_6_0_DCK_CAP BIT9\r
223#define EFI_ACPI_6_0_RESET_REG_SUP BIT10\r
224#define EFI_ACPI_6_0_SEALED_CASE BIT11\r
225#define EFI_ACPI_6_0_HEADLESS BIT12\r
226#define EFI_ACPI_6_0_CPU_SW_SLP BIT13\r
227#define EFI_ACPI_6_0_PCI_EXP_WAK BIT14\r
228#define EFI_ACPI_6_0_USE_PLATFORM_CLOCK BIT15\r
229#define EFI_ACPI_6_0_S4_RTC_STS_VALID BIT16\r
230#define EFI_ACPI_6_0_REMOTE_POWER_ON_CAPABLE BIT17\r
231#define EFI_ACPI_6_0_FORCE_APIC_CLUSTER_MODEL BIT18\r
232#define EFI_ACPI_6_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
233#define EFI_ACPI_6_0_HW_REDUCED_ACPI BIT20\r
234#define EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
235\r
236///\r
237/// Firmware ACPI Control Structure\r
238///\r
239typedef struct {\r
240 UINT32 Signature;\r
241 UINT32 Length;\r
242 UINT32 HardwareSignature;\r
243 UINT32 FirmwareWakingVector;\r
244 UINT32 GlobalLock;\r
245 UINT32 Flags;\r
246 UINT64 XFirmwareWakingVector;\r
247 UINT8 Version;\r
248 UINT8 Reserved0[3];\r
249 UINT32 OspmFlags;\r
250 UINT8 Reserved1[24];\r
251} EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
252\r
253///\r
254/// FACS Version (as defined in ACPI 6.0 spec.)\r
255///\r
256#define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
257\r
258///\r
259/// Firmware Control Structure Feature Flags\r
260/// All other bits are reserved and must be set to 0.\r
261///\r
262#define EFI_ACPI_6_0_S4BIOS_F BIT0\r
263#define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1\r
264\r
265///\r
266/// OSPM Enabled Firmware Control Structure Flags\r
267/// All other bits are reserved and must be set to 0.\r
268///\r
269#define EFI_ACPI_6_0_OSPM_64BIT_WAKE_F BIT0\r
270\r
271//\r
272// Differentiated System Description Table,\r
273// Secondary System Description Table\r
274// and Persistent System Description Table,\r
275// no definition needed as they are common description table header, the same with\r
276// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
277//\r
278#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
279#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
280\r
281///\r
282/// Multiple APIC Description Table header definition. The rest of the table\r
283/// must be defined in a platform specific manner.\r
284///\r
285typedef struct {\r
286 EFI_ACPI_DESCRIPTION_HEADER Header;\r
287 UINT32 LocalApicAddress;\r
288 UINT32 Flags;\r
289} EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
290\r
291///\r
292/// MADT Revision (as defined in ACPI 6.0 spec.)\r
293///\r
294#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
295\r
296///\r
297/// Multiple APIC Flags\r
298/// All other bits are reserved and must be set to 0.\r
299///\r
300#define EFI_ACPI_6_0_PCAT_COMPAT BIT0\r
301\r
302//\r
303// Multiple APIC Description Table APIC structure types\r
304// All other values between 0x0D and 0x7F are reserved and\r
305// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
306//\r
307#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC 0x00\r
308#define EFI_ACPI_6_0_IO_APIC 0x01\r
309#define EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
310#define EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
311#define EFI_ACPI_6_0_LOCAL_APIC_NMI 0x04\r
312#define EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
313#define EFI_ACPI_6_0_IO_SAPIC 0x06\r
314#define EFI_ACPI_6_0_LOCAL_SAPIC 0x07\r
315#define EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
316#define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC 0x09\r
317#define EFI_ACPI_6_0_LOCAL_X2APIC_NMI 0x0A\r
318#define EFI_ACPI_6_0_GIC 0x0B\r
319#define EFI_ACPI_6_0_GICD 0x0C\r
320#define EFI_ACPI_6_0_GIC_MSI_FRAME 0x0D\r
321#define EFI_ACPI_6_0_GICR 0x0E\r
322#define EFI_ACPI_6_0_GIC_ITS 0x0F\r
323\r
324//\r
325// APIC Structure Definitions\r
326//\r
327\r
328///\r
329/// Processor Local APIC Structure Definition\r
330///\r
331typedef struct {\r
332 UINT8 Type;\r
333 UINT8 Length;\r
334 UINT8 AcpiProcessorUid;\r
335 UINT8 ApicId;\r
336 UINT32 Flags;\r
337} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
338\r
339///\r
340/// Local APIC Flags. All other bits are reserved and must be 0.\r
341///\r
342#define EFI_ACPI_6_0_LOCAL_APIC_ENABLED BIT0\r
343\r
344///\r
345/// IO APIC Structure\r
346///\r
347typedef struct {\r
348 UINT8 Type;\r
349 UINT8 Length;\r
350 UINT8 IoApicId;\r
351 UINT8 Reserved;\r
352 UINT32 IoApicAddress;\r
353 UINT32 GlobalSystemInterruptBase;\r
354} EFI_ACPI_6_0_IO_APIC_STRUCTURE;\r
355\r
356///\r
357/// Interrupt Source Override Structure\r
358///\r
359typedef struct {\r
360 UINT8 Type;\r
361 UINT8 Length;\r
362 UINT8 Bus;\r
363 UINT8 Source;\r
364 UINT32 GlobalSystemInterrupt;\r
365 UINT16 Flags;\r
366} EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
367\r
368///\r
369/// Platform Interrupt Sources Structure Definition\r
370///\r
371typedef struct {\r
372 UINT8 Type;\r
373 UINT8 Length;\r
374 UINT16 Flags;\r
375 UINT8 InterruptType;\r
376 UINT8 ProcessorId;\r
377 UINT8 ProcessorEid;\r
378 UINT8 IoSapicVector;\r
379 UINT32 GlobalSystemInterrupt;\r
380 UINT32 PlatformInterruptSourceFlags;\r
381 UINT8 CpeiProcessorOverride;\r
382 UINT8 Reserved[31];\r
383} EFI_ACPI_6_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
384\r
385//\r
386// MPS INTI flags.\r
387// All other bits are reserved and must be set to 0.\r
388//\r
389#define EFI_ACPI_6_0_POLARITY (3 << 0)\r
390#define EFI_ACPI_6_0_TRIGGER_MODE (3 << 2)\r
391\r
392///\r
393/// Non-Maskable Interrupt Source Structure\r
394///\r
395typedef struct {\r
396 UINT8 Type;\r
397 UINT8 Length;\r
398 UINT16 Flags;\r
399 UINT32 GlobalSystemInterrupt;\r
400} EFI_ACPI_6_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
401\r
402///\r
403/// Local APIC NMI Structure\r
404///\r
405typedef struct {\r
406 UINT8 Type;\r
407 UINT8 Length;\r
408 UINT8 AcpiProcessorUid;\r
409 UINT16 Flags;\r
410 UINT8 LocalApicLint;\r
411} EFI_ACPI_6_0_LOCAL_APIC_NMI_STRUCTURE;\r
412\r
413///\r
414/// Local APIC Address Override Structure\r
415///\r
416typedef struct {\r
417 UINT8 Type;\r
418 UINT8 Length;\r
419 UINT16 Reserved;\r
420 UINT64 LocalApicAddress;\r
421} EFI_ACPI_6_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
422\r
423///\r
424/// IO SAPIC Structure\r
425///\r
426typedef struct {\r
427 UINT8 Type;\r
428 UINT8 Length;\r
429 UINT8 IoApicId;\r
430 UINT8 Reserved;\r
431 UINT32 GlobalSystemInterruptBase;\r
432 UINT64 IoSapicAddress;\r
433} EFI_ACPI_6_0_IO_SAPIC_STRUCTURE;\r
434\r
435///\r
436/// Local SAPIC Structure\r
437/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
438///\r
439typedef struct {\r
440 UINT8 Type;\r
441 UINT8 Length;\r
442 UINT8 AcpiProcessorId;\r
443 UINT8 LocalSapicId;\r
444 UINT8 LocalSapicEid;\r
445 UINT8 Reserved[3];\r
446 UINT32 Flags;\r
447 UINT32 ACPIProcessorUIDValue;\r
448} EFI_ACPI_6_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
449\r
450///\r
451/// Platform Interrupt Sources Structure\r
452///\r
453typedef struct {\r
454 UINT8 Type;\r
455 UINT8 Length;\r
456 UINT16 Flags;\r
457 UINT8 InterruptType;\r
458 UINT8 ProcessorId;\r
459 UINT8 ProcessorEid;\r
460 UINT8 IoSapicVector;\r
461 UINT32 GlobalSystemInterrupt;\r
462 UINT32 PlatformInterruptSourceFlags;\r
463} EFI_ACPI_6_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
464\r
465///\r
466/// Platform Interrupt Source Flags.\r
467/// All other bits are reserved and must be set to 0.\r
468///\r
469#define EFI_ACPI_6_0_CPEI_PROCESSOR_OVERRIDE BIT0\r
470\r
471///\r
472/// Processor Local x2APIC Structure Definition\r
473///\r
474typedef struct {\r
475 UINT8 Type;\r
476 UINT8 Length;\r
477 UINT8 Reserved[2];\r
478 UINT32 X2ApicId;\r
479 UINT32 Flags;\r
480 UINT32 AcpiProcessorUid;\r
481} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
482\r
483///\r
484/// Local x2APIC NMI Structure\r
485///\r
486typedef struct {\r
487 UINT8 Type;\r
488 UINT8 Length;\r
489 UINT16 Flags;\r
490 UINT32 AcpiProcessorUid;\r
491 UINT8 LocalX2ApicLint;\r
492 UINT8 Reserved[3];\r
493} EFI_ACPI_6_0_LOCAL_X2APIC_NMI_STRUCTURE;\r
494\r
495///\r
496/// GIC Structure\r
497///\r
498typedef struct {\r
499 UINT8 Type;\r
500 UINT8 Length;\r
501 UINT16 Reserved;\r
502 UINT32 CPUInterfaceNumber;\r
503 UINT32 AcpiProcessorUid;\r
504 UINT32 Flags;\r
505 UINT32 ParkingProtocolVersion;\r
506 UINT32 PerformanceInterruptGsiv;\r
507 UINT64 ParkedAddress;\r
508 UINT64 PhysicalBaseAddress;\r
509 UINT64 GICV;\r
510 UINT64 GICH;\r
511 UINT32 VGICMaintenanceInterrupt;\r
512 UINT64 GICRBaseAddress;\r
513 UINT64 MPIDR;\r
514 UINT8 ProcessorPowerEfficiencyClass;\r
515 UINT8 Reserved2[3];\r
516} EFI_ACPI_6_0_GIC_STRUCTURE;\r
517\r
518///\r
519/// GIC Flags. All other bits are reserved and must be 0.\r
520///\r
521#define EFI_ACPI_6_0_GIC_ENABLED BIT0\r
522#define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1\r
523#define EFI_ACPI_6_0_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
524\r
525///\r
526/// GIC Distributor Structure\r
527///\r
528typedef struct {\r
529 UINT8 Type;\r
530 UINT8 Length;\r
531 UINT16 Reserved1;\r
532 UINT32 GicId;\r
533 UINT64 PhysicalBaseAddress;\r
534 UINT32 SystemVectorBase;\r
535 UINT32 Reserved2;\r
536} EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE;\r
537\r
538///\r
539/// GIC MSI Frame Structure\r
540///\r
541typedef struct {\r
542 UINT8 Type;\r
543 UINT8 Length;\r
544 UINT16 Reserved1;\r
545 UINT32 GicMsiFrameId;\r
546 UINT64 PhysicalBaseAddress;\r
547 UINT32 Flags;\r
548 UINT16 SPICount;\r
549 UINT16 SPIBase;\r
550} EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE;\r
551\r
552///\r
553/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
554///\r
555#define EFI_ACPI_6_0_SPI_COUNT_BASE_SELECT BIT0\r
556\r
557///\r
558/// GICR Structure\r
559///\r
560typedef struct {\r
561 UINT8 Type;\r
562 UINT8 Length;\r
563 UINT16 Reserved;\r
564 UINT64 DiscoveryRangeBaseAddress;\r
565 UINT32 DiscoveryRangeLength;\r
566} EFI_ACPI_6_0_GICR_STRUCTURE;\r
567\r
568///\r
569/// GIC Interrupt Translation Service Structure\r
570///\r
571typedef struct {\r
572 UINT8 Type;\r
573 UINT8 Length;\r
574 UINT16 Reserved;\r
575 UINT32 GicItsId;\r
576 UINT64 PhysicalBaseAddress;\r
577 UINT32 Reserved2;\r
578} EFI_ACPI_6_0_GIC_ITS_STRUCTURE;\r
579\r
580///\r
581/// Smart Battery Description Table (SBST)\r
582///\r
583typedef struct {\r
584 EFI_ACPI_DESCRIPTION_HEADER Header;\r
585 UINT32 WarningEnergyLevel;\r
586 UINT32 LowEnergyLevel;\r
587 UINT32 CriticalEnergyLevel;\r
588} EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
589\r
590///\r
591/// SBST Version (as defined in ACPI 6.0 spec.)\r
592///\r
593#define EFI_ACPI_6_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
594\r
595///\r
596/// Embedded Controller Boot Resources Table (ECDT)\r
597/// The table is followed by a null terminated ASCII string that contains\r
598/// a fully qualified reference to the name space object.\r
599///\r
600typedef struct {\r
601 EFI_ACPI_DESCRIPTION_HEADER Header;\r
602 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
603 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
604 UINT32 Uid;\r
605 UINT8 GpeBit;\r
606} EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
607\r
608///\r
609/// ECDT Version (as defined in ACPI 6.0 spec.)\r
610///\r
611#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
612\r
613///\r
614/// System Resource Affinity Table (SRAT). The rest of the table\r
615/// must be defined in a platform specific manner.\r
616///\r
617typedef struct {\r
618 EFI_ACPI_DESCRIPTION_HEADER Header;\r
619 UINT32 Reserved1; ///< Must be set to 1\r
620 UINT64 Reserved2;\r
621} EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
622\r
623///\r
624/// SRAT Version (as defined in ACPI 6.0 spec.)\r
625///\r
626#define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
627\r
628//\r
629// SRAT structure types.\r
630// All other values between 0x04 an 0xFF are reserved and\r
631// will be ignored by OSPM.\r
632//\r
633#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
634#define EFI_ACPI_6_0_MEMORY_AFFINITY 0x01\r
635#define EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
636#define EFI_ACPI_6_0_GICC_AFFINITY 0x03\r
637\r
638///\r
639/// Processor Local APIC/SAPIC Affinity Structure Definition\r
640///\r
641typedef struct {\r
642 UINT8 Type;\r
643 UINT8 Length;\r
644 UINT8 ProximityDomain7To0;\r
645 UINT8 ApicId;\r
646 UINT32 Flags;\r
647 UINT8 LocalSapicEid;\r
648 UINT8 ProximityDomain31To8[3];\r
649 UINT32 ClockDomain;\r
650} EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
651\r
652///\r
653/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
654///\r
655#define EFI_ACPI_6_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
656\r
657///\r
658/// Memory Affinity Structure Definition\r
659///\r
660typedef struct {\r
661 UINT8 Type;\r
662 UINT8 Length;\r
663 UINT32 ProximityDomain;\r
664 UINT16 Reserved1;\r
665 UINT32 AddressBaseLow;\r
666 UINT32 AddressBaseHigh;\r
667 UINT32 LengthLow;\r
668 UINT32 LengthHigh;\r
669 UINT32 Reserved2;\r
670 UINT32 Flags;\r
671 UINT64 Reserved3;\r
672} EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE;\r
673\r
674//\r
675// Memory Flags. All other bits are reserved and must be 0.\r
676//\r
677#define EFI_ACPI_6_0_MEMORY_ENABLED (1 << 0)\r
678#define EFI_ACPI_6_0_MEMORY_HOT_PLUGGABLE (1 << 1)\r
679#define EFI_ACPI_6_0_MEMORY_NONVOLATILE (1 << 2)\r
680\r
681///\r
682/// Processor Local x2APIC Affinity Structure Definition\r
683///\r
684typedef struct {\r
685 UINT8 Type;\r
686 UINT8 Length;\r
687 UINT8 Reserved1[2];\r
688 UINT32 ProximityDomain;\r
689 UINT32 X2ApicId;\r
690 UINT32 Flags;\r
691 UINT32 ClockDomain;\r
692 UINT8 Reserved2[4];\r
693} EFI_ACPI_6_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
694\r
695///\r
696/// GICC Affinity Structure Definition\r
697///\r
698typedef struct {\r
699 UINT8 Type;\r
700 UINT8 Length;\r
701 UINT32 ProximityDomain;\r
702 UINT32 AcpiProcessorUid;\r
703 UINT32 Flags;\r
704 UINT32 ClockDomain;\r
705} EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE;\r
706\r
707///\r
708/// GICC Flags. All other bits are reserved and must be 0.\r
709///\r
710#define EFI_ACPI_6_0_GICC_ENABLED (1 << 0)\r
711\r
712///\r
713/// System Locality Distance Information Table (SLIT).\r
714/// The rest of the table is a matrix.\r
715///\r
716typedef struct {\r
717 EFI_ACPI_DESCRIPTION_HEADER Header;\r
718 UINT64 NumberOfSystemLocalities;\r
719} EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
720\r
721///\r
722/// SLIT Version (as defined in ACPI 6.0 spec.)\r
723///\r
724#define EFI_ACPI_6_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
725\r
726///\r
727/// Corrected Platform Error Polling Table (CPEP)\r
728///\r
729typedef struct {\r
730 EFI_ACPI_DESCRIPTION_HEADER Header;\r
731 UINT8 Reserved[8];\r
732} EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
733\r
734///\r
735/// CPEP Version (as defined in ACPI 6.0 spec.)\r
736///\r
737#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
738\r
739//\r
740// CPEP processor structure types.\r
741//\r
742#define EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
743\r
744///\r
745/// Corrected Platform Error Polling Processor Structure Definition\r
746///\r
747typedef struct {\r
748 UINT8 Type;\r
749 UINT8 Length;\r
750 UINT8 ProcessorId;\r
751 UINT8 ProcessorEid;\r
752 UINT32 PollingInterval;\r
753} EFI_ACPI_6_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
754\r
755///\r
756/// Maximum System Characteristics Table (MSCT)\r
757///\r
758typedef struct {\r
759 EFI_ACPI_DESCRIPTION_HEADER Header;\r
760 UINT32 OffsetProxDomInfo;\r
761 UINT32 MaximumNumberOfProximityDomains;\r
762 UINT32 MaximumNumberOfClockDomains;\r
763 UINT64 MaximumPhysicalAddress;\r
764} EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
765\r
766///\r
767/// MSCT Version (as defined in ACPI 6.0 spec.)\r
768///\r
769#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
770\r
771///\r
772/// Maximum Proximity Domain Information Structure Definition\r
773///\r
774typedef struct {\r
775 UINT8 Revision;\r
776 UINT8 Length;\r
777 UINT32 ProximityDomainRangeLow;\r
778 UINT32 ProximityDomainRangeHigh;\r
779 UINT32 MaximumProcessorCapacity;\r
780 UINT64 MaximumMemoryCapacity;\r
781} EFI_ACPI_6_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
782\r
783///\r
784/// ACPI RAS Feature Table definition.\r
785///\r
786typedef struct {\r
787 EFI_ACPI_DESCRIPTION_HEADER Header;\r
788 UINT8 PlatformCommunicationChannelIdentifier[12];\r
789} EFI_ACPI_6_0_RAS_FEATURE_TABLE;\r
790\r
791///\r
792/// RASF Version (as defined in ACPI 6.0 spec.)\r
793///\r
794#define EFI_ACPI_6_0_RAS_FEATURE_TABLE_REVISION 0x01\r
795\r
796///\r
797/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
798///\r
799typedef struct {\r
800 UINT32 Signature;\r
801 UINT16 Command;\r
802 UINT16 Status;\r
803 UINT16 Version;\r
804 UINT8 RASCapabilities[16];\r
805 UINT8 SetRASCapabilities[16];\r
806 UINT16 NumberOfRASFParameterBlocks;\r
807 UINT32 SetRASCapabilitiesStatus;\r
808} EFI_ACPI_6_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
809\r
810///\r
811/// ACPI RASF PCC command code\r
812///\r
813#define EFI_ACPI_6_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
814\r
815///\r
816/// ACPI RASF Platform RAS Capabilities\r
817///\r
818#define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
819#define EFI_ACPI_6_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
820\r
821///\r
822/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
823///\r
824typedef struct {\r
825 UINT16 Type;\r
826 UINT16 Version;\r
827 UINT16 Length;\r
828 UINT16 PatrolScrubCommand;\r
829 UINT64 RequestedAddressRange[2];\r
830 UINT64 ActualAddressRange[2];\r
831 UINT16 Flags;\r
832 UINT8 RequestedSpeed;\r
833} EFI_ACPI_6_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
834\r
835///\r
836/// ACPI RASF Patrol Scrub command\r
837///\r
838#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
839#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
840#define EFI_ACPI_6_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
841\r
842///\r
843/// Memory Power State Table definition.\r
844///\r
845typedef struct {\r
846 EFI_ACPI_DESCRIPTION_HEADER Header;\r
847 UINT8 PlatformCommunicationChannelIdentifier;\r
848 UINT8 Reserved[3];\r
849// Memory Power Node Structure\r
850// Memory Power State Characteristics\r
851} EFI_ACPI_6_0_MEMORY_POWER_STATUS_TABLE;\r
852\r
853///\r
854/// MPST Version (as defined in ACPI 6.0 spec.)\r
855///\r
856#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
857\r
858///\r
859/// MPST Platform Communication Channel Shared Memory Region definition.\r
860///\r
861typedef struct {\r
862 UINT32 Signature;\r
863 UINT16 Command;\r
864 UINT16 Status;\r
865 UINT32 MemoryPowerCommandRegister;\r
866 UINT32 MemoryPowerStatusRegister;\r
867 UINT32 PowerStateId;\r
868 UINT32 MemoryPowerNodeId;\r
869 UINT64 MemoryEnergyConsumed;\r
870 UINT64 ExpectedAveragePowerComsuned;\r
871} EFI_ACPI_6_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
872\r
873///\r
874/// ACPI MPST PCC command code\r
875///\r
876#define EFI_ACPI_6_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
877\r
878///\r
879/// ACPI MPST Memory Power command\r
880///\r
881#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
882#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
883#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
884#define EFI_ACPI_6_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
885\r
886///\r
887/// MPST Memory Power Node Table\r
888///\r
889typedef struct {\r
890 UINT8 PowerStateValue;\r
891 UINT8 PowerStateInformationIndex;\r
892} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE;\r
893\r
894typedef struct {\r
895 UINT8 Flag;\r
896 UINT8 Reserved;\r
897 UINT16 MemoryPowerNodeId;\r
898 UINT32 Length;\r
899 UINT64 AddressBase;\r
900 UINT64 AddressLength;\r
901 UINT32 NumberOfPowerStates;\r
902 UINT32 NumberOfPhysicalComponents;\r
903//EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
904//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
905} EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE;\r
906\r
907#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
908#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
909#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
910\r
911typedef struct {\r
912 UINT16 MemoryPowerNodeCount;\r
913 UINT8 Reserved[2];\r
914} EFI_ACPI_6_0_MPST_MEMORY_POWER_NODE_TABLE;\r
915\r
916///\r
917/// MPST Memory Power State Characteristics Table\r
918///\r
919typedef struct {\r
920 UINT8 PowerStateStructureID;\r
921 UINT8 Flag;\r
922 UINT16 Reserved;\r
923 UINT32 AveragePowerConsumedInMPS0;\r
924 UINT32 RelativePowerSavingToMPS0;\r
925 UINT64 ExitLatencyToMPS0;\r
926} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
927\r
928#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
929#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
930#define EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
931\r
932typedef struct {\r
933 UINT16 MemoryPowerStateCharacteristicsCount;\r
934 UINT8 Reserved[2];\r
935} EFI_ACPI_6_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
936\r
937///\r
938/// Memory Topology Table definition.\r
939///\r
940typedef struct {\r
941 EFI_ACPI_DESCRIPTION_HEADER Header;\r
942 UINT32 Reserved;\r
943} EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE;\r
944\r
945///\r
946/// PMTT Version (as defined in ACPI 6.0 spec.)\r
947///\r
948#define EFI_ACPI_6_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
949\r
950///\r
951/// Common Memory Aggregator Device Structure.\r
952///\r
953typedef struct {\r
954 UINT8 Type;\r
955 UINT8 Reserved;\r
956 UINT16 Length;\r
957 UINT16 Flags;\r
958 UINT16 Reserved1;\r
959} EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
960\r
961///\r
962/// Memory Aggregator Device Type\r
963///\r
964#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
965#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
966#define EFI_ACPI_6_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
967\r
968///\r
969/// Socket Memory Aggregator Device Structure.\r
970///\r
971typedef struct {\r
972 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
973 UINT16 SocketIdentifier;\r
974 UINT16 Reserved;\r
975//EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
976} EFI_ACPI_6_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
977\r
978///\r
979/// MemoryController Memory Aggregator Device Structure.\r
980///\r
981typedef struct {\r
982 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
983 UINT32 ReadLatency;\r
984 UINT32 WriteLatency;\r
985 UINT32 ReadBandwidth;\r
986 UINT32 WriteBandwidth;\r
987 UINT16 OptimalAccessUnit;\r
988 UINT16 OptimalAccessAlignment;\r
989 UINT16 Reserved;\r
990 UINT16 NumberOfProximityDomains;\r
991//UINT32 ProximityDomain[NumberOfProximityDomains];\r
992//EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
993} EFI_ACPI_6_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
994\r
995///\r
996/// DIMM Memory Aggregator Device Structure.\r
997///\r
998typedef struct {\r
999 EFI_ACPI_6_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1000 UINT16 PhysicalComponentIdentifier;\r
1001 UINT16 Reserved;\r
1002 UINT32 SizeOfDimm;\r
1003 UINT32 SmbiosHandle;\r
1004} EFI_ACPI_6_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1005\r
1006///\r
1007/// Boot Graphics Resource Table definition.\r
1008///\r
1009typedef struct {\r
1010 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1011 ///\r
1012 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1013 ///\r
1014 UINT16 Version;\r
1015 ///\r
1016 /// 1-byte status field indicating current status about the table.\r
1017 /// Bits[7:1] = Reserved (must be zero)\r
1018 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1019 ///\r
1020 UINT8 Status;\r
1021 ///\r
1022 /// 1-byte enumerated type field indicating format of the image.\r
1023 /// 0 = Bitmap\r
1024 /// 1 - 255 Reserved (for future use)\r
1025 ///\r
1026 UINT8 ImageType;\r
1027 ///\r
1028 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1029 /// of the image bitmap.\r
1030 ///\r
1031 UINT64 ImageAddress;\r
1032 ///\r
1033 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1034 /// (X, Y) display offset of the top left corner of the boot image.\r
1035 /// The top left corner of the display is at offset (0, 0).\r
1036 ///\r
1037 UINT32 ImageOffsetX;\r
1038 ///\r
1039 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1040 /// (X, Y) display offset of the top left corner of the boot image.\r
1041 /// The top left corner of the display is at offset (0, 0).\r
1042 ///\r
1043 UINT32 ImageOffsetY;\r
1044} EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1045\r
1046///\r
1047/// BGRT Revision\r
1048///\r
1049#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1050\r
1051///\r
1052/// BGRT Version\r
1053///\r
1054#define EFI_ACPI_6_0_BGRT_VERSION 0x01\r
1055\r
1056///\r
1057/// BGRT Status\r
1058///\r
1059#define EFI_ACPI_6_0_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1060#define EFI_ACPI_6_0_BGRT_STATUS_DISPLAYED 0x01\r
1061\r
1062///\r
1063/// BGRT Image Type\r
1064///\r
1065#define EFI_ACPI_6_0_BGRT_IMAGE_TYPE_BMP 0x00\r
1066\r
1067///\r
1068/// FPDT Version (as defined in ACPI 6.0 spec.)\r
1069///\r
1070#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1071\r
1072///\r
1073/// FPDT Performance Record Types\r
1074///\r
1075#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1076#define EFI_ACPI_6_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1077\r
1078///\r
1079/// FPDT Performance Record Revision\r
1080///\r
1081#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1082#define EFI_ACPI_6_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1083\r
1084///\r
1085/// FPDT Runtime Performance Record Types\r
1086///\r
1087#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1088#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1089#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1090\r
1091///\r
1092/// FPDT Runtime Performance Record Revision\r
1093///\r
1094#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1095#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1096#define EFI_ACPI_6_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1097\r
1098///\r
1099/// FPDT Performance Record header\r
1100///\r
1101typedef struct {\r
1102 UINT16 Type;\r
1103 UINT8 Length;\r
1104 UINT8 Revision;\r
1105} EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER;\r
1106\r
1107///\r
1108/// FPDT Performance Table header\r
1109///\r
1110typedef struct {\r
1111 UINT32 Signature;\r
1112 UINT32 Length;\r
1113} EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER;\r
1114\r
1115///\r
1116/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1117///\r
1118typedef struct {\r
1119 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1120 UINT32 Reserved;\r
1121 ///\r
1122 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1123 ///\r
1124 UINT64 BootPerformanceTablePointer;\r
1125} EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1126\r
1127///\r
1128/// FPDT S3 Performance Table Pointer Record Structure\r
1129///\r
1130typedef struct {\r
1131 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1132 UINT32 Reserved;\r
1133 ///\r
1134 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1135 ///\r
1136 UINT64 S3PerformanceTablePointer;\r
1137} EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1138\r
1139///\r
1140/// FPDT Firmware Basic Boot Performance Record Structure\r
1141///\r
1142typedef struct {\r
1143 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1144 UINT32 Reserved;\r
1145 ///\r
1146 /// Timer value logged at the beginning of firmware image execution.\r
1147 /// This may not always be zero or near zero.\r
1148 ///\r
1149 UINT64 ResetEnd;\r
1150 ///\r
1151 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1152 /// For non-UEFI compatible boots, this field must be zero.\r
1153 ///\r
1154 UINT64 OsLoaderLoadImageStart;\r
1155 ///\r
1156 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1157 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1158 /// to the INT 19h handler invocation.\r
1159 ///\r
1160 UINT64 OsLoaderStartImageStart;\r
1161 ///\r
1162 /// Timer value logged at the point when the OS loader calls the\r
1163 /// ExitBootServices function for UEFI compatible firmware.\r
1164 /// For non-UEFI compatible boots, this field must be zero.\r
1165 ///\r
1166 UINT64 ExitBootServicesEntry;\r
1167 ///\r
1168 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1169 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1170 /// For non-UEFI compatible boots, this field must be zero.\r
1171 ///\r
1172 UINT64 ExitBootServicesExit;\r
1173} EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1174\r
1175///\r
1176/// FPDT Firmware Basic Boot Performance Table signature\r
1177///\r
1178#define EFI_ACPI_6_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1179\r
1180//\r
1181// FPDT Firmware Basic Boot Performance Table\r
1182//\r
1183typedef struct {\r
1184 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1185 //\r
1186 // one or more Performance Records.\r
1187 //\r
1188} EFI_ACPI_6_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1189\r
1190///\r
1191/// FPDT "S3PT" S3 Performance Table\r
1192///\r
1193#define EFI_ACPI_6_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1194\r
1195//\r
1196// FPDT Firmware S3 Boot Performance Table\r
1197//\r
1198typedef struct {\r
1199 EFI_ACPI_6_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1200 //\r
1201 // one or more Performance Records.\r
1202 //\r
1203} EFI_ACPI_6_0_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1204\r
1205///\r
1206/// FPDT Basic S3 Resume Performance Record\r
1207///\r
1208typedef struct {\r
1209 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1210 ///\r
1211 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1212 ///\r
1213 UINT32 ResumeCount;\r
1214 ///\r
1215 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1216 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1217 ///\r
1218 UINT64 FullResume;\r
1219 ///\r
1220 /// Average timer value of all resume cycles logged since the last full boot\r
1221 /// sequence, including the most recent resume. Note that the entire log of\r
1222 /// timer values does not need to be retained in order to calculate this average.\r
1223 ///\r
1224 UINT64 AverageResume;\r
1225} EFI_ACPI_6_0_FPDT_S3_RESUME_RECORD;\r
1226\r
1227///\r
1228/// FPDT Basic S3 Suspend Performance Record\r
1229///\r
1230typedef struct {\r
1231 EFI_ACPI_6_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1232 ///\r
1233 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1234 /// Only the most recent suspend cycle's timer value is retained.\r
1235 ///\r
1236 UINT64 SuspendStart;\r
1237 ///\r
1238 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1239 /// mechanism) used to trigger hardware entry to S3.\r
1240 /// Only the most recent suspend cycle's timer value is retained.\r
1241 ///\r
1242 UINT64 SuspendEnd;\r
1243} EFI_ACPI_6_0_FPDT_S3_SUSPEND_RECORD;\r
1244\r
1245///\r
1246/// Firmware Performance Record Table definition.\r
1247///\r
1248typedef struct {\r
1249 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1250} EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1251\r
1252///\r
1253/// Generic Timer Description Table definition.\r
1254///\r
1255typedef struct {\r
1256 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1257 UINT64 CntControlBasePhysicalAddress;\r
1258 UINT32 Reserved;\r
1259 UINT32 SecurePL1TimerGSIV;\r
1260 UINT32 SecurePL1TimerFlags;\r
1261 UINT32 NonSecurePL1TimerGSIV;\r
1262 UINT32 NonSecurePL1TimerFlags;\r
1263 UINT32 VirtualTimerGSIV;\r
1264 UINT32 VirtualTimerFlags;\r
1265 UINT32 NonSecurePL2TimerGSIV;\r
1266 UINT32 NonSecurePL2TimerFlags;\r
1267 UINT64 CntReadBasePhysicalAddress;\r
1268 UINT32 PlatformTimerCount;\r
1269 UINT32 PlatformTimerOffset;\r
1270} EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1271\r
1272///\r
1273/// GTDT Version (as defined in ACPI 6.0 spec.)\r
1274///\r
1275#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
1276\r
1277///\r
1278/// Timer Flags. All other bits are reserved and must be 0.\r
1279///\r
1280#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1281#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1282#define EFI_ACPI_6_0_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1283\r
1284///\r
1285/// Platform Timer Type\r
1286///\r
1287#define EFI_ACPI_6_0_GTDT_GT_BLOCK 0\r
1288#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1289\r
1290///\r
1291/// GT Block Structure\r
1292///\r
1293typedef struct {\r
1294 UINT8 Type;\r
1295 UINT16 Length;\r
1296 UINT8 Reserved;\r
1297 UINT64 CntCtlBase;\r
1298 UINT32 GTBlockTimerCount;\r
1299 UINT32 GTBlockTimerOffset;\r
1300} EFI_ACPI_6_0_GTDT_GT_BLOCK_STRUCTURE;\r
1301\r
1302///\r
1303/// GT Block Timer Structure\r
1304///\r
1305typedef struct {\r
1306 UINT8 GTFrameNumber;\r
1307 UINT8 Reserved[3];\r
1308 UINT64 CntBaseX;\r
1309 UINT64 CntEL0BaseX;\r
1310 UINT32 GTxPhysicalTimerGSIV;\r
1311 UINT32 GTxPhysicalTimerFlags;\r
1312 UINT32 GTxVirtualTimerGSIV;\r
1313 UINT32 GTxVirtualTimerFlags;\r
1314 UINT32 GTxCommonFlags;\r
1315} EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1316\r
1317///\r
1318/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1319///\r
1320#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1321#define EFI_ACPI_6_0_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1322\r
1323///\r
1324/// Common Flags Flags. All other bits are reserved and must be 0.\r
1325///\r
1326#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1327#define EFI_ACPI_6_0_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1328\r
1329///\r
1330/// SBSA Generic Watchdog Structure\r
1331///\r
1332typedef struct {\r
1333 UINT8 Type;\r
1334 UINT16 Length;\r
1335 UINT8 Reserved;\r
1336 UINT64 RefreshFramePhysicalAddress;\r
1337 UINT64 WatchdogControlFramePhysicalAddress;\r
1338 UINT32 WatchdogTimerGSIV;\r
1339 UINT32 WatchdogTimerFlags;\r
1340} EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1341\r
1342///\r
1343/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1344///\r
1345#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1346#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1347#define EFI_ACPI_6_0_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1348\r
1349//\r
1350// NVDIMM Firmware Interface Table definition.\r
1351//\r
1352typedef struct {\r
1353 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1354 UINT32 Reserved;\r
1355} EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1356\r
1357//\r
1358// NFIT Version (as defined in ACPI 6.0 spec.)\r
1359//\r
1360#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1361\r
1362//\r
1363// Definition for NFIT Table Structure Types\r
1364//\r
1365#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1366#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE_TYPE 1\r
1367#define EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1368#define EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1369#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1370#define EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1371#define EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1372\r
1373//\r
1374// Definition for NFIT Structure Header\r
1375//\r
1376typedef struct {\r
1377 UINT16 Type;\r
1378 UINT16 Length;\r
1379} EFI_ACPI_6_0_NFIT_STRUCTURE_HEADER;\r
1380\r
1381//\r
1382// Definition for System Physical Address Range Structure\r
1383//\r
1384#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1385#define EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1386#define EFI_ACPI_6_0_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }\r
1387#define EFI_ACPI_6_0_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }\r
1388#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }\r
1389#define EFI_ACPI_6_0_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }\r
1390#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }\r
1391#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }\r
1392#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }\r
1393#define EFI_ACPI_6_0_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }\r
1394typedef struct {\r
1395 UINT16 Type;\r
1396 UINT16 Length;\r
1397 UINT16 SPARangeStructureIndex;\r
1398 UINT16 Flags;\r
1399 UINT32 Reserved_8;\r
1400 UINT32 ProximityDomain;\r
1401 GUID AddressRangeTypeGUID;\r
1402 UINT64 SystemPhysicalAddressRangeBase;\r
1403 UINT64 SystemPhysicalAddressRangeLength;\r
1404 UINT64 AddressRangeMemoryMappingAttribute;\r
1405} EFI_ACPI_6_0_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1406\r
1407//\r
1408// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1409//\r
1410typedef struct {\r
1411 UINT32 DIMMNumber:4;\r
1412 UINT32 MemoryChannelNumber:4;\r
1413 UINT32 MemoryControllerID:4;\r
1414 UINT32 SocketID:4;\r
1415 UINT32 NodeControllerID:12;\r
1416 UINT32 Reserved_28:4;\r
1417} EFI_ACPI_6_0_NFIT_DEVICE_HANDLE;\r
1418\r
1419#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1420#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1421#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1422#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1423#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1424#define EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1425typedef struct {\r
1426 UINT16 Type;\r
1427 UINT16 Length;\r
1428 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1429 UINT16 MemoryDevicePhysicalID;\r
1430 UINT16 MemoryDeviceRegionID;\r
1431 UINT16 SPARangeStructureIndex ;\r
1432 UINT16 NVDIMMControlRegionStructureIndex;\r
1433 UINT64 MemoryDeviceRegionSize;\r
1434 UINT64 RegionOffset;\r
1435 UINT64 MemoryDevicePhysicalAddressRegionBase;\r
1436 UINT16 InterleaveStructureIndex;\r
1437 UINT16 InterleaveWays;\r
1438 UINT16 MemoryDeviceStateFlags;\r
1439 UINT16 Reserved_46;\r
1440} EFI_ACPI_6_0_NFIT_MEMORY_DEVICE_TO_SYSTEM_ADDRESS_RANGE_MAP_STRUCTURE;\r
1441\r
1442//\r
1443// Definition for Interleave Structure\r
1444//\r
1445typedef struct {\r
1446 UINT16 Type;\r
1447 UINT16 Length;\r
1448 UINT16 InterleaveStructureIndex;\r
1449 UINT16 Reserved_6;\r
1450 UINT32 NumberOfLines;\r
1451 UINT32 LineSize;\r
1452//UINT32 LineOffset[NumberOfLines];\r
1453} EFI_ACPI_6_0_NFIT_INTERLEAVE_STRUCTURE;\r
1454\r
1455//\r
1456// Definition for SMBIOS Management Information Structure\r
1457//\r
1458typedef struct {\r
1459 UINT16 Type;\r
1460 UINT16 Length;\r
1461 UINT32 Reserved_4;\r
1462//UINT8 Data[];\r
1463} EFI_ACPI_6_0_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1464\r
1465//\r
1466// Definition for NVDIMM Control Region Structure\r
1467//\r
1468#define EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1469typedef struct {\r
1470 UINT16 Type;\r
1471 UINT16 Length;\r
1472 UINT16 NVDIMMControlRegionStructureIndex;\r
1473 UINT16 VendorID;\r
1474 UINT16 DeviceID;\r
1475 UINT16 RevisionID;\r
1476 UINT16 SubsystemVendorID;\r
1477 UINT16 SubsystemDeviceID;\r
1478 UINT16 SubsystemRevisionID;\r
1479 UINT8 Reserved_18[6];\r
1480 UINT32 SerialNumber;\r
1481 UINT16 RegionFormatInterfaceCode;\r
1482 UINT16 NumberOfBlockControlWindows;\r
1483 UINT64 SizeOfBlockControlWindow;\r
1484 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1485 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1486 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1487 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1488 UINT16 NVDIMMControlRegionFlag;\r
1489 UINT8 Reserved_74[6];\r
1490} EFI_ACPI_6_0_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1491\r
1492//\r
1493// Definition for NVDIMM Block Data Window Region Structure\r
1494//\r
1495typedef struct {\r
1496 UINT16 Type;\r
1497 UINT16 Length;\r
1498 UINT16 NVDIMMControlRegionStructureIndex;\r
1499 UINT16 NumberOfBlockDataWindows;\r
1500 UINT64 BlockDataWindowStartOffset;\r
1501 UINT64 SizeOfBlockDataWindow;\r
1502 UINT64 BlockAccessibleMemoryCapacity;\r
1503 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1504} EFI_ACPI_6_0_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1505\r
1506//\r
1507// Definition for Flush Hint Address Structure\r
1508//\r
1509typedef struct {\r
1510 UINT16 Type;\r
1511 UINT16 Length;\r
1512 EFI_ACPI_6_0_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1513 UINT16 NumberOfFlushHintAddresses;\r
1514 UINT8 Reserved_10[6];\r
1515//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1516} EFI_ACPI_6_0_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1517\r
1518///\r
1519/// Boot Error Record Table (BERT)\r
1520///\r
1521typedef struct {\r
1522 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1523 UINT32 BootErrorRegionLength;\r
1524 UINT64 BootErrorRegion;\r
1525} EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1526\r
1527///\r
1528/// BERT Version (as defined in ACPI 6.0 spec.)\r
1529///\r
1530#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1531\r
1532///\r
1533/// Boot Error Region Block Status Definition\r
1534///\r
1535typedef struct {\r
1536 UINT32 UncorrectableErrorValid:1;\r
1537 UINT32 CorrectableErrorValid:1;\r
1538 UINT32 MultipleUncorrectableErrors:1;\r
1539 UINT32 MultipleCorrectableErrors:1;\r
1540 UINT32 ErrorDataEntryCount:10;\r
1541 UINT32 Reserved:18;\r
1542} EFI_ACPI_6_0_ERROR_BLOCK_STATUS;\r
1543\r
1544///\r
1545/// Boot Error Region Definition\r
1546///\r
1547typedef struct {\r
1548 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;\r
1549 UINT32 RawDataOffset;\r
1550 UINT32 RawDataLength;\r
1551 UINT32 DataLength;\r
1552 UINT32 ErrorSeverity;\r
1553} EFI_ACPI_6_0_BOOT_ERROR_REGION_STRUCTURE;\r
1554\r
1555//\r
1556// Boot Error Severity types\r
1557//\r
1558#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTABLE 0x00\r
1559#define EFI_ACPI_6_0_ERROR_SEVERITY_FATAL 0x01\r
1560#define EFI_ACPI_6_0_ERROR_SEVERITY_CORRECTED 0x02\r
1561#define EFI_ACPI_6_0_ERROR_SEVERITY_NONE 0x03\r
1562\r
1563///\r
1564/// Generic Error Data Entry Definition\r
1565///\r
1566typedef struct {\r
1567 UINT8 SectionType[16];\r
1568 UINT32 ErrorSeverity;\r
1569 UINT16 Revision;\r
1570 UINT8 ValidationBits;\r
1571 UINT8 Flags;\r
1572 UINT32 ErrorDataLength;\r
1573 UINT8 FruId[16];\r
1574 UINT8 FruText[20];\r
1575} EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1576\r
1577///\r
1578/// Generic Error Data Entry Version (as defined in ACPI 6.0 spec.)\r
1579///\r
1580#define EFI_ACPI_6_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1581\r
1582///\r
1583/// HEST - Hardware Error Source Table\r
1584///\r
1585typedef struct {\r
1586 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1587 UINT32 ErrorSourceCount;\r
1588} EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1589\r
1590///\r
1591/// HEST Version (as defined in ACPI 6.0 spec.)\r
1592///\r
1593#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1594\r
1595//\r
1596// Error Source structure types.\r
1597//\r
1598#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1599#define EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1600#define EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1601#define EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1602#define EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER 0x07\r
1603#define EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER 0x08\r
1604#define EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR 0x09\r
1605\r
1606//\r
1607// Error Source structure flags.\r
1608//\r
1609#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1610#define EFI_ACPI_6_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1611\r
1612///\r
1613/// IA-32 Architecture Machine Check Exception Structure Definition\r
1614///\r
1615typedef struct {\r
1616 UINT16 Type;\r
1617 UINT16 SourceId;\r
1618 UINT8 Reserved0[2];\r
1619 UINT8 Flags;\r
1620 UINT8 Enabled;\r
1621 UINT32 NumberOfRecordsToPreAllocate;\r
1622 UINT32 MaxSectionsPerRecord;\r
1623 UINT64 GlobalCapabilityInitData;\r
1624 UINT64 GlobalControlInitData;\r
1625 UINT8 NumberOfHardwareBanks;\r
1626 UINT8 Reserved1[7];\r
1627} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1628\r
1629///\r
1630/// IA-32 Architecture Machine Check Bank Structure Definition\r
1631///\r
1632typedef struct {\r
1633 UINT8 BankNumber;\r
1634 UINT8 ClearStatusOnInitialization;\r
1635 UINT8 StatusDataFormat;\r
1636 UINT8 Reserved0;\r
1637 UINT32 ControlRegisterMsrAddress;\r
1638 UINT64 ControlInitData;\r
1639 UINT32 StatusRegisterMsrAddress;\r
1640 UINT32 AddressRegisterMsrAddress;\r
1641 UINT32 MiscRegisterMsrAddress;\r
1642} EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1643\r
1644///\r
1645/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1646///\r
1647#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1648#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1649#define EFI_ACPI_6_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1650\r
1651//\r
1652// Hardware Error Notification types. All other values are reserved\r
1653//\r
1654#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1655#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1656#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1657#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1658#define EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1659\r
1660///\r
1661/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1662///\r
1663typedef struct {\r
1664 UINT16 Type:1;\r
1665 UINT16 PollInterval:1;\r
1666 UINT16 SwitchToPollingThresholdValue:1;\r
1667 UINT16 SwitchToPollingThresholdWindow:1;\r
1668 UINT16 ErrorThresholdValue:1;\r
1669 UINT16 ErrorThresholdWindow:1;\r
1670 UINT16 Reserved:10;\r
1671} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1672\r
1673///\r
1674/// Hardware Error Notification Structure Definition\r
1675///\r
1676typedef struct {\r
1677 UINT8 Type;\r
1678 UINT8 Length;\r
1679 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1680 UINT32 PollInterval;\r
1681 UINT32 Vector;\r
1682 UINT32 SwitchToPollingThresholdValue;\r
1683 UINT32 SwitchToPollingThresholdWindow;\r
1684 UINT32 ErrorThresholdValue;\r
1685 UINT32 ErrorThresholdWindow;\r
1686} EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1687\r
1688///\r
1689/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1690///\r
1691typedef struct {\r
1692 UINT16 Type;\r
1693 UINT16 SourceId;\r
1694 UINT8 Reserved0[2];\r
1695 UINT8 Flags;\r
1696 UINT8 Enabled;\r
1697 UINT32 NumberOfRecordsToPreAllocate;\r
1698 UINT32 MaxSectionsPerRecord;\r
1699 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1700 UINT8 NumberOfHardwareBanks;\r
1701 UINT8 Reserved1[3];\r
1702} EFI_ACPI_6_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1703\r
1704///\r
1705/// IA-32 Architecture NMI Error Structure Definition\r
1706///\r
1707typedef struct {\r
1708 UINT16 Type;\r
1709 UINT16 SourceId;\r
1710 UINT8 Reserved0[2];\r
1711 UINT32 NumberOfRecordsToPreAllocate;\r
1712 UINT32 MaxSectionsPerRecord;\r
1713 UINT32 MaxRawDataLength;\r
1714} EFI_ACPI_6_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1715\r
1716///\r
1717/// PCI Express Root Port AER Structure Definition\r
1718///\r
1719typedef struct {\r
1720 UINT16 Type;\r
1721 UINT16 SourceId;\r
1722 UINT8 Reserved0[2];\r
1723 UINT8 Flags;\r
1724 UINT8 Enabled;\r
1725 UINT32 NumberOfRecordsToPreAllocate;\r
1726 UINT32 MaxSectionsPerRecord;\r
1727 UINT32 Bus;\r
1728 UINT16 Device;\r
1729 UINT16 Function;\r
1730 UINT16 DeviceControl;\r
1731 UINT8 Reserved1[2];\r
1732 UINT32 UncorrectableErrorMask;\r
1733 UINT32 UncorrectableErrorSeverity;\r
1734 UINT32 CorrectableErrorMask;\r
1735 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1736 UINT32 RootErrorCommand;\r
1737} EFI_ACPI_6_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1738\r
1739///\r
1740/// PCI Express Device AER Structure Definition\r
1741///\r
1742typedef struct {\r
1743 UINT16 Type;\r
1744 UINT16 SourceId;\r
1745 UINT8 Reserved0[2];\r
1746 UINT8 Flags;\r
1747 UINT8 Enabled;\r
1748 UINT32 NumberOfRecordsToPreAllocate;\r
1749 UINT32 MaxSectionsPerRecord;\r
1750 UINT32 Bus;\r
1751 UINT16 Device;\r
1752 UINT16 Function;\r
1753 UINT16 DeviceControl;\r
1754 UINT8 Reserved1[2];\r
1755 UINT32 UncorrectableErrorMask;\r
1756 UINT32 UncorrectableErrorSeverity;\r
1757 UINT32 CorrectableErrorMask;\r
1758 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1759} EFI_ACPI_6_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1760\r
1761///\r
1762/// PCI Express Bridge AER Structure Definition\r
1763///\r
1764typedef struct {\r
1765 UINT16 Type;\r
1766 UINT16 SourceId;\r
1767 UINT8 Reserved0[2];\r
1768 UINT8 Flags;\r
1769 UINT8 Enabled;\r
1770 UINT32 NumberOfRecordsToPreAllocate;\r
1771 UINT32 MaxSectionsPerRecord;\r
1772 UINT32 Bus;\r
1773 UINT16 Device;\r
1774 UINT16 Function;\r
1775 UINT16 DeviceControl;\r
1776 UINT8 Reserved1[2];\r
1777 UINT32 UncorrectableErrorMask;\r
1778 UINT32 UncorrectableErrorSeverity;\r
1779 UINT32 CorrectableErrorMask;\r
1780 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1781 UINT32 SecondaryUncorrectableErrorMask;\r
1782 UINT32 SecondaryUncorrectableErrorSeverity;\r
1783 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1784} EFI_ACPI_6_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1785\r
1786///\r
1787/// Generic Hardware Error Source Structure Definition\r
1788///\r
1789typedef struct {\r
1790 UINT16 Type;\r
1791 UINT16 SourceId;\r
1792 UINT16 RelatedSourceId;\r
1793 UINT8 Flags;\r
1794 UINT8 Enabled;\r
1795 UINT32 NumberOfRecordsToPreAllocate;\r
1796 UINT32 MaxSectionsPerRecord;\r
1797 UINT32 MaxRawDataLength;\r
1798 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1799 EFI_ACPI_6_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1800 UINT32 ErrorStatusBlockLength;\r
1801} EFI_ACPI_6_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1802\r
1803///\r
1804/// Generic Error Status Definition\r
1805///\r
1806typedef struct {\r
1807 EFI_ACPI_6_0_ERROR_BLOCK_STATUS BlockStatus;\r
1808 UINT32 RawDataOffset;\r
1809 UINT32 RawDataLength;\r
1810 UINT32 DataLength;\r
1811 UINT32 ErrorSeverity;\r
1812} EFI_ACPI_6_0_GENERIC_ERROR_STATUS_STRUCTURE;\r
1813\r
1814///\r
1815/// ERST - Error Record Serialization Table\r
1816///\r
1817typedef struct {\r
1818 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1819 UINT32 SerializationHeaderSize;\r
1820 UINT8 Reserved0[4];\r
1821 UINT32 InstructionEntryCount;\r
1822} EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1823\r
1824///\r
1825/// ERST Version (as defined in ACPI 6.0 spec.)\r
1826///\r
1827#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1828\r
1829///\r
1830/// ERST Serialization Actions\r
1831///\r
1832#define EFI_ACPI_6_0_ERST_BEGIN_WRITE_OPERATION 0x00\r
1833#define EFI_ACPI_6_0_ERST_BEGIN_READ_OPERATION 0x01\r
1834#define EFI_ACPI_6_0_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1835#define EFI_ACPI_6_0_ERST_END_OPERATION 0x03\r
1836#define EFI_ACPI_6_0_ERST_SET_RECORD_OFFSET 0x04\r
1837#define EFI_ACPI_6_0_ERST_EXECUTE_OPERATION 0x05\r
1838#define EFI_ACPI_6_0_ERST_CHECK_BUSY_STATUS 0x06\r
1839#define EFI_ACPI_6_0_ERST_GET_COMMAND_STATUS 0x07\r
1840#define EFI_ACPI_6_0_ERST_GET_RECORD_IDENTIFIER 0x08\r
1841#define EFI_ACPI_6_0_ERST_SET_RECORD_IDENTIFIER 0x09\r
1842#define EFI_ACPI_6_0_ERST_GET_RECORD_COUNT 0x0A\r
1843#define EFI_ACPI_6_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1844#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1845#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1846#define EFI_ACPI_6_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1847\r
1848///\r
1849/// ERST Action Command Status\r
1850///\r
1851#define EFI_ACPI_6_0_ERST_STATUS_SUCCESS 0x00\r
1852#define EFI_ACPI_6_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1853#define EFI_ACPI_6_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1854#define EFI_ACPI_6_0_ERST_STATUS_FAILED 0x03\r
1855#define EFI_ACPI_6_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1856#define EFI_ACPI_6_0_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1857\r
1858///\r
1859/// ERST Serialization Instructions\r
1860///\r
1861#define EFI_ACPI_6_0_ERST_READ_REGISTER 0x00\r
1862#define EFI_ACPI_6_0_ERST_READ_REGISTER_VALUE 0x01\r
1863#define EFI_ACPI_6_0_ERST_WRITE_REGISTER 0x02\r
1864#define EFI_ACPI_6_0_ERST_WRITE_REGISTER_VALUE 0x03\r
1865#define EFI_ACPI_6_0_ERST_NOOP 0x04\r
1866#define EFI_ACPI_6_0_ERST_LOAD_VAR1 0x05\r
1867#define EFI_ACPI_6_0_ERST_LOAD_VAR2 0x06\r
1868#define EFI_ACPI_6_0_ERST_STORE_VAR1 0x07\r
1869#define EFI_ACPI_6_0_ERST_ADD 0x08\r
1870#define EFI_ACPI_6_0_ERST_SUBTRACT 0x09\r
1871#define EFI_ACPI_6_0_ERST_ADD_VALUE 0x0A\r
1872#define EFI_ACPI_6_0_ERST_SUBTRACT_VALUE 0x0B\r
1873#define EFI_ACPI_6_0_ERST_STALL 0x0C\r
1874#define EFI_ACPI_6_0_ERST_STALL_WHILE_TRUE 0x0D\r
1875#define EFI_ACPI_6_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1876#define EFI_ACPI_6_0_ERST_GOTO 0x0F\r
1877#define EFI_ACPI_6_0_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1878#define EFI_ACPI_6_0_ERST_SET_DST_ADDRESS_BASE 0x11\r
1879#define EFI_ACPI_6_0_ERST_MOVE_DATA 0x12\r
1880\r
1881///\r
1882/// ERST Instruction Flags\r
1883///\r
1884#define EFI_ACPI_6_0_ERST_PRESERVE_REGISTER 0x01\r
1885\r
1886///\r
1887/// ERST Serialization Instruction Entry\r
1888///\r
1889typedef struct {\r
1890 UINT8 SerializationAction;\r
1891 UINT8 Instruction;\r
1892 UINT8 Flags;\r
1893 UINT8 Reserved0;\r
1894 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1895 UINT64 Value;\r
1896 UINT64 Mask;\r
1897} EFI_ACPI_6_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1898\r
1899///\r
1900/// EINJ - Error Injection Table\r
1901///\r
1902typedef struct {\r
1903 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1904 UINT32 InjectionHeaderSize;\r
1905 UINT8 InjectionFlags;\r
1906 UINT8 Reserved0[3];\r
1907 UINT32 InjectionEntryCount;\r
1908} EFI_ACPI_6_0_ERROR_INJECTION_TABLE_HEADER;\r
1909\r
1910///\r
1911/// EINJ Version (as defined in ACPI 6.0 spec.)\r
1912///\r
1913#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_REVISION 0x01\r
1914\r
1915///\r
1916/// EINJ Error Injection Actions\r
1917///\r
1918#define EFI_ACPI_6_0_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1919#define EFI_ACPI_6_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1920#define EFI_ACPI_6_0_EINJ_SET_ERROR_TYPE 0x02\r
1921#define EFI_ACPI_6_0_EINJ_GET_ERROR_TYPE 0x03\r
1922#define EFI_ACPI_6_0_EINJ_END_OPERATION 0x04\r
1923#define EFI_ACPI_6_0_EINJ_EXECUTE_OPERATION 0x05\r
1924#define EFI_ACPI_6_0_EINJ_CHECK_BUSY_STATUS 0x06\r
1925#define EFI_ACPI_6_0_EINJ_GET_COMMAND_STATUS 0x07\r
1926#define EFI_ACPI_6_0_EINJ_TRIGGER_ERROR 0xFF\r
1927\r
1928///\r
1929/// EINJ Action Command Status\r
1930///\r
1931#define EFI_ACPI_6_0_EINJ_STATUS_SUCCESS 0x00\r
1932#define EFI_ACPI_6_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1933#define EFI_ACPI_6_0_EINJ_STATUS_INVALID_ACCESS 0x02\r
1934\r
1935///\r
1936/// EINJ Error Type Definition\r
1937///\r
1938#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1939#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1940#define EFI_ACPI_6_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1941#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1942#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1943#define EFI_ACPI_6_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1944#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1945#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1946#define EFI_ACPI_6_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1947#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1948#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1949#define EFI_ACPI_6_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1950\r
1951///\r
1952/// EINJ Injection Instructions\r
1953///\r
1954#define EFI_ACPI_6_0_EINJ_READ_REGISTER 0x00\r
1955#define EFI_ACPI_6_0_EINJ_READ_REGISTER_VALUE 0x01\r
1956#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER 0x02\r
1957#define EFI_ACPI_6_0_EINJ_WRITE_REGISTER_VALUE 0x03\r
1958#define EFI_ACPI_6_0_EINJ_NOOP 0x04\r
1959\r
1960///\r
1961/// EINJ Instruction Flags\r
1962///\r
1963#define EFI_ACPI_6_0_EINJ_PRESERVE_REGISTER 0x01\r
1964\r
1965///\r
1966/// EINJ Injection Instruction Entry\r
1967///\r
1968typedef struct {\r
1969 UINT8 InjectionAction;\r
1970 UINT8 Instruction;\r
1971 UINT8 Flags;\r
1972 UINT8 Reserved0;\r
1973 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1974 UINT64 Value;\r
1975 UINT64 Mask;\r
1976} EFI_ACPI_6_0_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1977\r
1978///\r
1979/// EINJ Trigger Action Table\r
1980///\r
1981typedef struct {\r
1982 UINT32 HeaderSize;\r
1983 UINT32 Revision;\r
1984 UINT32 TableSize;\r
1985 UINT32 EntryCount;\r
1986} EFI_ACPI_6_0_EINJ_TRIGGER_ACTION_TABLE;\r
1987\r
1988///\r
1989/// Platform Communications Channel Table (PCCT)\r
1990///\r
1991typedef struct {\r
1992 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1993 UINT32 Flags;\r
1994 UINT64 Reserved;\r
1995} EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1996\r
1997///\r
1998/// PCCT Version (as defined in ACPI 6.0 spec.)\r
1999///\r
2000#define EFI_ACPI_6_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
2001\r
2002///\r
2003/// PCCT Global Flags\r
2004///\r
2005#define EFI_ACPI_6_0_PCCT_FLAGS_SCI_DOORBELL BIT0\r
2006\r
2007//\r
2008// PCCT Subspace type\r
2009//\r
2010#define EFI_ACPI_6_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2011\r
2012///\r
2013/// PCC Subspace Structure Header\r
2014///\r
2015typedef struct {\r
2016 UINT8 Type;\r
2017 UINT8 Length;\r
2018} EFI_ACPI_6_0_PCCT_SUBSPACE_HEADER;\r
2019\r
2020///\r
2021/// Generic Communications Subspace Structure\r
2022///\r
2023typedef struct {\r
2024 UINT8 Type;\r
2025 UINT8 Length;\r
2026 UINT8 Reserved[6];\r
2027 UINT64 BaseAddress;\r
2028 UINT64 AddressLength;\r
2029 EFI_ACPI_6_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2030 UINT64 DoorbellPreserve;\r
2031 UINT64 DoorbellWrite;\r
2032 UINT32 NominalLatency;\r
2033 UINT32 MaximumPeriodicAccessRate;\r
2034 UINT16 MinimumRequestTurnaroundTime;\r
2035} EFI_ACPI_6_0_PCCT_SUBSPACE_GENERIC;\r
2036\r
2037///\r
2038/// Generic Communications Channel Shared Memory Region\r
2039///\r
2040\r
2041typedef struct {\r
2042 UINT8 Command;\r
2043 UINT8 Reserved:7;\r
2044 UINT8 GenerateSci:1;\r
2045} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2046\r
2047typedef struct {\r
2048 UINT8 CommandComplete:1;\r
2049 UINT8 SciDoorbell:1;\r
2050 UINT8 Error:1;\r
2051 UINT8 PlatformNotification:1; \r
2052 UINT8 Reserved:4;\r
2053 UINT8 Reserved1;\r
2054} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2055\r
2056typedef struct {\r
2057 UINT32 Signature;\r
2058 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2059 EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2060} EFI_ACPI_6_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2061\r
2062//\r
2063// Known table signatures\r
2064//\r
2065\r
2066///\r
2067/// "RSD PTR " Root System Description Pointer\r
2068///\r
2069#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') \r
2070\r
2071///\r
2072/// "APIC" Multiple APIC Description Table\r
2073///\r
2074#define EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2075\r
2076///\r
2077/// "BERT" Boot Error Record Table\r
2078///\r
2079#define EFI_ACPI_6_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2080\r
2081///\r
2082/// "BGRT" Boot Graphics Resource Table\r
2083///\r
2084#define EFI_ACPI_6_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2085\r
2086///\r
2087/// "CPEP" Corrected Platform Error Polling Table\r
2088///\r
2089#define EFI_ACPI_6_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2090\r
2091///\r
2092/// "DSDT" Differentiated System Description Table\r
2093///\r
2094#define EFI_ACPI_6_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2095\r
2096///\r
2097/// "ECDT" Embedded Controller Boot Resources Table\r
2098///\r
2099#define EFI_ACPI_6_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2100\r
2101///\r
2102/// "EINJ" Error Injection Table\r
2103///\r
2104#define EFI_ACPI_6_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2105\r
2106///\r
2107/// "ERST" Error Record Serialization Table\r
2108///\r
2109#define EFI_ACPI_6_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2110\r
2111///\r
2112/// "FACP" Fixed ACPI Description Table\r
2113///\r
2114#define EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2115\r
2116///\r
2117/// "FACS" Firmware ACPI Control Structure\r
2118///\r
2119#define EFI_ACPI_6_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2120\r
2121///\r
2122/// "FPDT" Firmware Performance Data Table\r
2123///\r
2124#define EFI_ACPI_6_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2125\r
2126///\r
2127/// "GTDT" Generic Timer Description Table\r
2128///\r
2129#define EFI_ACPI_6_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2130\r
2131///\r
2132/// "HEST" Hardware Error Source Table\r
2133///\r
2134#define EFI_ACPI_6_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2135\r
2136///\r
2137/// "MPST" Memory Power State Table\r
2138///\r
2139#define EFI_ACPI_6_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2140\r
2141///\r
2142/// "MSCT" Maximum System Characteristics Table\r
2143///\r
2144#define EFI_ACPI_6_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2145\r
2146///\r
2147/// "NFIT" NVDIMM Firmware Interface Table\r
2148///\r
2149#define EFI_ACPI_6_0_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2150\r
2151///\r
2152/// "PMTT" Platform Memory Topology Table\r
2153///\r
2154#define EFI_ACPI_6_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2155\r
2156///\r
2157/// "PSDT" Persistent System Description Table\r
2158///\r
2159#define EFI_ACPI_6_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2160\r
2161///\r
2162/// "RASF" ACPI RAS Feature Table\r
2163///\r
2164#define EFI_ACPI_6_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2165\r
2166///\r
2167/// "RSDT" Root System Description Table\r
2168///\r
2169#define EFI_ACPI_6_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2170\r
2171///\r
2172/// "SBST" Smart Battery Specification Table\r
2173///\r
2174#define EFI_ACPI_6_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2175\r
2176///\r
2177/// "SLIT" System Locality Information Table\r
2178///\r
2179#define EFI_ACPI_6_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2180\r
2181///\r
2182/// "SRAT" System Resource Affinity Table\r
2183///\r
2184#define EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2185\r
2186///\r
2187/// "SSDT" Secondary System Description Table\r
2188///\r
2189#define EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2190\r
2191///\r
2192/// "XSDT" Extended System Description Table\r
2193///\r
2194#define EFI_ACPI_6_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2195\r
2196///\r
2197/// "BOOT" MS Simple Boot Spec\r
2198///\r
2199#define EFI_ACPI_6_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2200\r
2201///\r
2202/// "CSRT" MS Core System Resource Table\r
2203///\r
2204#define EFI_ACPI_6_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2205\r
2206///\r
2207/// "DBG2" MS Debug Port 2 Spec\r
2208///\r
2209#define EFI_ACPI_6_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2210\r
2211///\r
2212/// "DBGP" MS Debug Port Spec\r
2213///\r
2214#define EFI_ACPI_6_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2215\r
2216///\r
2217/// "DMAR" DMA Remapping Table\r
2218///\r
2219#define EFI_ACPI_6_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2220\r
2221///\r
2222/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2223///\r
2224#define EFI_ACPI_6_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2225\r
2226///\r
2227/// "ETDT" Event Timer Description Table\r
2228///\r
2229#define EFI_ACPI_6_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2230\r
2231///\r
2232/// "HPET" IA-PC High Precision Event Timer Table\r
2233///\r
2234#define EFI_ACPI_6_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2235\r
2236///\r
2237/// "iBFT" iSCSI Boot Firmware Table\r
2238///\r
2239#define EFI_ACPI_6_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2240\r
2241///\r
2242/// "IORT" Interrupt Source Override\r
2243///\r
2244#define EFI_ACPI_6_0_INTERRUPT_SOURCE_OVERRIDE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2245\r
2246///\r
2247/// "IVRS" I/O Virtualization Reporting Structure\r
2248///\r
2249#define EFI_ACPI_6_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2250\r
2251///\r
2252/// "LPIT" Low Power Idle Table\r
2253///\r
2254#define EFI_ACPI_6_0_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2255\r
2256///\r
2257/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2258///\r
2259#define EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2260\r
2261///\r
2262/// "MCHI" Management Controller Host Interface Table\r
2263///\r
2264#define EFI_ACPI_6_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2265\r
2266///\r
2267/// "MSDM" MS Data Management Table\r
2268///\r
2269#define EFI_ACPI_6_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2270\r
2271///\r
2272/// "SLIC" MS Software Licensing Table Specification\r
2273///\r
2274#define EFI_ACPI_6_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2275\r
2276///\r
2277/// "SPCR" Serial Port Concole Redirection Table\r
2278///\r
2279#define EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2280\r
2281///\r
2282/// "SPMI" Server Platform Management Interface Table\r
2283///\r
2284#define EFI_ACPI_6_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2285\r
2286///\r
2287/// "STAO" _STA Override Table\r
2288///\r
2289#define EFI_ACPI_6_0_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2290\r
2291///\r
2292/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2293///\r
2294#define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2295\r
2296///\r
2297/// "TPM2" Trusted Computing Platform 1 Table\r
2298///\r
2299#define EFI_ACPI_6_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2300\r
2301///\r
2302/// "UEFI" UEFI ACPI Data Table\r
2303///\r
2304#define EFI_ACPI_6_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2305\r
2306///\r
2307/// "WAET" Windows ACPI Emulated Devices Table\r
2308///\r
2309#define EFI_ACPI_6_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2310\r
2311///\r
2312/// "WDAT" Watchdog Action Table\r
2313///\r
2314#define EFI_ACPI_6_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2315\r
2316///\r
2317/// "WDRT" Watchdog Resource Table\r
2318///\r
2319#define EFI_ACPI_6_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2320\r
2321///\r
2322/// "WPBT" MS Platform Binary Table\r
2323///\r
2324#define EFI_ACPI_6_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2325\r
2326///\r
2327/// "XENV" Xen Project Table\r
2328///\r
2329#define EFI_ACPI_6_0_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2330\r
2331#pragma pack()\r
2332\r
2333#endif\r
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