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[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi62.h
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e67b675d
SZ		 1/** @file\r
2 ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
9344f092 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
e67b675d
SZ		 6**/\r
7\r
8#ifndef _ACPI_6_2_H_\r
9#define _ACPI_6_2_H_\r
10\r
11#include <IndustryStandard/Acpi61.h>\r
12\r
13//\r
14// Large Item Descriptor Name\r
15//\r
16#define ACPI_LARGE_PIN_FUNCTION_DESCRIPTOR_NAME 0x0D\r
17#define ACPI_LARGE_PIN_CONFIGURATION_DESCRIPTOR_NAME 0x0F\r
18#define ACPI_LARGE_PIN_GROUP_DESCRIPTOR_NAME 0x10\r
19#define ACPI_LARGE_PIN_GROUP_FUNCTION_DESCRIPTOR_NAME 0x11\r
20#define ACPI_LARGE_PIN_GROUP_CONFIGURATION_DESCRIPTOR_NAME 0x12\r
21\r
22//\r
23// Large Item Descriptor Value\r
24//\r
25#define ACPI_PIN_FUNCTION_DESCRIPTOR 0x8D\r
26#define ACPI_PIN_CONFIGURATION_DESCRIPTOR 0x8F\r
27#define ACPI_PIN_GROUP_DESCRIPTOR 0x90\r
28#define ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR 0x91\r
29#define ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR 0x92\r
30\r
31#pragma pack(1)\r
32\r
33///\r
34/// Pin Function Descriptor\r
35///\r
36typedef PACKED struct {\r
37 ACPI_LARGE_RESOURCE_HEADER Header;\r
38 UINT8 RevisionId;\r
39 UINT16 Flags;\r
40 UINT8 PinPullConfiguration;\r
41 UINT16 FunctionNumber;\r
42 UINT16 PinTableOffset;\r
43 UINT8 ResourceSourceIndex;\r
44 UINT16 ResourceSourceNameOffset;\r
45 UINT16 VendorDataOffset;\r
46 UINT16 VendorDataLength;\r
47} EFI_ACPI_PIN_FUNCTION_DESCRIPTOR;\r
48\r
49///\r
50/// Pin Configuration Descriptor\r
51///\r
52typedef PACKED struct {\r
53 ACPI_LARGE_RESOURCE_HEADER Header;\r
54 UINT8 RevisionId;\r
55 UINT16 Flags;\r
56 UINT8 PinConfigurationType;\r
57 UINT32 PinConfigurationValue;\r
58 UINT16 PinTableOffset;\r
59 UINT8 ResourceSourceIndex;\r
60 UINT16 ResourceSourceNameOffset;\r
61 UINT16 VendorDataOffset;\r
62 UINT16 VendorDataLength;\r
63} EFI_ACPI_PIN_CONFIGURATION_DESCRIPTOR;\r
64\r
65///\r
66/// Pin Group Descriptor\r
67///\r
68typedef PACKED struct {\r
69 ACPI_LARGE_RESOURCE_HEADER Header;\r
70 UINT8 RevisionId;\r
71 UINT16 Flags;\r
72 UINT16 PinTableOffset;\r
73 UINT16 ResourceLabelOffset;\r
74 UINT16 VendorDataOffset;\r
75 UINT16 VendorDataLength;\r
76} EFI_ACPI_PIN_GROUP_DESCRIPTOR;\r
77\r
78///\r
79/// Pin Group Function Descriptor\r
80///\r
81typedef PACKED struct {\r
82 ACPI_LARGE_RESOURCE_HEADER Header;\r
83 UINT8 RevisionId;\r
84 UINT16 Flags;\r
85 UINT16 FunctionNumber;\r
86 UINT8 ResourceSourceIndex;\r
87 UINT16 ResourceSourceNameOffset;\r
88 UINT16 ResourceSourceLabelOffset;\r
89 UINT16 VendorDataOffset;\r
90 UINT16 VendorDataLength;\r
91} EFI_ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR;\r
92\r
93///\r
94/// Pin Group Configuration Descriptor\r
95///\r
96typedef PACKED struct {\r
97 ACPI_LARGE_RESOURCE_HEADER Header;\r
98 UINT8 RevisionId;\r
99 UINT16 Flags;\r
100 UINT8 PinConfigurationType;\r
101 UINT32 PinConfigurationValue;\r
102 UINT8 ResourceSourceIndex;\r
103 UINT16 ResourceSourceNameOffset;\r
104 UINT16 ResourceSourceLabelOffset;\r
105 UINT16 VendorDataOffset;\r
106 UINT16 VendorDataLength;\r
107} EFI_ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR;\r
108\r
109#pragma pack()\r
110\r
111//\r
112// Ensure proper structure formats\r
113//\r
114#pragma pack(1)\r
115\r
116///\r
117/// ACPI 6.2 Generic Address Space definition\r
118///\r
119typedef struct {\r
120 UINT8 AddressSpaceId;\r
121 UINT8 RegisterBitWidth;\r
122 UINT8 RegisterBitOffset;\r
123 UINT8 AccessSize;\r
124 UINT64 Address;\r
125} EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE;\r
126\r
127//\r
128// Generic Address Space Address IDs\r
129//\r
130#define EFI_ACPI_6_2_SYSTEM_MEMORY 0\r
131#define EFI_ACPI_6_2_SYSTEM_IO 1\r
132#define EFI_ACPI_6_2_PCI_CONFIGURATION_SPACE 2\r
133#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER 3\r
134#define EFI_ACPI_6_2_SMBUS 4\r
135#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
136#define EFI_ACPI_6_2_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
137\r
138//\r
139// Generic Address Space Access Sizes\r
140//\r
141#define EFI_ACPI_6_2_UNDEFINED 0\r
142#define EFI_ACPI_6_2_BYTE 1\r
143#define EFI_ACPI_6_2_WORD 2\r
144#define EFI_ACPI_6_2_DWORD 3\r
145#define EFI_ACPI_6_2_QWORD 4\r
146\r
147//\r
148// ACPI 6.2 table structures\r
149//\r
150\r
151///\r
152/// Root System Description Pointer Structure\r
153///\r
154typedef struct {\r
155 UINT64 Signature;\r
156 UINT8 Checksum;\r
157 UINT8 OemId[6];\r
158 UINT8 Revision;\r
159 UINT32 RsdtAddress;\r
160 UINT32 Length;\r
161 UINT64 XsdtAddress;\r
162 UINT8 ExtendedChecksum;\r
163 UINT8 Reserved[3];\r
164} EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
165\r
166///\r
167/// RSD_PTR Revision (as defined in ACPI 6.2 spec.)\r
168///\r
169#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.2) says current value is 2\r
170\r
171///\r
172/// Common table header, this prefaces all ACPI tables, including FACS, but\r
173/// excluding the RSD PTR structure\r
174///\r
175typedef struct {\r
176 UINT32 Signature;\r
177 UINT32 Length;\r
178} EFI_ACPI_6_2_COMMON_HEADER;\r
179\r
180//\r
181// Root System Description Table\r
182// No definition needed as it is a common description table header, the same with\r
183// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
184//\r
185\r
186///\r
187/// RSDT Revision (as defined in ACPI 6.2 spec.)\r
188///\r
189#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
190\r
191//\r
192// Extended System Description Table\r
193// No definition needed as it is a common description table header, the same with\r
194// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
195//\r
196\r
197///\r
198/// XSDT Revision (as defined in ACPI 6.2 spec.)\r
199///\r
200#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
201\r
202///\r
203/// Fixed ACPI Description Table Structure (FADT)\r
204///\r
205typedef struct {\r
206 EFI_ACPI_DESCRIPTION_HEADER Header;\r
207 UINT32 FirmwareCtrl;\r
208 UINT32 Dsdt;\r
209 UINT8 Reserved0;\r
210 UINT8 PreferredPmProfile;\r
211 UINT16 SciInt;\r
212 UINT32 SmiCmd;\r
213 UINT8 AcpiEnable;\r
214 UINT8 AcpiDisable;\r
215 UINT8 S4BiosReq;\r
216 UINT8 PstateCnt;\r
217 UINT32 Pm1aEvtBlk;\r
218 UINT32 Pm1bEvtBlk;\r
219 UINT32 Pm1aCntBlk;\r
220 UINT32 Pm1bCntBlk;\r
221 UINT32 Pm2CntBlk;\r
222 UINT32 PmTmrBlk;\r
223 UINT32 Gpe0Blk;\r
224 UINT32 Gpe1Blk;\r
225 UINT8 Pm1EvtLen;\r
226 UINT8 Pm1CntLen;\r
227 UINT8 Pm2CntLen;\r
228 UINT8 PmTmrLen;\r
229 UINT8 Gpe0BlkLen;\r
230 UINT8 Gpe1BlkLen;\r
231 UINT8 Gpe1Base;\r
232 UINT8 CstCnt;\r
233 UINT16 PLvl2Lat;\r
234 UINT16 PLvl3Lat;\r
235 UINT16 FlushSize;\r
236 UINT16 FlushStride;\r
237 UINT8 DutyOffset;\r
238 UINT8 DutyWidth;\r
239 UINT8 DayAlrm;\r
240 UINT8 MonAlrm;\r
241 UINT8 Century;\r
242 UINT16 IaPcBootArch;\r
243 UINT8 Reserved1;\r
244 UINT32 Flags;\r
245 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
246 UINT8 ResetValue;\r
247 UINT16 ArmBootArch;\r
248 UINT8 MinorVersion;\r
249 UINT64 XFirmwareCtrl;\r
250 UINT64 XDsdt;\r
251 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
252 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
253 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
254 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
255 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
256 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
257 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
258 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
259 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
260 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
261 UINT64 HypervisorVendorIdentity;\r
262} EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE;\r
263\r
264///\r
265/// FADT Version (as defined in ACPI 6.2 spec.)\r
266///\r
267#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
268#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x02\r
269\r
270//\r
271// Fixed ACPI Description Table Preferred Power Management Profile\r
272//\r
273#define EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED 0\r
274#define EFI_ACPI_6_2_PM_PROFILE_DESKTOP 1\r
275#define EFI_ACPI_6_2_PM_PROFILE_MOBILE 2\r
276#define EFI_ACPI_6_2_PM_PROFILE_WORKSTATION 3\r
277#define EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER 4\r
278#define EFI_ACPI_6_2_PM_PROFILE_SOHO_SERVER 5\r
279#define EFI_ACPI_6_2_PM_PROFILE_APPLIANCE_PC 6\r
280#define EFI_ACPI_6_2_PM_PROFILE_PERFORMANCE_SERVER 7\r
281#define EFI_ACPI_6_2_PM_PROFILE_TABLET 8\r
282\r
283//\r
284// Fixed ACPI Description Table Boot Architecture Flags\r
285// All other bits are reserved and must be set to 0.\r
286//\r
287#define EFI_ACPI_6_2_LEGACY_DEVICES BIT0\r
288#define EFI_ACPI_6_2_8042 BIT1\r
289#define EFI_ACPI_6_2_VGA_NOT_PRESENT BIT2\r
290#define EFI_ACPI_6_2_MSI_NOT_SUPPORTED BIT3\r
291#define EFI_ACPI_6_2_PCIE_ASPM_CONTROLS BIT4\r
292#define EFI_ACPI_6_2_CMOS_RTC_NOT_PRESENT BIT5\r
293\r
294//\r
295// Fixed ACPI Description Table Arm Boot Architecture Flags\r
296// All other bits are reserved and must be set to 0.\r
297//\r
298#define EFI_ACPI_6_2_ARM_PSCI_COMPLIANT BIT0\r
299#define EFI_ACPI_6_2_ARM_PSCI_USE_HVC BIT1\r
300\r
301//\r
302// Fixed ACPI Description Table Fixed Feature Flags\r
303// All other bits are reserved and must be set to 0.\r
304//\r
305#define EFI_ACPI_6_2_WBINVD BIT0\r
306#define EFI_ACPI_6_2_WBINVD_FLUSH BIT1\r
307#define EFI_ACPI_6_2_PROC_C1 BIT2\r
308#define EFI_ACPI_6_2_P_LVL2_UP BIT3\r
309#define EFI_ACPI_6_2_PWR_BUTTON BIT4\r
310#define EFI_ACPI_6_2_SLP_BUTTON BIT5\r
311#define EFI_ACPI_6_2_FIX_RTC BIT6\r
312#define EFI_ACPI_6_2_RTC_S4 BIT7\r
313#define EFI_ACPI_6_2_TMR_VAL_EXT BIT8\r
314#define EFI_ACPI_6_2_DCK_CAP BIT9\r
315#define EFI_ACPI_6_2_RESET_REG_SUP BIT10\r
316#define EFI_ACPI_6_2_SEALED_CASE BIT11\r
317#define EFI_ACPI_6_2_HEADLESS BIT12\r
318#define EFI_ACPI_6_2_CPU_SW_SLP BIT13\r
319#define EFI_ACPI_6_2_PCI_EXP_WAK BIT14\r
320#define EFI_ACPI_6_2_USE_PLATFORM_CLOCK BIT15\r
321#define EFI_ACPI_6_2_S4_RTC_STS_VALID BIT16\r
322#define EFI_ACPI_6_2_REMOTE_POWER_ON_CAPABLE BIT17\r
323#define EFI_ACPI_6_2_FORCE_APIC_CLUSTER_MODEL BIT18\r
324#define EFI_ACPI_6_2_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
325#define EFI_ACPI_6_2_HW_REDUCED_ACPI BIT20\r
326#define EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
327\r
328///\r
329/// Firmware ACPI Control Structure\r
330///\r
331typedef struct {\r
332 UINT32 Signature;\r
333 UINT32 Length;\r
334 UINT32 HardwareSignature;\r
335 UINT32 FirmwareWakingVector;\r
336 UINT32 GlobalLock;\r
337 UINT32 Flags;\r
338 UINT64 XFirmwareWakingVector;\r
339 UINT8 Version;\r
340 UINT8 Reserved0[3];\r
341 UINT32 OspmFlags;\r
342 UINT8 Reserved1[24];\r
343} EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
344\r
345///\r
346/// FACS Version (as defined in ACPI 6.2 spec.)\r
347///\r
348#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
349\r
350///\r
351/// Firmware Control Structure Feature Flags\r
352/// All other bits are reserved and must be set to 0.\r
353///\r
354#define EFI_ACPI_6_2_S4BIOS_F BIT0\r
355#define EFI_ACPI_6_2_64BIT_WAKE_SUPPORTED_F BIT1\r
356\r
357///\r
358/// OSPM Enabled Firmware Control Structure Flags\r
359/// All other bits are reserved and must be set to 0.\r
360///\r
361#define EFI_ACPI_6_2_OSPM_64BIT_WAKE_F BIT0\r
362\r
363//\r
364// Differentiated System Description Table,\r
365// Secondary System Description Table\r
366// and Persistent System Description Table,\r
367// no definition needed as they are common description table header, the same with\r
368// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
369//\r
370#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
371#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
372\r
373///\r
374/// Multiple APIC Description Table header definition. The rest of the table\r
375/// must be defined in a platform specific manner.\r
376///\r
377typedef struct {\r
378 EFI_ACPI_DESCRIPTION_HEADER Header;\r
379 UINT32 LocalApicAddress;\r
380 UINT32 Flags;\r
381} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
382\r
383///\r
384/// MADT Revision (as defined in ACPI 6.2 spec.)\r
385///\r
386#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04\r
387\r
388///\r
389/// Multiple APIC Flags\r
390/// All other bits are reserved and must be set to 0.\r
391///\r
392#define EFI_ACPI_6_2_PCAT_COMPAT BIT0\r
393\r
394//\r
395// Multiple APIC Description Table APIC structure types\r
396// All other values between 0x0D and 0x7F are reserved and\r
397// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
398//\r
399#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC 0x00\r
400#define EFI_ACPI_6_2_IO_APIC 0x01\r
401#define EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE 0x02\r
402#define EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
403#define EFI_ACPI_6_2_LOCAL_APIC_NMI 0x04\r
404#define EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
405#define EFI_ACPI_6_2_IO_SAPIC 0x06\r
406#define EFI_ACPI_6_2_LOCAL_SAPIC 0x07\r
407#define EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES 0x08\r
408#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC 0x09\r
409#define EFI_ACPI_6_2_LOCAL_X2APIC_NMI 0x0A\r
410#define EFI_ACPI_6_2_GIC 0x0B\r
411#define EFI_ACPI_6_2_GICD 0x0C\r
412#define EFI_ACPI_6_2_GIC_MSI_FRAME 0x0D\r
413#define EFI_ACPI_6_2_GICR 0x0E\r
414#define EFI_ACPI_6_2_GIC_ITS 0x0F\r
415\r
416//\r
417// APIC Structure Definitions\r
418//\r
419\r
420///\r
421/// Processor Local APIC Structure Definition\r
422///\r
423typedef struct {\r
424 UINT8 Type;\r
425 UINT8 Length;\r
426 UINT8 AcpiProcessorUid;\r
427 UINT8 ApicId;\r
428 UINT32 Flags;\r
429} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
430\r
431///\r
432/// Local APIC Flags. All other bits are reserved and must be 0.\r
433///\r
434#define EFI_ACPI_6_2_LOCAL_APIC_ENABLED BIT0\r
435\r
436///\r
437/// IO APIC Structure\r
438///\r
439typedef struct {\r
440 UINT8 Type;\r
441 UINT8 Length;\r
442 UINT8 IoApicId;\r
443 UINT8 Reserved;\r
444 UINT32 IoApicAddress;\r
445 UINT32 GlobalSystemInterruptBase;\r
446} EFI_ACPI_6_2_IO_APIC_STRUCTURE;\r
447\r
448///\r
449/// Interrupt Source Override Structure\r
450///\r
451typedef struct {\r
452 UINT8 Type;\r
453 UINT8 Length;\r
454 UINT8 Bus;\r
455 UINT8 Source;\r
456 UINT32 GlobalSystemInterrupt;\r
457 UINT16 Flags;\r
458} EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
459\r
460///\r
461/// Platform Interrupt Sources Structure Definition\r
462///\r
463typedef struct {\r
464 UINT8 Type;\r
465 UINT8 Length;\r
466 UINT16 Flags;\r
467 UINT8 InterruptType;\r
468 UINT8 ProcessorId;\r
469 UINT8 ProcessorEid;\r
470 UINT8 IoSapicVector;\r
471 UINT32 GlobalSystemInterrupt;\r
472 UINT32 PlatformInterruptSourceFlags;\r
473 UINT8 CpeiProcessorOverride;\r
474 UINT8 Reserved[31];\r
475} EFI_ACPI_6_2_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
476\r
477//\r
478// MPS INTI flags.\r
479// All other bits are reserved and must be set to 0.\r
480//\r
481#define EFI_ACPI_6_2_POLARITY (3 << 0)\r
482#define EFI_ACPI_6_2_TRIGGER_MODE (3 << 2)\r
483\r
484///\r
485/// Non-Maskable Interrupt Source Structure\r
486///\r
487typedef struct {\r
488 UINT8 Type;\r
489 UINT8 Length;\r
490 UINT16 Flags;\r
491 UINT32 GlobalSystemInterrupt;\r
492} EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
493\r
494///\r
495/// Local APIC NMI Structure\r
496///\r
497typedef struct {\r
498 UINT8 Type;\r
499 UINT8 Length;\r
500 UINT8 AcpiProcessorUid;\r
501 UINT16 Flags;\r
502 UINT8 LocalApicLint;\r
503} EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE;\r
504\r
505///\r
506/// Local APIC Address Override Structure\r
507///\r
508typedef struct {\r
509 UINT8 Type;\r
510 UINT8 Length;\r
511 UINT16 Reserved;\r
512 UINT64 LocalApicAddress;\r
513} EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
514\r
515///\r
516/// IO SAPIC Structure\r
517///\r
518typedef struct {\r
519 UINT8 Type;\r
520 UINT8 Length;\r
521 UINT8 IoApicId;\r
522 UINT8 Reserved;\r
523 UINT32 GlobalSystemInterruptBase;\r
524 UINT64 IoSapicAddress;\r
525} EFI_ACPI_6_2_IO_SAPIC_STRUCTURE;\r
526\r
527///\r
528/// Local SAPIC Structure\r
529/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
530///\r
531typedef struct {\r
532 UINT8 Type;\r
533 UINT8 Length;\r
534 UINT8 AcpiProcessorId;\r
535 UINT8 LocalSapicId;\r
536 UINT8 LocalSapicEid;\r
537 UINT8 Reserved[3];\r
538 UINT32 Flags;\r
539 UINT32 ACPIProcessorUIDValue;\r
540} EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
541\r
542///\r
543/// Platform Interrupt Sources Structure\r
544///\r
545typedef struct {\r
546 UINT8 Type;\r
547 UINT8 Length;\r
548 UINT16 Flags;\r
549 UINT8 InterruptType;\r
550 UINT8 ProcessorId;\r
551 UINT8 ProcessorEid;\r
552 UINT8 IoSapicVector;\r
553 UINT32 GlobalSystemInterrupt;\r
554 UINT32 PlatformInterruptSourceFlags;\r
555} EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
556\r
557///\r
558/// Platform Interrupt Source Flags.\r
559/// All other bits are reserved and must be set to 0.\r
560///\r
561#define EFI_ACPI_6_2_CPEI_PROCESSOR_OVERRIDE BIT0\r
562\r
563///\r
564/// Processor Local x2APIC Structure Definition\r
565///\r
566typedef struct {\r
567 UINT8 Type;\r
568 UINT8 Length;\r
569 UINT8 Reserved[2];\r
570 UINT32 X2ApicId;\r
571 UINT32 Flags;\r
572 UINT32 AcpiProcessorUid;\r
573} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
574\r
575///\r
576/// Local x2APIC NMI Structure\r
577///\r
578typedef struct {\r
579 UINT8 Type;\r
580 UINT8 Length;\r
581 UINT16 Flags;\r
582 UINT32 AcpiProcessorUid;\r
583 UINT8 LocalX2ApicLint;\r
584 UINT8 Reserved[3];\r
585} EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE;\r
586\r
587///\r
588/// GIC Structure\r
589///\r
590typedef struct {\r
591 UINT8 Type;\r
592 UINT8 Length;\r
593 UINT16 Reserved;\r
594 UINT32 CPUInterfaceNumber;\r
595 UINT32 AcpiProcessorUid;\r
596 UINT32 Flags;\r
597 UINT32 ParkingProtocolVersion;\r
598 UINT32 PerformanceInterruptGsiv;\r
599 UINT64 ParkedAddress;\r
600 UINT64 PhysicalBaseAddress;\r
601 UINT64 GICV;\r
602 UINT64 GICH;\r
603 UINT32 VGICMaintenanceInterrupt;\r
604 UINT64 GICRBaseAddress;\r
605 UINT64 MPIDR;\r
606 UINT8 ProcessorPowerEfficiencyClass;\r
607 UINT8 Reserved2[3];\r
608} EFI_ACPI_6_2_GIC_STRUCTURE;\r
609\r
610///\r
611/// GIC Flags. All other bits are reserved and must be 0.\r
612///\r
613#define EFI_ACPI_6_2_GIC_ENABLED BIT0\r
614#define EFI_ACPI_6_2_PERFORMANCE_INTERRUPT_MODEL BIT1\r
615#define EFI_ACPI_6_2_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
616\r
617///\r
618/// GIC Distributor Structure\r
619///\r
620typedef struct {\r
621 UINT8 Type;\r
622 UINT8 Length;\r
623 UINT16 Reserved1;\r
624 UINT32 GicId;\r
625 UINT64 PhysicalBaseAddress;\r
626 UINT32 SystemVectorBase;\r
627 UINT8 GicVersion;\r
628 UINT8 Reserved2[3];\r
629} EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE;\r
630\r
631///\r
632/// GIC Version\r
633///\r
634#define EFI_ACPI_6_2_GIC_V1 0x01\r
635#define EFI_ACPI_6_2_GIC_V2 0x02\r
636#define EFI_ACPI_6_2_GIC_V3 0x03\r
637#define EFI_ACPI_6_2_GIC_V4 0x04\r
638\r
639///\r
640/// GIC MSI Frame Structure\r
641///\r
642typedef struct {\r
643 UINT8 Type;\r
644 UINT8 Length;\r
645 UINT16 Reserved1;\r
646 UINT32 GicMsiFrameId;\r
647 UINT64 PhysicalBaseAddress;\r
648 UINT32 Flags;\r
649 UINT16 SPICount;\r
650 UINT16 SPIBase;\r
651} EFI_ACPI_6_2_GIC_MSI_FRAME_STRUCTURE;\r
652\r
653///\r
654/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
655///\r
656#define EFI_ACPI_6_2_SPI_COUNT_BASE_SELECT BIT0\r
657\r
658///\r
659/// GICR Structure\r
660///\r
661typedef struct {\r
662 UINT8 Type;\r
663 UINT8 Length;\r
664 UINT16 Reserved;\r
665 UINT64 DiscoveryRangeBaseAddress;\r
666 UINT32 DiscoveryRangeLength;\r
667} EFI_ACPI_6_2_GICR_STRUCTURE;\r
668\r
669///\r
670/// GIC Interrupt Translation Service Structure\r
671///\r
672typedef struct {\r
673 UINT8 Type;\r
674 UINT8 Length;\r
675 UINT16 Reserved;\r
676 UINT32 GicItsId;\r
677 UINT64 PhysicalBaseAddress;\r
678 UINT32 Reserved2;\r
679} EFI_ACPI_6_2_GIC_ITS_STRUCTURE;\r
680\r
681///\r
682/// Smart Battery Description Table (SBST)\r
683///\r
684typedef struct {\r
685 EFI_ACPI_DESCRIPTION_HEADER Header;\r
686 UINT32 WarningEnergyLevel;\r
687 UINT32 LowEnergyLevel;\r
688 UINT32 CriticalEnergyLevel;\r
689} EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE;\r
690\r
691///\r
692/// SBST Version (as defined in ACPI 6.2 spec.)\r
693///\r
694#define EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
695\r
696///\r
697/// Embedded Controller Boot Resources Table (ECDT)\r
698/// The table is followed by a null terminated ASCII string that contains\r
699/// a fully qualified reference to the name space object.\r
700///\r
701typedef struct {\r
702 EFI_ACPI_DESCRIPTION_HEADER Header;\r
703 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcControl;\r
704 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcData;\r
705 UINT32 Uid;\r
706 UINT8 GpeBit;\r
707} EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
708\r
709///\r
710/// ECDT Version (as defined in ACPI 6.2 spec.)\r
711///\r
712#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
713\r
714///\r
715/// System Resource Affinity Table (SRAT). The rest of the table\r
716/// must be defined in a platform specific manner.\r
717///\r
718typedef struct {\r
719 EFI_ACPI_DESCRIPTION_HEADER Header;\r
720 UINT32 Reserved1; ///< Must be set to 1\r
721 UINT64 Reserved2;\r
722} EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
723\r
724///\r
725/// SRAT Version (as defined in ACPI 6.2 spec.)\r
726///\r
727#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
728\r
729//\r
730// SRAT structure types.\r
731// All other values between 0x05 an 0xFF are reserved and\r
732// will be ignored by OSPM.\r
733//\r
734#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
735#define EFI_ACPI_6_2_MEMORY_AFFINITY 0x01\r
736#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
737#define EFI_ACPI_6_2_GICC_AFFINITY 0x03\r
738#define EFI_ACPI_6_2_GIC_ITS_AFFINITY 0x04\r
739\r
740///\r
741/// Processor Local APIC/SAPIC Affinity Structure Definition\r
742///\r
743typedef struct {\r
744 UINT8 Type;\r
745 UINT8 Length;\r
746 UINT8 ProximityDomain7To0;\r
747 UINT8 ApicId;\r
748 UINT32 Flags;\r
749 UINT8 LocalSapicEid;\r
750 UINT8 ProximityDomain31To8[3];\r
751 UINT32 ClockDomain;\r
752} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
753\r
754///\r
755/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
756///\r
757#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
758\r
759///\r
760/// Memory Affinity Structure Definition\r
761///\r
762typedef struct {\r
763 UINT8 Type;\r
764 UINT8 Length;\r
765 UINT32 ProximityDomain;\r
766 UINT16 Reserved1;\r
767 UINT32 AddressBaseLow;\r
768 UINT32 AddressBaseHigh;\r
769 UINT32 LengthLow;\r
770 UINT32 LengthHigh;\r
771 UINT32 Reserved2;\r
772 UINT32 Flags;\r
773 UINT64 Reserved3;\r
774} EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE;\r
775\r
776//\r
777// Memory Flags. All other bits are reserved and must be 0.\r
778//\r
779#define EFI_ACPI_6_2_MEMORY_ENABLED (1 << 0)\r
780#define EFI_ACPI_6_2_MEMORY_HOT_PLUGGABLE (1 << 1)\r
781#define EFI_ACPI_6_2_MEMORY_NONVOLATILE (1 << 2)\r
782\r
783///\r
784/// Processor Local x2APIC Affinity Structure Definition\r
785///\r
786typedef struct {\r
787 UINT8 Type;\r
788 UINT8 Length;\r
789 UINT8 Reserved1[2];\r
790 UINT32 ProximityDomain;\r
791 UINT32 X2ApicId;\r
792 UINT32 Flags;\r
793 UINT32 ClockDomain;\r
794 UINT8 Reserved2[4];\r
795} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
796\r
797///\r
798/// GICC Affinity Structure Definition\r
799///\r
800typedef struct {\r
801 UINT8 Type;\r
802 UINT8 Length;\r
803 UINT32 ProximityDomain;\r
804 UINT32 AcpiProcessorUid;\r
805 UINT32 Flags;\r
806 UINT32 ClockDomain;\r
807} EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE;\r
808\r
809///\r
810/// GICC Flags. All other bits are reserved and must be 0.\r
811///\r
812#define EFI_ACPI_6_2_GICC_ENABLED (1 << 0)\r
813\r
814///\r
815/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
816///\r
817typedef struct {\r
818 UINT8 Type;\r
819 UINT8 Length;\r
820 UINT32 ProximityDomain;\r
821 UINT8 Reserved[2];\r
822 UINT32 ItsId;\r
823} EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE;\r
824\r
825///\r
826/// System Locality Distance Information Table (SLIT).\r
827/// The rest of the table is a matrix.\r
828///\r
829typedef struct {\r
830 EFI_ACPI_DESCRIPTION_HEADER Header;\r
831 UINT64 NumberOfSystemLocalities;\r
832} EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
833\r
834///\r
835/// SLIT Version (as defined in ACPI 6.2 spec.)\r
836///\r
837#define EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
838\r
839///\r
840/// Corrected Platform Error Polling Table (CPEP)\r
841///\r
842typedef struct {\r
843 EFI_ACPI_DESCRIPTION_HEADER Header;\r
844 UINT8 Reserved[8];\r
845} EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
846\r
847///\r
848/// CPEP Version (as defined in ACPI 6.2 spec.)\r
849///\r
850#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
851\r
852//\r
853// CPEP processor structure types.\r
854//\r
855#define EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
856\r
857///\r
858/// Corrected Platform Error Polling Processor Structure Definition\r
859///\r
860typedef struct {\r
861 UINT8 Type;\r
862 UINT8 Length;\r
863 UINT8 ProcessorId;\r
864 UINT8 ProcessorEid;\r
865 UINT32 PollingInterval;\r
866} EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
867\r
868///\r
869/// Maximum System Characteristics Table (MSCT)\r
870///\r
871typedef struct {\r
872 EFI_ACPI_DESCRIPTION_HEADER Header;\r
873 UINT32 OffsetProxDomInfo;\r
874 UINT32 MaximumNumberOfProximityDomains;\r
875 UINT32 MaximumNumberOfClockDomains;\r
876 UINT64 MaximumPhysicalAddress;\r
877} EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
878\r
879///\r
880/// MSCT Version (as defined in ACPI 6.2 spec.)\r
881///\r
882#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
883\r
884///\r
885/// Maximum Proximity Domain Information Structure Definition\r
886///\r
887typedef struct {\r
888 UINT8 Revision;\r
889 UINT8 Length;\r
890 UINT32 ProximityDomainRangeLow;\r
891 UINT32 ProximityDomainRangeHigh;\r
892 UINT32 MaximumProcessorCapacity;\r
893 UINT64 MaximumMemoryCapacity;\r
894} EFI_ACPI_6_2_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
895\r
896///\r
897/// ACPI RAS Feature Table definition.\r
898///\r
899typedef struct {\r
900 EFI_ACPI_DESCRIPTION_HEADER Header;\r
901 UINT8 PlatformCommunicationChannelIdentifier[12];\r
902} EFI_ACPI_6_2_RAS_FEATURE_TABLE;\r
903\r
904///\r
905/// RASF Version (as defined in ACPI 6.2 spec.)\r
906///\r
907#define EFI_ACPI_6_2_RAS_FEATURE_TABLE_REVISION 0x01\r
908\r
909///\r
910/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
911///\r
912typedef struct {\r
913 UINT32 Signature;\r
914 UINT16 Command;\r
915 UINT16 Status;\r
916 UINT16 Version;\r
917 UINT8 RASCapabilities[16];\r
918 UINT8 SetRASCapabilities[16];\r
919 UINT16 NumberOfRASFParameterBlocks;\r
920 UINT32 SetRASCapabilitiesStatus;\r
921} EFI_ACPI_6_2_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
922\r
923///\r
924/// ACPI RASF PCC command code\r
925///\r
926#define EFI_ACPI_6_2_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
927\r
928///\r
929/// ACPI RASF Platform RAS Capabilities\r
930///\r
931#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
932#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
933#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
934#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
935#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
936\r
937///\r
938/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
939///\r
940typedef struct {\r
941 UINT16 Type;\r
942 UINT16 Version;\r
943 UINT16 Length;\r
944 UINT16 PatrolScrubCommand;\r
945 UINT64 RequestedAddressRange[2];\r
946 UINT64 ActualAddressRange[2];\r
947 UINT16 Flags;\r
948 UINT8 RequestedSpeed;\r
949} EFI_ACPI_6_2_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
950\r
951///\r
952/// ACPI RASF Patrol Scrub command\r
953///\r
954#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
955#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
956#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
957\r
958///\r
959/// Memory Power State Table definition.\r
960///\r
961typedef struct {\r
962 EFI_ACPI_DESCRIPTION_HEADER Header;\r
963 UINT8 PlatformCommunicationChannelIdentifier;\r
964 UINT8 Reserved[3];\r
965// Memory Power Node Structure\r
966// Memory Power State Characteristics\r
967} EFI_ACPI_6_2_MEMORY_POWER_STATUS_TABLE;\r
968\r
969///\r
970/// MPST Version (as defined in ACPI 6.2 spec.)\r
971///\r
972#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
973\r
974///\r
975/// MPST Platform Communication Channel Shared Memory Region definition.\r
976///\r
977typedef struct {\r
978 UINT32 Signature;\r
979 UINT16 Command;\r
980 UINT16 Status;\r
981 UINT32 MemoryPowerCommandRegister;\r
982 UINT32 MemoryPowerStatusRegister;\r
983 UINT32 PowerStateId;\r
984 UINT32 MemoryPowerNodeId;\r
985 UINT64 MemoryEnergyConsumed;\r
986 UINT64 ExpectedAveragePowerComsuned;\r
987} EFI_ACPI_6_2_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
988\r
989///\r
990/// ACPI MPST PCC command code\r
991///\r
992#define EFI_ACPI_6_2_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
993\r
994///\r
995/// ACPI MPST Memory Power command\r
996///\r
997#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
998#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
999#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
1000#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
1001\r
1002///\r
1003/// MPST Memory Power Node Table\r
1004///\r
1005typedef struct {\r
1006 UINT8 PowerStateValue;\r
1007 UINT8 PowerStateInformationIndex;\r
1008} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE;\r
1009\r
1010typedef struct {\r
1011 UINT8 Flag;\r
1012 UINT8 Reserved;\r
1013 UINT16 MemoryPowerNodeId;\r
1014 UINT32 Length;\r
1015 UINT64 AddressBase;\r
1016 UINT64 AddressLength;\r
1017 UINT32 NumberOfPowerStates;\r
1018 UINT32 NumberOfPhysicalComponents;\r
1019//EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1020//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1021} EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE;\r
1022\r
1023#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1024#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1025#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1026\r
1027typedef struct {\r
1028 UINT16 MemoryPowerNodeCount;\r
1029 UINT8 Reserved[2];\r
1030} EFI_ACPI_6_2_MPST_MEMORY_POWER_NODE_TABLE;\r
1031\r
1032///\r
1033/// MPST Memory Power State Characteristics Table\r
1034///\r
1035typedef struct {\r
1036 UINT8 PowerStateStructureID;\r
1037 UINT8 Flag;\r
1038 UINT16 Reserved;\r
1039 UINT32 AveragePowerConsumedInMPS0;\r
1040 UINT32 RelativePowerSavingToMPS0;\r
1041 UINT64 ExitLatencyToMPS0;\r
1042} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1043\r
1044#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1045#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1046#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1047\r
1048typedef struct {\r
1049 UINT16 MemoryPowerStateCharacteristicsCount;\r
1050 UINT8 Reserved[2];\r
1051} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1052\r
1053///\r
1054/// Memory Topology Table definition.\r
1055///\r
1056typedef struct {\r
1057 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1058 UINT32 Reserved;\r
1059} EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE;\r
1060\r
1061///\r
1062/// PMTT Version (as defined in ACPI 6.2 spec.)\r
1063///\r
1064#define EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
1065\r
1066///\r
1067/// Common Memory Aggregator Device Structure.\r
1068///\r
1069typedef struct {\r
1070 UINT8 Type;\r
1071 UINT8 Reserved;\r
1072 UINT16 Length;\r
1073 UINT16 Flags;\r
1074 UINT16 Reserved1;\r
1075} EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1076\r
1077///\r
1078/// Memory Aggregator Device Type\r
1079///\r
1080#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
1081#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1082#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1083\r
1084///\r
1085/// Socket Memory Aggregator Device Structure.\r
1086///\r
1087typedef struct {\r
1088 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1089 UINT16 SocketIdentifier;\r
1090 UINT16 Reserved;\r
1091//EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1092} EFI_ACPI_6_2_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1093\r
1094///\r
1095/// MemoryController Memory Aggregator Device Structure.\r
1096///\r
1097typedef struct {\r
1098 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1099 UINT32 ReadLatency;\r
1100 UINT32 WriteLatency;\r
1101 UINT32 ReadBandwidth;\r
1102 UINT32 WriteBandwidth;\r
1103 UINT16 OptimalAccessUnit;\r
1104 UINT16 OptimalAccessAlignment;\r
1105 UINT16 Reserved;\r
1106 UINT16 NumberOfProximityDomains;\r
1107//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1108//EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1109} EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1110\r
1111///\r
1112/// DIMM Memory Aggregator Device Structure.\r
1113///\r
1114typedef struct {\r
1115 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1116 UINT16 PhysicalComponentIdentifier;\r
1117 UINT16 Reserved;\r
1118 UINT32 SizeOfDimm;\r
1119 UINT32 SmbiosHandle;\r
1120} EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1121\r
1122///\r
1123/// Boot Graphics Resource Table definition.\r
1124///\r
1125typedef struct {\r
1126 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1127 ///\r
1128 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1129 ///\r
1130 UINT16 Version;\r
1131 ///\r
1132 /// 1-byte status field indicating current status about the table.\r
1133 /// Bits[7:1] = Reserved (must be zero)\r
1134 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1135 ///\r
1136 UINT8 Status;\r
1137 ///\r
1138 /// 1-byte enumerated type field indicating format of the image.\r
1139 /// 0 = Bitmap\r
1140 /// 1 - 255 Reserved (for future use)\r
1141 ///\r
1142 UINT8 ImageType;\r
1143 ///\r
1144 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1145 /// of the image bitmap.\r
1146 ///\r
1147 UINT64 ImageAddress;\r
1148 ///\r
1149 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1150 /// (X, Y) display offset of the top left corner of the boot image.\r
1151 /// The top left corner of the display is at offset (0, 0).\r
1152 ///\r
1153 UINT32 ImageOffsetX;\r
1154 ///\r
1155 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1156 /// (X, Y) display offset of the top left corner of the boot image.\r
1157 /// The top left corner of the display is at offset (0, 0).\r
1158 ///\r
1159 UINT32 ImageOffsetY;\r
1160} EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1161\r
1162///\r
1163/// BGRT Revision\r
1164///\r
1165#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1166\r
1167///\r
1168/// BGRT Version\r
1169///\r
1170#define EFI_ACPI_6_2_BGRT_VERSION 0x01\r
1171\r
1172///\r
1173/// BGRT Status\r
1174///\r
1175#define EFI_ACPI_6_2_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1176#define EFI_ACPI_6_2_BGRT_STATUS_DISPLAYED 0x01\r
1177\r
1178///\r
1179/// BGRT Image Type\r
1180///\r
1181#define EFI_ACPI_6_2_BGRT_IMAGE_TYPE_BMP 0x00\r
1182\r
1183///\r
1184/// FPDT Version (as defined in ACPI 6.2 spec.)\r
1185///\r
1186#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1187\r
1188///\r
1189/// FPDT Performance Record Types\r
1190///\r
1191#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1192#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1193\r
1194///\r
1195/// FPDT Performance Record Revision\r
1196///\r
1197#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1198#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1199\r
1200///\r
1201/// FPDT Runtime Performance Record Types\r
1202///\r
1203#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1204#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1205#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1206\r
1207///\r
1208/// FPDT Runtime Performance Record Revision\r
1209///\r
1210#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1211#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1212#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1213\r
1214///\r
1215/// FPDT Performance Record header\r
1216///\r
1217typedef struct {\r
1218 UINT16 Type;\r
1219 UINT8 Length;\r
1220 UINT8 Revision;\r
1221} EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER;\r
1222\r
1223///\r
1224/// FPDT Performance Table header\r
1225///\r
1226typedef struct {\r
1227 UINT32 Signature;\r
1228 UINT32 Length;\r
1229} EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER;\r
1230\r
1231///\r
1232/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1233///\r
1234typedef struct {\r
1235 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1236 UINT32 Reserved;\r
1237 ///\r
1238 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1239 ///\r
1240 UINT64 BootPerformanceTablePointer;\r
1241} EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1242\r
1243///\r
1244/// FPDT S3 Performance Table Pointer Record Structure\r
1245///\r
1246typedef struct {\r
1247 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1248 UINT32 Reserved;\r
1249 ///\r
1250 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1251 ///\r
1252 UINT64 S3PerformanceTablePointer;\r
1253} EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1254\r
1255///\r
1256/// FPDT Firmware Basic Boot Performance Record Structure\r
1257///\r
1258typedef struct {\r
1259 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1260 UINT32 Reserved;\r
1261 ///\r
1262 /// Timer value logged at the beginning of firmware image execution.\r
1263 /// This may not always be zero or near zero.\r
1264 ///\r
1265 UINT64 ResetEnd;\r
1266 ///\r
1267 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1268 /// For non-UEFI compatible boots, this field must be zero.\r
1269 ///\r
1270 UINT64 OsLoaderLoadImageStart;\r
1271 ///\r
1272 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1273 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1274 /// to the INT 19h handler invocation.\r
1275 ///\r
1276 UINT64 OsLoaderStartImageStart;\r
1277 ///\r
1278 /// Timer value logged at the point when the OS loader calls the\r
1279 /// ExitBootServices function for UEFI compatible firmware.\r
1280 /// For non-UEFI compatible boots, this field must be zero.\r
1281 ///\r
1282 UINT64 ExitBootServicesEntry;\r
1283 ///\r
b219e2cd 1284 /// Timer value logged at the point just prior to when the OS loader gaining\r
e67b675d
SZ		 1285 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1286 /// For non-UEFI compatible boots, this field must be zero.\r
1287 ///\r
1288 UINT64 ExitBootServicesExit;\r
1289} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1290\r
1291///\r
1292/// FPDT Firmware Basic Boot Performance Table signature\r
1293///\r
1294#define EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1295\r
1296//\r
1297// FPDT Firmware Basic Boot Performance Table\r
1298//\r
1299typedef struct {\r
1300 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1301 //\r
1302 // one or more Performance Records.\r
1303 //\r
1304} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1305\r
1306///\r
1307/// FPDT "S3PT" S3 Performance Table\r
1308///\r
1309#define EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1310\r
1311//\r
1312// FPDT Firmware S3 Boot Performance Table\r
1313//\r
1314typedef struct {\r
1315 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1316 //\r
1317 // one or more Performance Records.\r
1318 //\r
1319} EFI_ACPI_6_2_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1320\r
1321///\r
1322/// FPDT Basic S3 Resume Performance Record\r
1323///\r
1324typedef struct {\r
1325 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1326 ///\r
1327 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1328 ///\r
1329 UINT32 ResumeCount;\r
1330 ///\r
1331 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1332 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1333 ///\r
1334 UINT64 FullResume;\r
1335 ///\r
1336 /// Average timer value of all resume cycles logged since the last full boot\r
1337 /// sequence, including the most recent resume. Note that the entire log of\r
1338 /// timer values does not need to be retained in order to calculate this average.\r
1339 ///\r
1340 UINT64 AverageResume;\r
1341} EFI_ACPI_6_2_FPDT_S3_RESUME_RECORD;\r
1342\r
1343///\r
1344/// FPDT Basic S3 Suspend Performance Record\r
1345///\r
1346typedef struct {\r
1347 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1348 ///\r
1349 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1350 /// Only the most recent suspend cycle's timer value is retained.\r
1351 ///\r
1352 UINT64 SuspendStart;\r
1353 ///\r
1354 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1355 /// mechanism) used to trigger hardware entry to S3.\r
1356 /// Only the most recent suspend cycle's timer value is retained.\r
1357 ///\r
1358 UINT64 SuspendEnd;\r
1359} EFI_ACPI_6_2_FPDT_S3_SUSPEND_RECORD;\r
1360\r
1361///\r
1362/// Firmware Performance Record Table definition.\r
1363///\r
1364typedef struct {\r
1365 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1366} EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1367\r
1368///\r
1369/// Generic Timer Description Table definition.\r
1370///\r
1371typedef struct {\r
1372 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1373 UINT64 CntControlBasePhysicalAddress;\r
1374 UINT32 Reserved;\r
1375 UINT32 SecurePL1TimerGSIV;\r
1376 UINT32 SecurePL1TimerFlags;\r
1377 UINT32 NonSecurePL1TimerGSIV;\r
1378 UINT32 NonSecurePL1TimerFlags;\r
1379 UINT32 VirtualTimerGSIV;\r
1380 UINT32 VirtualTimerFlags;\r
1381 UINT32 NonSecurePL2TimerGSIV;\r
1382 UINT32 NonSecurePL2TimerFlags;\r
1383 UINT64 CntReadBasePhysicalAddress;\r
1384 UINT32 PlatformTimerCount;\r
1385 UINT32 PlatformTimerOffset;\r
1386} EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1387\r
1388///\r
1389/// GTDT Version (as defined in ACPI 6.2 spec.)\r
1390///\r
1391#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
1392\r
1393///\r
1394/// Timer Flags. All other bits are reserved and must be 0.\r
1395///\r
1396#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1397#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1398#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1399\r
1400///\r
1401/// Platform Timer Type\r
1402///\r
1403#define EFI_ACPI_6_2_GTDT_GT_BLOCK 0\r
1404#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1405\r
1406///\r
1407/// GT Block Structure\r
1408///\r
1409typedef struct {\r
1410 UINT8 Type;\r
1411 UINT16 Length;\r
1412 UINT8 Reserved;\r
1413 UINT64 CntCtlBase;\r
1414 UINT32 GTBlockTimerCount;\r
1415 UINT32 GTBlockTimerOffset;\r
1416} EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE;\r
1417\r
1418///\r
1419/// GT Block Timer Structure\r
1420///\r
1421typedef struct {\r
1422 UINT8 GTFrameNumber;\r
1423 UINT8 Reserved[3];\r
1424 UINT64 CntBaseX;\r
1425 UINT64 CntEL0BaseX;\r
1426 UINT32 GTxPhysicalTimerGSIV;\r
1427 UINT32 GTxPhysicalTimerFlags;\r
1428 UINT32 GTxVirtualTimerGSIV;\r
1429 UINT32 GTxVirtualTimerFlags;\r
1430 UINT32 GTxCommonFlags;\r
1431} EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1432\r
1433///\r
1434/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1435///\r
1436#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1437#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1438\r
1439///\r
1440/// Common Flags Flags. All other bits are reserved and must be 0.\r
1441///\r
1442#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1443#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1444\r
1445///\r
1446/// SBSA Generic Watchdog Structure\r
1447///\r
1448typedef struct {\r
1449 UINT8 Type;\r
1450 UINT16 Length;\r
1451 UINT8 Reserved;\r
1452 UINT64 RefreshFramePhysicalAddress;\r
1453 UINT64 WatchdogControlFramePhysicalAddress;\r
1454 UINT32 WatchdogTimerGSIV;\r
1455 UINT32 WatchdogTimerFlags;\r
1456} EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1457\r
1458///\r
1459/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1460///\r
1461#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1462#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1463#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1464\r
1465//\r
1466// NVDIMM Firmware Interface Table definition.\r
1467//\r
1468typedef struct {\r
1469 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1470 UINT32 Reserved;\r
1471} EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1472\r
1473//\r
1474// NFIT Version (as defined in ACPI 6.2 spec.)\r
1475//\r
1476#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1477\r
1478//\r
1479// Definition for NFIT Table Structure Types\r
1480//\r
1481#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1482#define EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1483#define EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1484#define EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1485#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1486#define EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1487#define EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1488\r
1489//\r
1490// Definition for NFIT Structure Header\r
1491//\r
1492typedef struct {\r
1493 UINT16 Type;\r
1494 UINT16 Length;\r
1495} EFI_ACPI_6_2_NFIT_STRUCTURE_HEADER;\r
1496\r
1497//\r
1498// Definition for System Physical Address Range Structure\r
1499//\r
1500#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1501#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1502#define EFI_ACPI_6_2_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1503#define EFI_ACPI_6_2_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1504#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1505#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1506#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1507#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1508#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
385c0bf5 1509#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
e67b675d
SZ		 1510typedef struct {\r
1511 UINT16 Type;\r
1512 UINT16 Length;\r
1513 UINT16 SPARangeStructureIndex;\r
1514 UINT16 Flags;\r
1515 UINT32 Reserved_8;\r
1516 UINT32 ProximityDomain;\r
1517 GUID AddressRangeTypeGUID;\r
1518 UINT64 SystemPhysicalAddressRangeBase;\r
1519 UINT64 SystemPhysicalAddressRangeLength;\r
1520 UINT64 AddressRangeMemoryMappingAttribute;\r
1521} EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1522\r
1523//\r
1524// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1525//\r
1526typedef struct {\r
1527 UINT32 DIMMNumber:4;\r
1528 UINT32 MemoryChannelNumber:4;\r
1529 UINT32 MemoryControllerID:4;\r
1530 UINT32 SocketID:4;\r
1531 UINT32 NodeControllerID:12;\r
1532 UINT32 Reserved_28:4;\r
1533} EFI_ACPI_6_2_NFIT_DEVICE_HANDLE;\r
1534\r
1535#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1536#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1537#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1538#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1539#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1540#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1541#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1542typedef struct {\r
1543 UINT16 Type;\r
1544 UINT16 Length;\r
1545 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1546 UINT16 NVDIMMPhysicalID;\r
1547 UINT16 NVDIMMRegionID;\r
1548 UINT16 SPARangeStructureIndex ;\r
1549 UINT16 NVDIMMControlRegionStructureIndex;\r
1550 UINT64 NVDIMMRegionSize;\r
1551 UINT64 RegionOffset;\r
1552 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1553 UINT16 InterleaveStructureIndex;\r
1554 UINT16 InterleaveWays;\r
1555 UINT16 NVDIMMStateFlags;\r
1556 UINT16 Reserved_46;\r
1557} EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1558\r
1559//\r
1560// Definition for Interleave Structure\r
1561//\r
1562typedef struct {\r
1563 UINT16 Type;\r
1564 UINT16 Length;\r
1565 UINT16 InterleaveStructureIndex;\r
1566 UINT16 Reserved_6;\r
1567 UINT32 NumberOfLines;\r
1568 UINT32 LineSize;\r
1569//UINT32 LineOffset[NumberOfLines];\r
1570} EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE;\r
1571\r
1572//\r
1573// Definition for SMBIOS Management Information Structure\r
1574//\r
1575typedef struct {\r
1576 UINT16 Type;\r
1577 UINT16 Length;\r
1578 UINT32 Reserved_4;\r
1579//UINT8 Data[];\r
1580} EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1581\r
1582//\r
1583// Definition for NVDIMM Control Region Structure\r
1584//\r
1585#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1586\r
1587#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1588typedef struct {\r
1589 UINT16 Type;\r
1590 UINT16 Length;\r
1591 UINT16 NVDIMMControlRegionStructureIndex;\r
1592 UINT16 VendorID;\r
1593 UINT16 DeviceID;\r
1594 UINT16 RevisionID;\r
1595 UINT16 SubsystemVendorID;\r
1596 UINT16 SubsystemDeviceID;\r
1597 UINT16 SubsystemRevisionID;\r
1598 UINT8 ValidFields;\r
1599 UINT8 ManufacturingLocation;\r
1600 UINT16 ManufacturingDate;\r
1601 UINT8 Reserved_22[2];\r
1602 UINT32 SerialNumber;\r
1603 UINT16 RegionFormatInterfaceCode;\r
1604 UINT16 NumberOfBlockControlWindows;\r
1605 UINT64 SizeOfBlockControlWindow;\r
1606 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1607 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1608 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1609 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1610 UINT16 NVDIMMControlRegionFlag;\r
1611 UINT8 Reserved_74[6];\r
1612} EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1613\r
1614//\r
1615// Definition for NVDIMM Block Data Window Region Structure\r
1616//\r
1617typedef struct {\r
1618 UINT16 Type;\r
1619 UINT16 Length;\r
1620 UINT16 NVDIMMControlRegionStructureIndex;\r
1621 UINT16 NumberOfBlockDataWindows;\r
1622 UINT64 BlockDataWindowStartOffset;\r
1623 UINT64 SizeOfBlockDataWindow;\r
1624 UINT64 BlockAccessibleMemoryCapacity;\r
1625 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1626} EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1627\r
1628//\r
1629// Definition for Flush Hint Address Structure\r
1630//\r
1631typedef struct {\r
1632 UINT16 Type;\r
1633 UINT16 Length;\r
1634 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1635 UINT16 NumberOfFlushHintAddresses;\r
1636 UINT8 Reserved_10[6];\r
1637//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1638} EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1639\r
1640///\r
1641/// Secure DEVices Table (SDEV)\r
1642///\r
1643typedef struct {\r
1644 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1645} EFI_ACPI_6_2_SECURE_DEVICES_TABLE_HEADER;\r
1646\r
1647///\r
1648/// SDEV Revision (as defined in ACPI 6.2 spec.)\r
1649///\r
1650#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_REVISION 0x01\r
1651\r
1652///\r
b219e2cd 1653/// Secure Device types\r
e67b675d
SZ		 1654///\r
1655#define EFI_ACPI_6_2_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1656#define EFI_ACPI_6_2_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1657\r
1658///\r
b219e2cd 1659/// Secure Device flags\r
e67b675d
SZ		 1660///\r
1661#define EFI_ACPI_6_2_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1662\r
1663///\r
1664/// SDEV Structure Header\r
1665///\r
1666typedef struct {\r
1667 UINT8 Type;\r
1668 UINT8 Flags;\r
1669 UINT16 Length;\r
1670} EFI_ACPI_6_2_SDEV_STRUCTURE_HEADER;\r
1671\r
1672///\r
1673/// PCIe Endpoint Device based Secure Device Structure\r
1674///\r
1675typedef struct {\r
1676 UINT8 Type;\r
1677 UINT8 Flags;\r
1678 UINT16 Length;\r
1679 UINT16 PciSegmentNumber;\r
1680 UINT16 StartBusNumber;\r
1681 UINT16 PciPathOffset;\r
1682 UINT16 PciPathLength;\r
1683 UINT16 VendorSpecificDataOffset;\r
1684 UINT16 VendorSpecificDataLength;\r
1685} EFI_ACPI_6_2_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1686\r
1687///\r
1688/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1689///\r
1690typedef struct {\r
1691 UINT8 Type;\r
1692 UINT8 Flags;\r
1693 UINT16 Length;\r
1694 UINT16 DeviceIdentifierOffset;\r
1695 UINT16 DeviceIdentifierLength;\r
1696 UINT16 VendorSpecificDataOffset;\r
1697 UINT16 VendorSpecificDataLength;\r
1698} EFI_ACPI_6_2_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1699\r
1700///\r
1701/// Boot Error Record Table (BERT)\r
1702///\r
1703typedef struct {\r
1704 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1705 UINT32 BootErrorRegionLength;\r
1706 UINT64 BootErrorRegion;\r
1707} EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1708\r
1709///\r
1710/// BERT Version (as defined in ACPI 6.2 spec.)\r
1711///\r
1712#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1713\r
1714///\r
1715/// Boot Error Region Block Status Definition\r
1716///\r
1717typedef struct {\r
1718 UINT32 UncorrectableErrorValid:1;\r
1719 UINT32 CorrectableErrorValid:1;\r
1720 UINT32 MultipleUncorrectableErrors:1;\r
1721 UINT32 MultipleCorrectableErrors:1;\r
1722 UINT32 ErrorDataEntryCount:10;\r
1723 UINT32 Reserved:18;\r
1724} EFI_ACPI_6_2_ERROR_BLOCK_STATUS;\r
1725\r
1726///\r
1727/// Boot Error Region Definition\r
1728///\r
1729typedef struct {\r
1730 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
1731 UINT32 RawDataOffset;\r
1732 UINT32 RawDataLength;\r
1733 UINT32 DataLength;\r
1734 UINT32 ErrorSeverity;\r
1735} EFI_ACPI_6_2_BOOT_ERROR_REGION_STRUCTURE;\r
1736\r
1737//\r
1738// Boot Error Severity types\r
1739//\r
1740#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00\r
1741#define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01\r
1742#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02\r
1743#define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03\r
1744\r
1745///\r
1746/// Generic Error Data Entry Definition\r
1747///\r
1748typedef struct {\r
1749 UINT8 SectionType[16];\r
1750 UINT32 ErrorSeverity;\r
1751 UINT16 Revision;\r
1752 UINT8 ValidationBits;\r
1753 UINT8 Flags;\r
1754 UINT32 ErrorDataLength;\r
1755 UINT8 FruId[16];\r
1756 UINT8 FruText[20];\r
1757 UINT8 Timestamp[8];\r
1758} EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1759\r
1760///\r
1761/// Generic Error Data Entry Version (as defined in ACPI 6.2 spec.)\r
1762///\r
1763#define EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1764\r
1765///\r
1766/// HEST - Hardware Error Source Table\r
1767///\r
1768typedef struct {\r
1769 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1770 UINT32 ErrorSourceCount;\r
1771} EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1772\r
1773///\r
1774/// HEST Version (as defined in ACPI 6.2 spec.)\r
1775///\r
1776#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1777\r
1778//\r
1779// Error Source structure types.\r
1780//\r
1781#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1782#define EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1783#define EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1784#define EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1785#define EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER 0x07\r
1786#define EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER 0x08\r
1787#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR 0x09\r
1788#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1789#define EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1790\r
1791//\r
1792// Error Source structure flags.\r
1793//\r
1794#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1795#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1796#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1797\r
1798///\r
1799/// IA-32 Architecture Machine Check Exception Structure Definition\r
1800///\r
1801typedef struct {\r
1802 UINT16 Type;\r
1803 UINT16 SourceId;\r
1804 UINT8 Reserved0[2];\r
1805 UINT8 Flags;\r
1806 UINT8 Enabled;\r
1807 UINT32 NumberOfRecordsToPreAllocate;\r
1808 UINT32 MaxSectionsPerRecord;\r
1809 UINT64 GlobalCapabilityInitData;\r
1810 UINT64 GlobalControlInitData;\r
1811 UINT8 NumberOfHardwareBanks;\r
1812 UINT8 Reserved1[7];\r
1813} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1814\r
1815///\r
1816/// IA-32 Architecture Machine Check Bank Structure Definition\r
1817///\r
1818typedef struct {\r
1819 UINT8 BankNumber;\r
1820 UINT8 ClearStatusOnInitialization;\r
1821 UINT8 StatusDataFormat;\r
1822 UINT8 Reserved0;\r
1823 UINT32 ControlRegisterMsrAddress;\r
1824 UINT64 ControlInitData;\r
1825 UINT32 StatusRegisterMsrAddress;\r
1826 UINT32 AddressRegisterMsrAddress;\r
1827 UINT32 MiscRegisterMsrAddress;\r
1828} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1829\r
1830///\r
1831/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1832///\r
1833#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1834#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1835#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1836\r
1837//\r
1838// Hardware Error Notification types. All other values are reserved\r
1839//\r
1840#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1841#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1842#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1843#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1844#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1845#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1846#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1847#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1848#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1849#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1850#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1851#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1852\r
1853///\r
1854/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1855///\r
1856typedef struct {\r
1857 UINT16 Type:1;\r
1858 UINT16 PollInterval:1;\r
1859 UINT16 SwitchToPollingThresholdValue:1;\r
1860 UINT16 SwitchToPollingThresholdWindow:1;\r
1861 UINT16 ErrorThresholdValue:1;\r
1862 UINT16 ErrorThresholdWindow:1;\r
1863 UINT16 Reserved:10;\r
1864} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1865\r
1866///\r
1867/// Hardware Error Notification Structure Definition\r
1868///\r
1869typedef struct {\r
1870 UINT8 Type;\r
1871 UINT8 Length;\r
1872 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1873 UINT32 PollInterval;\r
1874 UINT32 Vector;\r
1875 UINT32 SwitchToPollingThresholdValue;\r
1876 UINT32 SwitchToPollingThresholdWindow;\r
1877 UINT32 ErrorThresholdValue;\r
1878 UINT32 ErrorThresholdWindow;\r
1879} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1880\r
1881///\r
1882/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1883///\r
1884typedef struct {\r
1885 UINT16 Type;\r
1886 UINT16 SourceId;\r
1887 UINT8 Reserved0[2];\r
1888 UINT8 Flags;\r
1889 UINT8 Enabled;\r
1890 UINT32 NumberOfRecordsToPreAllocate;\r
1891 UINT32 MaxSectionsPerRecord;\r
1892 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1893 UINT8 NumberOfHardwareBanks;\r
1894 UINT8 Reserved1[3];\r
1895} EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1896\r
1897///\r
1898/// IA-32 Architecture NMI Error Structure Definition\r
1899///\r
1900typedef struct {\r
1901 UINT16 Type;\r
1902 UINT16 SourceId;\r
1903 UINT8 Reserved0[2];\r
1904 UINT32 NumberOfRecordsToPreAllocate;\r
1905 UINT32 MaxSectionsPerRecord;\r
1906 UINT32 MaxRawDataLength;\r
1907} EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1908\r
1909///\r
1910/// PCI Express Root Port AER Structure Definition\r
1911///\r
1912typedef struct {\r
1913 UINT16 Type;\r
1914 UINT16 SourceId;\r
1915 UINT8 Reserved0[2];\r
1916 UINT8 Flags;\r
1917 UINT8 Enabled;\r
1918 UINT32 NumberOfRecordsToPreAllocate;\r
1919 UINT32 MaxSectionsPerRecord;\r
1920 UINT32 Bus;\r
1921 UINT16 Device;\r
1922 UINT16 Function;\r
1923 UINT16 DeviceControl;\r
1924 UINT8 Reserved1[2];\r
1925 UINT32 UncorrectableErrorMask;\r
1926 UINT32 UncorrectableErrorSeverity;\r
1927 UINT32 CorrectableErrorMask;\r
1928 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1929 UINT32 RootErrorCommand;\r
1930} EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1931\r
1932///\r
1933/// PCI Express Device AER Structure Definition\r
1934///\r
1935typedef struct {\r
1936 UINT16 Type;\r
1937 UINT16 SourceId;\r
1938 UINT8 Reserved0[2];\r
1939 UINT8 Flags;\r
1940 UINT8 Enabled;\r
1941 UINT32 NumberOfRecordsToPreAllocate;\r
1942 UINT32 MaxSectionsPerRecord;\r
1943 UINT32 Bus;\r
1944 UINT16 Device;\r
1945 UINT16 Function;\r
1946 UINT16 DeviceControl;\r
1947 UINT8 Reserved1[2];\r
1948 UINT32 UncorrectableErrorMask;\r
1949 UINT32 UncorrectableErrorSeverity;\r
1950 UINT32 CorrectableErrorMask;\r
1951 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1952} EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1953\r
1954///\r
1955/// PCI Express Bridge AER Structure Definition\r
1956///\r
1957typedef struct {\r
1958 UINT16 Type;\r
1959 UINT16 SourceId;\r
1960 UINT8 Reserved0[2];\r
1961 UINT8 Flags;\r
1962 UINT8 Enabled;\r
1963 UINT32 NumberOfRecordsToPreAllocate;\r
1964 UINT32 MaxSectionsPerRecord;\r
1965 UINT32 Bus;\r
1966 UINT16 Device;\r
1967 UINT16 Function;\r
1968 UINT16 DeviceControl;\r
1969 UINT8 Reserved1[2];\r
1970 UINT32 UncorrectableErrorMask;\r
1971 UINT32 UncorrectableErrorSeverity;\r
1972 UINT32 CorrectableErrorMask;\r
1973 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1974 UINT32 SecondaryUncorrectableErrorMask;\r
1975 UINT32 SecondaryUncorrectableErrorSeverity;\r
1976 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1977} EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1978\r
1979///\r
1980/// Generic Hardware Error Source Structure Definition\r
1981///\r
1982typedef struct {\r
1983 UINT16 Type;\r
1984 UINT16 SourceId;\r
1985 UINT16 RelatedSourceId;\r
1986 UINT8 Flags;\r
1987 UINT8 Enabled;\r
1988 UINT32 NumberOfRecordsToPreAllocate;\r
1989 UINT32 MaxSectionsPerRecord;\r
1990 UINT32 MaxRawDataLength;\r
1991 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1992 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1993 UINT32 ErrorStatusBlockLength;\r
1994} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1995\r
1996///\r
1997/// Generic Hardware Error Source Version 2 Structure Definition\r
1998///\r
1999typedef struct {\r
2000 UINT16 Type;\r
2001 UINT16 SourceId;\r
2002 UINT16 RelatedSourceId;\r
2003 UINT8 Flags;\r
2004 UINT8 Enabled;\r
2005 UINT32 NumberOfRecordsToPreAllocate;\r
2006 UINT32 MaxSectionsPerRecord;\r
2007 UINT32 MaxRawDataLength;\r
2008 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2009 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2010 UINT32 ErrorStatusBlockLength;\r
2011 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2012 UINT64 ReadAckPreserve;\r
2013 UINT64 ReadAckWrite;\r
2014} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2015\r
2016///\r
2017/// Generic Error Status Definition\r
2018///\r
2019typedef struct {\r
2020 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
2021 UINT32 RawDataOffset;\r
2022 UINT32 RawDataLength;\r
2023 UINT32 DataLength;\r
2024 UINT32 ErrorSeverity;\r
2025} EFI_ACPI_6_2_GENERIC_ERROR_STATUS_STRUCTURE;\r
2026\r
2027///\r
2028/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2029///\r
2030typedef struct {\r
2031 UINT16 Type;\r
2032 UINT16 SourceId;\r
2033 UINT8 Reserved0[2];\r
2034 UINT8 Flags;\r
2035 UINT8 Enabled;\r
2036 UINT32 NumberOfRecordsToPreAllocate;\r
2037 UINT32 MaxSectionsPerRecord;\r
2038 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2039 UINT8 NumberOfHardwareBanks;\r
2040 UINT8 Reserved1[3];\r
2041} EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
2042\r
2043///\r
2044/// HMAT - Heterogeneous Memory Attribute Table\r
2045///\r
2046typedef struct {\r
2047 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2048 UINT8 Reserved[4];\r
2049} EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2050\r
2051///\r
2052/// HMAT Revision (as defined in ACPI 6.2 spec.)\r
2053///\r
2054#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x01\r
2055\r
2056///\r
2057/// HMAT types\r
2058///\r
2059#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SUBSYSTEM_ADDRESS_RANGE 0x00\r
2060#define EFI_ACPI_6_2_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2061#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2062\r
2063///\r
2064/// HMAT Structure Header\r
2065///\r
2066typedef struct {\r
2067 UINT16 Type;\r
2068 UINT8 Reserved[2];\r
2069 UINT32 Length;\r
2070} EFI_ACPI_6_2_HMAT_STRUCTURE_HEADER;\r
2071\r
2072///\r
2073/// Memory Subsystem Address Range Structure flags\r
2074///\r
2075typedef struct {\r
2076 UINT16 ProcessorProximityDomainValid:1;\r
2077 UINT16 MemoryProximityDomainValid:1;\r
2078 UINT16 ReservationHint:1;\r
2079 UINT16 Reserved:13;\r
2080} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS;\r
2081\r
2082///\r
2083/// Memory Subsystem Address Range Structure\r
2084///\r
2085typedef struct {\r
2086 UINT16 Type;\r
2087 UINT8 Reserved[2];\r
2088 UINT32 Length;\r
2089 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS Flags;\r
2090 UINT8 Reserved1[2];\r
2091 UINT32 ProcessorProximityDomain;\r
2092 UINT32 MemoryProximityDomain;\r
2093 UINT8 Reserved2[4];\r
2094 UINT64 SystemPhysicalAddressRangeBase;\r
2095 UINT64 SystemPhysicalAddressRangeLength;\r
2096} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE;\r
2097\r
2098///\r
2099/// System Locality Latency and Bandwidth Information Structure flags\r
2100///\r
2101typedef struct {\r
2102 UINT8 MemoryHierarchy:5;\r
2103 UINT8 Reserved:3;\r
2104} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2105\r
2106///\r
2107/// System Locality Latency and Bandwidth Information Structure\r
2108///\r
2109typedef struct {\r
2110 UINT16 Type;\r
2111 UINT8 Reserved[2];\r
2112 UINT32 Length;\r
2113 EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2114 UINT8 DataType;\r
2115 UINT8 Reserved1[2];\r
2116 UINT32 NumberOfInitiatorProximityDomains;\r
2117 UINT32 NumberOfTargetProximityDomains;\r
2118 UINT8 Reserved2[4];\r
2119 UINT64 EntryBaseUnit;\r
2120} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2121\r
2122///\r
2123/// Memory Side Cache Information Structure cache attributes\r
2124///\r
2125typedef struct {\r
2126 UINT32 TotalCacheLevels:4;\r
2127 UINT32 CacheLevel:4;\r
2128 UINT32 CacheAssociativity:4;\r
2129 UINT32 WritePolicy:4;\r
2130 UINT32 CacheLineSize:16;\r
2131} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2132\r
2133///\r
2134/// Memory Side Cache Information Structure\r
2135///\r
2136typedef struct {\r
2137 UINT16 Type;\r
2138 UINT8 Reserved[2];\r
2139 UINT32 Length;\r
2140 UINT32 MemoryProximityDomain;\r
2141 UINT8 Reserved1[4];\r
2142 UINT64 MemorySideCacheSize;\r
2143 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2144 UINT8 Reserved2[2];\r
2145 UINT16 NumberOfSmbiosHandles;\r
2146} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2147\r
2148///\r
2149/// ERST - Error Record Serialization Table\r
2150///\r
2151typedef struct {\r
2152 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2153 UINT32 SerializationHeaderSize;\r
2154 UINT8 Reserved0[4];\r
2155 UINT32 InstructionEntryCount;\r
2156} EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2157\r
2158///\r
2159/// ERST Version (as defined in ACPI 6.2 spec.)\r
2160///\r
2161#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2162\r
2163///\r
2164/// ERST Serialization Actions\r
2165///\r
2166#define EFI_ACPI_6_2_ERST_BEGIN_WRITE_OPERATION 0x00\r
2167#define EFI_ACPI_6_2_ERST_BEGIN_READ_OPERATION 0x01\r
2168#define EFI_ACPI_6_2_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2169#define EFI_ACPI_6_2_ERST_END_OPERATION 0x03\r
2170#define EFI_ACPI_6_2_ERST_SET_RECORD_OFFSET 0x04\r
2171#define EFI_ACPI_6_2_ERST_EXECUTE_OPERATION 0x05\r
2172#define EFI_ACPI_6_2_ERST_CHECK_BUSY_STATUS 0x06\r
2173#define EFI_ACPI_6_2_ERST_GET_COMMAND_STATUS 0x07\r
2174#define EFI_ACPI_6_2_ERST_GET_RECORD_IDENTIFIER 0x08\r
2175#define EFI_ACPI_6_2_ERST_SET_RECORD_IDENTIFIER 0x09\r
2176#define EFI_ACPI_6_2_ERST_GET_RECORD_COUNT 0x0A\r
2177#define EFI_ACPI_6_2_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2178#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2179#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2180#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2181#define EFI_ACPI_6_2_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2182\r
2183///\r
2184/// ERST Action Command Status\r
2185///\r
2186#define EFI_ACPI_6_2_ERST_STATUS_SUCCESS 0x00\r
2187#define EFI_ACPI_6_2_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2188#define EFI_ACPI_6_2_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2189#define EFI_ACPI_6_2_ERST_STATUS_FAILED 0x03\r
2190#define EFI_ACPI_6_2_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2191#define EFI_ACPI_6_2_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2192\r
2193///\r
2194/// ERST Serialization Instructions\r
2195///\r
2196#define EFI_ACPI_6_2_ERST_READ_REGISTER 0x00\r
2197#define EFI_ACPI_6_2_ERST_READ_REGISTER_VALUE 0x01\r
2198#define EFI_ACPI_6_2_ERST_WRITE_REGISTER 0x02\r
2199#define EFI_ACPI_6_2_ERST_WRITE_REGISTER_VALUE 0x03\r
2200#define EFI_ACPI_6_2_ERST_NOOP 0x04\r
2201#define EFI_ACPI_6_2_ERST_LOAD_VAR1 0x05\r
2202#define EFI_ACPI_6_2_ERST_LOAD_VAR2 0x06\r
2203#define EFI_ACPI_6_2_ERST_STORE_VAR1 0x07\r
2204#define EFI_ACPI_6_2_ERST_ADD 0x08\r
2205#define EFI_ACPI_6_2_ERST_SUBTRACT 0x09\r
2206#define EFI_ACPI_6_2_ERST_ADD_VALUE 0x0A\r
2207#define EFI_ACPI_6_2_ERST_SUBTRACT_VALUE 0x0B\r
2208#define EFI_ACPI_6_2_ERST_STALL 0x0C\r
2209#define EFI_ACPI_6_2_ERST_STALL_WHILE_TRUE 0x0D\r
2210#define EFI_ACPI_6_2_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2211#define EFI_ACPI_6_2_ERST_GOTO 0x0F\r
2212#define EFI_ACPI_6_2_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2213#define EFI_ACPI_6_2_ERST_SET_DST_ADDRESS_BASE 0x11\r
2214#define EFI_ACPI_6_2_ERST_MOVE_DATA 0x12\r
2215\r
2216///\r
2217/// ERST Instruction Flags\r
2218///\r
2219#define EFI_ACPI_6_2_ERST_PRESERVE_REGISTER 0x01\r
2220\r
2221///\r
2222/// ERST Serialization Instruction Entry\r
2223///\r
2224typedef struct {\r
2225 UINT8 SerializationAction;\r
2226 UINT8 Instruction;\r
2227 UINT8 Flags;\r
2228 UINT8 Reserved0;\r
2229 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2230 UINT64 Value;\r
2231 UINT64 Mask;\r
2232} EFI_ACPI_6_2_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2233\r
2234///\r
2235/// EINJ - Error Injection Table\r
2236///\r
2237typedef struct {\r
2238 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2239 UINT32 InjectionHeaderSize;\r
2240 UINT8 InjectionFlags;\r
2241 UINT8 Reserved0[3];\r
2242 UINT32 InjectionEntryCount;\r
2243} EFI_ACPI_6_2_ERROR_INJECTION_TABLE_HEADER;\r
2244\r
2245///\r
2246/// EINJ Version (as defined in ACPI 6.2 spec.)\r
2247///\r
2248#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_REVISION 0x01\r
2249\r
2250///\r
2251/// EINJ Error Injection Actions\r
2252///\r
2253#define EFI_ACPI_6_2_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2254#define EFI_ACPI_6_2_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2255#define EFI_ACPI_6_2_EINJ_SET_ERROR_TYPE 0x02\r
2256#define EFI_ACPI_6_2_EINJ_GET_ERROR_TYPE 0x03\r
2257#define EFI_ACPI_6_2_EINJ_END_OPERATION 0x04\r
2258#define EFI_ACPI_6_2_EINJ_EXECUTE_OPERATION 0x05\r
2259#define EFI_ACPI_6_2_EINJ_CHECK_BUSY_STATUS 0x06\r
2260#define EFI_ACPI_6_2_EINJ_GET_COMMAND_STATUS 0x07\r
2261#define EFI_ACPI_6_2_EINJ_TRIGGER_ERROR 0xFF\r
2262\r
2263///\r
2264/// EINJ Action Command Status\r
2265///\r
2266#define EFI_ACPI_6_2_EINJ_STATUS_SUCCESS 0x00\r
2267#define EFI_ACPI_6_2_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2268#define EFI_ACPI_6_2_EINJ_STATUS_INVALID_ACCESS 0x02\r
2269\r
2270///\r
2271/// EINJ Error Type Definition\r
2272///\r
2273#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2274#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2275#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2276#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2277#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2278#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2279#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2280#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2281#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2282#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2283#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2284#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2285\r
2286///\r
2287/// EINJ Injection Instructions\r
2288///\r
2289#define EFI_ACPI_6_2_EINJ_READ_REGISTER 0x00\r
2290#define EFI_ACPI_6_2_EINJ_READ_REGISTER_VALUE 0x01\r
2291#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER 0x02\r
2292#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER_VALUE 0x03\r
2293#define EFI_ACPI_6_2_EINJ_NOOP 0x04\r
2294\r
2295///\r
2296/// EINJ Instruction Flags\r
2297///\r
2298#define EFI_ACPI_6_2_EINJ_PRESERVE_REGISTER 0x01\r
2299\r
2300///\r
2301/// EINJ Injection Instruction Entry\r
2302///\r
2303typedef struct {\r
2304 UINT8 InjectionAction;\r
2305 UINT8 Instruction;\r
2306 UINT8 Flags;\r
2307 UINT8 Reserved0;\r
2308 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2309 UINT64 Value;\r
2310 UINT64 Mask;\r
2311} EFI_ACPI_6_2_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2312\r
2313///\r
2314/// EINJ Trigger Action Table\r
2315///\r
2316typedef struct {\r
2317 UINT32 HeaderSize;\r
2318 UINT32 Revision;\r
2319 UINT32 TableSize;\r
2320 UINT32 EntryCount;\r
2321} EFI_ACPI_6_2_EINJ_TRIGGER_ACTION_TABLE;\r
2322\r
2323///\r
2324/// Platform Communications Channel Table (PCCT)\r
2325///\r
2326typedef struct {\r
2327 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2328 UINT32 Flags;\r
2329 UINT64 Reserved;\r
2330} EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2331\r
2332///\r
2333/// PCCT Version (as defined in ACPI 6.2 spec.)\r
2334///\r
2335#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2336\r
2337///\r
2338/// PCCT Global Flags\r
2339///\r
2340#define EFI_ACPI_6_2_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2341\r
2342//\r
2343// PCCT Subspace type\r
2344//\r
2345#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2346#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2347#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2348#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2349#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2350\r
2351///\r
2352/// PCC Subspace Structure Header\r
2353///\r
2354typedef struct {\r
2355 UINT8 Type;\r
2356 UINT8 Length;\r
2357} EFI_ACPI_6_2_PCCT_SUBSPACE_HEADER;\r
2358\r
2359///\r
2360/// Generic Communications Subspace Structure\r
2361///\r
2362typedef struct {\r
2363 UINT8 Type;\r
2364 UINT8 Length;\r
2365 UINT8 Reserved[6];\r
2366 UINT64 BaseAddress;\r
2367 UINT64 AddressLength;\r
2368 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2369 UINT64 DoorbellPreserve;\r
2370 UINT64 DoorbellWrite;\r
2371 UINT32 NominalLatency;\r
2372 UINT32 MaximumPeriodicAccessRate;\r
2373 UINT16 MinimumRequestTurnaroundTime;\r
2374} EFI_ACPI_6_2_PCCT_SUBSPACE_GENERIC;\r
2375\r
2376///\r
2377/// Generic Communications Channel Shared Memory Region\r
2378///\r
2379\r
2380typedef struct {\r
2381 UINT8 Command;\r
2382 UINT8 Reserved:7;\r
2383 UINT8 NotifyOnCompletion:1;\r
2384} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2385\r
2386typedef struct {\r
2387 UINT8 CommandComplete:1;\r
2388 UINT8 PlatformInterrupt:1;\r
2389 UINT8 Error:1;\r
2390 UINT8 PlatformNotification:1;\r
2391 UINT8 Reserved:4;\r
2392 UINT8 Reserved1;\r
2393} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2394\r
2395typedef struct {\r
2396 UINT32 Signature;\r
2397 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2398 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2399} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2400\r
2401#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2402#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2403\r
2404///\r
2405/// Type 1 HW-Reduced Communications Subspace Structure\r
2406///\r
2407typedef struct {\r
2408 UINT8 Type;\r
2409 UINT8 Length;\r
2410 UINT32 PlatformInterrupt;\r
2411 UINT8 PlatformInterruptFlags;\r
2412 UINT8 Reserved;\r
2413 UINT64 BaseAddress;\r
2414 UINT64 AddressLength;\r
2415 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2416 UINT64 DoorbellPreserve;\r
2417 UINT64 DoorbellWrite;\r
2418 UINT32 NominalLatency;\r
2419 UINT32 MaximumPeriodicAccessRate;\r
2420 UINT16 MinimumRequestTurnaroundTime;\r
2421} EFI_ACPI_6_2_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2422\r
2423///\r
2424/// Type 2 HW-Reduced Communications Subspace Structure\r
2425///\r
2426typedef struct {\r
2427 UINT8 Type;\r
2428 UINT8 Length;\r
2429 UINT32 PlatformInterrupt;\r
2430 UINT8 PlatformInterruptFlags;\r
2431 UINT8 Reserved;\r
2432 UINT64 BaseAddress;\r
2433 UINT64 AddressLength;\r
2434 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2435 UINT64 DoorbellPreserve;\r
2436 UINT64 DoorbellWrite;\r
2437 UINT32 NominalLatency;\r
2438 UINT32 MaximumPeriodicAccessRate;\r
2439 UINT16 MinimumRequestTurnaroundTime;\r
2440 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2441 UINT64 PlatformInterruptAckPreserve;\r
2442 UINT64 PlatformInterruptAckWrite;\r
2443} EFI_ACPI_6_2_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2444\r
2445///\r
2446/// Type 3 Extended PCC Subspace Structure\r
2447///\r
2448typedef struct {\r
2449 UINT8 Type;\r
2450 UINT8 Length;\r
2451 UINT32 PlatformInterrupt;\r
2452 UINT8 PlatformInterruptFlags;\r
2453 UINT8 Reserved;\r
2454 UINT64 BaseAddress;\r
2455 UINT32 AddressLength;\r
2456 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2457 UINT64 DoorbellPreserve;\r
2458 UINT64 DoorbellWrite;\r
2459 UINT32 NominalLatency;\r
2460 UINT32 MaximumPeriodicAccessRate;\r
2461 UINT32 MinimumRequestTurnaroundTime;\r
2462 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2463 UINT64 PlatformInterruptAckPreserve;\r
2464 UINT64 PlatformInterruptAckSet;\r
2465 UINT8 Reserved1[8];\r
2466 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2467 UINT64 CommandCompleteCheckMask;\r
2468 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2469 UINT64 CommandCompleteUpdatePreserve;\r
2470 UINT64 CommandCompleteUpdateSet;\r
2471 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2472 UINT64 ErrorStatusMask;\r
2473} EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2474\r
2475///\r
2476/// Type 4 Extended PCC Subspace Structure\r
2477///\r
2478typedef EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_2_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2479\r
2480#define EFI_ACPI_6_2_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2481\r
2482typedef struct {\r
2483 UINT32 Signature;\r
2484 UINT32 Flags;\r
2485 UINT32 Length;\r
2486 UINT32 Command;\r
2487} EFI_ACPI_6_2_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2488\r
2489///\r
2490/// Platform Debug Trigger Table (PDTT)\r
2491///\r
2492typedef struct {\r
2493 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2494 UINT8 TriggerCount;\r
2495 UINT8 Reserved[3];\r
2496 UINT32 TriggerIdentifierArrayOffset;\r
2497} EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2498\r
2499///\r
2500/// PDTT Revision (as defined in ACPI 6.2 spec.)\r
2501///\r
2502#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2503\r
2504///\r
2505/// PDTT Platform Communication Channel Identifier Structure\r
2506///\r
2507typedef struct {\r
2508 UINT16 SubChannelIdentifer:8;\r
2509 UINT16 Runtime:1;\r
2510 UINT16 WaitForCompletion:1;\r
2511 UINT16 Reserved:6;\r
2512} EFI_ACPI_6_2_PDTT_PCC_IDENTIFIER;\r
2513\r
2514///\r
2515/// PCC Commands Codes used by Platform Debug Trigger Table\r
2516///\r
2517#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2518#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2519\r
2520///\r
2521/// PPTT Platform Communication Channel\r
2522///\r
2523typedef EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_2_PDTT_PCC;\r
2524\r
2525///\r
2526/// Processor Properties Topology Table (PPTT)\r
2527///\r
2528typedef struct {\r
2529 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2530} EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2531\r
2532///\r
2533/// PPTT Revision (as defined in ACPI 6.2 spec.)\r
2534///\r
2535#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01\r
2536\r
2537///\r
2538/// PPTT types\r
2539///\r
2540#define EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR 0x00\r
2541#define EFI_ACPI_6_2_PPTT_TYPE_CACHE 0x01\r
2542#define EFI_ACPI_6_2_PPTT_TYPE_ID 0x02\r
2543\r
2544///\r
2545/// PPTT Structure Header\r
2546///\r
2547typedef struct {\r
2548 UINT8 Type;\r
2549 UINT8 Length;\r
2550 UINT8 Reserved[2];\r
2551} EFI_ACPI_6_2_PPTT_STRUCTURE_HEADER;\r
2552\r
c4e75574
HG		 2553///\r
2554/// For PPTT struct processor flags\r
2555///\r
2556#define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_INVALID 0x0\r
2557#define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID 0x1\r
2558\r
e67b675d
SZ		 2559///\r
2560/// Processor hierarchy node structure flags\r
2561///\r
2562typedef struct {\r
2563 UINT32 PhysicalPackage:1;\r
2564 UINT32 AcpiProcessorIdValid:1;\r
2565 UINT32 Reserved:30;\r
2566} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2567\r
2568///\r
2569/// Processor hierarchy node structure\r
2570///\r
2571typedef struct {\r
19ef86ee 2572 UINT8 Type;\r
e67b675d
SZ		 2573 UINT8 Length;\r
2574 UINT8 Reserved[2];\r
2575 EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2576 UINT32 Parent;\r
2577 UINT32 AcpiProcessorId;\r
2578 UINT32 NumberOfPrivateResources;\r
2579} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;\r
2580\r
2581///\r
2582/// Cache Type Structure flags\r
2583///\r
2584typedef struct {\r
2585 UINT32 SizePropertyValid:1;\r
2586 UINT32 NumberOfSetsValid:1;\r
2587 UINT32 AssociativityValid:1;\r
2588 UINT32 AllocationTypeValid:1;\r
2589 UINT32 CacheTypeValid:1;\r
2590 UINT32 WritePolicyValid:1;\r
2591 UINT32 LineSizeValid:1;\r
2592 UINT32 Reserved:25;\r
2593} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS;\r
2594\r
c4e75574
HG		 2595///\r
2596/// For cache attributes\r
2597///\r
2598#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2599#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2600#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2601#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2602#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2603#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2604#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2605#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2606\r
e67b675d
SZ		 2607///\r
2608/// Cache Type Structure cache attributes\r
2609///\r
2610typedef struct {\r
2611 UINT8 AllocationType:2;\r
2612 UINT8 CacheType:2;\r
2613 UINT8 WritePolicy:1;\r
2614 UINT8 Reserved:3;\r
2615} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2616\r
2617///\r
2618/// Cache Type Structure\r
2619///\r
2620typedef struct {\r
2621 UINT8 Type;\r
2622 UINT8 Length;\r
2623 UINT8 Reserved[2];\r
2624 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2625 UINT32 NextLevelOfCache;\r
2626 UINT32 Size;\r
2627 UINT32 NumberOfSets;\r
2628 UINT8 Associativity;\r
2629 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2630 UINT16 LineSize;\r
2631} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE;\r
2632\r
2633///\r
2634/// ID structure\r
2635///\r
2636typedef struct {\r
2637 UINT8 Type;\r
2638 UINT8 Length;\r
2639 UINT8 Reserved[2];\r
2640 UINT32 VendorId;\r
2641 UINT64 Level1Id;\r
2642 UINT64 Level2Id;\r
2643 UINT16 MajorRev;\r
2644 UINT16 MinorRev;\r
2645 UINT16 SpinRev;\r
2646} EFI_ACPI_6_2_PPTT_STRUCTURE_ID;\r
2647\r
2648//\r
2649// Known table signatures\r
2650//\r
2651\r
2652///\r
2653/// "RSD PTR " Root System Description Pointer\r
2654///\r
2655#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2656\r
2657///\r
2658/// "APIC" Multiple APIC Description Table\r
2659///\r
2660#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2661\r
2662///\r
2663/// "BERT" Boot Error Record Table\r
2664///\r
2665#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2666\r
2667///\r
2668/// "BGRT" Boot Graphics Resource Table\r
2669///\r
2670#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2671\r
2672///\r
2673/// "CPEP" Corrected Platform Error Polling Table\r
2674///\r
2675#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2676\r
2677///\r
2678/// "DSDT" Differentiated System Description Table\r
2679///\r
2680#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2681\r
2682///\r
2683/// "ECDT" Embedded Controller Boot Resources Table\r
2684///\r
2685#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2686\r
2687///\r
2688/// "EINJ" Error Injection Table\r
2689///\r
2690#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2691\r
2692///\r
2693/// "ERST" Error Record Serialization Table\r
2694///\r
2695#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2696\r
2697///\r
2698/// "FACP" Fixed ACPI Description Table\r
2699///\r
2700#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2701\r
2702///\r
2703/// "FACS" Firmware ACPI Control Structure\r
2704///\r
2705#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2706\r
2707///\r
2708/// "FPDT" Firmware Performance Data Table\r
2709///\r
2710#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2711\r
2712///\r
2713/// "GTDT" Generic Timer Description Table\r
2714///\r
2715#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2716\r
2717///\r
2718/// "HEST" Hardware Error Source Table\r
2719///\r
2720#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2721\r
2722///\r
2723/// "HMAT" Heterogeneous Memory Attribute Table\r
2724///\r
2725#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2726\r
2727///\r
2728/// "MPST" Memory Power State Table\r
2729///\r
2730#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2731\r
2732///\r
2733/// "MSCT" Maximum System Characteristics Table\r
2734///\r
2735#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2736\r
2737///\r
2738/// "NFIT" NVDIMM Firmware Interface Table\r
2739///\r
2740#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2741\r
2742///\r
2743/// "PDTT" Platform Debug Trigger Table\r
2744///\r
2745#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2746\r
2747///\r
2748/// "PMTT" Platform Memory Topology Table\r
2749///\r
2750#define EFI_ACPI_6_2_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2751\r
2752///\r
2753/// "PPTT" Processor Properties Topology Table\r
2754///\r
2755#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2756\r
2757///\r
2758/// "PSDT" Persistent System Description Table\r
2759///\r
2760#define EFI_ACPI_6_2_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2761\r
2762///\r
2763/// "RASF" ACPI RAS Feature Table\r
2764///\r
2765#define EFI_ACPI_6_2_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2766\r
2767///\r
2768/// "RSDT" Root System Description Table\r
2769///\r
2770#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2771\r
2772///\r
2773/// "SBST" Smart Battery Specification Table\r
2774///\r
2775#define EFI_ACPI_6_2_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2776\r
2777///\r
2778/// "SDEV" Secure DEVices Table\r
2779///\r
2780#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2781\r
2782///\r
2783/// "SLIT" System Locality Information Table\r
2784///\r
2785#define EFI_ACPI_6_2_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2786\r
2787///\r
2788/// "SRAT" System Resource Affinity Table\r
2789///\r
2790#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2791\r
2792///\r
2793/// "SSDT" Secondary System Description Table\r
2794///\r
2795#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2796\r
2797///\r
2798/// "XSDT" Extended System Description Table\r
2799///\r
2800#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2801\r
2802///\r
2803/// "BOOT" MS Simple Boot Spec\r
2804///\r
2805#define EFI_ACPI_6_2_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2806\r
2807///\r
2808/// "CSRT" MS Core System Resource Table\r
2809///\r
2810#define EFI_ACPI_6_2_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2811\r
2812///\r
2813/// "DBG2" MS Debug Port 2 Spec\r
2814///\r
2815#define EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2816\r
2817///\r
2818/// "DBGP" MS Debug Port Spec\r
2819///\r
2820#define EFI_ACPI_6_2_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2821\r
2822///\r
2823/// "DMAR" DMA Remapping Table\r
2824///\r
2825#define EFI_ACPI_6_2_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2826\r
2827///\r
2828/// "DPPT" DMA Protection Policy Table\r
2829///\r
2830#define EFI_ACPI_6_2_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')\r
2831\r
2832///\r
2833/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2834///\r
2835#define EFI_ACPI_6_2_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2836\r
2837///\r
2838/// "ETDT" Event Timer Description Table\r
2839///\r
2840#define EFI_ACPI_6_2_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2841\r
2842///\r
2843/// "HPET" IA-PC High Precision Event Timer Table\r
2844///\r
2845#define EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2846\r
2847///\r
2848/// "iBFT" iSCSI Boot Firmware Table\r
2849///\r
2850#define EFI_ACPI_6_2_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2851\r
2852///\r
2853/// "IORT" I/O Remapping Table\r
2854///\r
2855#define EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2856\r
2857///\r
2858/// "IVRS" I/O Virtualization Reporting Structure\r
2859///\r
2860#define EFI_ACPI_6_2_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2861\r
2862///\r
2863/// "LPIT" Low Power Idle Table\r
2864///\r
2865#define EFI_ACPI_6_2_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2866\r
2867///\r
2868/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2869///\r
2870#define EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2871\r
2872///\r
2873/// "MCHI" Management Controller Host Interface Table\r
2874///\r
2875#define EFI_ACPI_6_2_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2876\r
2877///\r
2878/// "MSDM" MS Data Management Table\r
2879///\r
2880#define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2881\r
2882///\r
2883/// "SDEI" Software Delegated Exceptions Interface Table\r
2884///\r
2885#define EFI_ACPI_6_2_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
2886\r
2887///\r
2888/// "SLIC" MS Software Licensing Table Specification\r
2889///\r
2890#define EFI_ACPI_6_2_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2891\r
2892///\r
b219e2cd 2893/// "SPCR" Serial Port Console Redirection Table\r
e67b675d
SZ		 2894///\r
2895#define EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2896\r
2897///\r
2898/// "SPMI" Server Platform Management Interface Table\r
2899///\r
2900#define EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2901\r
2902///\r
2903/// "STAO" _STA Override Table\r
2904///\r
2905#define EFI_ACPI_6_2_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2906\r
2907///\r
2908/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2909///\r
2910#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2911\r
2912///\r
2913/// "TPM2" Trusted Computing Platform 1 Table\r
2914///\r
2915#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2916\r
2917///\r
2918/// "UEFI" UEFI ACPI Data Table\r
2919///\r
2920#define EFI_ACPI_6_2_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2921\r
2922///\r
2923/// "WAET" Windows ACPI Emulated Devices Table\r
2924///\r
2925#define EFI_ACPI_6_2_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2926\r
2927///\r
2928/// "WDAT" Watchdog Action Table\r
2929///\r
2930#define EFI_ACPI_6_2_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2931\r
2932///\r
2933/// "WDRT" Watchdog Resource Table\r
2934///\r
2935#define EFI_ACPI_6_2_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2936\r
2937///\r
2938/// "WPBT" MS Platform Binary Table\r
2939///\r
2940#define EFI_ACPI_6_2_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2941\r
2942///\r
2943/// "WSMT" Windows SMM Security Mitigation Table\r
2944///\r
2945#define EFI_ACPI_6_2_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
2946\r
2947///\r
2948/// "XENV" Xen Project Table\r
2949///\r
2950#define EFI_ACPI_6_2_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2951\r
2952#pragma pack()\r
2953\r
2954#endif\r
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