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MdePkg: Add 'Type 5' PCC structure
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5963ce5d
CJ		 1/** @file\r
2 ACPI 6.4 definitions from the ACPI Specification Revision 6.4 Jan, 2021.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>\r
6\r
7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
8**/\r
9\r
10#ifndef ACPI_6_4_H_\r
11#define ACPI_6_4_H_\r
12\r
13#include <IndustryStandard/Acpi63.h>\r
14\r
15//\r
16// Ensure proper structure formats\r
17//\r
18#pragma pack(1)\r
19\r
20///\r
21/// ACPI 6.4 Generic Address Space definition\r
22///\r
23typedef struct {\r
24 UINT8 AddressSpaceId;\r
25 UINT8 RegisterBitWidth;\r
26 UINT8 RegisterBitOffset;\r
27 UINT8 AccessSize;\r
28 UINT64 Address;\r
29} EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE;\r
30\r
31//\r
32// Generic Address Space Address IDs\r
33//\r
34#define EFI_ACPI_6_4_SYSTEM_MEMORY 0x00\r
35#define EFI_ACPI_6_4_SYSTEM_IO 0x01\r
36#define EFI_ACPI_6_4_PCI_CONFIGURATION_SPACE 0x02\r
37#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER 0x03\r
38#define EFI_ACPI_6_4_SMBUS 0x04\r
39#define EFI_ACPI_6_4_SYSTEM_CMOS 0x05\r
40#define EFI_ACPI_6_4_PCI_BAR_TARGET 0x06\r
41#define EFI_ACPI_6_4_IPMI 0x07\r
42#define EFI_ACPI_6_4_GENERAL_PURPOSE_IO 0x08\r
43#define EFI_ACPI_6_4_GENERIC_SERIAL_BUS 0x09\r
44#define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
45#define EFI_ACPI_6_4_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
46\r
47//\r
48// Generic Address Space Access Sizes\r
49//\r
50#define EFI_ACPI_6_4_UNDEFINED 0\r
51#define EFI_ACPI_6_4_BYTE 1\r
52#define EFI_ACPI_6_4_WORD 2\r
53#define EFI_ACPI_6_4_DWORD 3\r
54#define EFI_ACPI_6_4_QWORD 4\r
55\r
56//\r
57// ACPI 6.4 table structures\r
58//\r
59\r
60///\r
61/// Root System Description Pointer Structure\r
62///\r
63typedef struct {\r
64 UINT64 Signature;\r
65 UINT8 Checksum;\r
66 UINT8 OemId[6];\r
67 UINT8 Revision;\r
68 UINT32 RsdtAddress;\r
69 UINT32 Length;\r
70 UINT64 XsdtAddress;\r
71 UINT8 ExtendedChecksum;\r
72 UINT8 Reserved[3];\r
73} EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
74\r
75///\r
76/// RSD_PTR Revision (as defined in ACPI 6.4 spec.)\r
77///\r
78#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.4) says current value is 2\r
79\r
80///\r
81/// Common table header, this prefaces all ACPI tables, including FACS, but\r
82/// excluding the RSD PTR structure\r
83///\r
84typedef struct {\r
85 UINT32 Signature;\r
86 UINT32 Length;\r
87} EFI_ACPI_6_4_COMMON_HEADER;\r
88\r
89//\r
90// Root System Description Table\r
91// No definition needed as it is a common description table header, the same with\r
92// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
93//\r
94\r
95///\r
96/// RSDT Revision (as defined in ACPI 6.4 spec.)\r
97///\r
98#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
99\r
100//\r
101// Extended System Description Table\r
102// No definition needed as it is a common description table header, the same with\r
103// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
104//\r
105\r
106///\r
107/// XSDT Revision (as defined in ACPI 6.4 spec.)\r
108///\r
109#define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
110\r
111///\r
112/// Fixed ACPI Description Table Structure (FADT)\r
113///\r
114typedef struct {\r
115 EFI_ACPI_DESCRIPTION_HEADER Header;\r
116 UINT32 FirmwareCtrl;\r
117 UINT32 Dsdt;\r
118 UINT8 Reserved0;\r
119 UINT8 PreferredPmProfile;\r
120 UINT16 SciInt;\r
121 UINT32 SmiCmd;\r
122 UINT8 AcpiEnable;\r
123 UINT8 AcpiDisable;\r
124 UINT8 S4BiosReq;\r
125 UINT8 PstateCnt;\r
126 UINT32 Pm1aEvtBlk;\r
127 UINT32 Pm1bEvtBlk;\r
128 UINT32 Pm1aCntBlk;\r
129 UINT32 Pm1bCntBlk;\r
130 UINT32 Pm2CntBlk;\r
131 UINT32 PmTmrBlk;\r
132 UINT32 Gpe0Blk;\r
133 UINT32 Gpe1Blk;\r
134 UINT8 Pm1EvtLen;\r
135 UINT8 Pm1CntLen;\r
136 UINT8 Pm2CntLen;\r
137 UINT8 PmTmrLen;\r
138 UINT8 Gpe0BlkLen;\r
139 UINT8 Gpe1BlkLen;\r
140 UINT8 Gpe1Base;\r
141 UINT8 CstCnt;\r
142 UINT16 PLvl2Lat;\r
143 UINT16 PLvl3Lat;\r
144 UINT16 FlushSize;\r
145 UINT16 FlushStride;\r
146 UINT8 DutyOffset;\r
147 UINT8 DutyWidth;\r
148 UINT8 DayAlrm;\r
149 UINT8 MonAlrm;\r
150 UINT8 Century;\r
151 UINT16 IaPcBootArch;\r
152 UINT8 Reserved1;\r
153 UINT32 Flags;\r
154 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
155 UINT8 ResetValue;\r
156 UINT16 ArmBootArch;\r
157 UINT8 MinorVersion;\r
158 UINT64 XFirmwareCtrl;\r
159 UINT64 XDsdt;\r
160 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
161 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
162 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
163 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
164 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
165 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
166 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
167 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
168 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
169 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
170 UINT64 HypervisorVendorIdentity;\r
171} EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE;\r
172\r
173///\r
174/// FADT Version (as defined in ACPI 6.4 spec.)\r
175///\r
176#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
4d7137f2 177#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x04\r
5963ce5d
CJ		 178\r
179//\r
180// Fixed ACPI Description Table Preferred Power Management Profile\r
181//\r
182#define EFI_ACPI_6_4_PM_PROFILE_UNSPECIFIED 0\r
183#define EFI_ACPI_6_4_PM_PROFILE_DESKTOP 1\r
184#define EFI_ACPI_6_4_PM_PROFILE_MOBILE 2\r
185#define EFI_ACPI_6_4_PM_PROFILE_WORKSTATION 3\r
186#define EFI_ACPI_6_4_PM_PROFILE_ENTERPRISE_SERVER 4\r
187#define EFI_ACPI_6_4_PM_PROFILE_SOHO_SERVER 5\r
188#define EFI_ACPI_6_4_PM_PROFILE_APPLIANCE_PC 6\r
189#define EFI_ACPI_6_4_PM_PROFILE_PERFORMANCE_SERVER 7\r
190#define EFI_ACPI_6_4_PM_PROFILE_TABLET 8\r
191\r
192//\r
193// Fixed ACPI Description Table Boot Architecture Flags\r
194// All other bits are reserved and must be set to 0.\r
195//\r
196#define EFI_ACPI_6_4_LEGACY_DEVICES BIT0\r
197#define EFI_ACPI_6_4_8042 BIT1\r
198#define EFI_ACPI_6_4_VGA_NOT_PRESENT BIT2\r
199#define EFI_ACPI_6_4_MSI_NOT_SUPPORTED BIT3\r
200#define EFI_ACPI_6_4_PCIE_ASPM_CONTROLS BIT4\r
201#define EFI_ACPI_6_4_CMOS_RTC_NOT_PRESENT BIT5\r
202\r
203//\r
204// Fixed ACPI Description Table Arm Boot Architecture Flags\r
205// All other bits are reserved and must be set to 0.\r
206//\r
207#define EFI_ACPI_6_4_ARM_PSCI_COMPLIANT BIT0\r
208#define EFI_ACPI_6_4_ARM_PSCI_USE_HVC BIT1\r
209\r
210//\r
211// Fixed ACPI Description Table Fixed Feature Flags\r
212// All other bits are reserved and must be set to 0.\r
213//\r
214#define EFI_ACPI_6_4_WBINVD BIT0\r
215#define EFI_ACPI_6_4_WBINVD_FLUSH BIT1\r
216#define EFI_ACPI_6_4_PROC_C1 BIT2\r
217#define EFI_ACPI_6_4_P_LVL2_UP BIT3\r
218#define EFI_ACPI_6_4_PWR_BUTTON BIT4\r
219#define EFI_ACPI_6_4_SLP_BUTTON BIT5\r
220#define EFI_ACPI_6_4_FIX_RTC BIT6\r
221#define EFI_ACPI_6_4_RTC_S4 BIT7\r
222#define EFI_ACPI_6_4_TMR_VAL_EXT BIT8\r
223#define EFI_ACPI_6_4_DCK_CAP BIT9\r
224#define EFI_ACPI_6_4_RESET_REG_SUP BIT10\r
225#define EFI_ACPI_6_4_SEALED_CASE BIT11\r
226#define EFI_ACPI_6_4_HEADLESS BIT12\r
227#define EFI_ACPI_6_4_CPU_SW_SLP BIT13\r
228#define EFI_ACPI_6_4_PCI_EXP_WAK BIT14\r
229#define EFI_ACPI_6_4_USE_PLATFORM_CLOCK BIT15\r
230#define EFI_ACPI_6_4_S4_RTC_STS_VALID BIT16\r
231#define EFI_ACPI_6_4_REMOTE_POWER_ON_CAPABLE BIT17\r
232#define EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL BIT18\r
233#define EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
234#define EFI_ACPI_6_4_HW_REDUCED_ACPI BIT20\r
235#define EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
236\r
237///\r
238/// Firmware ACPI Control Structure\r
239///\r
240typedef struct {\r
241 UINT32 Signature;\r
242 UINT32 Length;\r
243 UINT32 HardwareSignature;\r
244 UINT32 FirmwareWakingVector;\r
245 UINT32 GlobalLock;\r
246 UINT32 Flags;\r
247 UINT64 XFirmwareWakingVector;\r
248 UINT8 Version;\r
249 UINT8 Reserved0[3];\r
250 UINT32 OspmFlags;\r
251 UINT8 Reserved1[24];\r
252} EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
253\r
254///\r
255/// FACS Version (as defined in ACPI 6.4 spec.)\r
256///\r
257#define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
258\r
259///\r
260/// Firmware Control Structure Feature Flags\r
261/// All other bits are reserved and must be set to 0.\r
262///\r
263#define EFI_ACPI_6_4_S4BIOS_F BIT0\r
264#define EFI_ACPI_6_4_64BIT_WAKE_SUPPORTED_F BIT1\r
265\r
266///\r
267/// OSPM Enabled Firmware Control Structure Flags\r
268/// All other bits are reserved and must be set to 0.\r
269///\r
270#define EFI_ACPI_6_4_OSPM_64BIT_WAKE_F BIT0\r
271\r
272//\r
273// Differentiated System Description Table,\r
274// Secondary System Description Table\r
275// and Persistent System Description Table,\r
276// no definition needed as they are common description table header, the same with\r
277// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
278//\r
279#define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
280#define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
281\r
282///\r
283/// Multiple APIC Description Table header definition. The rest of the table\r
284/// must be defined in a platform specific manner.\r
285///\r
286typedef struct {\r
287 EFI_ACPI_DESCRIPTION_HEADER Header;\r
288 UINT32 LocalApicAddress;\r
289 UINT32 Flags;\r
290} EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
291\r
292///\r
293/// MADT Revision (as defined in ACPI 6.4 spec.)\r
294///\r
295#define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05\r
296\r
297///\r
298/// Multiple APIC Flags\r
299/// All other bits are reserved and must be set to 0.\r
300///\r
301#define EFI_ACPI_6_4_PCAT_COMPAT BIT0\r
302\r
303//\r
304// Multiple APIC Description Table APIC structure types\r
305// All other values between 0x0D and 0x7F are reserved and\r
306// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
307//\r
308#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC 0x00\r
309#define EFI_ACPI_6_4_IO_APIC 0x01\r
310#define EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE 0x02\r
311#define EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
312#define EFI_ACPI_6_4_LOCAL_APIC_NMI 0x04\r
313#define EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
314#define EFI_ACPI_6_4_IO_SAPIC 0x06\r
315#define EFI_ACPI_6_4_LOCAL_SAPIC 0x07\r
316#define EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES 0x08\r
317#define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC 0x09\r
318#define EFI_ACPI_6_4_LOCAL_X2APIC_NMI 0x0A\r
319#define EFI_ACPI_6_4_GIC 0x0B\r
320#define EFI_ACPI_6_4_GICD 0x0C\r
321#define EFI_ACPI_6_4_GIC_MSI_FRAME 0x0D\r
322#define EFI_ACPI_6_4_GICR 0x0E\r
323#define EFI_ACPI_6_4_GIC_ITS 0x0F\r
324\r
325//\r
326// APIC Structure Definitions\r
327//\r
328\r
329///\r
330/// Processor Local APIC Structure Definition\r
331///\r
332typedef struct {\r
333 UINT8 Type;\r
334 UINT8 Length;\r
335 UINT8 AcpiProcessorUid;\r
336 UINT8 ApicId;\r
337 UINT32 Flags;\r
338} EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
339\r
340///\r
341/// Local APIC Flags. All other bits are reserved and must be 0.\r
342///\r
343#define EFI_ACPI_6_4_LOCAL_APIC_ENABLED BIT0\r
344#define EFI_ACPI_6_4_LOCAL_APIC_ONLINE_CAPABLE BIT1\r
345\r
346///\r
347/// IO APIC Structure\r
348///\r
349typedef struct {\r
350 UINT8 Type;\r
351 UINT8 Length;\r
352 UINT8 IoApicId;\r
353 UINT8 Reserved;\r
354 UINT32 IoApicAddress;\r
355 UINT32 GlobalSystemInterruptBase;\r
356} EFI_ACPI_6_4_IO_APIC_STRUCTURE;\r
357\r
358///\r
359/// Interrupt Source Override Structure\r
360///\r
361typedef struct {\r
362 UINT8 Type;\r
363 UINT8 Length;\r
364 UINT8 Bus;\r
365 UINT8 Source;\r
366 UINT32 GlobalSystemInterrupt;\r
367 UINT16 Flags;\r
368} EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
369\r
370///\r
371/// Platform Interrupt Sources Structure Definition\r
372///\r
373typedef struct {\r
374 UINT8 Type;\r
375 UINT8 Length;\r
376 UINT16 Flags;\r
377 UINT8 InterruptType;\r
378 UINT8 ProcessorId;\r
379 UINT8 ProcessorEid;\r
380 UINT8 IoSapicVector;\r
381 UINT32 GlobalSystemInterrupt;\r
382 UINT32 PlatformInterruptSourceFlags;\r
383 UINT8 CpeiProcessorOverride;\r
384 UINT8 Reserved[31];\r
385} EFI_ACPI_6_4_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
386\r
387//\r
388// MPS INTI flags.\r
389// All other bits are reserved and must be set to 0.\r
390//\r
391#define EFI_ACPI_6_4_POLARITY (3 << 0)\r
392#define EFI_ACPI_6_4_TRIGGER_MODE (3 << 2)\r
393\r
394///\r
395/// Non-Maskable Interrupt Source Structure\r
396///\r
397typedef struct {\r
398 UINT8 Type;\r
399 UINT8 Length;\r
400 UINT16 Flags;\r
401 UINT32 GlobalSystemInterrupt;\r
402} EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
403\r
404///\r
405/// Local APIC NMI Structure\r
406///\r
407typedef struct {\r
408 UINT8 Type;\r
409 UINT8 Length;\r
410 UINT8 AcpiProcessorUid;\r
411 UINT16 Flags;\r
412 UINT8 LocalApicLint;\r
413} EFI_ACPI_6_4_LOCAL_APIC_NMI_STRUCTURE;\r
414\r
415///\r
416/// Local APIC Address Override Structure\r
417///\r
418typedef struct {\r
419 UINT8 Type;\r
420 UINT8 Length;\r
421 UINT16 Reserved;\r
422 UINT64 LocalApicAddress;\r
423} EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
424\r
425///\r
426/// IO SAPIC Structure\r
427///\r
428typedef struct {\r
429 UINT8 Type;\r
430 UINT8 Length;\r
431 UINT8 IoApicId;\r
432 UINT8 Reserved;\r
433 UINT32 GlobalSystemInterruptBase;\r
434 UINT64 IoSapicAddress;\r
435} EFI_ACPI_6_4_IO_SAPIC_STRUCTURE;\r
436\r
437///\r
438/// Local SAPIC Structure\r
439/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
440///\r
441typedef struct {\r
442 UINT8 Type;\r
443 UINT8 Length;\r
444 UINT8 AcpiProcessorId;\r
445 UINT8 LocalSapicId;\r
446 UINT8 LocalSapicEid;\r
447 UINT8 Reserved[3];\r
448 UINT32 Flags;\r
449 UINT32 ACPIProcessorUIDValue;\r
450} EFI_ACPI_6_4_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
451\r
452///\r
453/// Platform Interrupt Sources Structure\r
454///\r
455typedef struct {\r
456 UINT8 Type;\r
457 UINT8 Length;\r
458 UINT16 Flags;\r
459 UINT8 InterruptType;\r
460 UINT8 ProcessorId;\r
461 UINT8 ProcessorEid;\r
462 UINT8 IoSapicVector;\r
463 UINT32 GlobalSystemInterrupt;\r
464 UINT32 PlatformInterruptSourceFlags;\r
465} EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
466\r
467///\r
468/// Platform Interrupt Source Flags.\r
469/// All other bits are reserved and must be set to 0.\r
470///\r
471#define EFI_ACPI_6_4_CPEI_PROCESSOR_OVERRIDE BIT0\r
472\r
473///\r
474/// Processor Local x2APIC Structure Definition\r
475///\r
476typedef struct {\r
477 UINT8 Type;\r
478 UINT8 Length;\r
479 UINT8 Reserved[2];\r
480 UINT32 X2ApicId;\r
481 UINT32 Flags;\r
482 UINT32 AcpiProcessorUid;\r
483} EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
484\r
485///\r
486/// Local x2APIC NMI Structure\r
487///\r
488typedef struct {\r
489 UINT8 Type;\r
490 UINT8 Length;\r
491 UINT16 Flags;\r
492 UINT32 AcpiProcessorUid;\r
493 UINT8 LocalX2ApicLint;\r
494 UINT8 Reserved[3];\r
495} EFI_ACPI_6_4_LOCAL_X2APIC_NMI_STRUCTURE;\r
496\r
497///\r
498/// GIC Structure\r
499///\r
500typedef struct {\r
501 UINT8 Type;\r
502 UINT8 Length;\r
503 UINT16 Reserved;\r
504 UINT32 CPUInterfaceNumber;\r
505 UINT32 AcpiProcessorUid;\r
506 UINT32 Flags;\r
507 UINT32 ParkingProtocolVersion;\r
508 UINT32 PerformanceInterruptGsiv;\r
509 UINT64 ParkedAddress;\r
510 UINT64 PhysicalBaseAddress;\r
511 UINT64 GICV;\r
512 UINT64 GICH;\r
513 UINT32 VGICMaintenanceInterrupt;\r
514 UINT64 GICRBaseAddress;\r
515 UINT64 MPIDR;\r
516 UINT8 ProcessorPowerEfficiencyClass;\r
517 UINT8 Reserved2;\r
518 UINT16 SpeOverflowInterrupt;\r
519} EFI_ACPI_6_4_GIC_STRUCTURE;\r
520\r
521///\r
522/// GIC Flags. All other bits are reserved and must be 0.\r
523///\r
524#define EFI_ACPI_6_4_GIC_ENABLED BIT0\r
525#define EFI_ACPI_6_4_PERFORMANCE_INTERRUPT_MODEL BIT1\r
526#define EFI_ACPI_6_4_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
527\r
528///\r
529/// GIC Distributor Structure\r
530///\r
531typedef struct {\r
532 UINT8 Type;\r
533 UINT8 Length;\r
534 UINT16 Reserved1;\r
535 UINT32 GicId;\r
536 UINT64 PhysicalBaseAddress;\r
537 UINT32 SystemVectorBase;\r
538 UINT8 GicVersion;\r
539 UINT8 Reserved2[3];\r
540} EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE;\r
541\r
542///\r
543/// GIC Version\r
544///\r
545#define EFI_ACPI_6_4_GIC_V1 0x01\r
546#define EFI_ACPI_6_4_GIC_V2 0x02\r
547#define EFI_ACPI_6_4_GIC_V3 0x03\r
548#define EFI_ACPI_6_4_GIC_V4 0x04\r
549\r
550///\r
551/// GIC MSI Frame Structure\r
552///\r
553typedef struct {\r
554 UINT8 Type;\r
555 UINT8 Length;\r
556 UINT16 Reserved1;\r
557 UINT32 GicMsiFrameId;\r
558 UINT64 PhysicalBaseAddress;\r
559 UINT32 Flags;\r
560 UINT16 SPICount;\r
561 UINT16 SPIBase;\r
562} EFI_ACPI_6_4_GIC_MSI_FRAME_STRUCTURE;\r
563\r
564///\r
565/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
566///\r
567#define EFI_ACPI_6_4_SPI_COUNT_BASE_SELECT BIT0\r
568\r
569///\r
570/// GICR Structure\r
571///\r
572typedef struct {\r
573 UINT8 Type;\r
574 UINT8 Length;\r
575 UINT16 Reserved;\r
576 UINT64 DiscoveryRangeBaseAddress;\r
577 UINT32 DiscoveryRangeLength;\r
578} EFI_ACPI_6_4_GICR_STRUCTURE;\r
579\r
580///\r
581/// GIC Interrupt Translation Service Structure\r
582///\r
583typedef struct {\r
584 UINT8 Type;\r
585 UINT8 Length;\r
586 UINT16 Reserved;\r
587 UINT32 GicItsId;\r
588 UINT64 PhysicalBaseAddress;\r
589 UINT32 Reserved2;\r
590} EFI_ACPI_6_4_GIC_ITS_STRUCTURE;\r
591\r
592///\r
593/// Smart Battery Description Table (SBST)\r
594///\r
595typedef struct {\r
596 EFI_ACPI_DESCRIPTION_HEADER Header;\r
597 UINT32 WarningEnergyLevel;\r
598 UINT32 LowEnergyLevel;\r
599 UINT32 CriticalEnergyLevel;\r
600} EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE;\r
601\r
602///\r
603/// SBST Version (as defined in ACPI 6.4 spec.)\r
604///\r
605#define EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
606\r
607///\r
608/// Embedded Controller Boot Resources Table (ECDT)\r
609/// The table is followed by a null terminated ASCII string that contains\r
610/// a fully qualified reference to the name space object.\r
611///\r
612typedef struct {\r
613 EFI_ACPI_DESCRIPTION_HEADER Header;\r
614 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcControl;\r
615 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcData;\r
616 UINT32 Uid;\r
617 UINT8 GpeBit;\r
618} EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
619\r
620///\r
621/// ECDT Version (as defined in ACPI 6.4 spec.)\r
622///\r
623#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
624\r
625///\r
626/// System Resource Affinity Table (SRAT). The rest of the table\r
627/// must be defined in a platform specific manner.\r
628///\r
629typedef struct {\r
630 EFI_ACPI_DESCRIPTION_HEADER Header;\r
631 UINT32 Reserved1; ///< Must be set to 1\r
632 UINT64 Reserved2;\r
633} EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
634\r
635///\r
636/// SRAT Version (as defined in ACPI 6.4 spec.)\r
637///\r
638#define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
639\r
640//\r
641// SRAT structure types.\r
642// All other values between 0x06 an 0xFF are reserved and\r
643// will be ignored by OSPM.\r
644//\r
645#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
646#define EFI_ACPI_6_4_MEMORY_AFFINITY 0x01\r
647#define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
648#define EFI_ACPI_6_4_GICC_AFFINITY 0x03\r
649#define EFI_ACPI_6_4_GIC_ITS_AFFINITY 0x04\r
650#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY 0x05\r
651\r
652///\r
653/// Processor Local APIC/SAPIC Affinity Structure Definition\r
654///\r
655typedef struct {\r
656 UINT8 Type;\r
657 UINT8 Length;\r
658 UINT8 ProximityDomain7To0;\r
659 UINT8 ApicId;\r
660 UINT32 Flags;\r
661 UINT8 LocalSapicEid;\r
662 UINT8 ProximityDomain31To8[3];\r
663 UINT32 ClockDomain;\r
664} EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
665\r
666///\r
667/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
668///\r
669#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
670\r
671///\r
672/// Memory Affinity Structure Definition\r
673///\r
674typedef struct {\r
675 UINT8 Type;\r
676 UINT8 Length;\r
677 UINT32 ProximityDomain;\r
678 UINT16 Reserved1;\r
679 UINT32 AddressBaseLow;\r
680 UINT32 AddressBaseHigh;\r
681 UINT32 LengthLow;\r
682 UINT32 LengthHigh;\r
683 UINT32 Reserved2;\r
684 UINT32 Flags;\r
685 UINT64 Reserved3;\r
686} EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE;\r
687\r
688//\r
689// Memory Flags. All other bits are reserved and must be 0.\r
690//\r
691#define EFI_ACPI_6_4_MEMORY_ENABLED (1 << 0)\r
692#define EFI_ACPI_6_4_MEMORY_HOT_PLUGGABLE (1 << 1)\r
693#define EFI_ACPI_6_4_MEMORY_NONVOLATILE (1 << 2)\r
694\r
695///\r
696/// Processor Local x2APIC Affinity Structure Definition\r
697///\r
698typedef struct {\r
699 UINT8 Type;\r
700 UINT8 Length;\r
701 UINT8 Reserved1[2];\r
702 UINT32 ProximityDomain;\r
703 UINT32 X2ApicId;\r
704 UINT32 Flags;\r
705 UINT32 ClockDomain;\r
706 UINT8 Reserved2[4];\r
707} EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
708\r
709///\r
710/// GICC Affinity Structure Definition\r
711///\r
712typedef struct {\r
713 UINT8 Type;\r
714 UINT8 Length;\r
715 UINT32 ProximityDomain;\r
716 UINT32 AcpiProcessorUid;\r
717 UINT32 Flags;\r
718 UINT32 ClockDomain;\r
719} EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE;\r
720\r
721///\r
722/// GICC Flags. All other bits are reserved and must be 0.\r
723///\r
724#define EFI_ACPI_6_4_GICC_ENABLED (1 << 0)\r
725\r
726///\r
727/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
728///\r
729typedef struct {\r
730 UINT8 Type;\r
731 UINT8 Length;\r
732 UINT32 ProximityDomain;\r
733 UINT8 Reserved[2];\r
734 UINT32 ItsId;\r
735} EFI_ACPI_6_4_GIC_ITS_AFFINITY_STRUCTURE;\r
736\r
737//\r
738// Generic Initiator Affinity Structure Device Handle Types\r
739// All other values between 0x02 an 0xFF are reserved and\r
740// will be ignored by OSPM.\r
741//\r
742#define EFI_ACPI_6_4_ACPI_DEVICE_HANDLE 0x00\r
743#define EFI_ACPI_6_4_PCI_DEVICE_HANDLE 0x01\r
744\r
745///\r
746/// Device Handle - ACPI\r
747///\r
748typedef struct {\r
749 UINT64 AcpiHid;\r
750 UINT32 AcpiUid;\r
751 UINT8 Reserved[4];\r
752} EFI_ACPI_6_4_DEVICE_HANDLE_ACPI;\r
753\r
754///\r
755/// Device Handle - PCI\r
756///\r
757typedef struct {\r
758 UINT16 PciSegment;\r
759 UINT16 PciBdfNumber;\r
760 UINT8 Reserved[12];\r
761} EFI_ACPI_6_4_DEVICE_HANDLE_PCI;\r
762\r
763///\r
764/// Generic Initiator Affinity Structure\r
765///\r
766typedef struct {\r
767 UINT8 Type;\r
768 UINT8 Length;\r
769 UINT8 Reserved1;\r
770 UINT8 DeviceHandleType;\r
771 UINT32 ProximityDomain;\r
772\r
773 union {\r
774 EFI_ACPI_6_4_DEVICE_HANDLE_ACPI Acpi;\r
775 EFI_ACPI_6_4_DEVICE_HANDLE_PCI Pci;\r
776 } DeviceHandle;\r
777\r
778 UINT32 Flags;\r
779 UINT8 Reserved2[4];\r
780} EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE;\r
781\r
782///\r
783/// Generic Initiator Affinity Structure Flags. All other bits are reserved\r
784/// and must be 0.\r
785///\r
357383bc
CJ		 786#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0\r
787#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1\r
5963ce5d
CJ		 788\r
789///\r
790/// System Locality Distance Information Table (SLIT).\r
791/// The rest of the table is a matrix.\r
792///\r
793typedef struct {\r
794 EFI_ACPI_DESCRIPTION_HEADER Header;\r
795 UINT64 NumberOfSystemLocalities;\r
796} EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
797\r
798///\r
799/// SLIT Version (as defined in ACPI 6.4 spec.)\r
800///\r
801#define EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
802\r
803///\r
804/// Corrected Platform Error Polling Table (CPEP)\r
805///\r
806typedef struct {\r
807 EFI_ACPI_DESCRIPTION_HEADER Header;\r
808 UINT8 Reserved[8];\r
809} EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
810\r
811///\r
812/// CPEP Version (as defined in ACPI 6.4 spec.)\r
813///\r
814#define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
815\r
816//\r
817// CPEP processor structure types.\r
818//\r
819#define EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
820\r
821///\r
822/// Corrected Platform Error Polling Processor Structure Definition\r
823///\r
824typedef struct {\r
825 UINT8 Type;\r
826 UINT8 Length;\r
827 UINT8 ProcessorId;\r
828 UINT8 ProcessorEid;\r
829 UINT32 PollingInterval;\r
830} EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
831\r
832///\r
833/// Maximum System Characteristics Table (MSCT)\r
834///\r
835typedef struct {\r
836 EFI_ACPI_DESCRIPTION_HEADER Header;\r
837 UINT32 OffsetProxDomInfo;\r
838 UINT32 MaximumNumberOfProximityDomains;\r
839 UINT32 MaximumNumberOfClockDomains;\r
840 UINT64 MaximumPhysicalAddress;\r
841} EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
842\r
843///\r
844/// MSCT Version (as defined in ACPI 6.4 spec.)\r
845///\r
846#define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
847\r
848///\r
849/// Maximum Proximity Domain Information Structure Definition\r
850///\r
851typedef struct {\r
852 UINT8 Revision;\r
853 UINT8 Length;\r
854 UINT32 ProximityDomainRangeLow;\r
855 UINT32 ProximityDomainRangeHigh;\r
856 UINT32 MaximumProcessorCapacity;\r
857 UINT64 MaximumMemoryCapacity;\r
858} EFI_ACPI_6_4_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
859\r
860///\r
861/// ACPI RAS Feature Table definition.\r
862///\r
863typedef struct {\r
864 EFI_ACPI_DESCRIPTION_HEADER Header;\r
865 UINT8 PlatformCommunicationChannelIdentifier[12];\r
866} EFI_ACPI_6_4_RAS_FEATURE_TABLE;\r
867\r
868///\r
869/// RASF Version (as defined in ACPI 6.4 spec.)\r
870///\r
871#define EFI_ACPI_6_4_RAS_FEATURE_TABLE_REVISION 0x01\r
872\r
873///\r
874/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
875///\r
876typedef struct {\r
877 UINT32 Signature;\r
878 UINT16 Command;\r
879 UINT16 Status;\r
880 UINT16 Version;\r
881 UINT8 RASCapabilities[16];\r
882 UINT8 SetRASCapabilities[16];\r
883 UINT16 NumberOfRASFParameterBlocks;\r
884 UINT32 SetRASCapabilitiesStatus;\r
885} EFI_ACPI_6_4_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
886\r
887///\r
888/// ACPI RASF PCC command code\r
889///\r
890#define EFI_ACPI_6_4_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
891\r
892///\r
893/// ACPI RASF Platform RAS Capabilities\r
894///\r
895#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
896#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
897#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
898#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
899#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
900\r
901///\r
902/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
903///\r
904typedef struct {\r
905 UINT16 Type;\r
906 UINT16 Version;\r
907 UINT16 Length;\r
908 UINT16 PatrolScrubCommand;\r
909 UINT64 RequestedAddressRange[2];\r
910 UINT64 ActualAddressRange[2];\r
911 UINT16 Flags;\r
912 UINT8 RequestedSpeed;\r
913} EFI_ACPI_6_4_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
914\r
915///\r
916/// ACPI RASF Patrol Scrub command\r
917///\r
918#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
919#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
920#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
921\r
922///\r
923/// Memory Power State Table definition.\r
924///\r
925typedef struct {\r
926 EFI_ACPI_DESCRIPTION_HEADER Header;\r
927 UINT8 PlatformCommunicationChannelIdentifier;\r
928 UINT8 Reserved[3];\r
929// Memory Power Node Structure\r
930// Memory Power State Characteristics\r
931} EFI_ACPI_6_4_MEMORY_POWER_STATUS_TABLE;\r
932\r
933///\r
934/// MPST Version (as defined in ACPI 6.4 spec.)\r
935///\r
936#define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
937\r
938///\r
939/// MPST Platform Communication Channel Shared Memory Region definition.\r
940///\r
941typedef struct {\r
942 UINT32 Signature;\r
943 UINT16 Command;\r
944 UINT16 Status;\r
945 UINT32 MemoryPowerCommandRegister;\r
946 UINT32 MemoryPowerStatusRegister;\r
947 UINT32 PowerStateId;\r
948 UINT32 MemoryPowerNodeId;\r
949 UINT64 MemoryEnergyConsumed;\r
950 UINT64 ExpectedAveragePowerComsuned;\r
951} EFI_ACPI_6_4_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
952\r
953///\r
954/// ACPI MPST PCC command code\r
955///\r
956#define EFI_ACPI_6_4_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
957\r
958///\r
959/// ACPI MPST Memory Power command\r
960///\r
961#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
962#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
963#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
964#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
965\r
966///\r
967/// MPST Memory Power Node Table\r
968///\r
969typedef struct {\r
970 UINT8 PowerStateValue;\r
971 UINT8 PowerStateInformationIndex;\r
972} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE;\r
973\r
974typedef struct {\r
975 UINT8 Flag;\r
976 UINT8 Reserved;\r
977 UINT16 MemoryPowerNodeId;\r
978 UINT32 Length;\r
979 UINT64 AddressBase;\r
980 UINT64 AddressLength;\r
981 UINT32 NumberOfPowerStates;\r
982 UINT32 NumberOfPhysicalComponents;\r
983//EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
984//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
985} EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE;\r
986\r
987#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
988#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
989#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
990\r
991typedef struct {\r
992 UINT16 MemoryPowerNodeCount;\r
993 UINT8 Reserved[2];\r
994} EFI_ACPI_6_4_MPST_MEMORY_POWER_NODE_TABLE;\r
995\r
996///\r
997/// MPST Memory Power State Characteristics Table\r
998///\r
999typedef struct {\r
1000 UINT8 PowerStateStructureID;\r
1001 UINT8 Flag;\r
1002 UINT16 Reserved;\r
1003 UINT32 AveragePowerConsumedInMPS0;\r
1004 UINT32 RelativePowerSavingToMPS0;\r
1005 UINT64 ExitLatencyToMPS0;\r
1006} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1007\r
1008#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1009#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1010#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1011\r
1012typedef struct {\r
1013 UINT16 MemoryPowerStateCharacteristicsCount;\r
1014 UINT8 Reserved[2];\r
1015} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1016\r
1017///\r
ad3dea98 1018/// Platform Memory Topology Table definition.\r
5963ce5d
CJ		 1019///\r
1020typedef struct {\r
ad3dea98
CJ		 1021 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1022 UINT32 NumberOfMemoryDevices;\r
1023//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1024} EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE;\r
5963ce5d
CJ		 1025\r
1026///\r
1027/// PMTT Version (as defined in ACPI 6.4 spec.)\r
1028///\r
ad3dea98 1029#define EFI_ACPI_6_4_MEMORY_TOPOLOGY_TABLE_REVISION 0x02\r
5963ce5d
CJ		 1030\r
1031///\r
ad3dea98 1032/// Common Memory Device.\r
5963ce5d
CJ		 1033///\r
1034typedef struct {\r
ad3dea98
CJ		 1035 UINT8 Type;\r
1036 UINT8 Reserved;\r
1037 UINT16 Length;\r
1038 UINT16 Flags;\r
1039 UINT16 Reserved1;\r
1040 UINT32 NumberOfMemoryDevices;\r
1041//UINT8 TypeSpecificData[];\r
1042//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1043} EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE;\r
1044\r
1045///\r
1046/// Memory Device Type.\r
1047///\r
1048#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x1\r
1049#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1050#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x3\r
1051#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF\r
5963ce5d
CJ		 1052\r
1053///\r
ad3dea98 1054/// Socket Type Data.\r
5963ce5d 1055///\r
ad3dea98
CJ		 1056typedef struct {\r
1057 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1058 UINT16 SocketIdentifier;\r
1059 UINT16 Reserved;\r
1060//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1061} EFI_ACPI_6_4_PMTT_SOCKET_TYPE_DATA;\r
5963ce5d
CJ		 1062\r
1063///\r
ad3dea98 1064/// Memory Controller Type Data.\r
5963ce5d
CJ		 1065///\r
1066typedef struct {\r
ad3dea98
CJ		 1067 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1068 UINT16 MemoryControllerIdentifier;\r
1069 UINT16 Reserved;\r
1070//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1071} EFI_ACPI_6_4_PMTT_MEMORY_CONTROLLER_TYPE_DATA;\r
5963ce5d
CJ		 1072\r
1073///\r
ad3dea98 1074/// DIMM Type Specific Data.\r
5963ce5d
CJ		 1075///\r
1076typedef struct {\r
ad3dea98
CJ		 1077 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1078 UINT32 SmbiosHandle;\r
1079} EFI_ACPI_6_4_PMTT_DIMM_TYPE_SPECIFIC_DATA;\r
1080\r
1081///\r
1082/// Vendor Specific Type Data.\r
5963ce5d
CJ		 1083///\r
1084typedef struct {\r
ad3dea98
CJ		 1085 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1086 UINT8 TypeUuid[16];\r
1087//EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];\r
1088//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1089} EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA;\r
5963ce5d
CJ		 1090\r
1091///\r
1092/// Boot Graphics Resource Table definition.\r
1093///\r
1094typedef struct {\r
1095 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1096 ///\r
1097 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1098 ///\r
1099 UINT16 Version;\r
1100 ///\r
1101 /// 1-byte status field indicating current status about the table.\r
1102 /// Bits[7:3] = Reserved (must be zero)\r
1103 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise\r
1104 /// degree offset from the image's default orientation.\r
1105 /// [00] = 0, no offset\r
1106 /// [01] = 90\r
1107 /// [10] = 180\r
1108 /// [11] = 270\r
1109 /// Bit [0] = Displayed. A one indicates the boot image graphic is\r
1110 /// displayed.\r
1111 ///\r
1112 UINT8 Status;\r
1113 ///\r
1114 /// 1-byte enumerated type field indicating format of the image.\r
1115 /// 0 = Bitmap\r
1116 /// 1 - 255 Reserved (for future use)\r
1117 ///\r
1118 UINT8 ImageType;\r
1119 ///\r
1120 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1121 /// of the image bitmap.\r
1122 ///\r
1123 UINT64 ImageAddress;\r
1124 ///\r
1125 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1126 /// (X, Y) display offset of the top left corner of the boot image.\r
1127 /// The top left corner of the display is at offset (0, 0).\r
1128 ///\r
1129 UINT32 ImageOffsetX;\r
1130 ///\r
1131 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1132 /// (X, Y) display offset of the top left corner of the boot image.\r
1133 /// The top left corner of the display is at offset (0, 0).\r
1134 ///\r
1135 UINT32 ImageOffsetY;\r
1136} EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1137\r
1138///\r
1139/// BGRT Revision\r
1140///\r
1141#define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1142\r
1143///\r
1144/// BGRT Version\r
1145///\r
1146#define EFI_ACPI_6_4_BGRT_VERSION 0x01\r
1147\r
1148///\r
1149/// BGRT Status\r
1150///\r
1151#define EFI_ACPI_6_4_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1152#define EFI_ACPI_6_4_BGRT_STATUS_DISPLAYED 0x01\r
1153\r
1154///\r
1155/// BGRT Image Type\r
1156///\r
1157#define EFI_ACPI_6_4_BGRT_IMAGE_TYPE_BMP 0x00\r
1158\r
1159///\r
1160/// FPDT Version (as defined in ACPI 6.4 spec.)\r
1161///\r
1162#define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1163\r
1164///\r
1165/// FPDT Performance Record Types\r
1166///\r
1167#define EFI_ACPI_6_4_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1168#define EFI_ACPI_6_4_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1169\r
1170///\r
1171/// FPDT Performance Record Revision\r
1172///\r
1173#define EFI_ACPI_6_4_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1174#define EFI_ACPI_6_4_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1175\r
1176///\r
1177/// FPDT Runtime Performance Record Types\r
1178///\r
1179#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1180#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1181#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1182\r
1183///\r
1184/// FPDT Runtime Performance Record Revision\r
1185///\r
1186#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1187#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1188#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1189\r
1190///\r
1191/// FPDT Performance Record header\r
1192///\r
1193typedef struct {\r
1194 UINT16 Type;\r
1195 UINT8 Length;\r
1196 UINT8 Revision;\r
1197} EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER;\r
1198\r
1199///\r
1200/// FPDT Performance Table header\r
1201///\r
1202typedef struct {\r
1203 UINT32 Signature;\r
1204 UINT32 Length;\r
1205} EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER;\r
1206\r
1207///\r
1208/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1209///\r
1210typedef struct {\r
1211 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1212 UINT32 Reserved;\r
1213 ///\r
1214 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1215 ///\r
1216 UINT64 BootPerformanceTablePointer;\r
1217} EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1218\r
1219///\r
1220/// FPDT S3 Performance Table Pointer Record Structure\r
1221///\r
1222typedef struct {\r
1223 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1224 UINT32 Reserved;\r
1225 ///\r
1226 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1227 ///\r
1228 UINT64 S3PerformanceTablePointer;\r
1229} EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1230\r
1231///\r
1232/// FPDT Firmware Basic Boot Performance Record Structure\r
1233///\r
1234typedef struct {\r
1235 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1236 UINT32 Reserved;\r
1237 ///\r
1238 /// Timer value logged at the beginning of firmware image execution.\r
1239 /// This may not always be zero or near zero.\r
1240 ///\r
1241 UINT64 ResetEnd;\r
1242 ///\r
1243 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1244 /// For non-UEFI compatible boots, this field must be zero.\r
1245 ///\r
1246 UINT64 OsLoaderLoadImageStart;\r
1247 ///\r
1248 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1249 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1250 /// to the INT 19h handler invocation.\r
1251 ///\r
1252 UINT64 OsLoaderStartImageStart;\r
1253 ///\r
1254 /// Timer value logged at the point when the OS loader calls the\r
1255 /// ExitBootServices function for UEFI compatible firmware.\r
1256 /// For non-UEFI compatible boots, this field must be zero.\r
1257 ///\r
1258 UINT64 ExitBootServicesEntry;\r
1259 ///\r
1260 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1261 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1262 /// For non-UEFI compatible boots, this field must be zero.\r
1263 ///\r
1264 UINT64 ExitBootServicesExit;\r
1265} EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1266\r
1267///\r
1268/// FPDT Firmware Basic Boot Performance Table signature\r
1269///\r
1270#define EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1271\r
1272//\r
1273// FPDT Firmware Basic Boot Performance Table\r
1274//\r
1275typedef struct {\r
1276 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1277 //\r
1278 // one or more Performance Records.\r
1279 //\r
1280} EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1281\r
1282///\r
1283/// FPDT "S3PT" S3 Performance Table\r
1284///\r
1285#define EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1286\r
1287//\r
1288// FPDT Firmware S3 Boot Performance Table\r
1289//\r
1290typedef struct {\r
1291 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1292 //\r
1293 // one or more Performance Records.\r
1294 //\r
1295} EFI_ACPI_6_4_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1296\r
1297///\r
1298/// FPDT Basic S3 Resume Performance Record\r
1299///\r
1300typedef struct {\r
1301 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1302 ///\r
1303 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1304 ///\r
1305 UINT32 ResumeCount;\r
1306 ///\r
1307 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1308 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1309 ///\r
1310 UINT64 FullResume;\r
1311 ///\r
1312 /// Average timer value of all resume cycles logged since the last full boot\r
1313 /// sequence, including the most recent resume. Note that the entire log of\r
1314 /// timer values does not need to be retained in order to calculate this average.\r
1315 ///\r
1316 UINT64 AverageResume;\r
1317} EFI_ACPI_6_4_FPDT_S3_RESUME_RECORD;\r
1318\r
1319///\r
1320/// FPDT Basic S3 Suspend Performance Record\r
1321///\r
1322typedef struct {\r
1323 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1324 ///\r
1325 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1326 /// Only the most recent suspend cycle's timer value is retained.\r
1327 ///\r
1328 UINT64 SuspendStart;\r
1329 ///\r
1330 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1331 /// mechanism) used to trigger hardware entry to S3.\r
1332 /// Only the most recent suspend cycle's timer value is retained.\r
1333 ///\r
1334 UINT64 SuspendEnd;\r
1335} EFI_ACPI_6_4_FPDT_S3_SUSPEND_RECORD;\r
1336\r
1337///\r
1338/// Firmware Performance Record Table definition.\r
1339///\r
1340typedef struct {\r
1341 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1342} EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1343\r
1344///\r
1345/// Generic Timer Description Table definition.\r
1346///\r
1347typedef struct {\r
1348 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1349 UINT64 CntControlBasePhysicalAddress;\r
1350 UINT32 Reserved;\r
1351 UINT32 SecurePL1TimerGSIV;\r
1352 UINT32 SecurePL1TimerFlags;\r
1353 UINT32 NonSecurePL1TimerGSIV;\r
1354 UINT32 NonSecurePL1TimerFlags;\r
1355 UINT32 VirtualTimerGSIV;\r
1356 UINT32 VirtualTimerFlags;\r
1357 UINT32 NonSecurePL2TimerGSIV;\r
1358 UINT32 NonSecurePL2TimerFlags;\r
1359 UINT64 CntReadBasePhysicalAddress;\r
1360 UINT32 PlatformTimerCount;\r
1361 UINT32 PlatformTimerOffset;\r
1362 UINT32 VirtualPL2TimerGSIV;\r
1363 UINT32 VirtualPL2TimerFlags;\r
1364} EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1365\r
1366///\r
1367/// GTDT Version (as defined in ACPI 6.4 spec.)\r
1368///\r
1369#define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03\r
1370\r
1371///\r
1372/// Timer Flags. All other bits are reserved and must be 0.\r
1373///\r
1374#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1375#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1376#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1377\r
1378///\r
1379/// Platform Timer Type\r
1380///\r
1381#define EFI_ACPI_6_4_GTDT_GT_BLOCK 0\r
d910e832 1382#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG 1\r
5963ce5d
CJ		 1383\r
1384///\r
1385/// GT Block Structure\r
1386///\r
1387typedef struct {\r
1388 UINT8 Type;\r
1389 UINT16 Length;\r
1390 UINT8 Reserved;\r
1391 UINT64 CntCtlBase;\r
1392 UINT32 GTBlockTimerCount;\r
1393 UINT32 GTBlockTimerOffset;\r
1394} EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE;\r
1395\r
1396///\r
1397/// GT Block Timer Structure\r
1398///\r
1399typedef struct {\r
1400 UINT8 GTFrameNumber;\r
1401 UINT8 Reserved[3];\r
1402 UINT64 CntBaseX;\r
1403 UINT64 CntEL0BaseX;\r
1404 UINT32 GTxPhysicalTimerGSIV;\r
1405 UINT32 GTxPhysicalTimerFlags;\r
1406 UINT32 GTxVirtualTimerGSIV;\r
1407 UINT32 GTxVirtualTimerFlags;\r
1408 UINT32 GTxCommonFlags;\r
1409} EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1410\r
1411///\r
1412/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1413///\r
1414#define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1415#define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1416\r
1417///\r
1418/// Common Flags Flags. All other bits are reserved and must be 0.\r
1419///\r
1420#define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1421#define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1422\r
1423///\r
d910e832 1424/// Arm Generic Watchdog Structure\r
5963ce5d
CJ		 1425///\r
1426typedef struct {\r
1427 UINT8 Type;\r
1428 UINT16 Length;\r
1429 UINT8 Reserved;\r
1430 UINT64 RefreshFramePhysicalAddress;\r
1431 UINT64 WatchdogControlFramePhysicalAddress;\r
1432 UINT32 WatchdogTimerGSIV;\r
1433 UINT32 WatchdogTimerFlags;\r
d910e832 1434} EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;\r
5963ce5d
CJ		 1435\r
1436///\r
d910e832 1437/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
5963ce5d 1438///\r
d910e832
CJ		 1439#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1440#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1441#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
5963ce5d
CJ		 1442\r
1443//\r
1444// NVDIMM Firmware Interface Table definition.\r
1445//\r
1446typedef struct {\r
1447 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1448 UINT32 Reserved;\r
1449} EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1450\r
1451//\r
1452// NFIT Version (as defined in ACPI 6.4 spec.)\r
1453//\r
1454#define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1455\r
1456//\r
1457// Definition for NFIT Table Structure Types\r
1458//\r
1459#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1460#define EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1461#define EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1462#define EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1463#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1464#define EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1465#define EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1466\r
1467//\r
1468// Definition for NFIT Structure Header\r
1469//\r
1470typedef struct {\r
1471 UINT16 Type;\r
1472 UINT16 Length;\r
1473} EFI_ACPI_6_4_NFIT_STRUCTURE_HEADER;\r
1474\r
1475//\r
1476// Definition for System Physical Address Range Structure\r
1477//\r
1478#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1479#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
ced4cb76
CJ		 1480#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2\r
1481\r
5963ce5d
CJ		 1482#define EFI_ACPI_6_4_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1483#define EFI_ACPI_6_4_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1484#define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1485#define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1486#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1487#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1488#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1489#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
ced4cb76 1490\r
5963ce5d
CJ		 1491typedef struct {\r
1492 UINT16 Type;\r
1493 UINT16 Length;\r
1494 UINT16 SPARangeStructureIndex;\r
1495 UINT16 Flags;\r
1496 UINT32 Reserved_8;\r
1497 UINT32 ProximityDomain;\r
1498 GUID AddressRangeTypeGUID;\r
1499 UINT64 SystemPhysicalAddressRangeBase;\r
1500 UINT64 SystemPhysicalAddressRangeLength;\r
1501 UINT64 AddressRangeMemoryMappingAttribute;\r
ced4cb76 1502 UINT64 SPALocationCookie;\r
5963ce5d
CJ		 1503} EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1504\r
1505//\r
1506// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1507//\r
1508typedef struct {\r
1509 UINT32 DIMMNumber:4;\r
1510 UINT32 MemoryChannelNumber:4;\r
1511 UINT32 MemoryControllerID:4;\r
1512 UINT32 SocketID:4;\r
1513 UINT32 NodeControllerID:12;\r
1514 UINT32 Reserved_28:4;\r
1515} EFI_ACPI_6_4_NFIT_DEVICE_HANDLE;\r
1516\r
1517#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1518#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1519#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1520#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1521#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1522#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1523#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
ced4cb76 1524\r
5963ce5d
CJ		 1525typedef struct {\r
1526 UINT16 Type;\r
1527 UINT16 Length;\r
1528 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1529 UINT16 NVDIMMPhysicalID;\r
1530 UINT16 NVDIMMRegionID;\r
1531 UINT16 SPARangeStructureIndex ;\r
1532 UINT16 NVDIMMControlRegionStructureIndex;\r
1533 UINT64 NVDIMMRegionSize;\r
1534 UINT64 RegionOffset;\r
1535 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1536 UINT16 InterleaveStructureIndex;\r
1537 UINT16 InterleaveWays;\r
1538 UINT16 NVDIMMStateFlags;\r
1539 UINT16 Reserved_46;\r
1540} EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1541\r
1542//\r
1543// Definition for Interleave Structure\r
1544//\r
1545typedef struct {\r
1546 UINT16 Type;\r
1547 UINT16 Length;\r
1548 UINT16 InterleaveStructureIndex;\r
1549 UINT16 Reserved_6;\r
1550 UINT32 NumberOfLines;\r
1551 UINT32 LineSize;\r
1552//UINT32 LineOffset[NumberOfLines];\r
1553} EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE;\r
1554\r
1555//\r
1556// Definition for SMBIOS Management Information Structure\r
1557//\r
1558typedef struct {\r
1559 UINT16 Type;\r
1560 UINT16 Length;\r
1561 UINT32 Reserved_4;\r
1562//UINT8 Data[];\r
1563} EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1564\r
1565//\r
1566// Definition for NVDIMM Control Region Structure\r
1567//\r
1568#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1569\r
1570#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
ced4cb76 1571\r
5963ce5d
CJ		 1572typedef struct {\r
1573 UINT16 Type;\r
1574 UINT16 Length;\r
1575 UINT16 NVDIMMControlRegionStructureIndex;\r
1576 UINT16 VendorID;\r
1577 UINT16 DeviceID;\r
1578 UINT16 RevisionID;\r
1579 UINT16 SubsystemVendorID;\r
1580 UINT16 SubsystemDeviceID;\r
1581 UINT16 SubsystemRevisionID;\r
1582 UINT8 ValidFields;\r
1583 UINT8 ManufacturingLocation;\r
1584 UINT16 ManufacturingDate;\r
1585 UINT8 Reserved_22[2];\r
1586 UINT32 SerialNumber;\r
1587 UINT16 RegionFormatInterfaceCode;\r
1588 UINT16 NumberOfBlockControlWindows;\r
1589 UINT64 SizeOfBlockControlWindow;\r
1590 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1591 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1592 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1593 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1594 UINT16 NVDIMMControlRegionFlag;\r
1595 UINT8 Reserved_74[6];\r
1596} EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1597\r
1598//\r
1599// Definition for NVDIMM Block Data Window Region Structure\r
1600//\r
1601typedef struct {\r
1602 UINT16 Type;\r
1603 UINT16 Length;\r
1604 UINT16 NVDIMMControlRegionStructureIndex;\r
1605 UINT16 NumberOfBlockDataWindows;\r
1606 UINT64 BlockDataWindowStartOffset;\r
1607 UINT64 SizeOfBlockDataWindow;\r
1608 UINT64 BlockAccessibleMemoryCapacity;\r
1609 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1610} EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1611\r
1612//\r
1613// Definition for Flush Hint Address Structure\r
1614//\r
1615typedef struct {\r
1616 UINT16 Type;\r
1617 UINT16 Length;\r
1618 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1619 UINT16 NumberOfFlushHintAddresses;\r
1620 UINT8 Reserved_10[6];\r
1621//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1622} EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1623\r
1624///\r
1625/// Secure DEVices Table (SDEV)\r
1626///\r
1627typedef struct {\r
1628 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1629} EFI_ACPI_6_4_SECURE_DEVICES_TABLE_HEADER;\r
1630\r
1631///\r
1632/// SDEV Revision (as defined in ACPI 6.4 spec.)\r
1633///\r
1634#define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_REVISION 0x01\r
1635\r
1636///\r
1637/// Secure Devcice types\r
1638///\r
1639#define EFI_ACPI_6_4_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1640#define EFI_ACPI_6_4_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1641\r
1642///\r
1643/// Secure Devcice flags\r
1644///\r
1645#define EFI_ACPI_6_4_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1646\r
1647///\r
1648/// SDEV Structure Header\r
1649///\r
1650typedef struct {\r
1651 UINT8 Type;\r
1652 UINT8 Flags;\r
1653 UINT16 Length;\r
1654} EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER;\r
1655\r
1656///\r
1657/// PCIe Endpoint Device based Secure Device Structure\r
1658///\r
1659typedef struct {\r
1660 UINT8 Type;\r
1661 UINT8 Flags;\r
1662 UINT16 Length;\r
1663 UINT16 PciSegmentNumber;\r
1664 UINT16 StartBusNumber;\r
1665 UINT16 PciPathOffset;\r
1666 UINT16 PciPathLength;\r
1667 UINT16 VendorSpecificDataOffset;\r
1668 UINT16 VendorSpecificDataLength;\r
1669} EFI_ACPI_6_4_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1670\r
1671///\r
1672/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1673///\r
1674typedef struct {\r
1675 UINT8 Type;\r
1676 UINT8 Flags;\r
1677 UINT16 Length;\r
1678 UINT16 DeviceIdentifierOffset;\r
1679 UINT16 DeviceIdentifierLength;\r
1680 UINT16 VendorSpecificDataOffset;\r
1681 UINT16 VendorSpecificDataLength;\r
1682} EFI_ACPI_6_4_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1683\r
1684///\r
1685/// Boot Error Record Table (BERT)\r
1686///\r
1687typedef struct {\r
1688 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1689 UINT32 BootErrorRegionLength;\r
1690 UINT64 BootErrorRegion;\r
1691} EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1692\r
1693///\r
1694/// BERT Version (as defined in ACPI 6.4 spec.)\r
1695///\r
1696#define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1697\r
1698///\r
1699/// Boot Error Region Block Status Definition\r
1700///\r
1701typedef struct {\r
1702 UINT32 UncorrectableErrorValid:1;\r
1703 UINT32 CorrectableErrorValid:1;\r
1704 UINT32 MultipleUncorrectableErrors:1;\r
1705 UINT32 MultipleCorrectableErrors:1;\r
1706 UINT32 ErrorDataEntryCount:10;\r
1707 UINT32 Reserved:18;\r
1708} EFI_ACPI_6_4_ERROR_BLOCK_STATUS;\r
1709\r
1710///\r
1711/// Boot Error Region Definition\r
1712///\r
1713typedef struct {\r
1714 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;\r
1715 UINT32 RawDataOffset;\r
1716 UINT32 RawDataLength;\r
1717 UINT32 DataLength;\r
1718 UINT32 ErrorSeverity;\r
1719} EFI_ACPI_6_4_BOOT_ERROR_REGION_STRUCTURE;\r
1720\r
1721//\r
1722// Boot Error Severity types\r
1723//\r
1724#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTABLE 0x00\r
1725#define EFI_ACPI_6_4_ERROR_SEVERITY_FATAL 0x01\r
1726#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTED 0x02\r
1727#define EFI_ACPI_6_4_ERROR_SEVERITY_NONE 0x03\r
1728\r
1729///\r
1730/// Generic Error Data Entry Definition\r
1731///\r
1732typedef struct {\r
1733 UINT8 SectionType[16];\r
1734 UINT32 ErrorSeverity;\r
1735 UINT16 Revision;\r
1736 UINT8 ValidationBits;\r
1737 UINT8 Flags;\r
1738 UINT32 ErrorDataLength;\r
1739 UINT8 FruId[16];\r
1740 UINT8 FruText[20];\r
1741 UINT8 Timestamp[8];\r
1742} EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1743\r
1744///\r
1745/// Generic Error Data Entry Version (as defined in ACPI 6.4 spec.)\r
1746///\r
1747#define EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1748\r
1749///\r
1750/// HEST - Hardware Error Source Table\r
1751///\r
1752typedef struct {\r
1753 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1754 UINT32 ErrorSourceCount;\r
1755} EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1756\r
1757///\r
1758/// HEST Version (as defined in ACPI 6.4 spec.)\r
1759///\r
1760#define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1761\r
1762//\r
1763// Error Source structure types.\r
1764//\r
1765#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1766#define EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1767#define EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1768#define EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1769#define EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER 0x07\r
1770#define EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER 0x08\r
1771#define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR 0x09\r
1772#define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1773#define EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1774\r
1775//\r
1776// Error Source structure flags.\r
1777//\r
1778#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1779#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1780#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1781\r
1782///\r
1783/// IA-32 Architecture Machine Check Exception Structure Definition\r
1784///\r
1785typedef struct {\r
1786 UINT16 Type;\r
1787 UINT16 SourceId;\r
1788 UINT8 Reserved0[2];\r
1789 UINT8 Flags;\r
1790 UINT8 Enabled;\r
1791 UINT32 NumberOfRecordsToPreAllocate;\r
1792 UINT32 MaxSectionsPerRecord;\r
1793 UINT64 GlobalCapabilityInitData;\r
1794 UINT64 GlobalControlInitData;\r
1795 UINT8 NumberOfHardwareBanks;\r
1796 UINT8 Reserved1[7];\r
1797} EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1798\r
1799///\r
1800/// IA-32 Architecture Machine Check Bank Structure Definition\r
1801///\r
1802typedef struct {\r
1803 UINT8 BankNumber;\r
1804 UINT8 ClearStatusOnInitialization;\r
1805 UINT8 StatusDataFormat;\r
1806 UINT8 Reserved0;\r
1807 UINT32 ControlRegisterMsrAddress;\r
1808 UINT64 ControlInitData;\r
1809 UINT32 StatusRegisterMsrAddress;\r
1810 UINT32 AddressRegisterMsrAddress;\r
1811 UINT32 MiscRegisterMsrAddress;\r
1812} EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1813\r
1814///\r
1815/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1816///\r
1817#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1818#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1819#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1820\r
1821//\r
1822// Hardware Error Notification types. All other values are reserved\r
1823//\r
1824#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1825#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1826#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1827#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1828#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1829#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1830#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1831#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1832#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1833#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1834#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1835#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1836\r
1837///\r
1838/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1839///\r
1840typedef struct {\r
1841 UINT16 Type:1;\r
1842 UINT16 PollInterval:1;\r
1843 UINT16 SwitchToPollingThresholdValue:1;\r
1844 UINT16 SwitchToPollingThresholdWindow:1;\r
1845 UINT16 ErrorThresholdValue:1;\r
1846 UINT16 ErrorThresholdWindow:1;\r
1847 UINT16 Reserved:10;\r
1848} EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1849\r
1850///\r
1851/// Hardware Error Notification Structure Definition\r
1852///\r
1853typedef struct {\r
1854 UINT8 Type;\r
1855 UINT8 Length;\r
1856 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1857 UINT32 PollInterval;\r
1858 UINT32 Vector;\r
1859 UINT32 SwitchToPollingThresholdValue;\r
1860 UINT32 SwitchToPollingThresholdWindow;\r
1861 UINT32 ErrorThresholdValue;\r
1862 UINT32 ErrorThresholdWindow;\r
1863} EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1864\r
1865///\r
1866/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1867///\r
1868typedef struct {\r
1869 UINT16 Type;\r
1870 UINT16 SourceId;\r
1871 UINT8 Reserved0[2];\r
1872 UINT8 Flags;\r
1873 UINT8 Enabled;\r
1874 UINT32 NumberOfRecordsToPreAllocate;\r
1875 UINT32 MaxSectionsPerRecord;\r
1876 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1877 UINT8 NumberOfHardwareBanks;\r
1878 UINT8 Reserved1[3];\r
1879} EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1880\r
1881///\r
1882/// IA-32 Architecture NMI Error Structure Definition\r
1883///\r
1884typedef struct {\r
1885 UINT16 Type;\r
1886 UINT16 SourceId;\r
1887 UINT8 Reserved0[2];\r
1888 UINT32 NumberOfRecordsToPreAllocate;\r
1889 UINT32 MaxSectionsPerRecord;\r
1890 UINT32 MaxRawDataLength;\r
1891} EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1892\r
1893///\r
1894/// PCI Express Root Port AER Structure Definition\r
1895///\r
1896typedef struct {\r
1897 UINT16 Type;\r
1898 UINT16 SourceId;\r
1899 UINT8 Reserved0[2];\r
1900 UINT8 Flags;\r
1901 UINT8 Enabled;\r
1902 UINT32 NumberOfRecordsToPreAllocate;\r
1903 UINT32 MaxSectionsPerRecord;\r
1904 UINT32 Bus;\r
1905 UINT16 Device;\r
1906 UINT16 Function;\r
1907 UINT16 DeviceControl;\r
1908 UINT8 Reserved1[2];\r
1909 UINT32 UncorrectableErrorMask;\r
1910 UINT32 UncorrectableErrorSeverity;\r
1911 UINT32 CorrectableErrorMask;\r
1912 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1913 UINT32 RootErrorCommand;\r
1914} EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1915\r
1916///\r
1917/// PCI Express Device AER Structure Definition\r
1918///\r
1919typedef struct {\r
1920 UINT16 Type;\r
1921 UINT16 SourceId;\r
1922 UINT8 Reserved0[2];\r
1923 UINT8 Flags;\r
1924 UINT8 Enabled;\r
1925 UINT32 NumberOfRecordsToPreAllocate;\r
1926 UINT32 MaxSectionsPerRecord;\r
1927 UINT32 Bus;\r
1928 UINT16 Device;\r
1929 UINT16 Function;\r
1930 UINT16 DeviceControl;\r
1931 UINT8 Reserved1[2];\r
1932 UINT32 UncorrectableErrorMask;\r
1933 UINT32 UncorrectableErrorSeverity;\r
1934 UINT32 CorrectableErrorMask;\r
1935 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1936} EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1937\r
1938///\r
1939/// PCI Express Bridge AER Structure Definition\r
1940///\r
1941typedef struct {\r
1942 UINT16 Type;\r
1943 UINT16 SourceId;\r
1944 UINT8 Reserved0[2];\r
1945 UINT8 Flags;\r
1946 UINT8 Enabled;\r
1947 UINT32 NumberOfRecordsToPreAllocate;\r
1948 UINT32 MaxSectionsPerRecord;\r
1949 UINT32 Bus;\r
1950 UINT16 Device;\r
1951 UINT16 Function;\r
1952 UINT16 DeviceControl;\r
1953 UINT8 Reserved1[2];\r
1954 UINT32 UncorrectableErrorMask;\r
1955 UINT32 UncorrectableErrorSeverity;\r
1956 UINT32 CorrectableErrorMask;\r
1957 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1958 UINT32 SecondaryUncorrectableErrorMask;\r
1959 UINT32 SecondaryUncorrectableErrorSeverity;\r
1960 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1961} EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1962\r
1963///\r
1964/// Generic Hardware Error Source Structure Definition\r
1965///\r
1966typedef struct {\r
1967 UINT16 Type;\r
1968 UINT16 SourceId;\r
1969 UINT16 RelatedSourceId;\r
1970 UINT8 Flags;\r
1971 UINT8 Enabled;\r
1972 UINT32 NumberOfRecordsToPreAllocate;\r
1973 UINT32 MaxSectionsPerRecord;\r
1974 UINT32 MaxRawDataLength;\r
1975 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1976 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1977 UINT32 ErrorStatusBlockLength;\r
1978} EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1979\r
1980///\r
1981/// Generic Hardware Error Source Version 2 Structure Definition\r
1982///\r
1983typedef struct {\r
1984 UINT16 Type;\r
1985 UINT16 SourceId;\r
1986 UINT16 RelatedSourceId;\r
1987 UINT8 Flags;\r
1988 UINT8 Enabled;\r
1989 UINT32 NumberOfRecordsToPreAllocate;\r
1990 UINT32 MaxSectionsPerRecord;\r
1991 UINT32 MaxRawDataLength;\r
1992 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1993 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1994 UINT32 ErrorStatusBlockLength;\r
1995 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
1996 UINT64 ReadAckPreserve;\r
1997 UINT64 ReadAckWrite;\r
1998} EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
1999\r
2000///\r
2001/// Generic Error Status Definition\r
2002///\r
2003typedef struct {\r
2004 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;\r
2005 UINT32 RawDataOffset;\r
2006 UINT32 RawDataLength;\r
2007 UINT32 DataLength;\r
2008 UINT32 ErrorSeverity;\r
2009} EFI_ACPI_6_4_GENERIC_ERROR_STATUS_STRUCTURE;\r
2010\r
2011///\r
2012/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2013///\r
2014typedef struct {\r
2015 UINT16 Type;\r
2016 UINT16 SourceId;\r
2017 UINT8 Reserved0[2];\r
2018 UINT8 Flags;\r
2019 UINT8 Enabled;\r
2020 UINT32 NumberOfRecordsToPreAllocate;\r
2021 UINT32 MaxSectionsPerRecord;\r
2022 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2023 UINT8 NumberOfHardwareBanks;\r
2024 UINT8 Reserved1[3];\r
2025} EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
2026\r
2027///\r
2028/// HMAT - Heterogeneous Memory Attribute Table\r
2029///\r
2030typedef struct {\r
2031 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2032 UINT8 Reserved[4];\r
2033} EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2034\r
2035///\r
2036/// HMAT Revision (as defined in ACPI 6.4 spec.)\r
2037///\r
2038#define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02\r
2039\r
2040///\r
2041/// HMAT types\r
2042///\r
2043#define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00\r
2044#define EFI_ACPI_6_4_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2045#define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2046\r
2047///\r
2048/// HMAT Structure Header\r
2049///\r
2050typedef struct {\r
2051 UINT16 Type;\r
2052 UINT8 Reserved[2];\r
2053 UINT32 Length;\r
2054} EFI_ACPI_6_4_HMAT_STRUCTURE_HEADER;\r
2055\r
2056///\r
2057/// Memory Proximity Domain Attributes Structure flags\r
2058///\r
2059typedef struct {\r
2060 UINT16 InitiatorProximityDomainValid:1;\r
2061 UINT16 Reserved:15;\r
2062} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;\r
2063\r
2064///\r
2065/// Memory Proximity Domain Attributes Structure\r
2066///\r
2067typedef struct {\r
2068 UINT16 Type;\r
2069 UINT8 Reserved[2];\r
2070 UINT32 Length;\r
2071 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;\r
2072 UINT8 Reserved1[2];\r
2073 UINT32 InitiatorProximityDomain;\r
2074 UINT32 MemoryProximityDomain;\r
2075 UINT8 Reserved2[20];\r
2076} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;\r
2077\r
2078///\r
2079/// System Locality Latency and Bandwidth Information Structure flags\r
2080///\r
2081typedef struct {\r
2082 UINT8 MemoryHierarchy:4;\r
357383bc
CJ		 2083 UINT8 AccessAttributes:2;\r
2084 UINT8 Reserved:2;\r
5963ce5d
CJ		 2085} EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2086\r
2087///\r
2088/// System Locality Latency and Bandwidth Information Structure\r
2089///\r
2090typedef struct {\r
2091 UINT16 Type;\r
2092 UINT8 Reserved[2];\r
2093 UINT32 Length;\r
2094 EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2095 UINT8 DataType;\r
357383bc
CJ		 2096 UINT8 MinTransferSize;\r
2097 UINT8 Reserved1;\r
5963ce5d
CJ		 2098 UINT32 NumberOfInitiatorProximityDomains;\r
2099 UINT32 NumberOfTargetProximityDomains;\r
2100 UINT8 Reserved2[4];\r
2101 UINT64 EntryBaseUnit;\r
2102} EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2103\r
2104///\r
2105/// Memory Side Cache Information Structure cache attributes\r
2106///\r
2107typedef struct {\r
2108 UINT32 TotalCacheLevels:4;\r
2109 UINT32 CacheLevel:4;\r
2110 UINT32 CacheAssociativity:4;\r
2111 UINT32 WritePolicy:4;\r
2112 UINT32 CacheLineSize:16;\r
2113} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2114\r
2115///\r
2116/// Memory Side Cache Information Structure\r
2117///\r
2118typedef struct {\r
2119 UINT16 Type;\r
2120 UINT8 Reserved[2];\r
2121 UINT32 Length;\r
2122 UINT32 MemoryProximityDomain;\r
2123 UINT8 Reserved1[4];\r
2124 UINT64 MemorySideCacheSize;\r
2125 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2126 UINT8 Reserved2[2];\r
2127 UINT16 NumberOfSmbiosHandles;\r
2128} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2129\r
2130///\r
2131/// ERST - Error Record Serialization Table\r
2132///\r
2133typedef struct {\r
2134 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2135 UINT32 SerializationHeaderSize;\r
2136 UINT8 Reserved0[4];\r
2137 UINT32 InstructionEntryCount;\r
2138} EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2139\r
2140///\r
2141/// ERST Version (as defined in ACPI 6.4 spec.)\r
2142///\r
2143#define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2144\r
2145///\r
2146/// ERST Serialization Actions\r
2147///\r
2148#define EFI_ACPI_6_4_ERST_BEGIN_WRITE_OPERATION 0x00\r
2149#define EFI_ACPI_6_4_ERST_BEGIN_READ_OPERATION 0x01\r
2150#define EFI_ACPI_6_4_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2151#define EFI_ACPI_6_4_ERST_END_OPERATION 0x03\r
2152#define EFI_ACPI_6_4_ERST_SET_RECORD_OFFSET 0x04\r
2153#define EFI_ACPI_6_4_ERST_EXECUTE_OPERATION 0x05\r
2154#define EFI_ACPI_6_4_ERST_CHECK_BUSY_STATUS 0x06\r
2155#define EFI_ACPI_6_4_ERST_GET_COMMAND_STATUS 0x07\r
2156#define EFI_ACPI_6_4_ERST_GET_RECORD_IDENTIFIER 0x08\r
2157#define EFI_ACPI_6_4_ERST_SET_RECORD_IDENTIFIER 0x09\r
2158#define EFI_ACPI_6_4_ERST_GET_RECORD_COUNT 0x0A\r
2159#define EFI_ACPI_6_4_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2160#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2161#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2162#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2163#define EFI_ACPI_6_4_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2164\r
2165///\r
2166/// ERST Action Command Status\r
2167///\r
2168#define EFI_ACPI_6_4_ERST_STATUS_SUCCESS 0x00\r
2169#define EFI_ACPI_6_4_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2170#define EFI_ACPI_6_4_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2171#define EFI_ACPI_6_4_ERST_STATUS_FAILED 0x03\r
2172#define EFI_ACPI_6_4_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2173#define EFI_ACPI_6_4_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2174\r
2175///\r
2176/// ERST Serialization Instructions\r
2177///\r
2178#define EFI_ACPI_6_4_ERST_READ_REGISTER 0x00\r
2179#define EFI_ACPI_6_4_ERST_READ_REGISTER_VALUE 0x01\r
2180#define EFI_ACPI_6_4_ERST_WRITE_REGISTER 0x02\r
2181#define EFI_ACPI_6_4_ERST_WRITE_REGISTER_VALUE 0x03\r
2182#define EFI_ACPI_6_4_ERST_NOOP 0x04\r
2183#define EFI_ACPI_6_4_ERST_LOAD_VAR1 0x05\r
2184#define EFI_ACPI_6_4_ERST_LOAD_VAR2 0x06\r
2185#define EFI_ACPI_6_4_ERST_STORE_VAR1 0x07\r
2186#define EFI_ACPI_6_4_ERST_ADD 0x08\r
2187#define EFI_ACPI_6_4_ERST_SUBTRACT 0x09\r
2188#define EFI_ACPI_6_4_ERST_ADD_VALUE 0x0A\r
2189#define EFI_ACPI_6_4_ERST_SUBTRACT_VALUE 0x0B\r
2190#define EFI_ACPI_6_4_ERST_STALL 0x0C\r
2191#define EFI_ACPI_6_4_ERST_STALL_WHILE_TRUE 0x0D\r
2192#define EFI_ACPI_6_4_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2193#define EFI_ACPI_6_4_ERST_GOTO 0x0F\r
2194#define EFI_ACPI_6_4_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2195#define EFI_ACPI_6_4_ERST_SET_DST_ADDRESS_BASE 0x11\r
2196#define EFI_ACPI_6_4_ERST_MOVE_DATA 0x12\r
2197\r
2198///\r
2199/// ERST Instruction Flags\r
2200///\r
2201#define EFI_ACPI_6_4_ERST_PRESERVE_REGISTER 0x01\r
2202\r
2203///\r
2204/// ERST Serialization Instruction Entry\r
2205///\r
2206typedef struct {\r
2207 UINT8 SerializationAction;\r
2208 UINT8 Instruction;\r
2209 UINT8 Flags;\r
2210 UINT8 Reserved0;\r
2211 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2212 UINT64 Value;\r
2213 UINT64 Mask;\r
2214} EFI_ACPI_6_4_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2215\r
2216///\r
2217/// EINJ - Error Injection Table\r
2218///\r
2219typedef struct {\r
2220 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2221 UINT32 InjectionHeaderSize;\r
2222 UINT8 InjectionFlags;\r
2223 UINT8 Reserved0[3];\r
2224 UINT32 InjectionEntryCount;\r
2225} EFI_ACPI_6_4_ERROR_INJECTION_TABLE_HEADER;\r
2226\r
2227///\r
2228/// EINJ Version (as defined in ACPI 6.4 spec.)\r
2229///\r
2230#define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_REVISION 0x01\r
2231\r
2232///\r
2233/// EINJ Error Injection Actions\r
2234///\r
2235#define EFI_ACPI_6_4_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2236#define EFI_ACPI_6_4_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2237#define EFI_ACPI_6_4_EINJ_SET_ERROR_TYPE 0x02\r
2238#define EFI_ACPI_6_4_EINJ_GET_ERROR_TYPE 0x03\r
2239#define EFI_ACPI_6_4_EINJ_END_OPERATION 0x04\r
2240#define EFI_ACPI_6_4_EINJ_EXECUTE_OPERATION 0x05\r
2241#define EFI_ACPI_6_4_EINJ_CHECK_BUSY_STATUS 0x06\r
2242#define EFI_ACPI_6_4_EINJ_GET_COMMAND_STATUS 0x07\r
2243#define EFI_ACPI_6_4_EINJ_TRIGGER_ERROR 0xFF\r
2244\r
2245///\r
2246/// EINJ Action Command Status\r
2247///\r
2248#define EFI_ACPI_6_4_EINJ_STATUS_SUCCESS 0x00\r
2249#define EFI_ACPI_6_4_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2250#define EFI_ACPI_6_4_EINJ_STATUS_INVALID_ACCESS 0x02\r
2251\r
2252///\r
2253/// EINJ Error Type Definition\r
2254///\r
2255#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2256#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2257#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2258#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2259#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2260#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2261#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2262#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2263#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2264#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2265#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2266#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2267\r
2268///\r
2269/// EINJ Injection Instructions\r
2270///\r
2271#define EFI_ACPI_6_4_EINJ_READ_REGISTER 0x00\r
2272#define EFI_ACPI_6_4_EINJ_READ_REGISTER_VALUE 0x01\r
2273#define EFI_ACPI_6_4_EINJ_WRITE_REGISTER 0x02\r
2274#define EFI_ACPI_6_4_EINJ_WRITE_REGISTER_VALUE 0x03\r
2275#define EFI_ACPI_6_4_EINJ_NOOP 0x04\r
2276\r
2277///\r
2278/// EINJ Instruction Flags\r
2279///\r
2280#define EFI_ACPI_6_4_EINJ_PRESERVE_REGISTER 0x01\r
2281\r
2282///\r
2283/// EINJ Injection Instruction Entry\r
2284///\r
2285typedef struct {\r
2286 UINT8 InjectionAction;\r
2287 UINT8 Instruction;\r
2288 UINT8 Flags;\r
2289 UINT8 Reserved0;\r
2290 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2291 UINT64 Value;\r
2292 UINT64 Mask;\r
2293} EFI_ACPI_6_4_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2294\r
2295///\r
2296/// EINJ Trigger Action Table\r
2297///\r
2298typedef struct {\r
2299 UINT32 HeaderSize;\r
2300 UINT32 Revision;\r
2301 UINT32 TableSize;\r
2302 UINT32 EntryCount;\r
2303} EFI_ACPI_6_4_EINJ_TRIGGER_ACTION_TABLE;\r
2304\r
2305///\r
2306/// Platform Communications Channel Table (PCCT)\r
2307///\r
2308typedef struct {\r
2309 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2310 UINT32 Flags;\r
2311 UINT64 Reserved;\r
2312} EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2313\r
2314///\r
2315/// PCCT Version (as defined in ACPI 6.4 spec.)\r
2316///\r
2317#define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2318\r
2319///\r
2320/// PCCT Global Flags\r
2321///\r
2322#define EFI_ACPI_6_4_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2323\r
2324//\r
2325// PCCT Subspace type\r
2326//\r
2327#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2328#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2329#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2330#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2331#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
7b17bcd9 2332#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05\r
5963ce5d
CJ		 2333\r
2334///\r
2335/// PCC Subspace Structure Header\r
2336///\r
2337typedef struct {\r
2338 UINT8 Type;\r
2339 UINT8 Length;\r
2340} EFI_ACPI_6_4_PCCT_SUBSPACE_HEADER;\r
2341\r
2342///\r
2343/// Generic Communications Subspace Structure\r
2344///\r
2345typedef struct {\r
2346 UINT8 Type;\r
2347 UINT8 Length;\r
2348 UINT8 Reserved[6];\r
2349 UINT64 BaseAddress;\r
2350 UINT64 AddressLength;\r
2351 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2352 UINT64 DoorbellPreserve;\r
2353 UINT64 DoorbellWrite;\r
2354 UINT32 NominalLatency;\r
2355 UINT32 MaximumPeriodicAccessRate;\r
2356 UINT16 MinimumRequestTurnaroundTime;\r
2357} EFI_ACPI_6_4_PCCT_SUBSPACE_GENERIC;\r
2358\r
2359///\r
2360/// Generic Communications Channel Shared Memory Region\r
2361///\r
2362\r
2363typedef struct {\r
2364 UINT8 Command;\r
2365 UINT8 Reserved:7;\r
2366 UINT8 NotifyOnCompletion:1;\r
2367} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2368\r
2369typedef struct {\r
2370 UINT8 CommandComplete:1;\r
2371 UINT8 PlatformInterrupt:1;\r
2372 UINT8 Error:1;\r
2373 UINT8 PlatformNotification:1;\r
2374 UINT8 Reserved:4;\r
2375 UINT8 Reserved1;\r
2376} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2377\r
2378typedef struct {\r
2379 UINT32 Signature;\r
2380 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2381 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2382} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2383\r
2384#define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2385#define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2386\r
2387///\r
2388/// Type 1 HW-Reduced Communications Subspace Structure\r
2389///\r
2390typedef struct {\r
2391 UINT8 Type;\r
2392 UINT8 Length;\r
2393 UINT32 PlatformInterrupt;\r
2394 UINT8 PlatformInterruptFlags;\r
2395 UINT8 Reserved;\r
2396 UINT64 BaseAddress;\r
2397 UINT64 AddressLength;\r
2398 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2399 UINT64 DoorbellPreserve;\r
2400 UINT64 DoorbellWrite;\r
2401 UINT32 NominalLatency;\r
2402 UINT32 MaximumPeriodicAccessRate;\r
2403 UINT16 MinimumRequestTurnaroundTime;\r
2404} EFI_ACPI_6_4_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2405\r
2406///\r
2407/// Type 2 HW-Reduced Communications Subspace Structure\r
2408///\r
2409typedef struct {\r
2410 UINT8 Type;\r
2411 UINT8 Length;\r
2412 UINT32 PlatformInterrupt;\r
2413 UINT8 PlatformInterruptFlags;\r
2414 UINT8 Reserved;\r
2415 UINT64 BaseAddress;\r
2416 UINT64 AddressLength;\r
2417 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2418 UINT64 DoorbellPreserve;\r
2419 UINT64 DoorbellWrite;\r
2420 UINT32 NominalLatency;\r
2421 UINT32 MaximumPeriodicAccessRate;\r
2422 UINT16 MinimumRequestTurnaroundTime;\r
2423 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2424 UINT64 PlatformInterruptAckPreserve;\r
2425 UINT64 PlatformInterruptAckWrite;\r
2426} EFI_ACPI_6_4_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2427\r
2428///\r
2429/// Type 3 Extended PCC Subspace Structure\r
2430///\r
2431typedef struct {\r
2432 UINT8 Type;\r
2433 UINT8 Length;\r
2434 UINT32 PlatformInterrupt;\r
2435 UINT8 PlatformInterruptFlags;\r
2436 UINT8 Reserved;\r
2437 UINT64 BaseAddress;\r
2438 UINT32 AddressLength;\r
2439 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2440 UINT64 DoorbellPreserve;\r
2441 UINT64 DoorbellWrite;\r
2442 UINT32 NominalLatency;\r
2443 UINT32 MaximumPeriodicAccessRate;\r
2444 UINT32 MinimumRequestTurnaroundTime;\r
2445 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2446 UINT64 PlatformInterruptAckPreserve;\r
2447 UINT64 PlatformInterruptAckSet;\r
2448 UINT8 Reserved1[8];\r
2449 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2450 UINT64 CommandCompleteCheckMask;\r
2451 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2452 UINT64 CommandCompleteUpdatePreserve;\r
2453 UINT64 CommandCompleteUpdateSet;\r
2454 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2455 UINT64 ErrorStatusMask;\r
2456} EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2457\r
2458///\r
2459/// Type 4 Extended PCC Subspace Structure\r
2460///\r
2461typedef EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_4_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2462\r
2463#define EFI_ACPI_6_4_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2464\r
2465typedef struct {\r
2466 UINT32 Signature;\r
2467 UINT32 Flags;\r
2468 UINT32 Length;\r
2469 UINT32 Command;\r
2470} EFI_ACPI_6_4_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2471\r
7b17bcd9
CJ		 2472///\r
2473/// Type 5 HW Registers based Communications Subspace Structure\r
2474///\r
2475typedef struct {\r
2476 UINT8 Type;\r
2477 UINT8 Length;\r
2478 UINT16 Version;\r
2479 UINT64 BaseAddress;\r
2480 UINT64 SharedMemoryRangeLength;\r
2481 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2482 UINT64 DoorbellPreserve;\r
2483 UINT64 DoorbellWrite;\r
2484 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2485 UINT64 CommandCompleteCheckMask;\r
2486 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2487 UINT64 ErrorStatusMask;\r
2488 UINT32 NominalLatency;\r
2489 UINT32 MinimumRequestTurnaroundTime;\r
2490} EFI_ACPI_6_4_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;\r
2491\r
2492///\r
2493/// Reduced PCC Subspace Shared Memory Region\r
2494///\r
2495typedef struct {\r
2496 UINT32 Signature;\r
2497//UINT8 CommunicationSubspace[];\r
2498} EFI_6_4_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;\r
2499\r
5963ce5d
CJ		 2500///\r
2501/// Platform Debug Trigger Table (PDTT)\r
2502///\r
2503typedef struct {\r
2504 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2505 UINT8 TriggerCount;\r
2506 UINT8 Reserved[3];\r
2507 UINT32 TriggerIdentifierArrayOffset;\r
2508} EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2509\r
2510///\r
2511/// PDTT Revision (as defined in ACPI 6.4 spec.)\r
2512///\r
2513#define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2514\r
2515///\r
2516/// PDTT Platform Communication Channel Identifier Structure\r
2517///\r
2518typedef struct {\r
2519 UINT16 SubChannelIdentifer:8;\r
2520 UINT16 Runtime:1;\r
2521 UINT16 WaitForCompletion:1;\r
2522 UINT16 TriggerOrder:1;\r
2523 UINT16 Reserved:5;\r
2524} EFI_ACPI_6_4_PDTT_PCC_IDENTIFIER;\r
2525\r
2526///\r
2527/// PCC Commands Codes used by Platform Debug Trigger Table\r
2528///\r
2529#define EFI_ACPI_6_4_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2530#define EFI_ACPI_6_4_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2531\r
2532///\r
2533/// PDTT Platform Communication Channel\r
2534///\r
2535typedef EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_4_PDTT_PCC;\r
2536\r
2537///\r
2538/// Processor Properties Topology Table (PPTT)\r
2539///\r
2540typedef struct {\r
2541 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2542} EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2543\r
2544///\r
2545/// PPTT Revision (as defined in ACPI 6.4 spec.)\r
2546///\r
2547#define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02\r
2548\r
2549///\r
2550/// PPTT types\r
2551///\r
2552#define EFI_ACPI_6_4_PPTT_TYPE_PROCESSOR 0x00\r
2553#define EFI_ACPI_6_4_PPTT_TYPE_CACHE 0x01\r
2554#define EFI_ACPI_6_4_PPTT_TYPE_ID 0x02\r
2555\r
2556///\r
2557/// PPTT Structure Header\r
2558///\r
2559typedef struct {\r
2560 UINT8 Type;\r
2561 UINT8 Length;\r
2562 UINT8 Reserved[2];\r
2563} EFI_ACPI_6_4_PPTT_STRUCTURE_HEADER;\r
2564\r
2565///\r
2566/// For PPTT struct processor flags\r
2567///\r
2568#define EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL 0x0\r
2569#define EFI_ACPI_6_4_PPTT_PACKAGE_PHYSICAL 0x1\r
2570#define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID 0x0\r
2571#define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID 0x1\r
2572#define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD 0x0\r
2573#define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_THREAD 0x1\r
2574#define EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF 0x0\r
2575#define EFI_ACPI_6_4_PPTT_NODE_IS_LEAF 0x1\r
2576#define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0\r
2577#define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL 0x1\r
2578\r
2579///\r
2580/// Processor hierarchy node structure flags\r
2581///\r
2582typedef struct {\r
2583 UINT32 PhysicalPackage:1;\r
2584 UINT32 AcpiProcessorIdValid:1;\r
2585 UINT32 ProcessorIsAThread:1;\r
2586 UINT32 NodeIsALeaf:1;\r
2587 UINT32 IdenticalImplementation:1;\r
2588 UINT32 Reserved:27;\r
2589} EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2590\r
2591///\r
2592/// Processor hierarchy node structure\r
2593///\r
2594typedef struct {\r
2595 UINT8 Type;\r
2596 UINT8 Length;\r
2597 UINT8 Reserved[2];\r
2598 EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2599 UINT32 Parent;\r
2600 UINT32 AcpiProcessorId;\r
2601 UINT32 NumberOfPrivateResources;\r
2602} EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR;\r
2603\r
2604///\r
2605/// For PPTT struct cache flags\r
2606///\r
2607#define EFI_ACPI_6_4_PPTT_CACHE_SIZE_INVALID 0x0\r
2608#define EFI_ACPI_6_4_PPTT_CACHE_SIZE_VALID 0x1\r
2609#define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_INVALID 0x0\r
2610#define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_VALID 0x1\r
2611#define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_INVALID 0x0\r
2612#define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_VALID 0x1\r
2613#define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_INVALID 0x0\r
2614#define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_VALID 0x1\r
2615#define EFI_ACPI_6_4_PPTT_CACHE_TYPE_INVALID 0x0\r
2616#define EFI_ACPI_6_4_PPTT_CACHE_TYPE_VALID 0x1\r
2617#define EFI_ACPI_6_4_PPTT_WRITE_POLICY_INVALID 0x0\r
2618#define EFI_ACPI_6_4_PPTT_WRITE_POLICY_VALID 0x1\r
2619#define EFI_ACPI_6_4_PPTT_LINE_SIZE_INVALID 0x0\r
2620#define EFI_ACPI_6_4_PPTT_LINE_SIZE_VALID 0x1\r
2621\r
2622///\r
2623/// Cache Type Structure flags\r
2624///\r
2625typedef struct {\r
2626 UINT32 SizePropertyValid:1;\r
2627 UINT32 NumberOfSetsValid:1;\r
2628 UINT32 AssociativityValid:1;\r
2629 UINT32 AllocationTypeValid:1;\r
2630 UINT32 CacheTypeValid:1;\r
2631 UINT32 WritePolicyValid:1;\r
2632 UINT32 LineSizeValid:1;\r
2633 UINT32 Reserved:25;\r
2634} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS;\r
2635\r
2636///\r
2637/// For cache attributes\r
2638///\r
2639#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2640#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2641#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2642#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2643#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2644#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2645#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2646#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2647\r
2648///\r
2649/// Cache Type Structure cache attributes\r
2650///\r
2651typedef struct {\r
2652 UINT8 AllocationType:2;\r
2653 UINT8 CacheType:2;\r
2654 UINT8 WritePolicy:1;\r
2655 UINT8 Reserved:3;\r
2656} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2657\r
2658///\r
2659/// Cache Type Structure\r
2660///\r
2661typedef struct {\r
2662 UINT8 Type;\r
2663 UINT8 Length;\r
2664 UINT8 Reserved[2];\r
2665 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2666 UINT32 NextLevelOfCache;\r
2667 UINT32 Size;\r
2668 UINT32 NumberOfSets;\r
2669 UINT8 Associativity;\r
2670 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2671 UINT16 LineSize;\r
2672} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE;\r
2673\r
2674///\r
2675/// ID structure\r
2676///\r
2677typedef struct {\r
2678 UINT8 Type;\r
2679 UINT8 Length;\r
2680 UINT8 Reserved[2];\r
2681 UINT32 VendorId;\r
2682 UINT64 Level1Id;\r
2683 UINT64 Level2Id;\r
2684 UINT16 MajorRev;\r
2685 UINT16 MinorRev;\r
2686 UINT16 SpinRev;\r
2687} EFI_ACPI_6_4_PPTT_STRUCTURE_ID;\r
2688\r
2689//\r
2690// Known table signatures\r
2691//\r
2692\r
2693///\r
2694/// "RSD PTR " Root System Description Pointer\r
2695///\r
2696#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2697\r
2698///\r
2699/// "APIC" Multiple APIC Description Table\r
2700///\r
2701#define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2702\r
2703///\r
2704/// "BERT" Boot Error Record Table\r
2705///\r
2706#define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2707\r
2708///\r
2709/// "BGRT" Boot Graphics Resource Table\r
2710///\r
2711#define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2712\r
2713///\r
2714/// "CDIT" Component Distance Information Table\r
2715///\r
2716#define EFI_ACPI_6_4_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')\r
2717\r
2718///\r
2719/// "CPEP" Corrected Platform Error Polling Table\r
2720///\r
2721#define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2722\r
2723///\r
2724/// "CRAT" Component Resource Attribute Table\r
2725///\r
2726#define EFI_ACPI_6_4_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')\r
2727\r
2728///\r
2729/// "DSDT" Differentiated System Description Table\r
2730///\r
2731#define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2732\r
2733///\r
2734/// "ECDT" Embedded Controller Boot Resources Table\r
2735///\r
2736#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2737\r
2738///\r
2739/// "EINJ" Error Injection Table\r
2740///\r
2741#define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2742\r
2743///\r
2744/// "ERST" Error Record Serialization Table\r
2745///\r
2746#define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2747\r
2748///\r
2749/// "FACP" Fixed ACPI Description Table\r
2750///\r
2751#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2752\r
2753///\r
2754/// "FACS" Firmware ACPI Control Structure\r
2755///\r
2756#define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2757\r
2758///\r
2759/// "FPDT" Firmware Performance Data Table\r
2760///\r
2761#define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2762\r
2763///\r
2764/// "GTDT" Generic Timer Description Table\r
2765///\r
2766#define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2767\r
2768///\r
2769/// "HEST" Hardware Error Source Table\r
2770///\r
2771#define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2772\r
2773///\r
2774/// "HMAT" Heterogeneous Memory Attribute Table\r
2775///\r
2776#define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2777\r
2778///\r
2779/// "MPST" Memory Power State Table\r
2780///\r
2781#define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2782\r
2783///\r
2784/// "MSCT" Maximum System Characteristics Table\r
2785///\r
2786#define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2787\r
2788///\r
2789/// "NFIT" NVDIMM Firmware Interface Table\r
2790///\r
2791#define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2792\r
2793///\r
2794/// "PDTT" Platform Debug Trigger Table\r
2795///\r
2796#define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2797\r
2798///\r
2799/// "PMTT" Platform Memory Topology Table\r
2800///\r
2801#define EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2802\r
2803///\r
2804/// "PPTT" Processor Properties Topology Table\r
2805///\r
2806#define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2807\r
2808///\r
2809/// "PSDT" Persistent System Description Table\r
2810///\r
2811#define EFI_ACPI_6_4_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2812\r
2813///\r
2814/// "RASF" ACPI RAS Feature Table\r
2815///\r
2816#define EFI_ACPI_6_4_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2817\r
2818///\r
2819/// "RSDT" Root System Description Table\r
2820///\r
2821#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2822\r
2823///\r
2824/// "SBST" Smart Battery Specification Table\r
2825///\r
2826#define EFI_ACPI_6_4_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2827\r
2828///\r
2829/// "SDEV" Secure DEVices Table\r
2830///\r
2831#define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2832\r
2833///\r
2834/// "SLIT" System Locality Information Table\r
2835///\r
2836#define EFI_ACPI_6_4_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2837\r
2838///\r
2839/// "SRAT" System Resource Affinity Table\r
2840///\r
2841#define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2842\r
2843///\r
2844/// "SSDT" Secondary System Description Table\r
2845///\r
2846#define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2847\r
2848///\r
2849/// "XSDT" Extended System Description Table\r
2850///\r
2851#define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2852\r
2853///\r
2854/// "BOOT" MS Simple Boot Spec\r
2855///\r
2856#define EFI_ACPI_6_4_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2857\r
2858///\r
2859/// "CSRT" MS Core System Resource Table\r
2860///\r
2861#define EFI_ACPI_6_4_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2862\r
2863///\r
2864/// "DBG2" MS Debug Port 2 Spec\r
2865///\r
2866#define EFI_ACPI_6_4_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2867\r
2868///\r
2869/// "DBGP" MS Debug Port Spec\r
2870///\r
2871#define EFI_ACPI_6_4_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2872\r
2873///\r
2874/// "DMAR" DMA Remapping Table\r
2875///\r
2876#define EFI_ACPI_6_4_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2877\r
5963ce5d
CJ		 2878///\r
2879/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2880///\r
2881#define EFI_ACPI_6_4_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2882\r
2883///\r
2884/// "ETDT" Event Timer Description Table\r
2885///\r
2886#define EFI_ACPI_6_4_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2887\r
2888///\r
2889/// "HPET" IA-PC High Precision Event Timer Table\r
2890///\r
2891#define EFI_ACPI_6_4_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2892\r
2893///\r
2894/// "iBFT" iSCSI Boot Firmware Table\r
2895///\r
2896#define EFI_ACPI_6_4_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2897\r
2898///\r
2899/// "IORT" I/O Remapping Table\r
2900///\r
2901#define EFI_ACPI_6_4_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2902\r
2903///\r
2904/// "IVRS" I/O Virtualization Reporting Structure\r
2905///\r
2906#define EFI_ACPI_6_4_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2907\r
2908///\r
2909/// "LPIT" Low Power Idle Table\r
2910///\r
2911#define EFI_ACPI_6_4_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2912\r
2913///\r
2914/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2915///\r
2916#define EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2917\r
2918///\r
2919/// "MCHI" Management Controller Host Interface Table\r
2920///\r
2921#define EFI_ACPI_6_4_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2922\r
2923///\r
2924/// "MSDM" MS Data Management Table\r
2925///\r
2926#define EFI_ACPI_6_4_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2927\r
2928///\r
2929/// "PCCT" Platform Communications Channel Table\r
2930///\r
2931#define EFI_ACPI_6_4_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
2932\r
2933///\r
2934/// "SDEI" Software Delegated Exceptions Interface Table\r
2935///\r
2936#define EFI_ACPI_6_4_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
2937\r
2938///\r
2939/// "SLIC" MS Software Licensing Table Specification\r
2940///\r
2941#define EFI_ACPI_6_4_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2942\r
2943///\r
2944/// "SPCR" Serial Port Concole Redirection Table\r
2945///\r
2946#define EFI_ACPI_6_4_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2947\r
2948///\r
2949/// "SPMI" Server Platform Management Interface Table\r
2950///\r
2951#define EFI_ACPI_6_4_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2952\r
2953///\r
2954/// "STAO" _STA Override Table\r
2955///\r
2956#define EFI_ACPI_6_4_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2957\r
2958///\r
2959/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2960///\r
2961#define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2962\r
2963///\r
2964/// "TPM2" Trusted Computing Platform 1 Table\r
2965///\r
2966#define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2967\r
2968///\r
2969/// "UEFI" UEFI ACPI Data Table\r
2970///\r
2971#define EFI_ACPI_6_4_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2972\r
2973///\r
2974/// "WAET" Windows ACPI Emulated Devices Table\r
2975///\r
2976#define EFI_ACPI_6_4_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2977\r
2978///\r
2979/// "WDAT" Watchdog Action Table\r
2980///\r
2981#define EFI_ACPI_6_4_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2982\r
2983///\r
2984/// "WDRT" Watchdog Resource Table\r
2985///\r
2986#define EFI_ACPI_6_4_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2987\r
2988///\r
2989/// "WPBT" MS Platform Binary Table\r
2990///\r
2991#define EFI_ACPI_6_4_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2992\r
2993///\r
2994/// "WSMT" Windows SMM Security Mitigation Table\r
2995///\r
2996#define EFI_ACPI_6_4_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
2997\r
2998///\r
2999/// "XENV" Xen Project Table\r
3000///\r
3001#define EFI_ACPI_6_4_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
3002\r
3003#pragma pack()\r
3004\r
3005#endif\r
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