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1/** @file\r
2 ACPI Low Power Idle Table (LPIT) definitions\r
3\r
4 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13 @par Revision Reference:\r
14 - ACPI Low Power Idle Table (LPIT) Revision 001, dated July 2014\r
15 http://www.uefi.org/sites/default/files/resources/ACPI_Low_Power_Idle_Table.pdf\r
16\r
17 @par Glossary:\r
18 - GAS - Generic Address Structure\r
19 - LPI - Low Power Idle\r
20**/\r
21#ifndef _LOW_POWER_IDLE_TABLE_H_\r
22#define _LOW_POWER_IDLE_TABLE_H_\r
23\r
24#include <IndustryStandard/Acpi.h>\r
25\r
26#pragma pack(1)\r
27\r
28///\r
29/// LPI Structure Types\r
30///\r
31#define ACPI_LPI_STRUCTURE_TYPE_NATIVE_CSTATE 0x00\r
32\r
33///\r
34/// Low Power Idle (LPI) State Flags\r
35///\r
36typedef union {\r
37 struct {\r
38 UINT32 Disabled : 1; ///< If set, LPI state is not used\r
39 /**\r
40 If set, Residency counter is not available for this LPI state and\r
41 Residency Counter Frequency is invalid\r
42 **/\r
43 UINT32 CounterUnavailable : 1;\r
44 UINT32 Reserved : 30; ///< Reserved for future use. Must be zero\r
45 } Bits;\r
46 UINT32 Data32;\r
47} ACPI_LPI_STATE_FLAGS;\r
48\r
49///\r
50/// Low Power Idle (LPI) structure with Native C-state instruction entry trigger descriptor\r
51///\r
52typedef struct {\r
53 UINT32 Type; ///< LPI State descriptor Type 0\r
54 UINT32 Length; ///< Length of LPI state Descriptor Structure\r
55 ///\r
56 /// Unique LPI state identifier: zero based, monotonically increasing identifier\r
57 ///\r
58 UINT16 UniqueId;\r
59 UINT8 Reserved[2]; ///< Must be Zero\r
60 ACPI_LPI_STATE_FLAGS Flags; ///< LPI state flags\r
61 /**\r
62 The LPI entry trigger, matching an existing _CST.Register object, represented as a\r
63 Generic Address Structure. All processors must request this state or deeper to trigger.\r
64 **/\r
65 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EntryTrigger;\r
66 UINT32 Residency; ///< Minimum residency or break-even in uSec\r
67 UINT32 Latency; ///< Worst case exit latency in uSec\r
68 /**\r
69 [optional] Residency counter, represented as a Generic Address Structure.\r
70 If not present, Flags[1] bit should be set.\r
71 **/\r
72 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResidencyCounter;\r
73 /**\r
74 [optional] Residency counter frequency in cycles per second. Value 0 indicates that\r
75 counter runs at TSC frequency. Valid only if Residency Counter is present.\r
76 **/\r
77 UINT64 ResidencyCounterFrequency;\r
78} ACPI_LPI_NATIVE_CSTATE_DESCRIPTOR;\r
79\r
80#pragma pack()\r
81\r
82#endif\r