projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| cbedba86 RN |
1 | /** @file\r |
| 2 | Support for the PCI Express 3.1 standard.\r | |
| 3 | \r | |
| 4 | This header file may not define all structures. Please extend as required.\r | |
| 5 | \r | |
| 6 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 7 | This program and the accompanying materials\r | |
| 8 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 9 | which accompanies this distribution. The full text of the license may be found at\r | |
| 10 | http://opensource.org/licenses/bsd-license.php\r | |
| 11 | \r | |
| 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 14 | \r | |
| 15 | **/\r | |
| 16 | \r | |
| 17 | #ifndef _PCIEXPRESS31_H_\r | |
| 18 | #define _PCIEXPRESS31_H_\r | |
| 19 | \r | |
| 20 | #include <IndustryStandard/PciExpress30.h>\r | |
| 21 | \r | |
| 22 | #pragma pack(1)\r | |
| 23 | \r | |
| 24 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_L1_PM_SUBSTATES_ID 0x001E\r | |
| 25 | #define PCI_EXPRESS_EXTENDED_CAPABILITY_L1_PM_SUBSTATES_VER1 0x1\r | |
| 26 | \r | |
| 27 | typedef union {\r | |
| 28 | struct {\r | |
| 29 | UINT32 PciPmL12 : 1;\r | |
| 30 | UINT32 PciPmL11 : 1;\r | |
| 31 | UINT32 AspmL12 : 1;\r | |
| 32 | UINT32 AspmL11 : 1;\r | |
| 33 | UINT32 L1PmSubstates : 1;\r | |
| 34 | UINT32 Reserved : 3;\r | |
| 35 | UINT32 CommonModeRestoreTime : 8;\r | |
| 36 | UINT32 TPowerOnScale : 2;\r | |
| 37 | UINT32 Reserved2 : 1;\r | |
| 38 | UINT32 TPowerOnValue : 5;\r | |
| 39 | UINT32 Reserved3 : 8;\r | |
| 40 | } Bits;\r | |
| 41 | UINT32 Uint32;\r | |
| 42 | } PCI_EXPRESS_REG_L1_PM_SUBSTATES_CAPABILITY;\r | |
| 43 | \r | |
| 44 | typedef union {\r | |
| 45 | struct {\r | |
| 46 | UINT32 PciPmL12 : 1;\r | |
| 47 | UINT32 PciPmL11 : 1;\r | |
| 48 | UINT32 AspmL12 : 1;\r | |
| 49 | UINT32 AspmL11 : 1;\r | |
| 50 | UINT32 Reserved : 4;\r | |
| 51 | UINT32 CommonModeRestoreTime : 8;\r | |
| 52 | UINT32 LtrL12ThresholdValue : 10;\r | |
| 53 | UINT32 Reserved2 : 3;\r | |
| 54 | UINT32 LtrL12ThresholdScale : 3;\r | |
| 55 | } Bits;\r | |
| 56 | UINT32 Uint32;\r | |
| 57 | } PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL1;\r | |
| 58 | \r | |
| 59 | typedef union {\r | |
| 60 | struct {\r | |
| 61 | UINT32 TPowerOnScale : 2;\r | |
| 62 | UINT32 Reserved : 1;\r | |
| 63 | UINT32 TPowerOnValue : 5;\r | |
| 64 | UINT32 Reserved2 : 24;\r | |
| 65 | } Bits;\r | |
| 66 | UINT32 Uint32;\r | |
| 67 | } PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL2;\r | |
| 68 | \r | |
| 69 | typedef struct {\r | |
| 70 | PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;\r | |
| 71 | PCI_EXPRESS_REG_L1_PM_SUBSTATES_CAPABILITY Capability;\r | |
| 72 | PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL1 Control1;\r | |
| 73 | PCI_EXPRESS_REG_L1_PM_SUBSTATES_CONTROL2 Control2;\r | |
| 74 | } PCI_EXPRESS_EXTENDED_CAPABILITIES_L1_PM_SUBSTATES;\r | |
| 75 | \r | |
| 76 | #pragma pack()\r | |
| 77 | \r | |
| 78 | #endif\r |