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Fix a wrong doxygen comment tag usage of ///>. The correct one is ///<.
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / SmBios.h
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a7ed1e2e 1/** @file\r
4135253b 2 Industry Standard Definitions of SMBIOS Table Specification v2.6\r
a7ed1e2e 3\r
98cb9ae8 4 Copyright (c) 2006 - 2009, Intel Corporation All rights\r
a7ed1e2e 5 reserved. This program and the accompanying materials are\r
6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
a7ed1e2e 13**/\r
14\r
15#ifndef __SMBIOS_STANDARD_H__\r
16#define __SMBIOS_STANDARD_H__\r
98cb9ae8 17\r
4135253b 18///\r
19/// Smbios Table Entry Point Structure\r
20///\r
766f4bc1 21#pragma pack(1)\r
a7ed1e2e 22typedef struct {\r
23 UINT8 AnchorString[4];\r
24 UINT8 EntryPointStructureChecksum;\r
25 UINT8 EntryPointLength;\r
26 UINT8 MajorVersion;\r
27 UINT8 MinorVersion;\r
28 UINT16 MaxStructureSize;\r
29 UINT8 EntryPointRevision;\r
30 UINT8 FormattedArea[5];\r
31 UINT8 IntermediateAnchorString[5];\r
32 UINT8 IntermediateChecksum;\r
33 UINT16 TableLength;\r
34 UINT32 TableAddress;\r
35 UINT16 NumberOfSmbiosStructures;\r
36 UINT8 SmbiosBcdRevision;\r
37} SMBIOS_TABLE_ENTRY_POINT;\r
38\r
ec8432e5 39///\r
40/// The Smbios structure header\r
41///\r
a7ed1e2e 42typedef struct {\r
43 UINT8 Type;\r
44 UINT8 Length;\r
45 UINT16 Handle;\r
46} SMBIOS_STRUCTURE;\r
47\r
bf7ea009 48///\r
49/// String Number for a Null terminated string, 00h stands for no string available.\r
50///\r
61ce5861 51typedef UINT8 SMBIOS_TABLE_STRING;\r
52\r
98cb9ae8 53///\r
54/// BIOS Characteristics \r
55/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. \r
56///\r
57typedef struct {\r
6800ac83 58 UINT32 Reserved :2; ///< Bits 0-1\r
98cb9ae8 59 UINT32 Unknown :1; \r
60 UINT32 BiosCharacteristicsNotSupported :1; \r
61 UINT32 IsaIsSupported :1; \r
62 UINT32 McaIsSupported :1;\r
63 UINT32 EisaIsSupported :1;\r
64 UINT32 PciIsSupported :1;\r
65 UINT32 PcmciaIsSupported :1;\r
66 UINT32 PlugAndPlayIsSupported :1;\r
67 UINT32 ApmIsSupported :1;\r
68 UINT32 BiosIsUpgradable :1;\r
69 UINT32 BiosShadowingAllowed :1;\r
70 UINT32 VlVesaIsSupported :1;\r
71 UINT32 EscdSupportIsAvailable :1;\r
72 UINT32 BootFromCdIsSupported :1;\r
73 UINT32 SelectableBootIsSupported :1;\r
74 UINT32 RomBiosIsSocketed :1;\r
75 UINT32 BootFromPcmciaIsSupported :1;\r
76 UINT32 EDDSpecificationIsSupported :1;\r
77 UINT32 JapaneseNecFloppyIsSupported :1;\r
78 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
79 UINT32 Floppy525_360IsSupported :1;\r
80 UINT32 Floppy525_12IsSupported :1;\r
81 UINT32 Floppy35_720IsSupported :1;\r
82 UINT32 Floppy35_288IsSupported :1;\r
83 UINT32 PrintScreenIsSupported :1;\r
84 UINT32 Keyboard8042IsSupported :1;\r
85 UINT32 SerialIsSupported :1;\r
86 UINT32 PrinterIsSupported :1;\r
87 UINT32 CgaMonoIsSupported :1;\r
88 UINT32 NecPc98 :1;\r
6800ac83 89 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
90 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 91} MISC_BIOS_CHARACTERISTICS;\r
92\r
93///\r
94/// BIOS Characteristics Extension Byte 1 \r
95/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h \r
96/// within the BIOS Information structure.\r
97///\r
98typedef struct {\r
99 UINT8 AcpiIsSupported :1;\r
100 UINT8 UsbLegacyIsSupported :1; \r
101 UINT8 AgpIsSupported :1; \r
102 UINT8 I20BootIsSupported :1;\r
103 UINT8 Ls120BootIsSupported :1;\r
104 UINT8 AtapiZipDriveBootIsSupported :1;\r
105 UINT8 Boot1394IsSupported :1;\r
106 UINT8 SmartBatteryIsSupported :1;\r
107} MBCE_BIOS_RESERVED;\r
108\r
109///\r
110/// BIOS Characteristics Extension Byte 2\r
111/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h \r
112/// within the BIOS Information structure.\r
113///\r
114typedef struct {\r
115 UINT8 BiosBootSpecIsSupported :1;\r
116 UINT8 FunctionKeyNetworkBootIsSupported :1; \r
117 UINT8 TargetContentDistributionEnabled :1; \r
6800ac83 118 UINT8 ExtensionByte2Reserved :1;\r
98cb9ae8 119} MBCE_SYSTEM_RESERVED;\r
120\r
121///\r
122/// BIOS Characteristics Extension Bytes\r
123///\r
124typedef struct {\r
125 MBCE_BIOS_RESERVED BiosReserved;\r
126 MBCE_SYSTEM_RESERVED SystemReserved;\r
127 UINT8 Reserved;\r
128} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
129\r
4135253b 130///\r
131/// BIOS Information (Type 0)\r
132///\r
61ce5861 133typedef struct {\r
98cb9ae8 134 SMBIOS_STRUCTURE Hdr;\r
135 SMBIOS_TABLE_STRING Vendor;\r
136 SMBIOS_TABLE_STRING BiosVersion;\r
137 UINT16 BiosSegment;\r
138 SMBIOS_TABLE_STRING BiosReleaseDate;\r
139 UINT8 BiosSize;\r
140 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
141 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
142 UINT8 SystemBiosMajorRelease;\r
143 UINT8 SystemBiosMinorRelease;\r
144 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
145 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
61ce5861 146} SMBIOS_TABLE_TYPE0;\r
147\r
98cb9ae8 148///\r
149/// System Wake-up Type \r
150///\r
151typedef enum { \r
152 SystemWakeupTypeReserved = 0x00,\r
153 SystemWakeupTypeOther = 0x01,\r
154 SystemWakeupTypeUnknown = 0x02,\r
155 SystemWakeupTypeApmTimer = 0x03,\r
156 SystemWakeupTypeModemRing = 0x04,\r
157 SystemWakeupTypeLanRemote = 0x05,\r
158 SystemWakeupTypePowerSwitch = 0x06,\r
159 SystemWakeupTypePciPme = 0x07,\r
160 SystemWakeupTypeAcPowerRestored = 0x08\r
161} MISC_SYSTEM_WAKEUP_TYPE;\r
162\r
4135253b 163///\r
164/// System Information (Type 1)\r
98cb9ae8 165/// \r
166/// The information in this structure defines attributes of the overall system and is \r
167/// intended to be associated with the Component ID group of the system's MIF.\r
168/// An SMBIOS implementation is associated with a single system instance and contains \r
169/// one and only one System Information (Type 1) structure.\r
4135253b 170///\r
61ce5861 171typedef struct {\r
98cb9ae8 172 SMBIOS_STRUCTURE Hdr;\r
173 SMBIOS_TABLE_STRING Manufacturer;\r
174 SMBIOS_TABLE_STRING ProductName;\r
175 SMBIOS_TABLE_STRING Version;\r
176 SMBIOS_TABLE_STRING SerialNumber;\r
177 GUID Uuid;\r
2d5e30ef 178 UINT8 WakeUpType; ///< enumeration value from MISC_SYSTEM_WAKEUP_TYPE\r
98cb9ae8 179 SMBIOS_TABLE_STRING SKUNumber;\r
180 SMBIOS_TABLE_STRING Family;\r
61ce5861 181} SMBIOS_TABLE_TYPE1;\r
182\r
98cb9ae8 183///\r
1f9f8414 184/// Base Board - Feature Flags \r
98cb9ae8 185///\r
186typedef struct {\r
187 UINT8 Motherboard :1;\r
188 UINT8 RequiresDaughterCard :1;\r
189 UINT8 Removable :1;\r
190 UINT8 Replaceable :1;\r
191 UINT8 HotSwappable :1;\r
192 UINT8 Reserved :3;\r
193} BASE_BOARD_FEATURE_FLAGS;\r
194\r
195///\r
1f9f8414 196/// Base Board - Board Type\r
98cb9ae8 197///\r
198typedef enum { \r
199 BaseBoardTypeUnknown = 0x1,\r
200 BaseBoardTypeOther = 0x2,\r
201 BaseBoardTypeServerBlade = 0x3,\r
202 BaseBoardTypeConnectivitySwitch = 0x4,\r
203 BaseBoardTypeSystemManagementModule = 0x5,\r
204 BaseBoardTypeProcessorModule = 0x6,\r
205 BaseBoardTypeIOModule = 0x7,\r
206 BaseBoardTypeMemoryModule = 0x8,\r
207 BaseBoardTypeDaughterBoard = 0x9,\r
208 BaseBoardTypeMotherBoard = 0xA,\r
209 BaseBoardTypeProcessorMemoryModule = 0xB,\r
210 BaseBoardTypeProcessorIOModule = 0xC,\r
211 BaseBoardTypeInterconnectBoard = 0xD\r
212} BASE_BOARD_TYPE;\r
213\r
4135253b 214///\r
215/// Base Board (or Module) Information (Type 2)\r
216///\r
1f9f8414 217/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 218/// for example a motherboard, planar, or server blade or other standard system module.\r
219///\r
61ce5861 220typedef struct {\r
98cb9ae8 221 SMBIOS_STRUCTURE Hdr;\r
222 SMBIOS_TABLE_STRING Manufacturer;\r
223 SMBIOS_TABLE_STRING ProductName;\r
224 SMBIOS_TABLE_STRING Version;\r
225 SMBIOS_TABLE_STRING SerialNumber;\r
226 SMBIOS_TABLE_STRING AssetTag;\r
227 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
228 SMBIOS_TABLE_STRING LocationInChassis;\r
229 UINT16 ChassisHandle;\r
2d5e30ef 230 UINT8 BoardType; ///< enumeration value from BASE_BOARD_TYPE\r
98cb9ae8 231 UINT8 NumberOfContainedObjectHandles;\r
232 UINT16 ContainedObjectHandles[1];\r
61ce5861 233} SMBIOS_TABLE_TYPE2;\r
234\r
98cb9ae8 235///\r
236/// System Enclosure or Chassis Types\r
237///\r
238typedef enum { \r
239 MiscChassisTypeOther = 0x01,\r
240 MiscChassisTypeUnknown = 0x02,\r
241 MiscChassisTypeDeskTop = 0x03,\r
242 MiscChassisTypeLowProfileDesktop = 0x04,\r
243 MiscChassisTypePizzaBox = 0x05,\r
244 MiscChassisTypeMiniTower = 0x06,\r
245 MiscChassisTypeTower = 0x07,\r
246 MiscChassisTypePortable = 0x08,\r
247 MiscChassisTypeLapTop = 0x09,\r
248 MiscChassisTypeNotebook = 0x0A,\r
249 MiscChassisTypeHandHeld = 0x0B,\r
250 MiscChassisTypeDockingStation = 0x0C,\r
251 MiscChassisTypeAllInOne = 0x0D,\r
252 MiscChassisTypeSubNotebook = 0x0E,\r
253 MiscChassisTypeSpaceSaving = 0x0F,\r
254 MiscChassisTypeLunchBox = 0x10,\r
255 MiscChassisTypeMainServerChassis = 0x11,\r
256 MiscChassisTypeExpansionChassis = 0x12,\r
257 MiscChassisTypeSubChassis = 0x13,\r
258 MiscChassisTypeBusExpansionChassis = 0x14,\r
259 MiscChassisTypePeripheralChassis = 0x15,\r
260 MiscChassisTypeRaidChassis = 0x16,\r
261 MiscChassisTypeRackMountChassis = 0x17,\r
262 MiscChassisTypeSealedCasePc = 0x18,\r
263 MiscChassisMultiSystemChassis = 0x19,\r
264 MiscChassisCompactPCI = 0x1A,\r
265 MiscChassisAdvancedTCA = 0x1B,\r
266 MiscChassisBlade = 0x1C,\r
267 MiscChassisBladeEnclosure = 0x1D\r
268} MISC_CHASSIS_TYPE;\r
269\r
270///\r
271/// System Enclosure or Chassis States \r
272///\r
273typedef enum { \r
274 ChassisStateOther = 0x01,\r
275 ChassisStateUnknown = 0x02,\r
276 ChassisStateSafe = 0x03,\r
277 ChassisStateWarning = 0x04,\r
278 ChassisStateCritical = 0x05,\r
279 ChassisStateNonRecoverable = 0x06\r
280} MISC_CHASSIS_STATE;\r
281\r
282///\r
283/// System Enclosure or Chassis Security Status \r
284///\r
285typedef enum { \r
286 ChassisSecurityStatusOther = 0x01,\r
287 ChassisSecurityStatusUnknown = 0x02,\r
288 ChassisSecurityStatusNone = 0x03,\r
289 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
290 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
291} MISC_CHASSIS_SECURITY_STATE;\r
292\r
bf7ea009 293///\r
294/// Contained Element record\r
295///\r
61ce5861 296typedef struct {\r
297 UINT8 ContainedElementType;\r
298 UINT8 ContainedElementMinimum;\r
299 UINT8 ContainedElementMaximum;\r
300} CONTAINED_ELEMENT;\r
301\r
98cb9ae8 302\r
4135253b 303///\r
304/// System Enclosure or Chassis (Type 3)\r
305///\r
98cb9ae8 306/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
307/// For example, if a system included a separate enclosure for its peripheral devices, \r
308/// two structures would be returned: one for the main, system enclosure and the second for\r
309/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
310/// support the population of the CIM_Chassis class. \r
311///\r
61ce5861 312typedef struct {\r
98cb9ae8 313 SMBIOS_STRUCTURE Hdr;\r
314 SMBIOS_TABLE_STRING Manufacturer;\r
315 UINT8 Type;\r
316 SMBIOS_TABLE_STRING Version;\r
317 SMBIOS_TABLE_STRING SerialNumber;\r
318 SMBIOS_TABLE_STRING AssetTag;\r
2d5e30ef 319 UINT8 BootupState; ///< enumeration value from MISC_CHASSIS_STATE\r
320 UINT8 PowerSupplyState; ///< enumeration value from MISC_CHASSIS_STATE\r
321 UINT8 ThermalState; ///< enumeration value from MISC_CHASSIS_STATE\r
322 UINT8 SecurityStatus; ///< enumeration value from MISC_CHASSIS_SECURITY_STATE\r
98cb9ae8 323 UINT8 OemDefined[4];\r
324 UINT8 Height;\r
325 UINT8 NumberofPowerCords;\r
326 UINT8 ContainedElementCount;\r
327 UINT8 ContainedElementRecordLength;\r
328 CONTAINED_ELEMENT ContainedElements[1];\r
61ce5861 329} SMBIOS_TABLE_TYPE3;\r
330\r
98cb9ae8 331///\r
332/// Processor Information - Processor Type\r
333///\r
334typedef enum {\r
335 ProcessorOther = 0x01,\r
336 ProcessorUnknown = 0x02,\r
337 CentralProcessor = 0x03,\r
338 MathProcessor = 0x04,\r
339 DspProcessor = 0x05,\r
340 VideoProcessor = 0x06\r
341} PROCESSOR_TYPE_DATA;\r
342\r
343///\r
344/// Processor Information - Processor Family\r
345///\r
346typedef enum {\r
347 ProcessorFamilyOther = 0x01, \r
348 ProcessorFamilyUnknown = 0x02,\r
349 ProcessorFamily8086 = 0x03, \r
350 ProcessorFamily80286 = 0x04,\r
351 ProcessorFamilyIntel386 = 0x05, \r
352 ProcessorFamilyIntel486 = 0x06,\r
353 ProcessorFamily8087 = 0x07,\r
354 ProcessorFamily80287 = 0x08,\r
355 ProcessorFamily80387 = 0x09, \r
356 ProcessorFamily80487 = 0x0A,\r
357 ProcessorFamilyPentium = 0x0B, \r
358 ProcessorFamilyPentiumPro = 0x0C,\r
359 ProcessorFamilyPentiumII = 0x0D,\r
360 ProcessorFamilyPentiumMMX = 0x0E,\r
361 ProcessorFamilyCeleron = 0x0F,\r
362 ProcessorFamilyPentiumIIXeon = 0x10,\r
363 ProcessorFamilyPentiumIII = 0x11, \r
364 ProcessorFamilyM1 = 0x12,\r
365 ProcessorFamilyM2 = 0x13,\r
366 ProcessorFamilyM1Reserved2 = 0x14,\r
367 ProcessorFamilyM1Reserved3 = 0x15,\r
368 ProcessorFamilyM1Reserved4 = 0x16,\r
369 ProcessorFamilyM1Reserved5 = 0x17,\r
370 ProcessorFamilyAmdDuron = 0x18,\r
371 ProcessorFamilyK5 = 0x19, \r
372 ProcessorFamilyK6 = 0x1A,\r
373 ProcessorFamilyK6_2 = 0x1B,\r
374 ProcessorFamilyK6_3 = 0x1C,\r
375 ProcessorFamilyAmdAthlon = 0x1D,\r
376 ProcessorFamilyAmd29000 = 0x1E,\r
377 ProcessorFamilyK6_2Plus = 0x1F,\r
378 ProcessorFamilyPowerPC = 0x20,\r
379 ProcessorFamilyPowerPC601 = 0x21,\r
380 ProcessorFamilyPowerPC603 = 0x22,\r
381 ProcessorFamilyPowerPC603Plus = 0x23,\r
382 ProcessorFamilyPowerPC604 = 0x24,\r
383 ProcessorFamilyPowerPC620 = 0x25,\r
384 ProcessorFamilyPowerPCx704 = 0x26,\r
385 ProcessorFamilyPowerPC750 = 0x27,\r
386 ProcessorFamilyAlpha3 = 0x30,\r
387 ProcessorFamilyAlpha21064 = 0x31,\r
388 ProcessorFamilyAlpha21066 = 0x32,\r
389 ProcessorFamilyAlpha21164 = 0x33,\r
390 ProcessorFamilyAlpha21164PC = 0x34,\r
391 ProcessorFamilyAlpha21164a = 0x35,\r
392 ProcessorFamilyAlpha21264 = 0x36,\r
393 ProcessorFamilyAlpha21364 = 0x37,\r
394 ProcessorFamilyMips = 0x40,\r
395 ProcessorFamilyMIPSR4000 = 0x41,\r
396 ProcessorFamilyMIPSR4200 = 0x42,\r
397 ProcessorFamilyMIPSR4400 = 0x43,\r
398 ProcessorFamilyMIPSR4600 = 0x44,\r
399 ProcessorFamilyMIPSR10000 = 0x45,\r
400 ProcessorFamilySparc = 0x50,\r
401 ProcessorFamilySuperSparc = 0x51,\r
402 ProcessorFamilymicroSparcII = 0x52,\r
403 ProcessorFamilymicroSparcIIep = 0x53,\r
404 ProcessorFamilyUltraSparc = 0x54,\r
405 ProcessorFamilyUltraSparcII = 0x55,\r
406 ProcessorFamilyUltraSparcIIi = 0x56,\r
407 ProcessorFamilyUltraSparcIII = 0x57,\r
408 ProcessorFamilyUltraSparcIIIi = 0x58,\r
409 ProcessorFamily68040 = 0x60,\r
410 ProcessorFamily68xxx = 0x61,\r
411 ProcessorFamily68000 = 0x62,\r
412 ProcessorFamily68010 = 0x63,\r
413 ProcessorFamily68020 = 0x64,\r
414 ProcessorFamily68030 = 0x65,\r
415 ProcessorFamilyHobbit = 0x70,\r
416 ProcessorFamilyCrusoeTM5000 = 0x78,\r
417 ProcessorFamilyCrusoeTM3000 = 0x79,\r
418 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
419 ProcessorFamilyWeitek = 0x80,\r
420 ProcessorFamilyItanium = 0x82,\r
421 ProcessorFamilyAmdAthlon64 = 0x83,\r
422 ProcessorFamilyAmdOpteron = 0x84,\r
423 ProcessorFamilyAmdSempron = 0x85,\r
424 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
425 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
426 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
427 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
428 ProcessorFamilyPARISC = 0x90,\r
429 ProcessorFamilyPaRisc8500 = 0x91,\r
430 ProcessorFamilyPaRisc8000 = 0x92,\r
431 ProcessorFamilyPaRisc7300LC = 0x93,\r
432 ProcessorFamilyPaRisc7200 = 0x94,\r
433 ProcessorFamilyPaRisc7100LC = 0x95,\r
434 ProcessorFamilyPaRisc7100 = 0x96,\r
435 ProcessorFamilyV30 = 0xA0,\r
436 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
437 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
438 ProcessorFamilyPentium4 = 0xB2,\r
439 ProcessorFamilyIntelXeon = 0xB3,\r
440 ProcessorFamilyAS400 = 0xB4,\r
441 ProcessorFamilyIntelXeonMP = 0xB5,\r
442 ProcessorFamilyAMDAthlonXP = 0xB6,\r
443 ProcessorFamilyAMDAthlonMP = 0xB7,\r
444 ProcessorFamilyIntelItanium2 = 0xB8,\r
445 ProcessorFamilyIntelPentiumM = 0xB9,\r
446 ProcessorFamilyIntelCeleronD = 0xBA,\r
447 ProcessorFamilyIntelPentiumD = 0xBB,\r
448 ProcessorFamilyIntelPentiumEx = 0xBC,\r
6800ac83 449 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r
98cb9ae8 450 ProcessorFamilyReserved = 0xBE,\r
451 ProcessorFamilyIntelCore2 = 0xBF,\r
452 ProcessorFamilyIBM390 = 0xC8,\r
453 ProcessorFamilyG4 = 0xC9,\r
454 ProcessorFamilyG5 = 0xCA,\r
455 ProcessorFamilyG6 = 0xCB,\r
456 ProcessorFamilyzArchitectur = 0xCC,\r
457 ProcessorFamilyViaC7M = 0xD2,\r
458 ProcessorFamilyViaC7D = 0xD3,\r
459 ProcessorFamilyViaC7 = 0xD4,\r
460 ProcessorFamilyViaEden = 0xD5,\r
461 ProcessorFamilyi860 = 0xFA,\r
462 ProcessorFamilyi960 = 0xFB,\r
463 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
464 ProcessorFamilyReserved1 = 0xFF\r
465} PROCESSOR_FAMILY_DATA;\r
466\r
467///\r
1f9f8414 468/// Processor Information - Voltage \r
98cb9ae8 469///\r
470typedef struct {\r
6800ac83 471 UINT8 ProcessorVoltageCapability5V :1; \r
472 UINT8 ProcessorVoltageCapability3_3V :1; \r
473 UINT8 ProcessorVoltageCapability2_9V :1; \r
474 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
475 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
476 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 477} PROCESSOR_VOLTAGE;\r
478\r
479///\r
480/// Processor Information - Processor Upgrade \r
481///\r
482typedef enum {\r
483 ProcessorUpgradeOther = 0x01,\r
484 ProcessorUpgradeUnknown = 0x02,\r
485 ProcessorUpgradeDaughterBoard = 0x03,\r
486 ProcessorUpgradeZIFSocket = 0x04,\r
6800ac83 487 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable\r
98cb9ae8 488 ProcessorUpgradeNone = 0x06,\r
489 ProcessorUpgradeLIFSocket = 0x07,\r
490 ProcessorUpgradeSlot1 = 0x08,\r
491 ProcessorUpgradeSlot2 = 0x09,\r
492 ProcessorUpgrade370PinSocket = 0x0A,\r
493 ProcessorUpgradeSlotA = 0x0B,\r
494 ProcessorUpgradeSlotM = 0x0C,\r
495 ProcessorUpgradeSocket423 = 0x0D,\r
6800ac83 496 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462\r
98cb9ae8 497 ProcessorUpgradeSocket478 = 0x0F,\r
498 ProcessorUpgradeSocket754 = 0x10,\r
499 ProcessorUpgradeSocket940 = 0x11,\r
500 ProcessorUpgradeSocket939 = 0x12,\r
501 ProcessorUpgradeSocketmPGA604 = 0x13,\r
502 ProcessorUpgradeSocketLGA771 = 0x14,\r
503 ProcessorUpgradeSocketLGA775 = 0x15,\r
504 ProcessorUpgradeSocketS1 = 0x16,\r
505 ProcessorUpgradeAM2 = 0x17,\r
506 ProcessorUpgradeF1207 = 0x18\r
507} PROCESSOR_UPGRADE;\r
508\r
509///\r
510/// Processor ID Field Description\r
511///\r
512typedef struct {\r
513 UINT32 ProcessorSteppingId:4;\r
514 UINT32 ProcessorModel: 4;\r
515 UINT32 ProcessorFamily: 4;\r
516 UINT32 ProcessorType: 2;\r
517 UINT32 ProcessorReserved1: 2;\r
518 UINT32 ProcessorXModel: 4;\r
519 UINT32 ProcessorXFamily: 8;\r
520 UINT32 ProcessorReserved2: 4;\r
521} PROCESSOR_SIGNATURE;\r
522\r
98cb9ae8 523typedef struct {\r
524 UINT32 ProcessorFpu :1;\r
525 UINT32 ProcessorVme :1;\r
526 UINT32 ProcessorDe :1;\r
527 UINT32 ProcessorPse :1;\r
528 UINT32 ProcessorTsc :1;\r
529 UINT32 ProcessorMsr :1;\r
530 UINT32 ProcessorPae :1;\r
531 UINT32 ProcessorMce :1;\r
532 UINT32 ProcessorCx8 :1;\r
533 UINT32 ProcessorApic :1;\r
534 UINT32 ProcessorReserved1 :1;\r
535 UINT32 ProcessorSep :1;\r
536 UINT32 ProcessorMtrr :1;\r
537 UINT32 ProcessorPge :1;\r
538 UINT32 ProcessorMca :1;\r
539 UINT32 ProcessorCmov :1;\r
540 UINT32 ProcessorPat :1;\r
541 UINT32 ProcessorPse36 :1;\r
542 UINT32 ProcessorPsn :1;\r
543 UINT32 ProcessorClfsh :1;\r
544 UINT32 ProcessorReserved2 :1;\r
545 UINT32 ProcessorDs :1;\r
546 UINT32 ProcessorAcpi :1;\r
547 UINT32 ProcessorMmx :1;\r
548 UINT32 ProcessorFxsr :1;\r
549 UINT32 ProcessorSse :1;\r
550 UINT32 ProcessorSse2 :1;\r
551 UINT32 ProcessorSs :1;\r
552 UINT32 ProcessorReserved3 :1;\r
553 UINT32 ProcessorTm :1;\r
554 UINT32 ProcessorReserved4 :2;\r
555} PROCESSOR_FEATURE_FLAGS;\r
556\r
557typedef struct {\r
558 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 559 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 560} PROCESSOR_ID_DATA;\r
98cb9ae8 561\r
4135253b 562///\r
563/// Processor Information (Type 4)\r
564///\r
98cb9ae8 565/// The information in this structure defines the attributes of a single processor; \r
566/// a separate structure instance is provided for each system processor socket/slot. \r
567/// For example, a system with an IntelDX2 processor would have a single \r
568/// structure instance while a system with an IntelSX2 processor would have a structure\r
569/// to describe the main CPU and a second structure to describe the 80487 co-processor. \r
570///\r
61ce5861 571typedef struct { \r
572 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 573 SMBIOS_TABLE_STRING Socket;\r
574 UINT8 ProcessorType; ///< enumeration value from PROCESSOR_TYPE_DATA\r
575 UINT8 ProcessorFamily; ///< enumeration value from PROCESSOR_FAMILY_DATA\r
61ce5861 576 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 577 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 578 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 579 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 580 UINT16 ExternalClock;\r
581 UINT16 MaxSpeed;\r
582 UINT16 CurrentSpeed;\r
583 UINT8 Status;\r
2d5e30ef 584 UINT8 ProcessorUpgrade; ///< enumeration value from PROCESSOR_UPGRADE\r
61ce5861 585 UINT16 L1CacheHandle;\r
586 UINT16 L2CacheHandle;\r
587 UINT16 L3CacheHandle;\r
588 SMBIOS_TABLE_STRING SerialNumber;\r
589 SMBIOS_TABLE_STRING AssetTag;\r
590 SMBIOS_TABLE_STRING PartNumber;\r
591 //\r
592 // Add for smbios 2.5\r
593 //\r
594 UINT8 CoreCount;\r
595 UINT8 EnabledCoreCount;\r
596 UINT8 ThreadCount;\r
597 UINT16 ProcessorCharacteristics;\r
598 //\r
599 // Add for smbios 2.6\r
600 //\r
601 UINT16 ProcessorFamily2;\r
602} SMBIOS_TABLE_TYPE4;\r
603\r
98cb9ae8 604///\r
605/// Memory Controller Error Detecting Method \r
606///\r
607typedef enum { \r
608 ErrorDetectingMethodOther = 0x01,\r
609 ErrorDetectingMethodUnknown = 0x02,\r
610 ErrorDetectingMethodNone = 0x03,\r
611 ErrorDetectingMethodParity = 0x04,\r
612 ErrorDetectingMethod32Ecc = 0x05,\r
613 ErrorDetectingMethod64Ecc = 0x06,\r
614 ErrorDetectingMethod128Ecc = 0x07,\r
615 ErrorDetectingMethodCrc = 0x08\r
616} MEMORY_ERROR_DETECT_METHOD;\r
617\r
618///\r
619/// Memory Controller Error Correcting Capability\r
620///\r
621typedef struct {\r
622 UINT8 Other :1;\r
623 UINT8 Unknown :1;\r
624 UINT8 None :1;\r
625 UINT8 SingleBitErrorCorrect :1;\r
626 UINT8 DoubleBitErrorCorrect :1;\r
627 UINT8 ErrorScrubbing :1;\r
628 UINT8 Reserved :2;\r
629} MEMORY_ERROR_CORRECT_CAPABILITY;\r
630\r
631///\r
632/// Memory Controller Information - Interleave Support\r
633///\r
634typedef enum { \r
635 MemoryInterleaveOther = 0x01,\r
636 MemoryInterleaveUnknown = 0x02,\r
637 MemoryInterleaveOneWay = 0x03,\r
638 MemoryInterleaveTwoWay = 0x04,\r
639 MemoryInterleaveFourWay = 0x05,\r
640 MemoryInterleaveEightWay = 0x06,\r
641 MemoryInterleaveSixteenWay = 0x07\r
642} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
643\r
644///\r
645/// Memory Controller Information - Memory Speeds\r
646///\r
647typedef struct {\r
648 UINT16 Other :1;\r
649 UINT16 Unknown :1;\r
650 UINT16 SeventyNs:1;\r
651 UINT16 SixtyNs :1;\r
652 UINT16 FiftyNs :1;\r
653 UINT16 Reserved :11;\r
654} MEMORY_SPEED_TYPE;\r
655\r
4135253b 656///\r
657/// Memory Controller Information (Type 5, Obsolete)\r
658///\r
98cb9ae8 659/// The information in this structure defines the attributes of the system's memory controller(s) \r
660/// and the supported attributes of any memory-modules present in the sockets controlled by \r
661/// this controller. \r
662/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
663/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
664/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
665/// choose to implement both memory description types to allow existing DMI browsers\r
666/// to properly display the system's memory attributes.\r
667///\r
61ce5861 668typedef struct {\r
98cb9ae8 669 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 670 UINT8 ErrDetectMethod; ///< enumeration value from MEMORY_ERROR_DETECT_METHOD\r
98cb9ae8 671 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
2d5e30ef 672 UINT8 SupportInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE\r
673 UINT8 CurrentInterleave; ///< enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE \r
98cb9ae8 674 UINT8 MaxMemoryModuleSize;\r
675 MEMORY_SPEED_TYPE SupportSpeed;\r
676 UINT16 SupportMemoryType;\r
677 UINT8 MemoryModuleVoltage;\r
678 UINT8 AssociatedMemorySlotNum;\r
679 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 680} SMBIOS_TABLE_TYPE5;\r
681\r
98cb9ae8 682///\r
683/// Memory Module Information - Memory Types\r
684///\r
685typedef struct {\r
686 UINT16 Other :1;\r
687 UINT16 Unknown :1;\r
688 UINT16 Standard :1;\r
689 UINT16 FastPageMode:1;\r
b4ab47ec 690 UINT16 Edo :1;\r
98cb9ae8 691 UINT16 Parity :1;\r
b4ab47ec 692 UINT16 Ecc :1;\r
693 UINT16 Simm :1;\r
694 UINT16 Dimm :1;\r
98cb9ae8 695 UINT16 BurstEdo :1;\r
b4ab47ec 696 UINT16 Sdram :1;\r
98cb9ae8 697 UINT16 Reserved :5;\r
698} MEMORY_CURRENT_TYPE;\r
699\r
700///\r
701/// Memory Module Information - Memory Size\r
702///\r
703typedef struct {\r
6800ac83 704 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 705 UINT8 SingleOrDoubleBank :1;\r
706} MEMORY_INSTALLED_ENABLED_SIZE;\r
707\r
4135253b 708///\r
709/// Memory Module Information (Type 6, Obsolete)\r
710///\r
98cb9ae8 711/// One Memory Module Information structure is included for each memory-module socket \r
712/// in the system. The structure describes the speed, type, size, and error status\r
713/// of each system memory module. The supported attributes of each module are described \r
714/// by the "owning" Memory Controller Information structure. \r
715/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
716/// are obsolete starting with version 2.1 of this specification; the Physical Memory Array (Type 16)\r
717/// and Memory Device (Type 17) structures should be used instead.\r
718///\r
61ce5861 719typedef struct {\r
98cb9ae8 720 SMBIOS_STRUCTURE Hdr;\r
721 SMBIOS_TABLE_STRING SocketDesignation;\r
722 UINT8 BankConnections;\r
723 UINT8 CurrentSpeed;\r
724 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
725 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
726 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
727 UINT8 ErrorStatus;\r
61ce5861 728} SMBIOS_TABLE_TYPE6;\r
729\r
98cb9ae8 730///\r
731/// Cache Information - SRAM Type\r
732///\r
733typedef struct {\r
734 UINT16 Other :1;\r
735 UINT16 Unknown :1;\r
736 UINT16 NonBurst :1;\r
737 UINT16 Burst :1;\r
738 UINT16 PipelineBurst :1;\r
739 UINT16 Asynchronous :1;\r
740 UINT16 Synchronous :1;\r
741 UINT16 Reserved :9;\r
742} CACHE_SRAM_TYPE_DATA;\r
743\r
744///\r
745/// Cache Information - Error Correction Type \r
746///\r
747typedef enum {\r
748 CacheErrorOther = 0x01,\r
749 CacheErrorUnknown = 0x02,\r
750 CacheErrorNone = 0x03,\r
751 CacheErrorParity = 0x04,\r
6800ac83 752 CacheErrorSingleBit = 0x05, ///< ECC\r
753 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 754} CACHE_ERROR_TYPE_DATA;\r
755\r
756///\r
757/// Cache Information - System Cache Type \r
758///\r
759typedef enum {\r
760 CacheTypeOther = 0x01,\r
761 CacheTypeUnknown = 0x02,\r
762 CacheTypeInstruction = 0x03,\r
763 CacheTypeData = 0x04,\r
764 CacheTypeUnified = 0x05\r
765} CACHE_TYPE_DATA;\r
766\r
767///\r
768/// Cache Information - Associativity \r
769///\r
770typedef enum {\r
771 CacheAssociativityOther = 0x01,\r
772 CacheAssociativityUnknown = 0x02,\r
773 CacheAssociativityDirectMapped = 0x03,\r
774 CacheAssociativity2Way = 0x04,\r
775 CacheAssociativity4Way = 0x05,\r
776 CacheAssociativityFully = 0x06,\r
777 CacheAssociativity8Way = 0x07,\r
778 CacheAssociativity16Way = 0x08,\r
779 CacheAssociativity24Way = 0x09\r
780} CACHE_ASSOCIATIVITY_DATA;\r
781\r
4135253b 782///\r
783/// Cache Information (Type 7)\r
784///\r
98cb9ae8 785/// he information in this structure defines the attributes of CPU cache device in the system. \r
786/// One structure is specified for each such device, whether the device is internal to\r
787/// or external to the CPU module. Cache modules can be associated with a processor structure\r
788/// in one or two ways depending on the SMBIOS version.\r
789///\r
61ce5861 790typedef struct {\r
98cb9ae8 791 SMBIOS_STRUCTURE Hdr;\r
792 SMBIOS_TABLE_STRING SocketDesignation;\r
793 UINT16 CacheConfiguration;\r
794 UINT16 MaximumCacheSize;\r
795 UINT16 InstalledSize;\r
796 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
797 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
798 UINT8 CacheSpeed;\r
2d5e30ef 799 UINT8 ErrorCorrectionType; ///< enumeration value from CACHE_ERROR_TYPE_DATA\r
800 UINT8 SystemCacheType; ///< enumeration value from CACHE_TYPE_DATA\r
801 UINT8 Associativity; ///< enumeration value from CACHE_ASSOCIATIVITY_DATA\r
61ce5861 802} SMBIOS_TABLE_TYPE7;\r
803\r
98cb9ae8 804///\r
805/// Port Connector Information - Connector Types \r
806///\r
807typedef enum {\r
808 PortConnectorTypeNone = 0x00,\r
809 PortConnectorTypeCentronics = 0x01,\r
810 PortConnectorTypeMiniCentronics = 0x02,\r
811 PortConnectorTypeProprietary = 0x03,\r
812 PortConnectorTypeDB25Male = 0x04,\r
813 PortConnectorTypeDB25Female = 0x05,\r
814 PortConnectorTypeDB15Male = 0x06,\r
815 PortConnectorTypeDB15Female = 0x07,\r
816 PortConnectorTypeDB9Male = 0x08,\r
817 PortConnectorTypeDB9Female = 0x09,\r
818 PortConnectorTypeRJ11 = 0x0A,\r
819 PortConnectorTypeRJ45 = 0x0B,\r
820 PortConnectorType50PinMiniScsi = 0x0C,\r
821 PortConnectorTypeMiniDin = 0x0D,\r
822 PortConnectorTypeMicriDin = 0x0E,\r
823 PortConnectorTypePS2 = 0x0F,\r
824 PortConnectorTypeInfrared = 0x10,\r
825 PortConnectorTypeHpHil = 0x11,\r
826 PortConnectorTypeUsb = 0x12,\r
827 PortConnectorTypeSsaScsi = 0x13,\r
828 PortConnectorTypeCircularDin8Male = 0x14,\r
829 PortConnectorTypeCircularDin8Female = 0x15,\r
830 PortConnectorTypeOnboardIde = 0x16,\r
831 PortConnectorTypeOnboardFloppy = 0x17,\r
832 PortConnectorType9PinDualInline = 0x18,\r
833 PortConnectorType25PinDualInline = 0x19,\r
834 PortConnectorType50PinDualInline = 0x1A,\r
835 PortConnectorType68PinDualInline = 0x1B,\r
836 PortConnectorTypeOnboardSoundInput = 0x1C,\r
837 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
838 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
839 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
840 PortConnectorTypeBNC = 0x20,\r
841 PortConnectorType1394 = 0x21,\r
842 PortConnectorTypePC98 = 0xA0,\r
843 PortConnectorTypePC98Hireso = 0xA1,\r
844 PortConnectorTypePCH98 = 0xA2,\r
845 PortConnectorTypePC98Note = 0xA3,\r
846 PortConnectorTypePC98Full = 0xA4,\r
847 PortConnectorTypeOther = 0xFF\r
848} MISC_PORT_CONNECTOR_TYPE;\r
849\r
850///\r
851/// Port Connector Information - Port Types \r
852///\r
853typedef enum {\r
854 PortTypeNone = 0x00,\r
855 PortTypeParallelXtAtCompatible = 0x01,\r
856 PortTypeParallelPortPs2 = 0x02,\r
857 PortTypeParallelPortEcp = 0x03,\r
858 PortTypeParallelPortEpp = 0x04,\r
859 PortTypeParallelPortEcpEpp = 0x05,\r
860 PortTypeSerialXtAtCompatible = 0x06,\r
861 PortTypeSerial16450Compatible = 0x07,\r
862 PortTypeSerial16550Compatible = 0x08,\r
863 PortTypeSerial16550ACompatible = 0x09,\r
864 PortTypeScsi = 0x0A,\r
865 PortTypeMidi = 0x0B,\r
866 PortTypeJoyStick = 0x0C,\r
867 PortTypeKeyboard = 0x0D,\r
868 PortTypeMouse = 0x0E,\r
869 PortTypeSsaScsi = 0x0F,\r
870 PortTypeUsb = 0x10,\r
871 PortTypeFireWire = 0x11,\r
872 PortTypePcmciaTypeI = 0x12,\r
873 PortTypePcmciaTypeII = 0x13,\r
874 PortTypePcmciaTypeIII = 0x14,\r
875 PortTypeCardBus = 0x15,\r
876 PortTypeAccessBusPort = 0x16,\r
877 PortTypeScsiII = 0x17,\r
878 PortTypeScsiWide = 0x18,\r
879 PortTypePC98 = 0x19,\r
880 PortTypePC98Hireso = 0x1A,\r
881 PortTypePCH98 = 0x1B,\r
882 PortTypeVideoPort = 0x1C,\r
883 PortTypeAudioPort = 0x1D,\r
884 PortTypeModemPort = 0x1E,\r
885 PortTypeNetworkPort = 0x1F,\r
886 PortType8251Compatible = 0xA0,\r
887 PortType8251FifoCompatible = 0xA1,\r
888 PortTypeOther = 0xFF\r
889} MISC_PORT_TYPE;\r
890\r
4135253b 891///\r
892/// Port Connector Information (Type 8)\r
893///\r
98cb9ae8 894/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 895/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 896/// are provided. One structure is present for each port provided by the system.\r
897///\r
61ce5861 898typedef struct {\r
98cb9ae8 899 SMBIOS_STRUCTURE Hdr;\r
900 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
2d5e30ef 901 UINT8 InternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE\r
98cb9ae8 902 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
2d5e30ef 903 UINT8 ExternalConnectorType; ///< enumeration value from MISC_PORT_CONNECTOR_TYPE\r
904 UINT8 PortType; ///< enumeration value from MISC_PORT_TYPE\r
61ce5861 905} SMBIOS_TABLE_TYPE8;\r
906\r
98cb9ae8 907///\r
908/// System Slots - Slot Type\r
909///\r
910typedef enum {\r
911 SlotTypeOther = 0x01,\r
912 SlotTypeUnknown = 0x02,\r
913 SlotTypeIsa = 0x03,\r
914 SlotTypeMca = 0x04,\r
915 SlotTypeEisa = 0x05,\r
916 SlotTypePci = 0x06,\r
917 SlotTypePcmcia = 0x07,\r
918 SlotTypeVlVesa = 0x08,\r
919 SlotTypeProprietary = 0x09,\r
920 SlotTypeProcessorCardSlot = 0x0A,\r
921 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
922 SlotTypeIORiserCardSlot = 0x0C,\r
923 SlotTypeNuBus = 0x0D,\r
924 SlotTypePci66MhzCapable = 0x0E,\r
925 SlotTypeAgp = 0x0F,\r
926 SlotTypeApg2X = 0x10,\r
927 SlotTypeAgp4X = 0x11,\r
928 SlotTypePciX = 0x12,\r
929 SlotTypeAgp4x = 0x13,\r
930 SlotTypePC98C20 = 0xA0,\r
931 SlotTypePC98C24 = 0xA1,\r
932 SlotTypePC98E = 0xA2,\r
933 SlotTypePC98LocalBus = 0xA3,\r
934 SlotTypePC98Card = 0xA4,\r
935 SlotTypePciExpress = 0xA5,\r
936 SlotTypePciExpressX1 = 0xA6,\r
937 SlotTypePciExpressX2 = 0xA7,\r
938 SlotTypePciExpressX4 = 0xA8,\r
939 SlotTypePciExpressX8 = 0xA9,\r
940 SlotTypePciExpressX16 = 0xAA\r
941} MISC_SLOT_TYPE;\r
942\r
943///\r
944/// System Slots - Slot Data Bus Width\r
945///\r
946typedef enum {\r
947 SlotDataBusWidthOther = 0x01,\r
948 SlotDataBusWidthUnknown = 0x02,\r
949 SlotDataBusWidth8Bit = 0x03,\r
950 SlotDataBusWidth16Bit = 0x04,\r
951 SlotDataBusWidth32Bit = 0x05,\r
952 SlotDataBusWidth64Bit = 0x06,\r
953 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 954 SlotDataBusWidth1X = 0x08, ///< Or X1\r
955 SlotDataBusWidth2X = 0x09, ///< Or X2\r
956 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
957 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
958 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
959 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
960 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 961} MISC_SLOT_DATA_BUS_WIDTH;\r
962\r
963///\r
964/// System Slots - Current Usage\r
965///\r
966typedef enum {\r
967 SlotUsageOther = 0x01,\r
968 SlotUsageUnknown = 0x02,\r
969 SlotUsageAvailable = 0x03,\r
970 SlotUsageInUse = 0x04\r
971} MISC_SLOT_USAGE;\r
972\r
973///\r
974/// System Slots - Slot Length \r
975///\r
976typedef enum {\r
977 SlotLengthOther = 0x01,\r
978 SlotLengthUnknown = 0x02,\r
979 SlotLengthShort = 0x03,\r
980 SlotLengthLong = 0x04\r
981} MISC_SLOT_LENGTH;\r
982\r
983///\r
984/// System Slots - Slot Characteristics 1 \r
985///\r
986typedef struct {\r
987 UINT8 CharacteristicsUnknown :1;\r
988 UINT8 Provides50Volts :1;\r
989 UINT8 Provides33Volts :1;\r
990 UINT8 SharedSlot :1;\r
991 UINT8 PcCard16Supported :1;\r
992 UINT8 CardBusSupported :1;\r
993 UINT8 ZoomVideoSupported :1;\r
994 UINT8 ModemRingResumeSupported:1;\r
995} MISC_SLOT_CHARACTERISTICS1;\r
996///\r
997/// System Slots - Slot Characteristics 2 \r
998///\r
999typedef struct {\r
1000 UINT8 PmeSignalSupported :1;\r
1001 UINT8 HotPlugDevicesSupported :1;\r
1002 UINT8 SmbusSignalSupported :1;\r
6800ac83 1003 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1004} MISC_SLOT_CHARACTERISTICS2;\r
1005\r
4135253b 1006///\r
1007/// System Slots (Type 9)\r
1008///\r
98cb9ae8 1009/// The information in this structure defines the attributes of a system slot. \r
1010/// One structure is provided for each slot in the system.\r
1011///\r
1012///\r
61ce5861 1013typedef struct {\r
98cb9ae8 1014 SMBIOS_STRUCTURE Hdr;\r
1015 SMBIOS_TABLE_STRING SlotDesignation;\r
2d5e30ef 1016 UINT8 SlotType; ///< enumeration value from MISC_SLOT_TYPE\r
1017 UINT8 SlotDataBusWidth; ///< enumeration value from MISC_SLOT_DATA_BUS_WIDTH\r
1018 UINT8 CurrentUsage; ///< enumeration value from MISC_SLOT_USAGE\r
1019 UINT8 SlotLength; ///< enumeration value from MISC_SLOT_LENGTH\r
98cb9ae8 1020 UINT16 SlotID;\r
1021 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1022 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1023 //\r
1024 // Add for smbios 2.6\r
1025 //\r
98cb9ae8 1026 UINT16 SegmentGroupNum;\r
1027 UINT8 BusNum;\r
1028 UINT8 DevFuncNum;\r
61ce5861 1029} SMBIOS_TABLE_TYPE9;\r
1030\r
98cb9ae8 1031///\r
1032/// On Board Devices Information - Device Types \r
1033///\r
1034typedef enum {\r
1035 OnBoardDeviceTypeOther = 0x01,\r
1036 OnBoardDeviceTypeUnknown = 0x02,\r
1037 OnBoardDeviceTypeVideo = 0x03,\r
1038 OnBoardDeviceTypeScsiController = 0x04,\r
1039 OnBoardDeviceTypeEthernet = 0x05,\r
1040 OnBoardDeviceTypeTokenRing = 0x06,\r
1041 OnBoardDeviceTypeSound = 0x07\r
1042} MISC_ONBOARD_DEVICE_TYPE;\r
1043\r
bf7ea009 1044///\r
1045/// Device Item Entry\r
1046///\r
61ce5861 1047typedef struct {\r
2d5e30ef 1048 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE\r
1049 ///< Bit 7 - 1 : device enabled, 0 : device disabled\r
98cb9ae8 1050 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1051} DEVICE_STRUCT;\r
1052\r
4135253b 1053///\r
1054/// On Board Devices Information (Type 10, obsolete)\r
1055///\r
98cb9ae8 1056/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1057/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1058/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1059/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1060/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1061/// has some level of control over the enabling of the associated device for use by the system.\r
1062///\r
61ce5861 1063typedef struct {\r
1064 SMBIOS_STRUCTURE Hdr;\r
1065 DEVICE_STRUCT Device[1];\r
1066} SMBIOS_TABLE_TYPE10;\r
1067\r
4135253b 1068///\r
1069/// OEM Strings (Type 11)\r
98cb9ae8 1070/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1071/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1072///\r
61ce5861 1073typedef struct {\r
1074 SMBIOS_STRUCTURE Hdr;\r
1075 UINT8 StringCount;\r
1076} SMBIOS_TABLE_TYPE11;\r
1077\r
4135253b 1078///\r
1079/// System Configuration Options (Type 12)\r
1080///\r
98cb9ae8 1081/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1082///\r
61ce5861 1083typedef struct {\r
1084 SMBIOS_STRUCTURE Hdr;\r
1085 UINT8 StringCount;\r
1086} SMBIOS_TABLE_TYPE12;\r
1087\r
98cb9ae8 1088\r
4135253b 1089///\r
1090/// BIOS Language Information (Type 13)\r
1091///\r
98cb9ae8 1092/// The information in this structure defines the installable language attributes of the BIOS. \r
1093/// \r
61ce5861 1094typedef struct {\r
1095 SMBIOS_STRUCTURE Hdr;\r
1096 UINT8 InstallableLanguages;\r
1097 UINT8 Flags;\r
fbfa4a1d 1098 UINT8 Reserved[15];\r
61ce5861 1099 SMBIOS_TABLE_STRING CurrentLanguages;\r
1100} SMBIOS_TABLE_TYPE13;\r
1101\r
98cb9ae8 1102///\r
1103/// System Event Log - Event Log Types \r
1104/// \r
1105typedef enum {\r
1106 EventLogTypeReserved = 0x00,\r
1107 EventLogTypeSingleBitECC = 0x01,\r
1108 EventLogTypeMultiBitECC = 0x02,\r
1109 EventLogTypeParityMemErr = 0x03,\r
1110 EventLogTypeBusTimeOut = 0x04,\r
1111 EventLogTypeIOChannelCheck = 0x05,\r
1112 EventLogTypeSoftwareNMI = 0x06,\r
1113 EventLogTypePOSTMemResize = 0x07,\r
1114 EventLogTypePOSTErr = 0x08,\r
1115 EventLogTypePCIParityErr = 0x09,\r
1116 EventLogTypePCISystemErr = 0x0A,\r
1117 EventLogTypeCPUFailure = 0x0B,\r
1118 EventLogTypeEISATimeOut = 0x0C,\r
1119 EventLogTypeMemLogDisabled = 0x0D,\r
1120 EventLogTypeLoggingDisabled = 0x0E,\r
1121 EventLogTypeSysLimitExce = 0x10,\r
1122 EventLogTypeAsyncHWTimer = 0x11,\r
1123 EventLogTypeSysConfigInfo = 0x12,\r
1124 EventLogTypeHDInfo = 0x13,\r
1125 EventLogTypeSysReconfig = 0x14,\r
1126 EventLogTypeUncorrectCPUErr = 0x15,\r
1127 EventLogTypeAreaResetAndClr = 0x16,\r
1128 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1129 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1130 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1131 EventLogTypeEndOfLog = 0xFF\r
1132} EVENT_LOG_TYPE_DATA;\r
1133\r
1134///\r
1135/// System Event Log - Variable Data Format Types \r
1136/// \r
1137typedef enum {\r
1138 EventLogVariableNone = 0x00,\r
1139 EventLogVariableHandle = 0x01,\r
1140 EventLogVariableMutilEvent = 0x02,\r
1141 EventLogVariableMutilEventHandle = 0x03,\r
1142 EventLogVariablePOSTResultBitmap = 0x04,\r
1143 EventLogVariableSysManagementType = 0x05,\r
1144 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1145 EventLogVariableUnused = 0x07,\r
1146 EventLogVariableOEMAssigned = 0x80\r
55deb978 1147} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1148\r
bf7ea009 1149///\r
1150/// Group Item Entry\r
1151///\r
61ce5861 1152typedef struct {\r
1153 UINT8 ItemType;\r
1154 UINT16 ItemHandle;\r
1155} GROUP_STRUCT;\r
1156\r
98cb9ae8 1157///\r
1158/// Event Log Type Descriptors\r
1159///\r
1160typedef struct {\r
2d5e30ef 1161 UINT8 LogType; ///< enumeration value from EVENT_LOG_TYPE_DATA\r
98cb9ae8 1162 UINT8 DataFormatType;\r
1163} EVENT_LOG_TYPE;\r
1164\r
4135253b 1165///\r
1166/// Group Associations (Type 14)\r
1167///\r
98cb9ae8 1168/// The Group Associations structure is provided for OEMs who want to specify \r
1169/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1170/// within the system. \r
1171///\r
61ce5861 1172typedef struct {\r
1173 SMBIOS_STRUCTURE Hdr;\r
1174 SMBIOS_TABLE_STRING GroupName;\r
1175 GROUP_STRUCT Group[1];\r
1176} SMBIOS_TABLE_TYPE14;\r
1177\r
4135253b 1178///\r
1179/// System Event Log (Type 15)\r
1180///\r
98cb9ae8 1181/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1182/// that the system supports an event log. An event log is a fixed-length area within a \r
1183/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1184/// record, followed by one or more variable-length log records. \r
1185///\r
61ce5861 1186typedef struct {\r
1187 SMBIOS_STRUCTURE Hdr;\r
1188 UINT16 LogAreaLength;\r
1189 UINT16 LogHeaderStartOffset;\r
1190 UINT16 LogDataStartOffset;\r
1191 UINT8 AccessMethod;\r
1192 UINT8 LogStatus;\r
1193 UINT32 LogChangeToken;\r
1194 UINT32 AccessMethodAddress;\r
1195 UINT8 LogHeaderFormat;\r
1196 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1197 UINT8 LengthOfLogTypeDescriptor;\r
1198 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1199} SMBIOS_TABLE_TYPE15;\r
1200\r
98cb9ae8 1201///\r
1202/// Physical Memory Array - Location\r
1203///\r
1204typedef enum {\r
1205 MemoryArrayLocationOther = 0x01,\r
1206 MemoryArrayLocationUnknown = 0x02,\r
1207 MemoryArrayLocationSystemBoard = 0x03,\r
1208 MemoryArrayLocationIsaAddonCard = 0x04,\r
1209 MemoryArrayLocationEisaAddonCard = 0x05,\r
1210 MemoryArrayLocationPciAddonCard = 0x06,\r
1211 MemoryArrayLocationMcaAddonCard = 0x07,\r
1212 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1213 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1214 MemoryArrayLocationNuBus = 0x0A,\r
1215 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1216 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1217 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1218 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1219} MEMORY_ARRAY_LOCATION;\r
1220\r
1221///\r
1222/// Physical Memory Array - Use\r
1223///\r
1224typedef enum {\r
1225 MemoryArrayUseOther = 0x01,\r
1226 MemoryArrayUseUnknown = 0x02,\r
1227 MemoryArrayUseSystemMemory = 0x03,\r
1228 MemoryArrayUseVideoMemory = 0x04,\r
1229 MemoryArrayUseFlashMemory = 0x05,\r
1230 MemoryArrayUseNonVolatileRam = 0x06,\r
1231 MemoryArrayUseCacheMemory = 0x07\r
1232} MEMORY_ARRAY_USE;\r
1233\r
1234///\r
1235/// Physical Memory Array - Error Correction Types \r
1236///\r
1237typedef enum {\r
1238 MemoryErrorCorrectionOther = 0x01,\r
1239 MemoryErrorCorrectionUnknown = 0x02,\r
1240 MemoryErrorCorrectionNone = 0x03,\r
1241 MemoryErrorCorrectionParity = 0x04,\r
1242 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1243 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1244 MemoryErrorCorrectionCrc = 0x07\r
1245} MEMORY_ERROR_CORRECTION;\r
1246\r
4135253b 1247///\r
1248/// Physical Memory Array (Type 16)\r
1249///\r
98cb9ae8 1250/// This structure describes a collection of memory devices that operate \r
1251/// together to form a memory address space. \r
1252///\r
61ce5861 1253typedef struct {\r
98cb9ae8 1254 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1255 UINT8 Location; ///< enumeration value from MEMORY_ARRAY_LOCATION\r
1256 UINT8 Use; ///< enumeration value from MEMORY_ARRAY_USE\r
1257 UINT8 MemoryErrorCorrection; ///< enumeration value from MEMORY_ERROR_CORRECTION\r
98cb9ae8 1258 UINT32 MaximumCapacity;\r
1259 UINT16 MemoryErrorInformationHandle;\r
1260 UINT16 NumberOfMemoryDevices;\r
61ce5861 1261} SMBIOS_TABLE_TYPE16;\r
1262\r
98cb9ae8 1263///\r
1264/// Memory Device - Form Factor\r
1265///\r
1266typedef enum {\r
1267 MemoryFormFactorOther = 0x01,\r
1268 MemoryFormFactorUnknown = 0x02,\r
1269 MemoryFormFactorSimm = 0x03,\r
1270 MemoryFormFactorSip = 0x04,\r
1271 MemoryFormFactorChip = 0x05,\r
1272 MemoryFormFactorDip = 0x06,\r
1273 MemoryFormFactorZip = 0x07,\r
1274 MemoryFormFactorProprietaryCard = 0x08,\r
1275 MemoryFormFactorDimm = 0x09,\r
1276 MemoryFormFactorTsop = 0x0A,\r
1277 MemoryFormFactorRowOfChips = 0x0B,\r
1278 MemoryFormFactorRimm = 0x0C,\r
1279 MemoryFormFactorSodimm = 0x0D,\r
1280 MemoryFormFactorSrimm = 0x0E,\r
1281 MemoryFormFactorFbDimm = 0x0F\r
1282} MEMORY_FORM_FACTOR;\r
1283\r
1284///\r
1285/// Memory Device - Type\r
1286///\r
1287typedef enum {\r
1288 MemoryTypeOther = 0x01,\r
1289 MemoryTypeUnknown = 0x02,\r
1290 MemoryTypeDram = 0x03,\r
1291 MemoryTypeEdram = 0x04,\r
1292 MemoryTypeVram = 0x05,\r
1293 MemoryTypeSram = 0x06,\r
1294 MemoryTypeRam = 0x07,\r
1295 MemoryTypeRom = 0x08,\r
1296 MemoryTypeFlash = 0x09,\r
1297 MemoryTypeEeprom = 0x0A,\r
1298 MemoryTypeFeprom = 0x0B,\r
1299 MemoryTypeEprom = 0x0C,\r
1300 MemoryTypeCdram = 0x0D,\r
1301 MemoryType3Dram = 0x0E,\r
1302 MemoryTypeSdram = 0x0F,\r
1303 MemoryTypeSgram = 0x10,\r
1304 MemoryTypeRdram = 0x11,\r
1305 MemoryTypeDdr = 0x12,\r
1306 MemoryTypeDdr2 = 0x13,\r
1307 MemoryTypeDdr2FbDimm = 0x14\r
1308} MEMORY_DEVICE_TYPE;\r
1309\r
1310typedef struct {\r
1311 UINT16 Reserved :1;\r
1312 UINT16 Other :1;\r
1313 UINT16 Unknown :1;\r
1314 UINT16 FastPaged :1;\r
1315 UINT16 StaticColumn :1;\r
1316 UINT16 PseudoStatic :1;\r
1317 UINT16 Rambus :1;\r
1318 UINT16 Synchronous :1;\r
1319 UINT16 Cmos :1;\r
1320 UINT16 Edo :1;\r
1321 UINT16 WindowDram :1;\r
1322 UINT16 CacheDram :1;\r
1323 UINT16 Nonvolatile :1;\r
1324 UINT16 Reserved1 :3;\r
1325} MEMORY_DEVICE_TYPE_DETAIL;\r
1326\r
4135253b 1327///\r
1328/// Memory Device (Type 17)\r
1329///\r
98cb9ae8 1330/// This structure describes a single memory device that is part of \r
1331/// a larger Physical Memory Array (Type 16).\r
1332/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
1333/// includes a Memory Device structure instance for each slot whether or not the \r
1334/// socket is currently populated.\r
1335///\r
61ce5861 1336typedef struct {\r
98cb9ae8 1337 SMBIOS_STRUCTURE Hdr;\r
1338 UINT16 MemoryArrayHandle;\r
1339 UINT16 MemoryErrorInformationHandle;\r
1340 UINT16 TotalWidth;\r
1341 UINT16 DataWidth;\r
1342 UINT16 Size;\r
2d5e30ef 1343 UINT8 FormFactor; ///< enumeration value from MEMORY_FORM_FACTOR\r
98cb9ae8 1344 UINT8 DeviceSet;\r
1345 SMBIOS_TABLE_STRING DeviceLocator;\r
1346 SMBIOS_TABLE_STRING BankLocator;\r
2d5e30ef 1347 UINT8 MemoryType; ///< enumeration value from MEMORY_DEVICE_TYPE\r
98cb9ae8 1348 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1349 UINT16 Speed;\r
1350 SMBIOS_TABLE_STRING Manufacturer;\r
1351 SMBIOS_TABLE_STRING SerialNumber;\r
1352 SMBIOS_TABLE_STRING AssetTag;\r
1353 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1354 //\r
1355 // Add for smbios 2.6\r
1356 // \r
1357 UINT8 Attributes;\r
1358} SMBIOS_TABLE_TYPE17;\r
1359\r
98cb9ae8 1360///\r
1361/// 32-bit Memory Error Information - Error Type \r
1362///\r
1363typedef enum { \r
1364 MemoryErrorOther = 0x01,\r
1365 MemoryErrorUnknown = 0x02,\r
1366 MemoryErrorOk = 0x03,\r
1367 MemoryErrorBadRead = 0x04,\r
1368 MemoryErrorParity = 0x05,\r
1369 MemoryErrorSigleBit = 0x06,\r
1370 MemoryErrorDoubleBit = 0x07,\r
1371 MemoryErrorMultiBit = 0x08,\r
1372 MemoryErrorNibble = 0x09,\r
1373 MemoryErrorChecksum = 0x0A,\r
1374 MemoryErrorCrc = 0x0B,\r
1375 MemoryErrorCorrectSingleBit = 0x0C,\r
1376 MemoryErrorCorrected = 0x0D,\r
1377 MemoryErrorUnCorrectable = 0x0E\r
1378} MEMORY_ERROR_TYPE;\r
1379\r
1380///\r
1381/// 32-bit Memory Error Information - Error Granularity \r
1382///\r
1383typedef enum { \r
1384 MemoryGranularityOther = 0x01,\r
1385 MemoryGranularityOtherUnknown = 0x02,\r
1386 MemoryGranularityDeviceLevel = 0x03,\r
1387 MemoryGranularityMemPartitionLevel = 0x04\r
1388} MEMORY_ERROR_GRANULARITY;\r
1389\r
1390///\r
1391/// 32-bit Memory Error Information - Error Operation \r
1392///\r
1393typedef enum { \r
1394 MemoryErrorOperationOther = 0x01,\r
1395 MemoryErrorOperationUnknown = 0x02,\r
1396 MemoryErrorOperationRead = 0x03,\r
1397 MemoryErrorOperationWrite = 0x04,\r
1398 MemoryErrorOperationPartialWrite = 0x05\r
1399} MEMORY_ERROR_OPERATION;\r
1400\r
4135253b 1401///\r
1402/// 32-bit Memory Error Information (Type 18)\r
98cb9ae8 1403/// \r
1404/// This structure identifies the specifics of an error that might be detected \r
1405/// within a Physical Memory Array.\r
4135253b 1406///\r
61ce5861 1407typedef struct {\r
98cb9ae8 1408 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1409 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE\r
1410 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY\r
1411 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION\r
98cb9ae8 1412 UINT32 VendorSyndrome;\r
1413 UINT32 MemoryArrayErrorAddress;\r
1414 UINT32 DeviceErrorAddress;\r
1415 UINT32 ErrorResolution;\r
61ce5861 1416} SMBIOS_TABLE_TYPE18;\r
1417\r
4135253b 1418///\r
1419/// Memory Array Mapped Address (Type 19)\r
1420///\r
98cb9ae8 1421/// This structure provides the address mapping for a Physical Memory Array. \r
1422/// One structure is present for each contiguous address range described.\r
1423///\r
61ce5861 1424typedef struct {\r
1425 SMBIOS_STRUCTURE Hdr;\r
1426 UINT32 StartingAddress;\r
1427 UINT32 EndingAddress;\r
1428 UINT16 MemoryArrayHandle;\r
1429 UINT8 PartitionWidth;\r
1430} SMBIOS_TABLE_TYPE19;\r
1431\r
4135253b 1432///\r
1433/// Memory Device Mapped Address (Type 20)\r
1434///\r
98cb9ae8 1435/// This structure maps memory address space usually to a device-level granularity. \r
1436/// One structure is present for each contiguous address range described. \r
1437///\r
61ce5861 1438typedef struct {\r
1439 SMBIOS_STRUCTURE Hdr;\r
1440 UINT32 StartingAddress;\r
1441 UINT32 EndingAddress;\r
1442 UINT16 MemoryDeviceHandle;\r
1443 UINT16 MemoryArrayMappedAddressHandle;\r
1444 UINT8 PartitionRowPosition;\r
1445 UINT8 InterleavePosition;\r
1446 UINT8 InterleavedDataDepth;\r
1447} SMBIOS_TABLE_TYPE20;\r
1448\r
98cb9ae8 1449///\r
1450/// Built-in Pointing Device - Type\r
1451///\r
1452typedef enum {\r
1453 PointingDeviceTypeOther = 0x01,\r
1454 PointingDeviceTypeUnknown = 0x02,\r
1455 PointingDeviceTypeMouse = 0x03,\r
1456 PointingDeviceTypeTrackBall = 0x04,\r
1457 PointingDeviceTypeTrackPoint = 0x05,\r
1458 PointingDeviceTypeGlidePoint = 0x06,\r
1459 PointingDeviceTouchPad = 0x07,\r
1460 PointingDeviceTouchScreen = 0x08,\r
1461 PointingDeviceOpticalSensor = 0x09\r
1462} BUILTIN_POINTING_DEVICE_TYPE;\r
1463\r
1464///\r
1465/// Built-in Pointing Device - Interface\r
1466///\r
1467typedef enum {\r
1468 PointingDeviceInterfaceOther = 0x01,\r
1469 PointingDeviceInterfaceUnknown = 0x02,\r
1470 PointingDeviceInterfaceSerial = 0x03,\r
1471 PointingDeviceInterfacePs2 = 0x04,\r
1472 PointingDeviceInterfaceInfrared = 0x05,\r
1473 PointingDeviceInterfaceHpHil = 0x06,\r
1474 PointingDeviceInterfaceBusMouse = 0x07,\r
1475 PointingDeviceInterfaceADB = 0x08,\r
1476 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1477 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1478 PointingDeviceInterfaceUsb = 0xA2\r
1479} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1480\r
4135253b 1481///\r
1482/// Built-in Pointing Device (Type 21)\r
1483///\r
98cb9ae8 1484/// This structure describes the attributes of the built-in pointing device for the \r
1f9f8414 1485/// system - the presence of this structure does not imply that the built-in\r
98cb9ae8 1486/// pointing device is active for the system's use! \r
1487///\r
61ce5861 1488typedef struct {\r
98cb9ae8 1489 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1490 UINT8 Type; ///< enumeration value from BUILTIN_POINTING_DEVICE_TYPE\r
1491 UINT8 Interface; ///< enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE\r
98cb9ae8 1492 UINT8 NumberOfButtons;\r
61ce5861 1493} SMBIOS_TABLE_TYPE21;\r
1494\r
98cb9ae8 1495///\r
1496/// Portable Battery - Device Chemistry\r
1497///\r
1498typedef enum { \r
1499 PortableBatteryDeviceChemistryOther = 0x01,\r
1500 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1501 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1502 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1503 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1504 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1505 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1506 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1507} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1508\r
4135253b 1509///\r
1510/// Portable Battery (Type 22)\r
1511///\r
98cb9ae8 1512/// This structure describes the attributes of the portable battery(s) for the system. \r
1513/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1514/// a single battery pack's attributes.\r
98cb9ae8 1515///\r
61ce5861 1516typedef struct {\r
98cb9ae8 1517 SMBIOS_STRUCTURE Hdr;\r
1518 SMBIOS_TABLE_STRING Location;\r
1519 SMBIOS_TABLE_STRING Manufacturer;\r
1520 SMBIOS_TABLE_STRING ManufactureDate;\r
1521 SMBIOS_TABLE_STRING SerialNumber;\r
1522 SMBIOS_TABLE_STRING DeviceName;\r
2d5e30ef 1523 UINT8 DeviceChemistry; ///< enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY\r
98cb9ae8 1524 UINT16 DeviceCapacity;\r
1525 UINT16 DesignVoltage;\r
1526 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1527 UINT8 MaximumErrorInBatteryData;\r
1528 UINT16 SBDSSerialNumber;\r
1529 UINT16 SBDSManufactureDate;\r
1530 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1531 UINT8 DesignCapacityMultiplier;\r
1532 UINT32 OEMSpecific;\r
61ce5861 1533} SMBIOS_TABLE_TYPE22;\r
1534\r
4135253b 1535///\r
1536/// System Reset (Type 23)\r
1537///\r
98cb9ae8 1538/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1539/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1540/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1541/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1542/// the system will re-boot according to the Boot Option at Limit. \r
1543///\r
61ce5861 1544typedef struct {\r
1545 SMBIOS_STRUCTURE Hdr;\r
1546 UINT8 Capabilities;\r
1547 UINT16 ResetCount;\r
1548 UINT16 ResetLimit;\r
1549 UINT16 TimerInterval;\r
1550 UINT16 Timeout;\r
1551} SMBIOS_TABLE_TYPE23;\r
1552\r
4135253b 1553///\r
1554/// Hardware Security (Type 24)\r
1555///\r
98cb9ae8 1556/// This structure describes the system-wide hardware security settings. \r
1557///\r
61ce5861 1558typedef struct {\r
1559 SMBIOS_STRUCTURE Hdr;\r
1560 UINT8 HardwareSecuritySettings;\r
1561} SMBIOS_TABLE_TYPE24;\r
1562\r
4135253b 1563///\r
1564/// System Power Controls (Type 25)\r
1565///\r
98cb9ae8 1566/// This structure describes the attributes for controlling the main power supply to the system. \r
1567/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1568/// to determine the number of seconds until the next power-on of the system. The presence of \r
1569/// this structure implies that a timed power-on facility is available for the system. \r
1570///\r
61ce5861 1571typedef struct {\r
1572 SMBIOS_STRUCTURE Hdr;\r
1573 UINT8 NextScheduledPowerOnMonth;\r
1574 UINT8 NextScheduledPowerOnDayOfMonth;\r
1575 UINT8 NextScheduledPowerOnHour;\r
1576 UINT8 NextScheduledPowerOnMinute;\r
1577 UINT8 NextScheduledPowerOnSecond;\r
1578} SMBIOS_TABLE_TYPE25;\r
1579\r
98cb9ae8 1580///\r
1581/// Voltage Probe - Location and Status\r
1582///\r
1583typedef struct {\r
1584 UINT8 VoltageProbeSite :5;\r
1585 UINT8 VoltageProbeStatus :3;\r
1586} MISC_VOLTAGE_PROBE_LOCATION;\r
1587\r
4135253b 1588///\r
1589/// Voltage Probe (Type 26)\r
1590///\r
98cb9ae8 1591/// This describes the attributes for a voltage probe in the system. \r
1592/// Each structure describes a single voltage probe.\r
1593///\r
61ce5861 1594typedef struct {\r
98cb9ae8 1595 SMBIOS_STRUCTURE Hdr;\r
1596 SMBIOS_TABLE_STRING Description;\r
1597 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1598 UINT16 MaximumValue;\r
1599 UINT16 MinimumValue;\r
1600 UINT16 Resolution;\r
1601 UINT16 Tolerance;\r
1602 UINT16 Accuracy;\r
1603 UINT32 OEMDefined;\r
1604 UINT16 NominalValue;\r
61ce5861 1605} SMBIOS_TABLE_TYPE26;\r
1606\r
98cb9ae8 1607///\r
1608/// Cooling Device - Device Type and Status\r
1609///\r
1610typedef struct {\r
1611 UINT8 CoolingDevice :5;\r
1612 UINT8 CoolingDeviceStatus :3;\r
1613} MISC_COOLING_DEVICE_TYPE;\r
1614\r
4135253b 1615///\r
1616/// Cooling Device (Type 27)\r
1617///\r
98cb9ae8 1618/// This structure describes the attributes for a cooling device in the system. \r
1619/// Each structure describes a single cooling device. \r
1620/// \r
61ce5861 1621typedef struct {\r
98cb9ae8 1622 SMBIOS_STRUCTURE Hdr;\r
1623 UINT16 TemperatureProbeHandle;\r
1624 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1625 UINT8 CoolingUnitGroup;\r
1626 UINT32 OEMDefined;\r
1627 UINT16 NominalSpeed;\r
61ce5861 1628} SMBIOS_TABLE_TYPE27;\r
1629\r
98cb9ae8 1630///\r
1631/// Temperature Probe - Location and Status\r
1632///\r
1633typedef struct {\r
1634 UINT8 TemperatureProbeSite :5;\r
1635 UINT8 TemperatureProbeStatus :3;\r
1636} MISC_TEMPERATURE_PROBE_LOCATION;\r
1637\r
4135253b 1638///\r
1639/// Temperature Probe (Type 28)\r
1640///\r
98cb9ae8 1641/// This structure describes the attributes for a temperature probe in the system. \r
1642/// Each structure describes a single temperature probe. \r
1643///\r
61ce5861 1644typedef struct {\r
98cb9ae8 1645 SMBIOS_STRUCTURE Hdr;\r
1646 SMBIOS_TABLE_STRING Description;\r
1647 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1648 UINT16 MaximumValue;\r
1649 UINT16 MinimumValue;\r
1650 UINT16 Resolution;\r
1651 UINT16 Tolerance;\r
1652 UINT16 Accuracy;\r
1653 UINT32 OEMDefined;\r
1654 UINT16 NominalValue;\r
61ce5861 1655} SMBIOS_TABLE_TYPE28;\r
1656\r
98cb9ae8 1657///\r
1658/// Electrical Current Probe - Location and Status\r
1659///\r
1660typedef struct {\r
1661 UINT8 ElectricalCurrentProbeSite :5;\r
1662 UINT8 ElectricalCurrentProbeStatus :3;\r
1663} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
1664\r
4135253b 1665///\r
1666/// Electrical Current Probe (Type 29)\r
1667///\r
98cb9ae8 1668/// This structure describes the attributes for an electrical current probe in the system.\r
1669/// Each structure describes a single electrical current probe. \r
1670///\r
61ce5861 1671typedef struct {\r
98cb9ae8 1672 SMBIOS_STRUCTURE Hdr;\r
1673 SMBIOS_TABLE_STRING Description;\r
1674 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
1675 UINT16 MaximumValue;\r
1676 UINT16 MinimumValue;\r
1677 UINT16 Resolution;\r
1678 UINT16 Tolerance;\r
1679 UINT16 Accuracy;\r
1680 UINT32 OEMDefined;\r
1681 UINT16 NominalValue;\r
61ce5861 1682} SMBIOS_TABLE_TYPE29;\r
1683\r
4135253b 1684///\r
1685/// Out-of-Band Remote Access (Type 30)\r
1686///\r
98cb9ae8 1687/// This structure describes the attributes and policy settings of a hardware facility \r
1688/// that may be used to gain remote access to a hardware system when the operating system \r
1689/// is not available due to power-down status, hardware failures, or boot failures. \r
1690///\r
61ce5861 1691typedef struct {\r
1692 SMBIOS_STRUCTURE Hdr;\r
1693 SMBIOS_TABLE_STRING ManufacturerName;\r
1694 UINT8 Connections;\r
1695} SMBIOS_TABLE_TYPE30;\r
1696\r
4135253b 1697///\r
1698/// Boot Integrity Services (BIS) Entry Point (Type 31)\r
1699///\r
98cb9ae8 1700/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
1701/// \r
61ce5861 1702typedef struct {\r
1703 SMBIOS_STRUCTURE Hdr;\r
1704 UINT8 Checksum;\r
1705 UINT8 Reserved1;\r
1706 UINT16 Reserved2;\r
1707 UINT32 BisEntry16;\r
1708 UINT32 BisEntry32;\r
1709 UINT64 Reserved3;\r
1710 UINT32 Reserved4;\r
1711} SMBIOS_TABLE_TYPE31;\r
1712\r
98cb9ae8 1713///\r
1714/// System Boot Information - System Boot Status\r
1715///\r
1716typedef enum {\r
1717 BootInformationStatusNoError = 0x00,\r
1718 BootInformationStatusNoBootableMedia = 0x01,\r
1719 BootInformationStatusNormalOSFailedLoading = 0x02,\r
1720 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
1721 BootInformationStatusOSDetectedFailure = 0x04,\r
1722 BootInformationStatusUserRequestedBoot = 0x05,\r
1723 BootInformationStatusSystemSecurityViolation = 0x06,\r
1724 BootInformationStatusPreviousRequestedImage = 0x07,\r
1725 BootInformationStatusWatchdogTimerExpired = 0x08,\r
1726 BootInformationStatusStartReserved = 0x09,\r
1727 BootInformationStatusStartOemSpecific = 0x80,\r
1728 BootInformationStatusStartProductSpecific = 0xC0\r
1729} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
1730\r
4135253b 1731///\r
1732/// System Boot Information (Type 32)\r
1733///\r
98cb9ae8 1734/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
1735/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
1736/// application via this structure. When used in the PXE environment, for example, \r
1737/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 1738/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 1739/// could choose to automatically download a hardware-diagnostic image to a client whose \r
1740/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
1741///\r
61ce5861 1742typedef struct {\r
98cb9ae8 1743 SMBIOS_STRUCTURE Hdr;\r
1744 UINT8 Reserved[6];\r
2d5e30ef 1745 UINT8 BootStatus; ///< enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE\r
61ce5861 1746} SMBIOS_TABLE_TYPE32;\r
1747\r
4135253b 1748///\r
1749/// 64-bit Memory Error Information (Type 33)\r
1750///\r
98cb9ae8 1751/// This structure describes an error within a Physical Memory Array, \r
1752/// when the error address is above 4G (0xFFFFFFFF).\r
1753/// \r
61ce5861 1754typedef struct {\r
98cb9ae8 1755 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1756 UINT8 ErrorType; ///< enumeration value from MEMORY_ERROR_TYPE\r
1757 UINT8 ErrorGranularity; ///< enumeration value from MEMORY_ERROR_GRANULARITY\r
1758 UINT8 ErrorOperation; ///< enumeration value from MEMORY_ERROR_OPERATION\r
98cb9ae8 1759 UINT32 VendorSyndrome;\r
1760 UINT64 MemoryArrayErrorAddress;\r
1761 UINT64 DeviceErrorAddress;\r
1762 UINT32 ErrorResolution;\r
61ce5861 1763} SMBIOS_TABLE_TYPE33;\r
1764\r
98cb9ae8 1765///\r
1766/// Management Device - Type \r
1767///\r
1768typedef enum {\r
1769 ManagementDeviceTypeOther = 0x01,\r
1770 ManagementDeviceTypeUnknown = 0x02,\r
1771 ManagementDeviceTypeLm75 = 0x03,\r
1772 ManagementDeviceTypeLm78 = 0x04,\r
1773 ManagementDeviceTypeLm79 = 0x05,\r
1774 ManagementDeviceTypeLm80 = 0x06,\r
1775 ManagementDeviceTypeLm81 = 0x07,\r
1776 ManagementDeviceTypeAdm9240 = 0x08,\r
1777 ManagementDeviceTypeDs1780 = 0x09,\r
1778 ManagementDeviceTypeMaxim1617 = 0x0A,\r
1779 ManagementDeviceTypeGl518Sm = 0x0B,\r
1780 ManagementDeviceTypeW83781D = 0x0C,\r
1781 ManagementDeviceTypeHt82H791 = 0x0D\r
1782} MISC_MANAGEMENT_DEVICE_TYPE;\r
1783\r
1784///\r
1785/// Management Device - Address Type \r
1786///\r
1787typedef enum {\r
1788 ManagementDeviceAddressTypeOther = 0x01,\r
1789 ManagementDeviceAddressTypeUnknown = 0x02,\r
1790 ManagementDeviceAddressTypeIOPort = 0x03,\r
1791 ManagementDeviceAddressTypeMemory = 0x04,\r
1792 ManagementDeviceAddressTypeSmbus = 0x05\r
1793} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
1794\r
4135253b 1795///\r
1796/// Management Device (Type 34)\r
1797///\r
98cb9ae8 1798/// The information in this structure defines the attributes of a Management Device. \r
1799/// A Management Device might control one or more fans or voltage, current, or temperature\r
1800/// probes as defined by one or more Management Device Component structures.\r
1801///\r
61ce5861 1802typedef struct {\r
98cb9ae8 1803 SMBIOS_STRUCTURE Hdr;\r
1804 SMBIOS_TABLE_STRING Description;\r
2d5e30ef 1805 UINT8 Type; ///< enumeration value from MISC_MANAGEMENT_DEVICE_TYPE\r
98cb9ae8 1806 UINT32 Address;\r
2d5e30ef 1807 UINT8 AddressType; ///< enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE\r
61ce5861 1808} SMBIOS_TABLE_TYPE34;\r
1809\r
4135253b 1810///\r
1811/// Management Device Component (Type 35)\r
1812///\r
98cb9ae8 1813/// This structure associates a cooling device or environmental probe with structures \r
1814/// that define the controlling hardware device and (optionally) the component's thresholds. \r
1815///\r
61ce5861 1816typedef struct {\r
1817 SMBIOS_STRUCTURE Hdr;\r
1818 SMBIOS_TABLE_STRING Description;\r
1819 UINT16 ManagementDeviceHandle;\r
1820 UINT16 ComponentHandle;\r
1821 UINT16 ThresholdHandle;\r
1822} SMBIOS_TABLE_TYPE35;\r
1823\r
4135253b 1824///\r
1825/// Management Device Threshold Data (Type 36)\r
1826///\r
98cb9ae8 1827/// The information in this structure defines threshold information for \r
1828/// a component (probe or cooling-unit) contained within a Management Device. \r
1829///\r
61ce5861 1830typedef struct {\r
1831 SMBIOS_STRUCTURE Hdr;\r
1832 UINT16 LowerThresholdNonCritical;\r
1833 UINT16 UpperThresholdNonCritical;\r
1834 UINT16 LowerThresholdCritical;\r
1835 UINT16 UpperThresholdCritical;\r
1836 UINT16 LowerThresholdNonRecoverable;\r
1837 UINT16 UpperThresholdNonRecoverable;\r
1838} SMBIOS_TABLE_TYPE36;\r
1839\r
bf7ea009 1840///\r
1841/// Memory Channel Entry\r
1842///\r
61ce5861 1843typedef struct {\r
1844 UINT8 DeviceLoad;\r
1845 UINT16 DeviceHandle;\r
1846} MEMORY_DEVICE;\r
1847\r
98cb9ae8 1848///\r
1849/// Memory Channel - Channel Type\r
1850///\r
1851typedef enum {\r
1852 MemoryChannelTypeOther = 0x01,\r
1853 MemoryChannelTypeUnknown = 0x02,\r
1854 MemoryChannelTypeRambus = 0x03,\r
1855 MemoryChannelTypeSyncLink = 0x04\r
1856} MEMORY_CHANNEL_TYPE;\r
1857\r
4135253b 1858///\r
1859/// Memory Channel (Type 37)\r
1860///\r
98cb9ae8 1861/// The information in this structure provides the correlation between a Memory Channel\r
1862/// and its associated Memory Devices. Each device presents one or more loads to the channel; \r
1863/// the sum of all device loads cannot exceed the channel's defined maximum.\r
1864///\r
61ce5861 1865typedef struct {\r
1866 SMBIOS_STRUCTURE Hdr;\r
1867 UINT8 ChannelType;\r
1868 UINT8 MaximumChannelLoad;\r
1869 UINT8 MemoryDeviceCount;\r
1870 MEMORY_DEVICE MemoryDevice[1];\r
1871} SMBIOS_TABLE_TYPE37;\r
1872\r
98cb9ae8 1873///\r
1874/// IPMI Device Information - BMC Interface Type\r
1875///\r
1876typedef enum {\r
1877 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
6800ac83 1878 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style\r
1879 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip\r
1880 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer\r
98cb9ae8 1881 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
1882} BMC_INTERFACE_TYPE;\r
1883\r
4135253b 1884///\r
1885/// IPMI Device Information (Type 38)\r
1886///\r
98cb9ae8 1887/// The information in this structure defines the attributes of an \r
1888/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
1889/// \r
61ce5861 1890typedef struct {\r
1891 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 1892 UINT8 InterfaceType; ///< enumeration value from BMC_INTERFACE_TYPE\r
61ce5861 1893 UINT8 IPMISpecificationRevision;\r
1894 UINT8 I2CSlaveAddress;\r
1895 UINT8 NVStorageDeviceAddress;\r
1896 UINT64 BaseAddress;\r
1897 UINT8 BaseAddressModifier_InterruptInfo;\r
1898 UINT8 InterruptNumber;\r
1899} SMBIOS_TABLE_TYPE38;\r
1900\r
98cb9ae8 1901///\r
1902/// System Power Supply - Power Supply Characteristics\r
1903///\r
1904typedef struct {\r
1905 UINT16 PowerSupplyHotReplaceable:1;\r
1906 UINT16 PowerSupplyPresent :1;\r
1907 UINT16 PowerSupplyUnplugged :1;\r
1908 UINT16 InputVoltageRangeSwitch :4;\r
1909 UINT16 PowerSupplyStatus :3;\r
1910 UINT16 PowerSupplyType :4;\r
1911 UINT16 Reserved :2;\r
1912} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
1913\r
4135253b 1914///\r
1915/// System Power Supply (Type 39)\r
1916///\r
98cb9ae8 1917/// This structure identifies attributes of a system power supply. One instance\r
1918/// of this record is present for each possible power supply in a system. \r
1919///\r
61ce5861 1920typedef struct {\r
98cb9ae8 1921 SMBIOS_STRUCTURE Hdr;\r
1922 UINT8 PowerUnitGroup;\r
1923 SMBIOS_TABLE_STRING Location;\r
1924 SMBIOS_TABLE_STRING DeviceName;\r
1925 SMBIOS_TABLE_STRING Manufacturer;\r
1926 SMBIOS_TABLE_STRING SerialNumber;\r
1927 SMBIOS_TABLE_STRING AssetTagNumber;\r
1928 SMBIOS_TABLE_STRING ModelPartNumber;\r
1929 SMBIOS_TABLE_STRING RevisionLevel;\r
1930 UINT16 MaxPowerCapacity;\r
1931 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
1932 UINT16 InputVoltageProbeHandle;\r
1933 UINT16 CoolingDeviceHandle;\r
1934 UINT16 InputCurrentProbeHandle;\r
61ce5861 1935} SMBIOS_TABLE_TYPE39;\r
1936\r
bf7ea009 1937///\r
1938/// Additional Information Entry Format \r
1939///\r
61ce5861 1940typedef struct { \r
1941 UINT8 EntryLength; \r
1942 UINT16 ReferencedHandle;\r
1943 UINT8 ReferencedOffset;\r
1944 SMBIOS_TABLE_STRING EntryString;\r
1945 UINT8 Value[1];\r
1946}ADDITIONAL_INFORMATION_ENTRY;\r
1947\r
4135253b 1948///\r
1949/// Additional Information (Type 40)\r
1950///\r
98cb9ae8 1951/// This structure is intended to provide additional information for handling unspecified \r
1952/// enumerated values and interim field updates in another structure. \r
1953///\r
61ce5861 1954typedef struct {\r
1955 SMBIOS_STRUCTURE Hdr;\r
1956 UINT8 NumberOfAdditionalInformationEntries;\r
1957 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
1958} SMBIOS_TABLE_TYPE40;\r
1959\r
98cb9ae8 1960///\r
1961/// Onboard Devices Extended Information - Onboard Device Types\r
1962///\r
1963typedef enum{\r
1964 OnBoardDeviceExtendedTypeOther = 0x01,\r
1965 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
1966 OnBoardDeviceExtendedTypeVideo = 0x03,\r
1967 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
1968 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
1969 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
1970 OnBoardDeviceExtendedTypeSound = 0x07,\r
1971 OnBoardDeviceExtendedTypePATAController = 0x08,\r
1972 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
1973 OnBoardDeviceExtendedTypeSASController = 0x0A\r
1974} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
1975\r
4135253b 1976///\r
1977/// Onboard Devices Extended Information (Type 41)\r
1978///\r
98cb9ae8 1979/// The information in this structure defines the attributes of devices that \r
1980/// are onboard (soldered onto) a system element, usually the baseboard. \r
1981/// In general, an entry in this table implies that the BIOS has some level of \r
1982/// control over the enabling of the associated device for use by the system. \r
1983///\r
61ce5861 1984typedef struct {\r
98cb9ae8 1985 SMBIOS_STRUCTURE Hdr;\r
1986 SMBIOS_TABLE_STRING ReferenceDesignation;\r
2d5e30ef 1987 UINT8 DeviceType; ///< enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 1988 UINT8 DeviceTypeInstance;\r
1989 UINT16 SegmentGroupNum;\r
1990 UINT8 BusNum;\r
1991 UINT8 DevFuncNum; \r
61ce5861 1992} SMBIOS_TABLE_TYPE41;\r
1993\r
4135253b 1994///\r
1995/// Inactive (Type 126)\r
1996///\r
61ce5861 1997typedef struct {\r
1998 SMBIOS_STRUCTURE Hdr;\r
1999} SMBIOS_TABLE_TYPE126;\r
2000\r
4135253b 2001///\r
2002/// End-of-Table (Type 127)\r
2003///\r
61ce5861 2004typedef struct {\r
2005 SMBIOS_STRUCTURE Hdr;\r
2006} SMBIOS_TABLE_TYPE127;\r
2007\r
4135253b 2008///\r
2009/// Union of all the possible SMBIOS record types\r
2010///\r
61ce5861 2011typedef union {\r
2012 SMBIOS_STRUCTURE *Hdr;\r
2013 SMBIOS_TABLE_TYPE0 *Type0;\r
2014 SMBIOS_TABLE_TYPE1 *Type1;\r
2015 SMBIOS_TABLE_TYPE2 *Type2;\r
2016 SMBIOS_TABLE_TYPE3 *Type3;\r
2017 SMBIOS_TABLE_TYPE4 *Type4;\r
2018 SMBIOS_TABLE_TYPE5 *Type5;\r
2019 SMBIOS_TABLE_TYPE6 *Type6;\r
2020 SMBIOS_TABLE_TYPE7 *Type7;\r
2021 SMBIOS_TABLE_TYPE8 *Type8;\r
2022 SMBIOS_TABLE_TYPE9 *Type9;\r
2023 SMBIOS_TABLE_TYPE10 *Type10;\r
2024 SMBIOS_TABLE_TYPE11 *Type11;\r
2025 SMBIOS_TABLE_TYPE12 *Type12;\r
2026 SMBIOS_TABLE_TYPE13 *Type13;\r
2027 SMBIOS_TABLE_TYPE14 *Type14;\r
2028 SMBIOS_TABLE_TYPE15 *Type15;\r
2029 SMBIOS_TABLE_TYPE16 *Type16;\r
2030 SMBIOS_TABLE_TYPE17 *Type17;\r
2031 SMBIOS_TABLE_TYPE18 *Type18;\r
2032 SMBIOS_TABLE_TYPE19 *Type19;\r
2033 SMBIOS_TABLE_TYPE20 *Type20;\r
2034 SMBIOS_TABLE_TYPE21 *Type21;\r
2035 SMBIOS_TABLE_TYPE22 *Type22;\r
2036 SMBIOS_TABLE_TYPE23 *Type23;\r
2037 SMBIOS_TABLE_TYPE24 *Type24;\r
2038 SMBIOS_TABLE_TYPE25 *Type25;\r
2039 SMBIOS_TABLE_TYPE26 *Type26;\r
2040 SMBIOS_TABLE_TYPE27 *Type27;\r
2041 SMBIOS_TABLE_TYPE28 *Type28;\r
2042 SMBIOS_TABLE_TYPE29 *Type29;\r
2043 SMBIOS_TABLE_TYPE30 *Type30;\r
2044 SMBIOS_TABLE_TYPE31 *Type31;\r
2045 SMBIOS_TABLE_TYPE32 *Type32;\r
2046 SMBIOS_TABLE_TYPE33 *Type33;\r
2047 SMBIOS_TABLE_TYPE34 *Type34;\r
2048 SMBIOS_TABLE_TYPE35 *Type35;\r
2049 SMBIOS_TABLE_TYPE36 *Type36;\r
2050 SMBIOS_TABLE_TYPE37 *Type37;\r
2051 SMBIOS_TABLE_TYPE38 *Type38;\r
2052 SMBIOS_TABLE_TYPE39 *Type39;\r
2053 SMBIOS_TABLE_TYPE40 *Type40;\r
2054 SMBIOS_TABLE_TYPE41 *Type41;\r
2055 SMBIOS_TABLE_TYPE126 *Type126;\r
2056 SMBIOS_TABLE_TYPE127 *Type127;\r
2057 UINT8 *Raw;\r
2058} SMBIOS_STRUCTURE_POINTER;\r
2059\r
766f4bc1 2060#pragma pack()\r
2061\r
a7ed1e2e 2062#endif\r
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