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Disable warning when assigning a function pointer to a data pointer
[mirror_edk2.git] / MdePkg / Include / Ipf / SalApi.h
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878ddf1f 1/** @file\r
2 Main SAL API's defined in SAL 3.0 specification. \r
3\r
4 Copyright (c) 2006, Intel Corporation \r
5 All rights reserved. This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
13 Module Name: SalApi.h\r
14\r
15**/\r
16\r
17#ifndef __SAL_API_H__\r
18#define __SAL_API_H__\r
19\r
20typedef UINTN EFI_SAL_STATUS;\r
21\r
22//\r
23// EFI_SAL_STATUS defines\r
24//\r
25#define EFI_SAL_SUCCESS ((EFI_SAL_STATUS) 0)\r
26#define EFI_SAL_MORE_RECORDS ((EFI_SAL_STATUS) 3)\r
27#define EFI_SAL_NOT_IMPLEMENTED ((EFI_SAL_STATUS) - 1)\r
28#define EFI_SAL_INVALID_ARGUMENT ((EFI_SAL_STATUS) - 2)\r
29#define EFI_SAL_ERROR ((EFI_SAL_STATUS) - 3)\r
30#define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)\r
31#define EFI_SAL_NO_INFORMATION ((EFI_SAL_STATUS) - 5)\r
32#define EFI_SAL_NOT_ENOUGH_SCRATCH ((EFI_SAL_STATUS) - 9)\r
33\r
34//\r
35// Return values from SAL\r
36//\r
37typedef struct {\r
38 EFI_SAL_STATUS Status; // register r8\r
39 UINTN r9;\r
40 UINTN r10;\r
41 UINTN r11;\r
42} SAL_RETURN_REGS;\r
43\r
44typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)\r
45 (\r
46 IN UINT64 FunctionId,\r
47 IN UINT64 Arg2,\r
48 IN UINT64 Arg3,\r
49 IN UINT64 Arg4,\r
50 IN UINT64 Arg5,\r
51 IN UINT64 Arg6,\r
52 IN UINT64 Arg7,\r
53 IN UINT64 Arg8\r
54 );\r
55\r
56//\r
57// SAL Procedure FunctionId definition\r
58//\r
59#define EFI_SAL_SET_VECTORS 0x01000000\r
60#define EFI_SAL_GET_STATE_INFO 0x01000001\r
61#define EFI_SAL_GET_STATE_INFO_SIZE 0x01000002\r
62#define EFI_SAL_CLEAR_STATE_INFO 0x01000003\r
63#define EFI_SAL_MC_RENDEZ 0x01000004\r
64#define EFI_SAL_MC_SET_PARAMS 0x01000005\r
65#define EFI_SAL_REGISTER_PHYSICAL_ADDR 0x01000006\r
66#define EFI_SAL_CACHE_FLUSH 0x01000008\r
67#define EFI_SAL_CACHE_INIT 0x01000009\r
68#define EFI_SAL_PCI_CONFIG_READ 0x01000010\r
69#define EFI_SAL_PCI_CONFIG_WRITE 0x01000011\r
70#define EFI_SAL_FREQ_BASE 0x01000012\r
71#define EFI_SAL_UPDATE_PAL 0x01000020\r
72\r
73#define EFI_SAL_FUNCTION_ID_MASK 0x0000ffff\r
74#define EFI_SAL_MAX_SAL_FUNCTION_ID 0x00000021\r
75\r
76//\r
77// SAL Procedure parameter definitions\r
78// Not much point in using typedefs or enums because all params\r
79// are UINT64 and the entry point is common\r
80//\r
81// EFI_SAL_SET_VECTORS\r
82//\r
83#define EFI_SAL_SET_MCA_VECTOR 0x0\r
84#define EFI_SAL_SET_INIT_VECTOR 0x1\r
85#define EFI_SAL_SET_BOOT_RENDEZ_VECTOR 0x2\r
86\r
87typedef struct {\r
88 UINT64 Length : 32;\r
89 UINT64 ChecksumValid : 1;\r
90 UINT64 Reserved1 : 7;\r
91 UINT64 ByteChecksum : 8;\r
92 UINT64 Reserved2 : 16;\r
93} SAL_SET_VECTORS_CS_N;\r
94\r
95//\r
96// EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,\r
97// EFI_SAL_CLEAR_STATE_INFO\r
98//\r
99#define EFI_SAL_MCA_STATE_INFO 0x0\r
100#define EFI_SAL_INIT_STATE_INFO 0x1\r
101#define EFI_SAL_CMC_STATE_INFO 0x2\r
102#define EFI_SAL_CP_STATE_INFO 0x3\r
103\r
104//\r
105// EFI_SAL_MC_SET_PARAMS\r
106//\r
107#define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1\r
108#define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2\r
109#define EFI_SAL_MC_SET_CPE_PARAM 0x3\r
110\r
111#define EFI_SAL_MC_SET_INTR_PARAM 0x1\r
112#define EFI_SAL_MC_SET_MEM_PARAM 0x2\r
113\r
114//\r
115// EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR\r
116//\r
117#define EFI_SAL_REGISTER_PAL_ADDR 0x0\r
118\r
119//\r
120// EFI_SAL_CACHE_FLUSH\r
121//\r
122#define EFI_SAL_FLUSH_I_CACHE 0x01\r
123#define EFI_SAL_FLUSH_D_CACHE 0x02\r
124#define EFI_SAL_FLUSH_BOTH_CACHE 0x03\r
125#define EFI_SAL_FLUSH_MAKE_COHERENT 0x04\r
126\r
127//\r
128// EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE\r
129//\r
130#define EFI_SAL_PCI_CONFIG_ONE_BYTE 0x1\r
131#define EFI_SAL_PCI_CONFIG_TWO_BYTES 0x2\r
132#define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4\r
133\r
134typedef struct {\r
135 UINT64 Register : 8;\r
136 UINT64 Function : 3;\r
137 UINT64 Device : 5;\r
138 UINT64 Bus : 8;\r
139 UINT64 Segment : 8;\r
140 UINT64 Reserved : 32;\r
141} SAL_PCI_ADDRESS;\r
142\r
143//\r
144// EFI_SAL_FREQ_BASE\r
145//\r
146#define EFI_SAL_CPU_INPUT_FREQ_BASE 0x0\r
147#define EFI_SAL_PLATFORM_IT_FREQ_BASE 0x1\r
148#define EFI_SAL_PLATFORM_RTC_FREQ_BASE 0x2\r
149\r
150//\r
151// EFI_SAL_UPDATE_PAL\r
152//\r
153#define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)\r
154#define EFI_SAL_UPDATE_PAL_AUTH_FAIL ((UINT64) -2)\r
155#define EFI_SAL_UPDATE_PAL_BAD_TYPE ((UINT64) -3)\r
156#define EFI_SAL_UPDATE_PAL_READONLY ((UINT64) -4)\r
157#define EFI_SAL_UPDATE_PAL_WRITE_FAIL ((UINT64) -10)\r
158#define EFI_SAL_UPDATE_PAL_ERASE_FAIL ((UINT64) -11)\r
159#define EFI_SAL_UPDATE_PAL_READ_FAIL ((UINT64) -12)\r
160#define EFI_SAL_UPDATE_PAL_CANT_FIT ((UINT64) -13)\r
161\r
162typedef struct {\r
163 UINT32 Size;\r
164 UINT32 MmddyyyyDate;\r
165 UINT16 Version;\r
166 UINT8 Type;\r
167 UINT8 Reserved[5];\r
168 UINT64 FwVendorId;\r
169} SAL_UPDATE_PAL_DATA_BLOCK;\r
170\r
171typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {\r
172 struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;\r
173 struct SAL_UPDATE_PAL_DATA_BLOCK *DataBlock;\r
174 UINT8 StoreChecksum;\r
175 UINT8 Reserved[15];\r
176} SAL_UPDATE_PAL_INFO_BLOCK;\r
177\r
178//\r
179// SAL System Table Definitions\r
180//\r
181#pragma pack(1)\r
182typedef struct {\r
183 UINT32 Signature;\r
184 UINT32 Length;\r
185 UINT16 SalRevision;\r
186 UINT16 EntryCount;\r
187 UINT8 CheckSum;\r
188 UINT8 Reserved[7];\r
189 UINT16 SalAVersion;\r
190 UINT16 SalBVersion;\r
191 UINT8 OemId[32];\r
192 UINT8 ProductId[32];\r
193 UINT8 Reserved2[8];\r
194} SAL_SYSTEM_TABLE_HEADER;\r
195#pragma pack()\r
196\r
197#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"\r
198#define EFI_SAL_REVISION 0x0300\r
199//\r
200// SAL System Types\r
201//\r
202#define EFI_SAL_ST_ENTRY_POINT 0\r
203#define EFI_SAL_ST_MEMORY_DESCRIPTOR 1\r
204#define EFI_SAL_ST_PLATFORM_FEATURES 2\r
205#define EFI_SAL_ST_TR_USAGE 3\r
206#define EFI_SAL_ST_PTC 4\r
207#define EFI_SAL_ST_AP_WAKEUP 5\r
208\r
209#pragma pack(1)\r
210typedef struct {\r
211 UINT8 Type; // Type == 0\r
212 UINT8 Reserved[7];\r
213 UINT64 PalProcEntry;\r
214 UINT64 SalProcEntry;\r
215 UINT64 SalGlobalDataPointer;\r
216 UINT64 Reserved2[2];\r
217} SAL_ST_ENTRY_POINT_DESCRIPTOR;\r
218\r
219//\r
220// Not needed for Itanium-based OS boot\r
221//\r
222typedef struct {\r
223 UINT8 Type; // Type == 1\r
224 UINT8 NeedVirtualRegistration;\r
225 UINT8 MemoryAttributes;\r
226 UINT8 PageAccessRights;\r
227 UINT8 SupportedAttributes;\r
228 UINT8 Reserved;\r
229 UINT8 MemoryType;\r
230 UINT8 MemoryUsage;\r
231 UINT64 PhysicalMemoryAddress;\r
232 UINT32 Length;\r
233 UINT32 Reserved1;\r
234 UINT64 OemReserved;\r
235} SAL_ST_MEMORY_DESCRIPTOR_ENTRY;\r
236\r
237#pragma pack()\r
238//\r
239// Memory Attributes\r
240//\r
241#define SAL_MDT_ATTRIB_WB 0x00\r
242//\r
243// #define SAL_MDT_ATTRIB_UC 0x02\r
244//\r
245#define SAL_MDT_ATTRIB_UC 0x04\r
246#define SAL_MDT_ATTRIB_UCE 0x05\r
247#define SAL_MDT_ATTRIB_WC 0x06\r
248\r
249//\r
250// Supported memory Attributes\r
251//\r
252#define SAL_MDT_SUPPORT_WB 0x1\r
253#define SAL_MDT_SUPPORT_UC 0x2\r
254#define SAL_MDT_SUPPORT_UCE 0x4\r
255#define SAL_MDT_SUPPORT_WC 0x8\r
256\r
257//\r
258// Virtual address registration\r
259//\r
260#define SAL_MDT_NO_VA 0x00\r
261#define SAL_MDT_NEED_VA 0x01\r
262//\r
263// MemoryType info\r
264//\r
265#define SAL_REGULAR_MEMORY 0x0000\r
266#define SAL_MMIO_MAPPING 0x0001\r
267#define SAL_SAPIC_IPI_BLOCK 0x0002\r
268#define SAL_IO_PORT_MAPPING 0x0003\r
269#define SAL_FIRMWARE_MEMORY 0x0004\r
270#define SAL_BLACK_HOLE 0x000A\r
271//\r
272// Memory Usage info\r
273//\r
274#define SAL_MDT_USAGE_UNSPECIFIED 0x00\r
275#define SAL_PAL_CODE 0x01\r
276#define SAL_BOOTSERVICE_CODE 0x02\r
277#define SAL_BOOTSERVICE_DATA 0x03\r
278#define SAL_RUNTIMESERVICE_CODE 0x04\r
279#define SAL_RUNTIMESERVICE_DATA 0x05\r
280#define SAL_IA32_OPTIONROM 0x06\r
281#define SAL_IA32_SYSTEMROM 0x07\r
282#define SAL_PMI_CODE 0x0a\r
283#define SAL_PMI_DATA 0x0b\r
284\r
285#pragma pack(1)\r
286typedef struct {\r
287 UINT8 Type; // Type == 2\r
288 UINT8 PlatformFeatures;\r
289 UINT8 Reserved[14];\r
290} SAL_ST_PLATFORM_FEATURES;\r
291#pragma pack()\r
292\r
293#define SAL_PLAT_FEAT_BUS_LOCK 0x01\r
294#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02\r
295#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04\r
296\r
297#pragma pack(1)\r
298typedef struct {\r
299 UINT8 Type; // Type == 3\r
300 UINT8 TRType;\r
301 UINT8 TRNumber;\r
302 UINT8 Reserved[5];\r
303 UINT64 VirtualAddress;\r
304 UINT64 EncodedPageSize;\r
305 UINT64 Reserved1;\r
306} SAL_ST_TR_DECRIPTOR;\r
307#pragma pack()\r
308\r
309#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00\r
310#define EFI_SAL_ST_TR_USAGE_DATA 01\r
311\r
312#pragma pack(1)\r
313typedef struct {\r
314 UINT64 NumberOfProcessors;\r
315 UINT64 LocalIDRegister;\r
316} SAL_COHERENCE_DOMAIN_INFO;\r
317#pragma pack()\r
318\r
319#pragma pack(1)\r
320typedef struct {\r
321 UINT8 Type; // Type == 4\r
322 UINT8 Reserved[3];\r
323 UINT32 NumberOfDomains;\r
324 SAL_COHERENCE_DOMAIN_INFO *DomainInformation;\r
325} SAL_ST_CACHE_COHERENCE_DECRIPTOR;\r
326#pragma pack()\r
327\r
328#pragma pack(1)\r
329typedef struct {\r
330 UINT8 Type; // Type == 5\r
331 UINT8 WakeUpType;\r
332 UINT8 Reserved[6];\r
333 UINT64 ExternalInterruptVector;\r
334} SAL_ST_AP_WAKEUP_DECRIPTOR;\r
335#pragma pack()\r
336//\r
337// FIT Entry\r
338//\r
339#define EFI_SAL_FIT_ENTRY_PTR (0x100000000 - 32) // 4GB - 24\r
340#define EFI_SAL_FIT_PALA_ENTRY (0x100000000 - 48) // 4GB - 32\r
341#define EFI_SAL_FIT_PALB_TYPE 01\r
342\r
343typedef struct {\r
344 UINT64 Address;\r
345 UINT8 Size[3];\r
346 UINT8 Reserved;\r
347 UINT16 Revision;\r
348 UINT8 Type : 7;\r
349 UINT8 CheckSumValid : 1;\r
350 UINT8 CheckSum;\r
351} EFI_SAL_FIT_ENTRY;\r
352\r
353//\r
354// SAL Common Record Header\r
355//\r
356typedef struct {\r
357 UINT16 Length;\r
358 UINT8 Data[1024];\r
359} SAL_OEM_DATA;\r
360\r
361typedef struct {\r
362 UINT8 Seconds;\r
363 UINT8 Minutes;\r
364 UINT8 Hours;\r
365 UINT8 Reserved;\r
366 UINT8 Day;\r
367 UINT8 Month;\r
368 UINT8 Year;\r
369 UINT8 Century;\r
370} SAL_TIME_STAMP;\r
371\r
372typedef struct {\r
373 UINT64 RecordId;\r
374 UINT16 Revision;\r
375 UINT8 ErrorSeverity;\r
376 UINT8 ValidationBits;\r
377 UINT32 RecordLength;\r
378 SAL_TIME_STAMP TimeStamp;\r
379 UINT8 OemPlatformId[16];\r
380} SAL_RECORD_HEADER;\r
381\r
382typedef struct {\r
383 EFI_GUID Guid;\r
384 UINT16 Revision;\r
385 UINT8 ErrorRecoveryInfo;\r
386 UINT8 Reserved;\r
387 UINT32 SectionLength;\r
388} SAL_SEC_HEADER;\r
389\r
390//\r
391// SAL Processor Record\r
392//\r
393#define SAL_PROCESSOR_ERROR_RECORD_INFO \\r
394 { \\r
395 0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
396 }\r
397\r
398#define CHECK_INFO_VALID_BIT_MASK 0x1\r
399#define REQUESTOR_ID_VALID_BIT_MASK 0x2\r
400#define RESPONDER_ID_VALID_BIT_MASK 0x4\r
401#define TARGER_ID_VALID_BIT_MASK 0x8\r
402#define PRECISE_IP_VALID_BIT_MASK 0x10\r
403\r
404typedef struct {\r
405 UINT64 InfoValid : 1;\r
406 UINT64 ReqValid : 1;\r
407 UINT64 RespValid : 1;\r
408 UINT64 TargetValid : 1;\r
409 UINT64 IpValid : 1;\r
410 UINT64 Reserved : 59;\r
411 UINT64 Info;\r
412 UINT64 Req;\r
413 UINT64 Resp;\r
414 UINT64 Target;\r
415 UINT64 Ip;\r
416} MOD_ERROR_INFO;\r
417\r
418typedef struct {\r
419 UINT8 CpuidInfo[40];\r
420 UINT8 Reserved;\r
421} CPUID_INFO;\r
422\r
423typedef struct {\r
424 UINT64 FrLow;\r
425 UINT64 FrHigh;\r
426} FR_STRUCT;\r
427\r
428#define MIN_STATE_VALID_BIT_MASK 0x1\r
429#define BR_VALID_BIT_MASK 0x2\r
430#define CR_VALID_BIT_MASK 0x4\r
431#define AR_VALID_BIT_MASK 0x8\r
432#define RR_VALID_BIT_MASK 0x10\r
433#define FR_VALID_BIT_MASK 0x20\r
434\r
435typedef struct {\r
436 UINT64 ValidFieldBits;\r
437 UINT8 MinStateInfo[1024];\r
438 UINT64 Br[8];\r
439 UINT64 Cr[128];\r
440 UINT64 Ar[128];\r
441 UINT64 Rr[8];\r
442 FR_STRUCT Fr[128];\r
443} PSI_STATIC_STRUCT;\r
444\r
445#define PROC_ERROR_MAP_VALID_BIT_MASK 0x1\r
446#define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2\r
447#define PROC_CR_LID_VALID_BIT_MASK 0x4\r
448#define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8\r
449#define CPU_INFO_VALID_BIT_MASK 0x1000000\r
450\r
451typedef struct {\r
452 SAL_SEC_HEADER SectionHeader;\r
453 UINT64 ValidationBits;\r
454 UINT64 ProcErrorMap;\r
455 UINT64 ProcStateParameter;\r
456 UINT64 ProcCrLid;\r
457 MOD_ERROR_INFO CacheError[15];\r
458 MOD_ERROR_INFO TlbError[15];\r
459 MOD_ERROR_INFO BusError[15];\r
460 MOD_ERROR_INFO RegFileCheck[15];\r
461 MOD_ERROR_INFO MsCheck[15];\r
462 CPUID_INFO CpuInfo;\r
463 PSI_STATIC_STRUCT PsiValidData;\r
464} SAL_PROCESSOR_ERROR_RECORD;\r
465\r
466//\r
467// Sal Platform memory Error Record\r
468//\r
469#define SAL_MEMORY_ERROR_RECORD_INFO \\r
470 { \\r
471 0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
472 }\r
473\r
474#define MEMORY_ERROR_STATUS_VALID_BIT_MASK 0x1\r
475#define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK 0x2\r
476#define MEMORY_ADDR_BIT_MASK 0x4\r
477#define MEMORY_NODE_VALID_BIT_MASK 0x8\r
478#define MEMORY_CARD_VALID_BIT_MASK 0x10\r
479#define MEMORY_MODULE_VALID_BIT_MASK 0x20\r
480#define MEMORY_BANK_VALID_BIT_MASK 0x40\r
481#define MEMORY_DEVICE_VALID_BIT_MASK 0x80\r
482#define MEMORY_ROW_VALID_BIT_MASK 0x100\r
483#define MEMORY_COLUMN_VALID_BIT_MASK 0x200\r
484#define MEMORY_BIT_POSITION_VALID_BIT_MASK 0x400\r
485#define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x800\r
486#define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x1000\r
487#define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK 0x2000\r
488#define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK 0x4000\r
489#define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK 0x8000\r
490#define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x10000\r
491\r
492typedef struct {\r
493 SAL_SEC_HEADER SectionHeader;\r
494 UINT64 ValidationBits;\r
495 UINT64 MemErrorStatus;\r
496 UINT64 MemPhysicalAddress;\r
497 UINT64 MemPhysicalAddressMask;\r
498 UINT16 MemNode;\r
499 UINT16 MemCard;\r
500 UINT16 MemModule;\r
501 UINT16 MemBank;\r
502 UINT16 MemDevice;\r
503 UINT16 MemRow;\r
504 UINT16 MemColumn;\r
505 UINT16 MemBitPosition;\r
506 UINT64 ModRequestorId;\r
507 UINT64 ModResponderId;\r
508 UINT64 ModTargetId;\r
509 UINT64 BusSpecificData;\r
510 UINT8 MemPlatformOemId[16];\r
511} SAL_MEMORY_ERROR_RECORD;\r
512\r
513//\r
514// PCI BUS Errors\r
515//\r
516#define SAL_PCI_BUS_ERROR_RECORD_INFO \\r
517 { \\r
518 0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
519 }\r
520\r
521#define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK 0x1\r
522#define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK 0x2\r
523#define PCI_BUS_ID_VALID_BIT_MASK 0x4\r
524#define PCI_BUS_ADDRESS_VALID_BIT_MASK 0x8\r
525#define PCI_BUS_DATA_VALID_BIT_MASK 0x10\r
526#define PCI_BUS_CMD_VALID_BIT_MASK 0x20\r
527#define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK 0x40\r
528#define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK 0x80\r
529#define PCI_BUS_TARGET_VALID_BIT_MASK 0x100\r
530#define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200\r
531#define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400\r
532\r
533typedef struct {\r
534 UINT8 BusNumber;\r
535 UINT8 SegmentNumber;\r
536} PCI_BUS_ID;\r
537\r
538typedef struct {\r
539 SAL_SEC_HEADER SectionHeader;\r
540 UINT64 ValidationBits;\r
541 UINT64 PciBusErrorStatus;\r
542 UINT16 PciBusErrorType;\r
543 PCI_BUS_ID PciBusId;\r
544 UINT32 Reserved;\r
545 UINT64 PciBusAddress;\r
546 UINT64 PciBusData;\r
547 UINT64 PciBusCommand;\r
548 UINT64 PciBusRequestorId;\r
549 UINT64 PciBusResponderId;\r
550 UINT64 PciBusTargetId;\r
551 UINT8 PciBusOemId[16];\r
552} SAL_PCI_BUS_ERROR_RECORD;\r
553\r
554//\r
555// PCI Component Errors\r
556//\r
557#define SAL_PCI_COMP_ERROR_RECORD_INFO \\r
558 { \\r
559 0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
560 }\r
561\r
562#define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK 0x1\r
563#define PCI_COMP_INFO_VALID_BIT_MASK 0x2\r
564#define PCI_COMP_MEM_NUM_VALID_BIT_MASK 0x4\r
565#define PCI_COMP_IO_NUM_VALID_BIT_MASK 0x8\r
566#define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK 0x10\r
567#define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20\r
568\r
569typedef struct {\r
570 UINT16 VendorId;\r
571 UINT16 DeviceId;\r
572 UINT8 ClassCode[3];\r
573 UINT8 FunctionNumber;\r
574 UINT8 DeviceNumber;\r
575 UINT8 BusNumber;\r
576 UINT8 SegmentNumber;\r
577 UINT8 Reserved[5];\r
578} PCI_COMP_INFO;\r
579\r
580typedef struct {\r
581 SAL_SEC_HEADER SectionHeader;\r
582 UINT64 ValidationBits;\r
583 UINT64 PciComponentErrorStatus;\r
584 PCI_COMP_INFO PciComponentInfo;\r
585 UINT32 PciComponentMemNum;\r
586 UINT32 PciComponentIoNum;\r
587 UINT8 PciBusOemId[16];\r
588} SAL_PCI_COMPONENT_ERROR_RECORD;\r
589\r
590//\r
591// Sal Device Errors Info.\r
592//\r
593#define SAL_DEVICE_ERROR_RECORD_INFO \\r
594 { \\r
595 0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
596 }\r
597\r
598#define SEL_RECORD_ID_VALID_BIT_MASK 0x1;\r
599#define SEL_RECORD_TYPE_VALID_BIT_MASK 0x2;\r
600#define SEL_GENERATOR_ID_VALID_BIT_MASK 0x4;\r
601#define SEL_EVM_REV_VALID_BIT_MASK 0x8;\r
602#define SEL_SENSOR_TYPE_VALID_BIT_MASK 0x10;\r
603#define SEL_SENSOR_NUM_VALID_BIT_MASK 0x20;\r
604#define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;\r
605#define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;\r
606#define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;\r
607#define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;\r
608\r
609typedef struct {\r
610 SAL_SEC_HEADER SectionHeader;\r
611 UINT64 ValidationBits;\r
612 UINT16 SelRecordId;\r
613 UINT8 SelRecordType;\r
614 UINT32 TimeStamp;\r
615 UINT16 GeneratorId;\r
616 UINT8 EvmRevision;\r
617 UINT8 SensorType;\r
618 UINT8 SensorNum;\r
619 UINT8 EventDirType;\r
620 UINT8 Data1;\r
621 UINT8 Data2;\r
622 UINT8 Data3;\r
623} SAL_DEVICE_ERROR_RECORD;\r
624\r
625//\r
626// Sal SMBIOS Device Errors Info.\r
627//\r
628#define SAL_SMBIOS_ERROR_RECORD_INFO \\r
629 { \\r
630 0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
631 }\r
632\r
633#define SMBIOS_EVENT_TYPE_VALID_BIT_MASK 0x1\r
634#define SMBIOS_LENGTH_VALID_BIT_MASK 0x2\r
635#define SMBIOS_TIME_STAMP_VALID_BIT_MASK 0x4\r
636#define SMBIOS_DATA_VALID_BIT_MASK 0x8\r
637\r
638typedef struct {\r
639 SAL_SEC_HEADER SectionHeader;\r
640 UINT64 ValidationBits;\r
641 UINT8 SmbiosEventType;\r
642 UINT8 SmbiosLength;\r
643 UINT8 SmbiosBcdTimeStamp[6];\r
644} SAL_SMBIOS_DEVICE_ERROR_RECORD;\r
645\r
646//\r
647// Sal Platform Specific Errors Info.\r
648//\r
649#define SAL_PLATFORM_ERROR_RECORD_INFO \\r
650 { \\r
651 0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
652 }\r
653\r
654#define PLATFORM_ERROR_STATUS_VALID_BIT_MASK 0x1\r
655#define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x2\r
656#define PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x4\r
657#define PLATFORM_TARGET_VALID_BIT_MASK 0x8\r
658#define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK 0x10\r
659#define PLATFORM_OEM_ID_VALID_BIT_MASK 0x20\r
660#define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40\r
661#define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80\r
662\r
663typedef struct {\r
664 SAL_SEC_HEADER SectionHeader;\r
665 UINT64 ValidationBits;\r
666 UINT64 PlatformErrorStatus;\r
667 UINT64 PlatformRequestorId;\r
668 UINT64 PlatformResponderId;\r
669 UINT64 PlatformTargetId;\r
670 UINT64 PlatformBusSpecificData;\r
671 UINT8 OemComponentId[16];\r
672} SAL_PLATFORM_SPECIFIC_ERROR_RECORD;\r
673\r
674//\r
675// Union of all the possible Sal Record Types\r
676//\r
677typedef union {\r
678 SAL_RECORD_HEADER *RecordHeader;\r
679 SAL_PROCESSOR_ERROR_RECORD *SalProcessorRecord;\r
680 SAL_PCI_BUS_ERROR_RECORD *SalPciBusRecord;\r
681 SAL_PCI_COMPONENT_ERROR_RECORD *SalPciComponentRecord;\r
682 SAL_DEVICE_ERROR_RECORD *ImpiRecord;\r
683 SAL_SMBIOS_DEVICE_ERROR_RECORD *SmbiosRecord;\r
684 SAL_PLATFORM_SPECIFIC_ERROR_RECORD *PlatformRecord;\r
685 SAL_MEMORY_ERROR_RECORD *MemoryRecord;\r
686 UINT8 *Raw;\r
687} SAL_ERROR_RECORDS_POINTERS;\r
688\r
689#pragma pack()\r
690\r
691#endif\r
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