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1 | /** @file\r |
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2 | Memory-only library functions with no library constructor/destructor\r |
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3 | \r |
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4 | Copyright (c) 2006, Intel Corporation\r |
| 5 | All rights reserved. This program and the accompanying materials\r |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | which accompanies this distribution. The full text of the license may be found at\r |
| 8 | http://opensource.org/licenses/bsd-license.php\r |
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9 | \r |
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10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
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12 | \r |
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13 | Module Name: BaseLib.h\r |
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14 | \r |
| 15 | **/\r |
| 16 | \r |
| 17 | #ifndef __BASE_LIB__\r |
| 18 | #define __BASE_LIB__\r |
| 19 | \r |
| 20 | //\r |
| 21 | // Definitions for architecture specific types\r |
| 22 | // These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER\r |
| 23 | //\r |
| 24 | \r |
| 25 | //\r |
| 26 | // SPIN_LOCK\r |
| 27 | //\r |
| 28 | typedef UINTN SPIN_LOCK;\r |
| 29 | \r |
| 30 | #if defined (MDE_CPU_IA32)\r |
| 31 | //\r |
| 32 | // IA32 context buffer used by SetJump() and LongJump()\r |
| 33 | //\r |
| 34 | typedef struct {\r |
| 35 | UINT32 Ebx;\r |
| 36 | UINT32 Esi;\r |
| 37 | UINT32 Edi;\r |
| 38 | UINT32 Ebp;\r |
| 39 | UINT32 Esp;\r |
| 40 | UINT32 Eip;\r |
| 41 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 42 | \r |
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43 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
| 44 | \r |
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45 | #elif defined (MDE_CPU_IPF)\r |
| 46 | //\r |
| 47 | // IPF context buffer used by SetJump() and LongJump()\r |
| 48 | //\r |
| 49 | typedef struct {\r |
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50 | UINT64 F2[2];\r |
| 51 | UINT64 F3[2];\r |
| 52 | UINT64 F4[2];\r |
| 53 | UINT64 F5[2];\r |
| 54 | UINT64 F16[2];\r |
| 55 | UINT64 F17[2];\r |
| 56 | UINT64 F18[2];\r |
| 57 | UINT64 F19[2];\r |
| 58 | UINT64 F20[2];\r |
| 59 | UINT64 F21[2];\r |
| 60 | UINT64 F22[2];\r |
| 61 | UINT64 F23[2];\r |
| 62 | UINT64 F24[2];\r |
| 63 | UINT64 F25[2];\r |
| 64 | UINT64 F26[2];\r |
| 65 | UINT64 F27[2];\r |
| 66 | UINT64 F28[2];\r |
| 67 | UINT64 F29[2];\r |
| 68 | UINT64 F30[2];\r |
| 69 | UINT64 F31[2];\r |
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70 | UINT64 R4;\r |
| 71 | UINT64 R5;\r |
| 72 | UINT64 R6;\r |
| 73 | UINT64 R7;\r |
| 74 | UINT64 SP;\r |
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75 | UINT64 BR0;\r |
| 76 | UINT64 BR1;\r |
| 77 | UINT64 BR2;\r |
| 78 | UINT64 BR3;\r |
| 79 | UINT64 BR4;\r |
| 80 | UINT64 BR5;\r |
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81 | UINT64 InitialUNAT;\r |
| 82 | UINT64 AfterSpillUNAT;\r |
| 83 | UINT64 PFS;\r |
| 84 | UINT64 BSP;\r |
| 85 | UINT64 Predicates;\r |
| 86 | UINT64 LoopCount;\r |
| 87 | UINT64 FPSR;\r |
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88 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 89 | \r |
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90 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r |
| 91 | \r |
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92 | #elif defined (MDE_CPU_X64)\r |
| 93 | //\r |
| 94 | // X64 context buffer used by SetJump() and LongJump()\r |
| 95 | //\r |
| 96 | typedef struct {\r |
| 97 | UINT64 Rbx;\r |
| 98 | UINT64 Rsp;\r |
| 99 | UINT64 Rbp;\r |
| 100 | UINT64 Rdi;\r |
| 101 | UINT64 Rsi;\r |
| 102 | UINT64 R12;\r |
| 103 | UINT64 R13;\r |
| 104 | UINT64 R14;\r |
| 105 | UINT64 R15;\r |
| 106 | UINT64 Rip;\r |
| 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 108 | \r |
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109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
| 110 | \r |
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111 | #elif defined (MDE_CPU_EBC)\r |
| 112 | //\r |
| 113 | // EBC context buffer used by SetJump() and LongJump()\r |
| 114 | //\r |
| 115 | typedef struct {\r |
| 116 | UINT64 R0;\r |
| 117 | UINT64 R1;\r |
| 118 | UINT64 R2;\r |
| 119 | UINT64 R3;\r |
| 120 | UINT64 IP;\r |
| 121 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 122 | \r |
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123 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
| 124 | \r |
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125 | #else\r |
| 126 | #error Unknown Processor Type\r |
| 127 | #endif\r |
| 128 | \r |
| 129 | //\r |
| 130 | // String Services\r |
| 131 | //\r |
| 132 | \r |
| 133 | /**\r |
| 134 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r |
| 135 | string and returns the new Unicode string.\r |
| 136 | \r |
| 137 | This function copies the contents of the Unicode string Source to the Unicode\r |
| 138 | string Destination, and returns Destination. If Source and Destination\r |
| 139 | overlap, then the results are undefined.\r |
| 140 | \r |
| 141 | If Destination is NULL, then ASSERT().\r |
| 142 | If Source is NULL, then ASSERT().\r |
| 143 | If Source and Destination overlap, then ASSERT().\r |
| 144 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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145 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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146 | Null-terminator, then ASSERT().\r |
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147 | \r |
| 148 | @param Destination Pointer to a Null-terminated Unicode string.\r |
| 149 | @param Source Pointer to a Null-terminated Unicode string.\r |
| 150 | \r |
| 151 | @return Destiantion\r |
| 152 | \r |
| 153 | **/\r |
| 154 | CHAR16 *\r |
| 155 | EFIAPI\r |
| 156 | StrCpy (\r |
| 157 | OUT CHAR16 *Destination,\r |
| 158 | IN CONST CHAR16 *Source\r |
| 159 | );\r |
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160 | /**\r |
| 161 | Copies one Null-terminated Unicode string with a maximum length to another\r |
| 162 | Null-terminated Unicode string with a maximum length and returns the new\r |
| 163 | Unicode string.\r |
| 164 | \r |
| 165 | This function copies the contents of the Unicode string Source to the Unicode\r |
| 166 | string Destination, and returns Destination. At most, Length Unicode\r |
| 167 | characters are copied from Source to Destination. If Length is 0, then\r |
| 168 | Destination is returned unmodified. If Length is greater that the number of\r |
| 169 | Unicode characters in Source, then Destination is padded with Null Unicode\r |
| 170 | characters. If Source and Destination overlap, then the results are\r |
| 171 | undefined.\r |
| 172 | \r |
| 173 | If Destination is NULL, then ASSERT().\r |
| 174 | If Source is NULL, then ASSERT().\r |
| 175 | If Source and Destination overlap, then ASSERT().\r |
| 176 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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177 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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178 | Null-terminator, then ASSERT().\r |
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179 | \r |
| 180 | @param Destination Pointer to a Null-terminated Unicode string.\r |
| 181 | @param Source Pointer to a Null-terminated Unicode string.\r |
| 182 | @param Length Maximum number of Unicode characters to copy.\r |
| 183 | \r |
| 184 | @return Destination\r |
| 185 | \r |
| 186 | **/\r |
| 187 | CHAR16 *\r |
| 188 | EFIAPI\r |
| 189 | StrnCpy (\r |
| 190 | OUT CHAR16 *Destination,\r |
| 191 | IN CONST CHAR16 *Source,\r |
| 192 | IN UINTN Length\r |
| 193 | );\r |
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194 | /**\r |
| 195 | Returns the length of a Null-terminated Unicode string.\r |
| 196 | \r |
| 197 | This function returns the number of Unicode characters in the Null-terminated\r |
| 198 | Unicode string specified by String.\r |
| 199 | \r |
| 200 | If String is NULL, then ASSERT().\r |
| 201 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
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202 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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203 | Null-terminator, then ASSERT().\r |
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204 | \r |
| 205 | @param String Pointer to a Null-terminated Unicode string.\r |
| 206 | \r |
| 207 | @return The length of String.\r |
| 208 | \r |
| 209 | **/\r |
| 210 | UINTN\r |
| 211 | EFIAPI\r |
| 212 | StrLen (\r |
| 213 | IN CONST CHAR16 *String\r |
| 214 | );\r |
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215 | /**\r |
| 216 | Returns the size of a Null-terminated Unicode string in bytes, including the\r |
| 217 | Null terminator.\r |
| 218 | \r |
| 219 | This function returns the size, in bytes, of the Null-terminated Unicode\r |
| 220 | string specified by String.\r |
| 221 | \r |
| 222 | If String is NULL, then ASSERT().\r |
| 223 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
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224 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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225 | Null-terminator, then ASSERT().\r |
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226 | \r |
| 227 | @param String Pointer to a Null-terminated Unicode string.\r |
| 228 | \r |
| 229 | @return The size of String.\r |
| 230 | \r |
| 231 | **/\r |
| 232 | UINTN\r |
| 233 | EFIAPI\r |
| 234 | StrSize (\r |
| 235 | IN CONST CHAR16 *String\r |
| 236 | );\r |
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237 | /**\r |
| 238 | Compares two Null-terminated Unicode strings, and returns the difference\r |
| 239 | between the first mismatched Unicode characters.\r |
| 240 | \r |
| 241 | This function compares the Null-terminated Unicode string FirstString to the\r |
| 242 | Null-terminated Unicode string SecondString. If FirstString is identical to\r |
| 243 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r |
| 244 | mismatched Unicode character in SecondString subtracted from the first\r |
| 245 | mismatched Unicode character in FirstString.\r |
| 246 | \r |
| 247 | If FirstString is NULL, then ASSERT().\r |
| 248 | If SecondString is NULL, then ASSERT().\r |
| 249 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r |
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250 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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251 | Null-terminator, then ASSERT().\r |
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252 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
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253 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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254 | Null-terminator, then ASSERT().\r |
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255 | \r |
| 256 | @param FirstString Pointer to a Null-terminated Unicode string.\r |
| 257 | @param SecondString Pointer to a Null-terminated Unicode string.\r |
| 258 | \r |
| 259 | @retval 0 FirstString is identical to SecondString.\r |
| 260 | @retval !=0 FirstString is not identical to SecondString.\r |
| 261 | \r |
| 262 | **/\r |
| 263 | INTN\r |
| 264 | EFIAPI\r |
| 265 | StrCmp (\r |
| 266 | IN CONST CHAR16 *FirstString,\r |
| 267 | IN CONST CHAR16 *SecondString\r |
| 268 | );\r |
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269 | /**\r |
| 270 | Compares two Null-terminated Unicode strings with maximum lengths, and\r |
| 271 | returns the difference between the first mismatched Unicode characters.\r |
| 272 | \r |
| 273 | This function compares the Null-terminated Unicode string FirstString to the\r |
| 274 | Null-terminated Unicode string SecondString. At most, Length Unicode\r |
| 275 | characters will be compared. If Length is 0, then 0 is returned. If\r |
| 276 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r |
| 277 | value returned is the first mismatched Unicode character in SecondString\r |
| 278 | subtracted from the first mismatched Unicode character in FirstString.\r |
| 279 | \r |
| 280 | If FirstString is NULL, then ASSERT().\r |
| 281 | If SecondString is NULL, then ASSERT().\r |
| 282 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r |
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283 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 284 | Null-terminator, then ASSERT().\r |
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285 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
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286 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 287 | Null-terminator, then ASSERT().\r |
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288 | \r |
| 289 | @param FirstString Pointer to a Null-terminated Unicode string.\r |
| 290 | @param SecondString Pointer to a Null-terminated Unicode string.\r |
| 291 | @param Length Maximum number of Unicode characters to compare.\r |
| 292 | \r |
| 293 | @retval 0 FirstString is identical to SecondString.\r |
| 294 | @retval !=0 FirstString is not identical to SecondString.\r |
| 295 | \r |
| 296 | **/\r |
| 297 | INTN\r |
| 298 | EFIAPI\r |
| 299 | StrnCmp (\r |
| 300 | IN CONST CHAR16 *FirstString,\r |
| 301 | IN CONST CHAR16 *SecondString,\r |
| 302 | IN UINTN Length\r |
| 303 | );\r |
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304 | /**\r |
| 305 | Concatenates one Null-terminated Unicode string to another Null-terminated\r |
| 306 | Unicode string, and returns the concatenated Unicode string.\r |
| 307 | \r |
| 308 | This function concatenates two Null-terminated Unicode strings. The contents\r |
| 309 | of Null-terminated Unicode string Source are concatenated to the end of\r |
| 310 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r |
| 311 | Unicode String is returned. If Source and Destination overlap, then the\r |
| 312 | results are undefined.\r |
| 313 | \r |
| 314 | If Destination is NULL, then ASSERT().\r |
| 315 | If Source is NULL, then ASSERT().\r |
| 316 | If Source and Destination overlap, then ASSERT().\r |
| 317 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
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318 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 319 | Null-terminator, then ASSERT().\r |
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320 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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321 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 322 | Null-terminator, then ASSERT().\r |
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323 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
| 324 | and Source results in a Unicode string with more than\r |
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325 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 326 | Null-terminator, then ASSERT().\r |
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327 | \r |
| 328 | @param Destination Pointer to a Null-terminated Unicode string.\r |
| 329 | @param Source Pointer to a Null-terminated Unicode string.\r |
| 330 | \r |
| 331 | @return Destination\r |
| 332 | \r |
| 333 | **/\r |
| 334 | CHAR16 *\r |
| 335 | EFIAPI\r |
| 336 | StrCat (\r |
| 337 | IN OUT CHAR16 *Destination,\r |
| 338 | IN CONST CHAR16 *Source\r |
| 339 | );\r |
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340 | /**\r |
| 341 | Concatenates one Null-terminated Unicode string with a maximum length to the\r |
| 342 | end of another Null-terminated Unicode string, and returns the concatenated\r |
| 343 | Unicode string.\r |
| 344 | \r |
| 345 | This function concatenates two Null-terminated Unicode strings. The contents\r |
| 346 | of Null-terminated Unicode string Source are concatenated to the end of\r |
| 347 | Null-terminated Unicode string Destination, and Destination is returned. At\r |
| 348 | most, Length Unicode characters are concatenated from Source to the end of\r |
| 349 | Destination, and Destination is always Null-terminated. If Length is 0, then\r |
| 350 | Destination is returned unmodified. If Source and Destination overlap, then\r |
| 351 | the results are undefined.\r |
| 352 | \r |
| 353 | If Destination is NULL, then ASSERT().\r |
| 354 | If Source is NULL, then ASSERT().\r |
| 355 | If Source and Destination overlap, then ASSERT().\r |
| 356 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
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357 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 358 | Null-terminator, then ASSERT().\r |
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359 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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360 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 361 | Null-terminator, then ASSERT().\r |
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362 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
| 363 | and Source results in a Unicode string with more than\r |
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364 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
| 365 | Null-terminator, then ASSERT().\r |
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366 | \r |
| 367 | @param Destination Pointer to a Null-terminated Unicode string.\r |
| 368 | @param Source Pointer to a Null-terminated Unicode string.\r |
| 369 | @param Length Maximum number of Unicode characters to concatenate from\r |
| 370 | Source.\r |
| 371 | \r |
| 372 | @return Destination\r |
| 373 | \r |
| 374 | **/\r |
| 375 | CHAR16 *\r |
| 376 | EFIAPI\r |
| 377 | StrnCat (\r |
| 378 | IN OUT CHAR16 *Destination,\r |
| 379 | IN CONST CHAR16 *Source,\r |
| 380 | IN UINTN Length\r |
| 381 | );\r |
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382 | /**\r |
| 383 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r |
| 384 | string and returns the new ASCII string.\r |
| 385 | \r |
| 386 | This function copies the contents of the ASCII string Source to the ASCII\r |
| 387 | string Destination, and returns Destination. If Source and Destination\r |
| 388 | overlap, then the results are undefined.\r |
| 389 | \r |
| 390 | If Destination is NULL, then ASSERT().\r |
| 391 | If Source is NULL, then ASSERT().\r |
| 392 | If Source and Destination overlap, then ASSERT().\r |
| 393 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r |
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394 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 395 | then ASSERT().\r |
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396 | \r |
| 397 | @param Destination Pointer to a Null-terminated ASCII string.\r |
| 398 | @param Source Pointer to a Null-terminated ASCII string.\r |
| 399 | \r |
| 400 | @return Destination\r |
| 401 | \r |
| 402 | **/\r |
| 403 | CHAR8 *\r |
| 404 | EFIAPI\r |
| 405 | AsciiStrCpy (\r |
| 406 | OUT CHAR8 *Destination,\r |
| 407 | IN CONST CHAR8 *Source\r |
| 408 | );\r |
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409 | /**\r |
| 410 | Copies one Null-terminated ASCII string with a maximum length to another\r |
| 411 | Null-terminated ASCII string with a maximum length and returns the new ASCII\r |
| 412 | string.\r |
| 413 | \r |
| 414 | This function copies the contents of the ASCII string Source to the ASCII\r |
| 415 | string Destination, and returns Destination. At most, Length ASCII characters\r |
| 416 | are copied from Source to Destination. If Length is 0, then Destination is\r |
| 417 | returned unmodified. If Length is greater that the number of ASCII characters\r |
| 418 | in Source, then Destination is padded with Null ASCII characters. If Source\r |
| 419 | and Destination overlap, then the results are undefined.\r |
| 420 | \r |
| 421 | If Destination is NULL, then ASSERT().\r |
| 422 | If Source is NULL, then ASSERT().\r |
| 423 | If Source and Destination overlap, then ASSERT().\r |
| 424 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
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425 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 426 | then ASSERT().\r |
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427 | \r |
| 428 | @param Destination Pointer to a Null-terminated ASCII string.\r |
| 429 | @param Source Pointer to a Null-terminated ASCII string.\r |
| 430 | @param Length Maximum number of ASCII characters to copy.\r |
| 431 | \r |
| 432 | @return Destination\r |
| 433 | \r |
| 434 | **/\r |
| 435 | CHAR8 *\r |
| 436 | EFIAPI\r |
| 437 | AsciiStrnCpy (\r |
| 438 | OUT CHAR8 *Destination,\r |
| 439 | IN CONST CHAR8 *Source,\r |
| 440 | IN UINTN Length\r |
| 441 | );\r |
| 878ddf1f |
442 | /**\r |
| 443 | Returns the length of a Null-terminated ASCII string.\r |
| 444 | \r |
| 445 | This function returns the number of ASCII characters in the Null-terminated\r |
| 446 | ASCII string specified by String.\r |
| 447 | \r |
| 448 | If String is NULL, then ASSERT().\r |
| 449 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r |
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450 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 451 | then ASSERT().\r |
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452 | \r |
| 453 | @param String Pointer to a Null-terminated ASCII string.\r |
| 454 | \r |
| 455 | @return The length of String.\r |
| 456 | \r |
| 457 | **/\r |
| 458 | UINTN\r |
| 459 | EFIAPI\r |
| 460 | AsciiStrLen (\r |
| 461 | IN CONST CHAR8 *String\r |
| 462 | );\r |
| 878ddf1f |
463 | /**\r |
| 464 | Returns the size of a Null-terminated ASCII string in bytes, including the\r |
| 465 | Null terminator.\r |
| 466 | \r |
| 467 | This function returns the size, in bytes, of the Null-terminated ASCII string\r |
| 468 | specified by String.\r |
| 469 | \r |
| 470 | If String is NULL, then ASSERT().\r |
| 471 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r |
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472 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 473 | then ASSERT().\r |
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474 | \r |
| 475 | @param String Pointer to a Null-terminated ASCII string.\r |
| 476 | \r |
| 477 | @return The size of String.\r |
| 478 | \r |
| 479 | **/\r |
| 480 | UINTN\r |
| 481 | EFIAPI\r |
| 482 | AsciiStrSize (\r |
| 483 | IN CONST CHAR8 *String\r |
| 484 | );\r |
| 878ddf1f |
485 | /**\r |
| 486 | Compares two Null-terminated ASCII strings, and returns the difference\r |
| 487 | between the first mismatched ASCII characters.\r |
| 488 | \r |
| 489 | This function compares the Null-terminated ASCII string FirstString to the\r |
| 490 | Null-terminated ASCII string SecondString. If FirstString is identical to\r |
| 491 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r |
| 492 | mismatched ASCII character in SecondString subtracted from the first\r |
| 493 | mismatched ASCII character in FirstString.\r |
| 494 | \r |
| 495 | If FirstString is NULL, then ASSERT().\r |
| 496 | If SecondString is NULL, then ASSERT().\r |
| 497 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
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498 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 499 | then ASSERT().\r |
| 878ddf1f |
500 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
| 30817eb4 |
501 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
| 502 | Null-terminator, then ASSERT().\r |
| 878ddf1f |
503 | \r |
| 504 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
| 505 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
| 506 | \r |
| 507 | @retval 0 FirstString is identical to SecondString.\r |
| 508 | @retval !=0 FirstString is not identical to SecondString.\r |
| 509 | \r |
| 510 | **/\r |
| 511 | INTN\r |
| 512 | EFIAPI\r |
| 513 | AsciiStrCmp (\r |
| 514 | IN CONST CHAR8 *FirstString,\r |
| 515 | IN CONST CHAR8 *SecondString\r |
| 516 | );\r |
| 878ddf1f |
517 | /**\r |
| 518 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r |
| 519 | and returns the difference between the first mismatched ASCII characters.\r |
| 520 | \r |
| 521 | This function performs a case insensitive comparison of the Null-terminated\r |
| 522 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r |
| 523 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r |
| 524 | value returned is the first mismatched lower case ASCII character in\r |
| 525 | SecondString subtracted from the first mismatched lower case ASCII character\r |
| 526 | in FirstString.\r |
| 527 | \r |
| 528 | If FirstString is NULL, then ASSERT().\r |
| 529 | If SecondString is NULL, then ASSERT().\r |
| 530 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
| 30817eb4 |
531 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 532 | then ASSERT().\r |
| 878ddf1f |
533 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
| 30817eb4 |
534 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
| 535 | Null-terminator, then ASSERT().\r |
| 878ddf1f |
536 | \r |
| 537 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
| 538 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
| 539 | \r |
| 540 | @retval 0 FirstString is identical to SecondString using case insensitive\r |
| 541 | comparisons.\r |
| 542 | @retval !=0 FirstString is not identical to SecondString using case\r |
| 543 | insensitive comparisons.\r |
| 544 | \r |
| 545 | **/\r |
| 546 | INTN\r |
| 547 | EFIAPI\r |
| 548 | AsciiStriCmp (\r |
| 549 | IN CONST CHAR8 *FirstString,\r |
| 550 | IN CONST CHAR8 *SecondString\r |
| 551 | );\r |
| 878ddf1f |
552 | /**\r |
| 553 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r |
| 554 | the difference between the first mismatched ASCII characters.\r |
| 555 | \r |
| 556 | This function compares the Null-terminated ASCII string FirstString to the\r |
| 557 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r |
| 558 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r |
| 559 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r |
| 560 | is the first mismatched ASCII character in SecondString subtracted from the\r |
| 561 | first mismatched ASCII character in FirstString.\r |
| 562 | \r |
| 563 | If FirstString is NULL, then ASSERT().\r |
| 564 | If SecondString is NULL, then ASSERT().\r |
| 565 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
| 30817eb4 |
566 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 567 | then ASSERT().\r |
| 568 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r |
| 569 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 570 | then ASSERT().\r |
| 878ddf1f |
571 | \r |
| 572 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
| 573 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
| 574 | \r |
| 575 | @retval 0 FirstString is identical to SecondString.\r |
| 576 | @retval !=0 FirstString is not identical to SecondString.\r |
| 577 | \r |
| 578 | **/\r |
| 579 | INTN\r |
| 580 | EFIAPI\r |
| 581 | AsciiStrnCmp (\r |
| 582 | IN CONST CHAR8 *FirstString,\r |
| 583 | IN CONST CHAR8 *SecondString,\r |
| 584 | IN UINTN Length\r |
| 585 | );\r |
| 878ddf1f |
586 | /**\r |
| 587 | Concatenates one Null-terminated ASCII string to another Null-terminated\r |
| 588 | ASCII string, and returns the concatenated ASCII string.\r |
| 589 | \r |
| 590 | This function concatenates two Null-terminated ASCII strings. The contents of\r |
| 591 | Null-terminated ASCII string Source are concatenated to the end of Null-\r |
| 592 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r |
| 593 | String is returned.\r |
| 594 | \r |
| 595 | If Destination is NULL, then ASSERT().\r |
| 596 | If Source is NULL, then ASSERT().\r |
| 597 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r |
| 30817eb4 |
598 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 599 | then ASSERT().\r |
| 878ddf1f |
600 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r |
| 30817eb4 |
601 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 602 | then ASSERT().\r |
| 878ddf1f |
603 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r |
| 604 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r |
| 605 | ASCII characters, then ASSERT().\r |
| 606 | \r |
| 607 | @param Destination Pointer to a Null-terminated ASCII string.\r |
| 608 | @param Source Pointer to a Null-terminated ASCII string.\r |
| 609 | \r |
| 610 | @return Destination\r |
| 611 | \r |
| 612 | **/\r |
| 613 | CHAR8 *\r |
| 614 | EFIAPI\r |
| 615 | AsciiStrCat (\r |
| 30817eb4 |
616 | IN OUT CHAR8 *Destination,\r |
| 617 | IN CONST CHAR8 *Source\r |
| 878ddf1f |
618 | );\r |
| 878ddf1f |
619 | /**\r |
| 620 | Concatenates one Null-terminated ASCII string with a maximum length to the\r |
| 621 | end of another Null-terminated ASCII string, and returns the concatenated\r |
| 622 | ASCII string.\r |
| 623 | \r |
| 624 | This function concatenates two Null-terminated ASCII strings. The contents\r |
| 625 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r |
| 626 | terminated ASCII string Destination, and Destination is returned. At most,\r |
| 627 | Length ASCII characters are concatenated from Source to the end of\r |
| 628 | Destination, and Destination is always Null-terminated. If Length is 0, then\r |
| 629 | Destination is returned unmodified. If Source and Destination overlap, then\r |
| 630 | the results are undefined.\r |
| 631 | \r |
| 632 | If Destination is NULL, then ASSERT().\r |
| 633 | If Source is NULL, then ASSERT().\r |
| 634 | If Source and Destination overlap, then ASSERT().\r |
| 30817eb4 |
635 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
| 636 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 637 | then ASSERT().\r |
| 878ddf1f |
638 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
| 30817eb4 |
639 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
| 640 | then ASSERT().\r |
| 878ddf1f |
641 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r |
| 642 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r |
| 30817eb4 |
643 | ASCII characters not including the Null-terminator, then ASSERT().\r |
| 878ddf1f |
644 | \r |
| 645 | @param Destination Pointer to a Null-terminated ASCII string.\r |
| 646 | @param Source Pointer to a Null-terminated ASCII string.\r |
| 647 | @param Length Maximum number of ASCII characters to concatenate from\r |
| 648 | Source.\r |
| 649 | \r |
| 650 | @return Destination\r |
| 651 | \r |
| 652 | **/\r |
| 653 | CHAR8 *\r |
| 654 | EFIAPI\r |
| 655 | AsciiStrnCat (\r |
| 656 | IN OUT CHAR8 *Destination,\r |
| 657 | IN CONST CHAR8 *Source,\r |
| 658 | IN UINTN Length\r |
| 659 | );\r |
| dee4740a |
660 | /**\r |
| 661 | Converts an 8-bit value to an 8-bit BCD value.\r |
| 662 | \r |
| 663 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r |
| 664 | returned.\r |
| 665 | \r |
| 666 | If Value >= 100, then ASSERT().\r |
| 667 | \r |
| 668 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r |
| 669 | \r |
| 670 | @return The BCD value\r |
| 671 | \r |
| 672 | **/\r |
| 673 | UINT8\r |
| 674 | EFIAPI\r |
| 675 | DecimalToBcd8 (\r |
| 676 | IN UINT8 Value\r |
| 677 | );\r |
| 678 | \r |
| 679 | /**\r |
| 680 | Converts an 8-bit BCD value to an 8-bit value.\r |
| 681 | \r |
| 682 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r |
| 683 | value is returned.\r |
| 684 | \r |
| 685 | If Value >= 0xA0, then ASSERT().\r |
| 686 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r |
| 687 | \r |
| 688 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r |
| 689 | \r |
| 690 | @return The 8-bit value is returned.\r |
| 691 | \r |
| 692 | **/\r |
| 693 | UINT8\r |
| 694 | EFIAPI\r |
| 695 | BcdToDecimal8 (\r |
| 696 | IN UINT8 Value\r |
| 697 | );\r |
| 698 | \r |
| 878ddf1f |
699 | //\r |
| 700 | // LIST_ENTRY definition\r |
| 701 | //\r |
| 702 | typedef struct _LIST_ENTRY LIST_ENTRY;\r |
| 703 | \r |
| 704 | struct _LIST_ENTRY {\r |
| 705 | LIST_ENTRY *ForwardLink;\r |
| 706 | LIST_ENTRY *BackLink;\r |
| 707 | };\r |
| 708 | \r |
| 709 | //\r |
| 710 | // Linked List Functions and Macros\r |
| 711 | //\r |
| 712 | \r |
| 713 | /**\r |
| 714 | Initializes the head node of a doubly linked list that is declared as a\r |
| 715 | global variable in a module.\r |
| 716 | \r |
| 717 | Initializes the forward and backward links of a new linked list. After\r |
| 718 | initializing a linked list with this macro, the other linked list functions\r |
| 719 | may be used to add and remove nodes from the linked list. This macro results\r |
| 720 | in smaller executables by initializing the linked list in the data section,\r |
| 721 | instead if calling the InitializeListHead() function to perform the\r |
| 722 | equivalent operation.\r |
| 723 | \r |
| 724 | @param ListHead The head note of a list to initiailize.\r |
| 725 | \r |
| 726 | **/\r |
| 727 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}\r |
| 728 | \r |
| 729 | /**\r |
| 730 | Initializes the head node of a doubly linked list, and returns the pointer to\r |
| 731 | the head node of the doubly linked list.\r |
| 732 | \r |
| 733 | Initializes the forward and backward links of a new linked list. After\r |
| 734 | initializing a linked list with this function, the other linked list\r |
| 735 | functions may be used to add and remove nodes from the linked list. It is up\r |
| 736 | to the caller of this function to allocate the memory for ListHead.\r |
| 737 | \r |
| 738 | If ListHead is NULL, then ASSERT().\r |
| 739 | \r |
| 740 | @param ListHead A pointer to the head node of a new doubly linked list.\r |
| 741 | \r |
| 742 | @return ListHead\r |
| 743 | \r |
| 744 | **/\r |
| 745 | LIST_ENTRY *\r |
| 746 | EFIAPI\r |
| 747 | InitializeListHead (\r |
| 748 | IN LIST_ENTRY *ListHead\r |
| 749 | );\r |
| 750 | \r |
| 751 | /**\r |
| 752 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r |
| 753 | to the head node of the doubly linked list.\r |
| 754 | \r |
| 755 | Adds the node Entry at the beginning of the doubly linked list denoted by\r |
| 756 | ListHead, and returns ListHead.\r |
| 757 | \r |
| 758 | If ListHead is NULL, then ASSERT().\r |
| 759 | If Entry is NULL, then ASSERT().\r |
| 760 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
| 30817eb4 |
761 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
| db8f40e2 |
762 | of nodes in ListHead, including the ListHead node, is greater than or\r |
| 30817eb4 |
763 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
764 | \r |
| 765 | @param ListHead A pointer to the head node of a doubly linked list.\r |
| 766 | @param Entry A pointer to a node that is to be inserted at the beginning\r |
| 767 | of a doubly linked list.\r |
| 768 | \r |
| 769 | @return ListHead\r |
| 770 | \r |
| 771 | **/\r |
| 772 | LIST_ENTRY *\r |
| 773 | EFIAPI\r |
| 774 | InsertHeadList (\r |
| 775 | IN LIST_ENTRY *ListHead,\r |
| 776 | IN LIST_ENTRY *Entry\r |
| 777 | );\r |
| 778 | \r |
| 779 | /**\r |
| 780 | Adds a node to the end of a doubly linked list, and returns the pointer to\r |
| 781 | the head node of the doubly linked list.\r |
| 782 | \r |
| 783 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r |
| 784 | and returns ListHead.\r |
| 785 | \r |
| 786 | If ListHead is NULL, then ASSERT().\r |
| 787 | If Entry is NULL, then ASSERT().\r |
| 788 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
| 30817eb4 |
789 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
| db8f40e2 |
790 | of nodes in ListHead, including the ListHead node, is greater than or\r |
| 30817eb4 |
791 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
792 | \r |
| 793 | @param ListHead A pointer to the head node of a doubly linked list.\r |
| 794 | @param Entry A pointer to a node that is to be added at the end of the\r |
| 795 | doubly linked list.\r |
| 796 | \r |
| 797 | @return ListHead\r |
| 798 | \r |
| 799 | **/\r |
| 800 | LIST_ENTRY *\r |
| 801 | EFIAPI\r |
| 802 | InsertTailList (\r |
| 803 | IN LIST_ENTRY *ListHead,\r |
| 804 | IN LIST_ENTRY *Entry\r |
| 805 | );\r |
| 806 | \r |
| 807 | /**\r |
| 808 | Retrieves the first node of a doubly linked list.\r |
| 809 | \r |
| 810 | Returns the first node of a doubly linked list. List must have been\r |
| 811 | initialized with InitializeListHead(). If List is empty, then NULL is\r |
| 812 | returned.\r |
| 813 | \r |
| 814 | If List is NULL, then ASSERT().\r |
| 815 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
| db8f40e2 |
816 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
| 817 | in List, including the List node, is greater than or equal to\r |
| 30817eb4 |
818 | PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
819 | \r |
| 820 | @param List A pointer to the head node of a doubly linked list.\r |
| 821 | \r |
| 822 | @return The first node of a doubly linked list.\r |
| 823 | @retval NULL The list is empty.\r |
| 824 | \r |
| 825 | **/\r |
| 826 | LIST_ENTRY *\r |
| 827 | EFIAPI\r |
| 828 | GetFirstNode (\r |
| 829 | IN CONST LIST_ENTRY *List\r |
| 830 | );\r |
| 831 | \r |
| 832 | /**\r |
| 833 | Retrieves the next node of a doubly linked list.\r |
| 834 | \r |
| 835 | Returns the node of a doubly linked list that follows Node. List must have\r |
| 836 | been initialized with InitializeListHead(). If List is empty, then List is\r |
| 837 | returned.\r |
| 838 | \r |
| 839 | If List is NULL, then ASSERT().\r |
| 840 | If Node is NULL, then ASSERT().\r |
| 841 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
| 842 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r |
| 843 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r |
| 844 | If Node is not a node in List, then ASSERT().\r |
| 845 | \r |
| 846 | @param List A pointer to the head node of a doubly linked list.\r |
| 847 | @param Node A pointer to a node in the doubly linked list.\r |
| 848 | \r |
| 849 | @return Pointer to the next node if one exists. Otherwise a null value which\r |
| 850 | is actually List is returned.\r |
| 851 | \r |
| 852 | **/\r |
| 853 | LIST_ENTRY *\r |
| 854 | EFIAPI\r |
| 855 | GetNextNode (\r |
| 856 | IN CONST LIST_ENTRY *List,\r |
| 857 | IN CONST LIST_ENTRY *Node\r |
| 858 | );\r |
| 859 | \r |
| 860 | /**\r |
| 861 | Checks to see if a doubly linked list is empty or not.\r |
| 862 | \r |
| 863 | Checks to see if the doubly linked list is empty. If the linked list contains\r |
| 864 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r |
| 865 | \r |
| 866 | If ListHead is NULL, then ASSERT().\r |
| 867 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
| db8f40e2 |
868 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
| 869 | in List, including the List node, is greater than or equal to\r |
| 30817eb4 |
870 | PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
871 | \r |
| 872 | @param ListHead A pointer to the head node of a doubly linked list.\r |
| 873 | \r |
| 874 | @retval TRUE The linked list is empty.\r |
| 875 | @retval FALSE The linked list is not empty.\r |
| 876 | \r |
| 877 | **/\r |
| 878 | BOOLEAN\r |
| 879 | EFIAPI\r |
| 880 | IsListEmpty (\r |
| 881 | IN CONST LIST_ENTRY *ListHead\r |
| 882 | );\r |
| 883 | \r |
| 884 | /**\r |
| 885 | Determines if a node in a doubly linked list is null.\r |
| 886 | \r |
| 887 | Returns FALSE if Node is one of the nodes in the doubly linked list specified\r |
| 888 | by List. Otherwise, TRUE is returned. List must have been initialized with\r |
| 889 | InitializeListHead().\r |
| 890 | \r |
| 891 | If List is NULL, then ASSERT().\r |
| 892 | If Node is NULL, then ASSERT().\r |
| 893 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
| db8f40e2 |
894 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
| 895 | in List, including the List node, is greater than or equal to\r |
| 30817eb4 |
896 | PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
897 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r |
| 898 | \r |
| 899 | @param List A pointer to the head node of a doubly linked list.\r |
| 24e25d11 |
900 | @param Node A pointer to a node in the doubly linked list.\r |
| 878ddf1f |
901 | \r |
| 902 | @retval TRUE Node is one of the nodes in the doubly linked list.\r |
| 903 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r |
| 904 | \r |
| 905 | **/\r |
| 906 | BOOLEAN\r |
| 907 | EFIAPI\r |
| 908 | IsNull (\r |
| 909 | IN CONST LIST_ENTRY *List,\r |
| 910 | IN CONST LIST_ENTRY *Node\r |
| 911 | );\r |
| 912 | \r |
| 913 | /**\r |
| 914 | Determines if a node the last node in a doubly linked list.\r |
| 915 | \r |
| 916 | Returns TRUE if Node is the last node in the doubly linked list specified by\r |
| 917 | List. Otherwise, FALSE is returned. List must have been initialized with\r |
| 918 | InitializeListHead().\r |
| 919 | \r |
| 920 | If List is NULL, then ASSERT().\r |
| 921 | If Node is NULL, then ASSERT().\r |
| 922 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
| db8f40e2 |
923 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
| 924 | in List, including the List node, is greater than or equal to\r |
| 30817eb4 |
925 | PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
926 | If Node is not a node in List, then ASSERT().\r |
| 927 | \r |
| 928 | @param List A pointer to the head node of a doubly linked list.\r |
| 24e25d11 |
929 | @param Node A pointer to a node in the doubly linked list.\r |
| 878ddf1f |
930 | \r |
| 931 | @retval TRUE Node is the last node in the linked list.\r |
| 932 | @retval FALSE Node is not the last node in the linked list.\r |
| 933 | \r |
| 934 | **/\r |
| 935 | BOOLEAN\r |
| 936 | EFIAPI\r |
| 937 | IsNodeAtEnd (\r |
| 938 | IN CONST LIST_ENTRY *List,\r |
| 939 | IN CONST LIST_ENTRY *Node\r |
| 940 | );\r |
| 941 | \r |
| 942 | /**\r |
| 943 | Swaps the location of two nodes in a doubly linked list, and returns the\r |
| 944 | first node after the swap.\r |
| 945 | \r |
| 946 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r |
| 947 | Otherwise, the location of the FirstEntry node is swapped with the location\r |
| 948 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r |
| 949 | same double linked list as FirstEntry and that double linked list must have\r |
| 950 | been initialized with InitializeListHead(). SecondEntry is returned after the\r |
| 951 | nodes are swapped.\r |
| 952 | \r |
| 953 | If FirstEntry is NULL, then ASSERT().\r |
| 954 | If SecondEntry is NULL, then ASSERT().\r |
| 955 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r |
| 30817eb4 |
956 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
| 957 | linked list containing the FirstEntry and SecondEntry nodes, including\r |
| db8f40e2 |
958 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r |
| 30817eb4 |
959 | PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
960 | \r |
| 961 | @param FirstEntry A pointer to a node in a linked list.\r |
| 962 | @param SecondEntry A pointer to another node in the same linked list.\r |
| 963 | \r |
| 964 | **/\r |
| 965 | LIST_ENTRY *\r |
| 966 | EFIAPI\r |
| 967 | SwapListEntries (\r |
| 968 | IN LIST_ENTRY *FirstEntry,\r |
| 969 | IN LIST_ENTRY *SecondEntry\r |
| 970 | );\r |
| 971 | \r |
| 972 | /**\r |
| 973 | Removes a node from a doubly linked list, and returns the node that follows\r |
| 974 | the removed node.\r |
| 975 | \r |
| 976 | Removes the node Entry from a doubly linked list. It is up to the caller of\r |
| 977 | this function to release the memory used by this node if that is required. On\r |
| 978 | exit, the node following Entry in the doubly linked list is returned. If\r |
| 979 | Entry is the only node in the linked list, then the head node of the linked\r |
| 980 | list is returned.\r |
| 981 | \r |
| 982 | If Entry is NULL, then ASSERT().\r |
| 983 | If Entry is the head node of an empty list, then ASSERT().\r |
| db8f40e2 |
984 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
| 985 | linked list containing Entry, including the Entry node, is greater than\r |
| 30817eb4 |
986 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r |
| 878ddf1f |
987 | \r |
| 988 | @param Entry A pointer to a node in a linked list\r |
| 989 | \r |
| 990 | @return Entry\r |
| 991 | \r |
| 992 | **/\r |
| 993 | LIST_ENTRY *\r |
| 994 | EFIAPI\r |
| 995 | RemoveEntryList (\r |
| 996 | IN CONST LIST_ENTRY *Entry\r |
| 997 | );\r |
| 998 | \r |
| 999 | //\r |
| 1000 | // Math Services\r |
| 1001 | //\r |
| 1002 | \r |
| 1003 | /**\r |
| 1004 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r |
| 1005 | with zeros. The shifted value is returned.\r |
| 1006 | \r |
| 1007 | This function shifts the 64-bit value Operand to the left by Count bits. The\r |
| 1008 | low Count bits are set to zero. The shifted value is returned.\r |
| 1009 | \r |
| 1010 | If Count is greater than 63, then ASSERT().\r |
| 1011 | \r |
| 1012 | @param Operand The 64-bit operand to shift left.\r |
| 1013 | @param Count The number of bits to shift left.\r |
| 1014 | \r |
| 1015 | @return Operand << Count\r |
| 1016 | \r |
| 1017 | **/\r |
| 1018 | UINT64\r |
| 1019 | EFIAPI\r |
| 1020 | LShiftU64 (\r |
| 1021 | IN UINT64 Operand,\r |
| 1022 | IN UINTN Count\r |
| 1023 | );\r |
| 1024 | \r |
| 1025 | /**\r |
| 1026 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r |
| 1027 | filled with zeros. The shifted value is returned.\r |
| 1028 | \r |
| 1029 | This function shifts the 64-bit value Operand to the right by Count bits. The\r |
| 1030 | high Count bits are set to zero. The shifted value is returned.\r |
| 1031 | \r |
| 1032 | If Count is greater than 63, then ASSERT().\r |
| 1033 | \r |
| 1034 | @param Operand The 64-bit operand to shift right.\r |
| 1035 | @param Count The number of bits to shift right.\r |
| 1036 | \r |
| 1037 | @return Operand >> Count\r |
| 1038 | \r |
| 1039 | **/\r |
| 1040 | UINT64\r |
| 1041 | EFIAPI\r |
| 1042 | RShiftU64 (\r |
| 1043 | IN UINT64 Operand,\r |
| 1044 | IN UINTN Count\r |
| 1045 | );\r |
| 1046 | \r |
| 1047 | /**\r |
| 1048 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r |
| 1049 | with original integer's bit 63. The shifted value is returned.\r |
| 1050 | \r |
| 1051 | This function shifts the 64-bit value Operand to the right by Count bits. The\r |
| 1052 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r |
| 1053 | \r |
| 1054 | If Count is greater than 63, then ASSERT().\r |
| 1055 | \r |
| 1056 | @param Operand The 64-bit operand to shift right.\r |
| 1057 | @param Count The number of bits to shift right.\r |
| 1058 | \r |
| 1059 | @return Operand >> Count\r |
| 1060 | \r |
| 1061 | **/\r |
| 1062 | UINT64\r |
| 1063 | EFIAPI\r |
| 1064 | ARShiftU64 (\r |
| 1065 | IN UINT64 Operand,\r |
| 1066 | IN UINTN Count\r |
| 1067 | );\r |
| 1068 | \r |
| 1069 | /**\r |
| 1070 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r |
| 1071 | with the high bits that were rotated.\r |
| 1072 | \r |
| 1073 | This function rotates the 32-bit value Operand to the left by Count bits. The\r |
| 1074 | low Count bits are fill with the high Count bits of Operand. The rotated\r |
| 1075 | value is returned.\r |
| 1076 | \r |
| 1077 | If Count is greater than 31, then ASSERT().\r |
| 1078 | \r |
| 1079 | @param Operand The 32-bit operand to rotate left.\r |
| 1080 | @param Count The number of bits to rotate left.\r |
| 1081 | \r |
| 1082 | @return Operand <<< Count\r |
| 1083 | \r |
| 1084 | **/\r |
| 1085 | UINT32\r |
| 1086 | EFIAPI\r |
| 1087 | LRotU32 (\r |
| 1088 | IN UINT32 Operand,\r |
| 1089 | IN UINTN Count\r |
| 1090 | );\r |
| 1091 | \r |
| 1092 | /**\r |
| 1093 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r |
| 1094 | with the low bits that were rotated.\r |
| 1095 | \r |
| 1096 | This function rotates the 32-bit value Operand to the right by Count bits.\r |
| 1097 | The high Count bits are fill with the low Count bits of Operand. The rotated\r |
| 1098 | value is returned.\r |
| 1099 | \r |
| 1100 | If Count is greater than 31, then ASSERT().\r |
| 1101 | \r |
| 1102 | @param Operand The 32-bit operand to rotate right.\r |
| 1103 | @param Count The number of bits to rotate right.\r |
| 1104 | \r |
| 1105 | @return Operand >>> Count\r |
| 1106 | \r |
| 1107 | **/\r |
| 1108 | UINT32\r |
| 1109 | EFIAPI\r |
| 1110 | RRotU32 (\r |
| 1111 | IN UINT32 Operand,\r |
| 1112 | IN UINTN Count\r |
| 1113 | );\r |
| 1114 | \r |
| 1115 | /**\r |
| 1116 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r |
| 1117 | with the high bits that were rotated.\r |
| 1118 | \r |
| 1119 | This function rotates the 64-bit value Operand to the left by Count bits. The\r |
| 1120 | low Count bits are fill with the high Count bits of Operand. The rotated\r |
| 1121 | value is returned.\r |
| 1122 | \r |
| 1123 | If Count is greater than 63, then ASSERT().\r |
| 1124 | \r |
| 1125 | @param Operand The 64-bit operand to rotate left.\r |
| 1126 | @param Count The number of bits to rotate left.\r |
| 1127 | \r |
| 1128 | @return Operand <<< Count\r |
| 1129 | \r |
| 1130 | **/\r |
| 1131 | UINT64\r |
| 1132 | EFIAPI\r |
| 1133 | LRotU64 (\r |
| 1134 | IN UINT64 Operand,\r |
| 1135 | IN UINTN Count\r |
| 1136 | );\r |
| 1137 | \r |
| 1138 | /**\r |
| 1139 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r |
| 1140 | with the high low bits that were rotated.\r |
| 1141 | \r |
| 1142 | This function rotates the 64-bit value Operand to the right by Count bits.\r |
| 1143 | The high Count bits are fill with the low Count bits of Operand. The rotated\r |
| 1144 | value is returned.\r |
| 1145 | \r |
| 1146 | If Count is greater than 63, then ASSERT().\r |
| 1147 | \r |
| 1148 | @param Operand The 64-bit operand to rotate right.\r |
| 1149 | @param Count The number of bits to rotate right.\r |
| 1150 | \r |
| 1151 | @return Operand >>> Count\r |
| 1152 | \r |
| 1153 | **/\r |
| 1154 | UINT64\r |
| 1155 | EFIAPI\r |
| 1156 | RRotU64 (\r |
| 1157 | IN UINT64 Operand,\r |
| 1158 | IN UINTN Count\r |
| 1159 | );\r |
| 1160 | \r |
| 1161 | /**\r |
| 1162 | Returns the bit position of the lowest bit set in a 32-bit value.\r |
| 1163 | \r |
| 1164 | This function computes the bit position of the lowest bit set in the 32-bit\r |
| 1165 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
| 1166 | Otherwise, a value between 0 and 31 is returned.\r |
| 1167 | \r |
| 1168 | @param Operand The 32-bit operand to evaluate.\r |
| 1169 | \r |
| 1170 | @return Position of the lowest bit set in Operand if found.\r |
| 1171 | @retval -1 Operand is zero.\r |
| 1172 | \r |
| 1173 | **/\r |
| 1174 | INTN\r |
| 1175 | EFIAPI\r |
| 1176 | LowBitSet32 (\r |
| 1177 | IN UINT32 Operand\r |
| 1178 | );\r |
| 1179 | \r |
| 1180 | /**\r |
| 1181 | Returns the bit position of the lowest bit set in a 64-bit value.\r |
| 1182 | \r |
| 1183 | This function computes the bit position of the lowest bit set in the 64-bit\r |
| 1184 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
| 1185 | Otherwise, a value between 0 and 63 is returned.\r |
| 1186 | \r |
| 1187 | @param Operand The 64-bit operand to evaluate.\r |
| 1188 | \r |
| 1189 | @return Position of the lowest bit set in Operand if found.\r |
| 1190 | @retval -1 Operand is zero.\r |
| 1191 | \r |
| 1192 | **/\r |
| 1193 | INTN\r |
| 1194 | EFIAPI\r |
| 1195 | LowBitSet64 (\r |
| 1196 | IN UINT64 Operand\r |
| 1197 | );\r |
| 1198 | \r |
| 1199 | /**\r |
| 1200 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r |
| 1201 | to log2(x).\r |
| 1202 | \r |
| 1203 | This function computes the bit position of the highest bit set in the 32-bit\r |
| 1204 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
| 1205 | Otherwise, a value between 0 and 31 is returned.\r |
| 1206 | \r |
| 1207 | @param Operand The 32-bit operand to evaluate.\r |
| 1208 | \r |
| 1209 | @return Position of the highest bit set in Operand if found.\r |
| 1210 | @retval -1 Operand is zero.\r |
| 1211 | \r |
| 1212 | **/\r |
| 1213 | INTN\r |
| 1214 | EFIAPI\r |
| 1215 | HighBitSet32 (\r |
| 1216 | IN UINT32 Operand\r |
| 1217 | );\r |
| 1218 | \r |
| 1219 | /**\r |
| 1220 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r |
| 1221 | to log2(x).\r |
| 1222 | \r |
| 1223 | This function computes the bit position of the highest bit set in the 64-bit\r |
| 1224 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
| 1225 | Otherwise, a value between 0 and 63 is returned.\r |
| 1226 | \r |
| 1227 | @param Operand The 64-bit operand to evaluate.\r |
| 1228 | \r |
| 1229 | @return Position of the highest bit set in Operand if found.\r |
| 1230 | @retval -1 Operand is zero.\r |
| 1231 | \r |
| 1232 | **/\r |
| 1233 | INTN\r |
| 1234 | EFIAPI\r |
| 1235 | HighBitSet64 (\r |
| 1236 | IN UINT64 Operand\r |
| 1237 | );\r |
| 1238 | \r |
| 1239 | /**\r |
| 1240 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r |
| 1241 | 1 << HighBitSet32(x).\r |
| 1242 | \r |
| 1243 | This function computes the value of the highest bit set in the 32-bit value\r |
| 1244 | specified by Operand. If Operand is zero, then zero is returned.\r |
| 1245 | \r |
| 1246 | @param Operand The 32-bit operand to evaluate.\r |
| 1247 | \r |
| 1248 | @return 1 << HighBitSet32(Operand)\r |
| 1249 | @retval 0 Operand is zero.\r |
| 1250 | \r |
| 1251 | **/\r |
| 1252 | UINT32\r |
| 1253 | EFIAPI\r |
| 1254 | GetPowerOfTwo32 (\r |
| 1255 | IN UINT32 Operand\r |
| 1256 | );\r |
| 1257 | \r |
| 1258 | /**\r |
| 1259 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r |
| 1260 | 1 << HighBitSet64(x).\r |
| 1261 | \r |
| 1262 | This function computes the value of the highest bit set in the 64-bit value\r |
| 1263 | specified by Operand. If Operand is zero, then zero is returned.\r |
| 1264 | \r |
| 1265 | @param Operand The 64-bit operand to evaluate.\r |
| 1266 | \r |
| 1267 | @return 1 << HighBitSet64(Operand)\r |
| 1268 | @retval 0 Operand is zero.\r |
| 1269 | \r |
| 1270 | **/\r |
| 1271 | UINT64\r |
| 1272 | EFIAPI\r |
| 1273 | GetPowerOfTwo64 (\r |
| 1274 | IN UINT64 Operand\r |
| 1275 | );\r |
| 1276 | \r |
| 1277 | /**\r |
| 1278 | Switches the endianess of a 16-bit integer.\r |
| 1279 | \r |
| 1280 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r |
| 1281 | from little endian to big endian or vice versa. The byte swapped value is\r |
| 1282 | returned.\r |
| 1283 | \r |
| 1284 | @param Operand A 16-bit unsigned value.\r |
| 1285 | \r |
| 1286 | @return The byte swaped Operand.\r |
| 1287 | \r |
| 1288 | **/\r |
| 1289 | UINT16\r |
| 1290 | EFIAPI\r |
| 1291 | SwapBytes16 (\r |
| 1292 | IN UINT16 Value\r |
| 1293 | );\r |
| 1294 | \r |
| 1295 | /**\r |
| 1296 | Switches the endianess of a 32-bit integer.\r |
| 1297 | \r |
| 1298 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r |
| 1299 | from little endian to big endian or vice versa. The byte swapped value is\r |
| 1300 | returned.\r |
| 1301 | \r |
| 1302 | @param Operand A 32-bit unsigned value.\r |
| 1303 | \r |
| 1304 | @return The byte swaped Operand.\r |
| 1305 | \r |
| 1306 | **/\r |
| 1307 | UINT32\r |
| 1308 | EFIAPI\r |
| 1309 | SwapBytes32 (\r |
| 1310 | IN UINT32 Value\r |
| 1311 | );\r |
| 1312 | \r |
| 1313 | /**\r |
| 1314 | Switches the endianess of a 64-bit integer.\r |
| 1315 | \r |
| 1316 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r |
| 1317 | from little endian to big endian or vice versa. The byte swapped value is\r |
| 1318 | returned.\r |
| 1319 | \r |
| 1320 | @param Operand A 64-bit unsigned value.\r |
| 1321 | \r |
| 1322 | @return The byte swaped Operand.\r |
| 1323 | \r |
| 1324 | **/\r |
| 1325 | UINT64\r |
| 1326 | EFIAPI\r |
| 1327 | SwapBytes64 (\r |
| 1328 | IN UINT64 Value\r |
| 1329 | );\r |
| 1330 | \r |
| 1331 | /**\r |
| 1332 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r |
| 1333 | generates a 64-bit unsigned result.\r |
| 1334 | \r |
| 1335 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r |
| 1336 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r |
| 1337 | bit unsigned result is returned.\r |
| 1338 | \r |
| 1339 | If the result overflows, then ASSERT().\r |
| 1340 | \r |
| 1341 | @param Multiplicand A 64-bit unsigned value.\r |
| 1342 | @param Multiplier A 32-bit unsigned value.\r |
| 1343 | \r |
| 1344 | @return Multiplicand * Multiplier\r |
| 1345 | \r |
| 1346 | **/\r |
| 1347 | UINT64\r |
| 1348 | EFIAPI\r |
| 1349 | MultU64x32 (\r |
| 1350 | IN UINT64 Multiplicand,\r |
| 1351 | IN UINT32 Multiplier\r |
| 1352 | );\r |
| 1353 | \r |
| 1354 | /**\r |
| 1355 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r |
| 1356 | generates a 64-bit unsigned result.\r |
| 1357 | \r |
| 1358 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r |
| 1359 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r |
| 1360 | bit unsigned result is returned.\r |
| 1361 | \r |
| 1362 | If the result overflows, then ASSERT().\r |
| 1363 | \r |
| 1364 | @param Multiplicand A 64-bit unsigned value.\r |
| 1365 | @param Multiplier A 64-bit unsigned value.\r |
| 1366 | \r |
| 1367 | @return Multiplicand * Multiplier\r |
| 1368 | \r |
| 1369 | **/\r |
| 1370 | UINT64\r |
| 1371 | EFIAPI\r |
| 1372 | MultU64x64 (\r |
| 1373 | IN UINT64 Multiplicand,\r |
| 1374 | IN UINT64 Multiplier\r |
| 1375 | );\r |
| 1376 | \r |
| 1377 | /**\r |
| 1378 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r |
| 1379 | 64-bit signed result.\r |
| 1380 | \r |
| 1381 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r |
| 1382 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r |
| 1383 | signed result is returned.\r |
| 1384 | \r |
| 1385 | If the result overflows, then ASSERT().\r |
| 1386 | \r |
| 1387 | @param Multiplicand A 64-bit signed value.\r |
| 1388 | @param Multiplier A 64-bit signed value.\r |
| 1389 | \r |
| 1390 | @return Multiplicand * Multiplier\r |
| 1391 | \r |
| 1392 | **/\r |
| 1393 | INT64\r |
| 1394 | EFIAPI\r |
| 1395 | MultS64x64 (\r |
| 1396 | IN INT64 Multiplicand,\r |
| 1397 | IN INT64 Multiplier\r |
| 1398 | );\r |
| 1399 | \r |
| 1400 | /**\r |
| 1401 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
| 1402 | a 64-bit unsigned result.\r |
| 1403 | \r |
| 1404 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
| 1405 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r |
| 1406 | function returns the 64-bit unsigned quotient.\r |
| 1407 | \r |
| 1408 | If Divisor is 0, then ASSERT().\r |
| 1409 | \r |
| 1410 | @param Dividend A 64-bit unsigned value.\r |
| 1411 | @param Divisor A 32-bit unsigned value.\r |
| 1412 | \r |
| 1413 | @return Dividend / Divisor\r |
| 1414 | \r |
| 1415 | **/\r |
| 1416 | UINT64\r |
| 1417 | EFIAPI\r |
| 1418 | DivU64x32 (\r |
| 1419 | IN UINT64 Dividend,\r |
| 1420 | IN UINT32 Divisor\r |
| 1421 | );\r |
| 1422 | \r |
| 1423 | /**\r |
| 1424 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
| 1425 | a 32-bit unsigned remainder.\r |
| 1426 | \r |
| 1427 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
| 1428 | unsigned value Divisor and generates a 32-bit remainder. This function\r |
| 1429 | returns the 32-bit unsigned remainder.\r |
| 1430 | \r |
| 1431 | If Divisor is 0, then ASSERT().\r |
| 1432 | \r |
| 1433 | @param Dividend A 64-bit unsigned value.\r |
| 1434 | @param Divisor A 32-bit unsigned value.\r |
| 1435 | \r |
| 1436 | @return Dividend % Divisor\r |
| 1437 | \r |
| 1438 | **/\r |
| 1439 | UINT32\r |
| 1440 | EFIAPI\r |
| 1441 | ModU64x32 (\r |
| 1442 | IN UINT64 Dividend,\r |
| 1443 | IN UINT32 Divisor\r |
| 1444 | );\r |
| 1445 | \r |
| 1446 | /**\r |
| 1447 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
| 1448 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r |
| 1449 | \r |
| 1450 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
| 1451 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r |
| 1452 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r |
| 1453 | This function returns the 64-bit unsigned quotient.\r |
| 1454 | \r |
| 1455 | If Divisor is 0, then ASSERT().\r |
| 1456 | \r |
| 1457 | @param Dividend A 64-bit unsigned value.\r |
| 1458 | @param Divisor A 32-bit unsigned value.\r |
| 1459 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r |
| 1460 | optional and may be NULL.\r |
| 1461 | \r |
| 1462 | @return Dividend / Divisor\r |
| 1463 | \r |
| 1464 | **/\r |
| 1465 | UINT64\r |
| 1466 | EFIAPI\r |
| 1467 | DivU64x32Remainder (\r |
| 1468 | IN UINT64 Dividend,\r |
| 1469 | IN UINT32 Divisor,\r |
| 1470 | OUT UINT32 *Remainder OPTIONAL\r |
| 1471 | );\r |
| 1472 | \r |
| 1473 | /**\r |
| 1474 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r |
| 1475 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r |
| 1476 | \r |
| 1477 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r |
| 1478 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r |
| 1479 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r |
| 1480 | This function returns the 64-bit unsigned quotient.\r |
| 1481 | \r |
| 1482 | If Divisor is 0, then ASSERT().\r |
| 1483 | \r |
| 1484 | @param Dividend A 64-bit unsigned value.\r |
| 1485 | @param Divisor A 64-bit unsigned value.\r |
| 1486 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r |
| 1487 | optional and may be NULL.\r |
| 1488 | \r |
| 1489 | @return Dividend / Divisor\r |
| 1490 | \r |
| 1491 | **/\r |
| 1492 | UINT64\r |
| 1493 | EFIAPI\r |
| 1494 | DivU64x64Remainder (\r |
| 1495 | IN UINT64 Dividend,\r |
| 1496 | IN UINT64 Divisor,\r |
| 1497 | OUT UINT64 *Remainder OPTIONAL\r |
| 1498 | );\r |
| 1499 | \r |
| 1500 | /**\r |
| 1501 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r |
| 1502 | 64-bit signed result and a optional 64-bit signed remainder.\r |
| 1503 | \r |
| 1504 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r |
| 1505 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r |
| 1506 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r |
| 1507 | function returns the 64-bit signed quotient.\r |
| 1508 | \r |
| 1509 | If Divisor is 0, then ASSERT().\r |
| 1510 | \r |
| 1511 | @param Dividend A 64-bit signed value.\r |
| 1512 | @param Divisor A 64-bit signed value.\r |
| 1513 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r |
| 1514 | optional and may be NULL.\r |
| 1515 | \r |
| 1516 | @return Dividend / Divisor\r |
| 1517 | \r |
| 1518 | **/\r |
| 1519 | INT64\r |
| 1520 | EFIAPI\r |
| 1521 | DivS64x64Remainder (\r |
| 1522 | IN INT64 Dividend,\r |
| 1523 | IN INT64 Divisor,\r |
| 1524 | OUT INT64 *Remainder OPTIONAL\r |
| 1525 | );\r |
| 1526 | \r |
| 1527 | /**\r |
| 1528 | Reads a 16-bit value from memory that may be unaligned.\r |
| 1529 | \r |
| 1530 | This function returns the 16-bit value pointed to by Buffer. The function\r |
| 1531 | guarantees that the read operation does not produce an alignment fault.\r |
| 1532 | \r |
| 1533 | If the Buffer is NULL, then ASSERT().\r |
| 1534 | \r |
| 1535 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
| 1536 | \r |
| 1537 | @return *Uint16\r |
| 1538 | \r |
| 1539 | **/\r |
| 1540 | UINT16\r |
| 1541 | EFIAPI\r |
| 1542 | ReadUnaligned16 (\r |
| 1543 | IN CONST UINT16 *Uint16\r |
| 1544 | );\r |
| 1545 | \r |
| 1546 | /**\r |
| 1547 | Writes a 16-bit value to memory that may be unaligned.\r |
| 1548 | \r |
| 1549 | This function writes the 16-bit value specified by Value to Buffer. Value is\r |
| 1550 | returned. The function guarantees that the write operation does not produce\r |
| 1551 | an alignment fault.\r |
| 1552 | \r |
| 1553 | If the Buffer is NULL, then ASSERT().\r |
| 1554 | \r |
| 1555 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
| 1556 | @param Value 16-bit value to write to Buffer.\r |
| 1557 | \r |
| 1558 | @return Value\r |
| 1559 | \r |
| 1560 | **/\r |
| 1561 | UINT16\r |
| 1562 | EFIAPI\r |
| 1563 | WriteUnaligned16 (\r |
| 1564 | OUT UINT16 *Uint16,\r |
| 1565 | IN UINT16 Value\r |
| 1566 | );\r |
| 1567 | \r |
| 1568 | /**\r |
| 1569 | Reads a 24-bit value from memory that may be unaligned.\r |
| 1570 | \r |
| 1571 | This function returns the 24-bit value pointed to by Buffer. The function\r |
| 1572 | guarantees that the read operation does not produce an alignment fault.\r |
| 1573 | \r |
| 1574 | If the Buffer is NULL, then ASSERT().\r |
| 1575 | \r |
| 1576 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r |
| 1577 | \r |
| 1578 | @return The value read.\r |
| 1579 | \r |
| 1580 | **/\r |
| 1581 | UINT32\r |
| 1582 | EFIAPI\r |
| 1583 | ReadUnaligned24 (\r |
| 1584 | IN CONST UINT32 *Buffer\r |
| 1585 | );\r |
| 1586 | \r |
| 1587 | /**\r |
| 1588 | Writes a 24-bit value to memory that may be unaligned.\r |
| 1589 | \r |
| 1590 | This function writes the 24-bit value specified by Value to Buffer. Value is\r |
| 1591 | returned. The function guarantees that the write operation does not produce\r |
| 1592 | an alignment fault.\r |
| 1593 | \r |
| 1594 | If the Buffer is NULL, then ASSERT().\r |
| 1595 | \r |
| 1596 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r |
| 1597 | @param Value 24-bit value to write to Buffer.\r |
| 1598 | \r |
| 1599 | @return The value written.\r |
| 1600 | \r |
| 1601 | **/\r |
| 1602 | UINT32\r |
| 1603 | EFIAPI\r |
| 1604 | WriteUnaligned24 (\r |
| 1605 | OUT UINT32 *Buffer,\r |
| 1606 | IN UINT32 Value\r |
| 1607 | );\r |
| 1608 | \r |
| 1609 | /**\r |
| 1610 | Reads a 32-bit value from memory that may be unaligned.\r |
| 1611 | \r |
| 1612 | This function returns the 32-bit value pointed to by Buffer. The function\r |
| 1613 | guarantees that the read operation does not produce an alignment fault.\r |
| 1614 | \r |
| 1615 | If the Buffer is NULL, then ASSERT().\r |
| 1616 | \r |
| 1617 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
| 1618 | \r |
| 1619 | @return *Uint32\r |
| 1620 | \r |
| 1621 | **/\r |
| 1622 | UINT32\r |
| 1623 | EFIAPI\r |
| 1624 | ReadUnaligned32 (\r |
| 1625 | IN CONST UINT32 *Uint32\r |
| 1626 | );\r |
| 1627 | \r |
| 1628 | /**\r |
| 1629 | Writes a 32-bit value to memory that may be unaligned.\r |
| 1630 | \r |
| 1631 | This function writes the 32-bit value specified by Value to Buffer. Value is\r |
| 1632 | returned. The function guarantees that the write operation does not produce\r |
| 1633 | an alignment fault.\r |
| 1634 | \r |
| 1635 | If the Buffer is NULL, then ASSERT().\r |
| 1636 | \r |
| 1637 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
| 1638 | @param Value 32-bit value to write to Buffer.\r |
| 1639 | \r |
| 1640 | @return Value\r |
| 1641 | \r |
| 1642 | **/\r |
| 1643 | UINT32\r |
| 1644 | EFIAPI\r |
| 1645 | WriteUnaligned32 (\r |
| 1646 | OUT UINT32 *Uint32,\r |
| 1647 | IN UINT32 Value\r |
| 1648 | );\r |
| 1649 | \r |
| 1650 | /**\r |
| 1651 | Reads a 64-bit value from memory that may be unaligned.\r |
| 1652 | \r |
| 1653 | This function returns the 64-bit value pointed to by Buffer. The function\r |
| 1654 | guarantees that the read operation does not produce an alignment fault.\r |
| 1655 | \r |
| 1656 | If the Buffer is NULL, then ASSERT().\r |
| 1657 | \r |
| 1658 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
| 1659 | \r |
| 1660 | @return *Uint64\r |
| 1661 | \r |
| 1662 | **/\r |
| 1663 | UINT64\r |
| 1664 | EFIAPI\r |
| 1665 | ReadUnaligned64 (\r |
| 1666 | IN CONST UINT64 *Uint64\r |
| 1667 | );\r |
| 1668 | \r |
| 1669 | /**\r |
| 1670 | Writes a 64-bit value to memory that may be unaligned.\r |
| 1671 | \r |
| 1672 | This function writes the 64-bit value specified by Value to Buffer. Value is\r |
| 1673 | returned. The function guarantees that the write operation does not produce\r |
| 1674 | an alignment fault.\r |
| 1675 | \r |
| 1676 | If the Buffer is NULL, then ASSERT().\r |
| 1677 | \r |
| 1678 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
| 1679 | @param Value 64-bit value to write to Buffer.\r |
| 1680 | \r |
| 1681 | @return Value\r |
| 1682 | \r |
| 1683 | **/\r |
| 1684 | UINT64\r |
| 1685 | EFIAPI\r |
| 1686 | WriteUnaligned64 (\r |
| 1687 | OUT UINT64 *Uint64,\r |
| 1688 | IN UINT64 Value\r |
| 1689 | );\r |
| 1690 | \r |
| 1691 | //\r |
| 1692 | // Bit Field Functions\r |
| 1693 | //\r |
| 1694 | \r |
| 1695 | /**\r |
| 1696 | Returns a bit field from an 8-bit value.\r |
| 1697 | \r |
| 1698 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
| 1699 | \r |
| 1700 | If 8-bit operations are not supported, then ASSERT().\r |
| 1701 | If StartBit is greater than 7, then ASSERT().\r |
| 1702 | If EndBit is greater than 7, then ASSERT().\r |
| 0ffa1286 |
1703 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1704 | \r |
| 1705 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1706 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1707 | Range 0..7.\r |
| 1708 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1709 | Range 0..7.\r |
| 1710 | \r |
| 1711 | @return The bit field read.\r |
| 1712 | \r |
| 1713 | **/\r |
| 1714 | UINT8\r |
| 1715 | EFIAPI\r |
| 1716 | BitFieldRead8 (\r |
| 1717 | IN UINT8 Operand,\r |
| 1718 | IN UINTN StartBit,\r |
| 1719 | IN UINTN EndBit\r |
| 1720 | );\r |
| 1721 | \r |
| 1722 | /**\r |
| 1723 | Writes a bit field to an 8-bit value, and returns the result.\r |
| 1724 | \r |
| 1725 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
| 1726 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r |
| 1727 | returned.\r |
| 1728 | \r |
| 1729 | If 8-bit operations are not supported, then ASSERT().\r |
| 1730 | If StartBit is greater than 7, then ASSERT().\r |
| 1731 | If EndBit is greater than 7, then ASSERT().\r |
| 0ffa1286 |
1732 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1733 | \r |
| 1734 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1735 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1736 | Range 0..7.\r |
| 1737 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1738 | Range 0..7.\r |
| 1739 | @param Value New value of the bit field.\r |
| 1740 | \r |
| 1741 | @return The new 8-bit value.\r |
| 1742 | \r |
| 1743 | **/\r |
| 1744 | UINT8\r |
| 1745 | EFIAPI\r |
| 1746 | BitFieldWrite8 (\r |
| 1747 | IN UINT8 Operand,\r |
| 1748 | IN UINTN StartBit,\r |
| 1749 | IN UINTN EndBit,\r |
| 1750 | IN UINT8 Value\r |
| 1751 | );\r |
| 1752 | \r |
| 1753 | /**\r |
| 1754 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r |
| 1755 | result.\r |
| 1756 | \r |
| 1757 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
| 1758 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 1759 | Operand are preserved. The new 8-bit value is returned.\r |
| 1760 | \r |
| 1761 | If 8-bit operations are not supported, then ASSERT().\r |
| 1762 | If StartBit is greater than 7, then ASSERT().\r |
| 1763 | If EndBit is greater than 7, then ASSERT().\r |
| 0ffa1286 |
1764 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1765 | \r |
| 1766 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1767 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1768 | Range 0..7.\r |
| 1769 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1770 | Range 0..7.\r |
| 1771 | @param OrData The value to OR with the read value from the value\r |
| 1772 | \r |
| 1773 | @return The new 8-bit value.\r |
| 1774 | \r |
| 1775 | **/\r |
| 1776 | UINT8\r |
| 1777 | EFIAPI\r |
| 1778 | BitFieldOr8 (\r |
| 1779 | IN UINT8 Operand,\r |
| 1780 | IN UINTN StartBit,\r |
| 1781 | IN UINTN EndBit,\r |
| 1782 | IN UINT8 OrData\r |
| 1783 | );\r |
| 1784 | \r |
| 1785 | /**\r |
| 1786 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r |
| 1787 | the result.\r |
| 1788 | \r |
| 1789 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 1790 | in Operand and the value specified by AndData. All other bits in Operand are\r |
| 1791 | preserved. The new 8-bit value is returned.\r |
| 1792 | \r |
| 1793 | If 8-bit operations are not supported, then ASSERT().\r |
| 1794 | If StartBit is greater than 7, then ASSERT().\r |
| 1795 | If EndBit is greater than 7, then ASSERT().\r |
| 0ffa1286 |
1796 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1797 | \r |
| 1798 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1799 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1800 | Range 0..7.\r |
| 1801 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1802 | Range 0..7.\r |
| 1803 | @param AndData The value to AND with the read value from the value.\r |
| 1804 | \r |
| 1805 | @return The new 8-bit value.\r |
| 1806 | \r |
| 1807 | **/\r |
| 1808 | UINT8\r |
| 1809 | EFIAPI\r |
| 1810 | BitFieldAnd8 (\r |
| 1811 | IN UINT8 Operand,\r |
| 1812 | IN UINTN StartBit,\r |
| 1813 | IN UINTN EndBit,\r |
| 1814 | IN UINT8 AndData\r |
| 1815 | );\r |
| 1816 | \r |
| 1817 | /**\r |
| 1818 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r |
| 1819 | bitwise OR, and returns the result.\r |
| 1820 | \r |
| 1821 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 1822 | in Operand and the value specified by AndData, followed by a bitwise\r |
| 1823 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
| 1824 | preserved. The new 8-bit value is returned.\r |
| 1825 | \r |
| 1826 | If 8-bit operations are not supported, then ASSERT().\r |
| 1827 | If StartBit is greater than 7, then ASSERT().\r |
| 1828 | If EndBit is greater than 7, then ASSERT().\r |
| 0ffa1286 |
1829 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1830 | \r |
| 1831 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1832 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1833 | Range 0..7.\r |
| 1834 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1835 | Range 0..7.\r |
| 1836 | @param AndData The value to AND with the read value from the value.\r |
| 1837 | @param OrData The value to OR with the result of the AND operation.\r |
| 1838 | \r |
| 1839 | @return The new 8-bit value.\r |
| 1840 | \r |
| 1841 | **/\r |
| 1842 | UINT8\r |
| 1843 | EFIAPI\r |
| 1844 | BitFieldAndThenOr8 (\r |
| 1845 | IN UINT8 Operand,\r |
| 1846 | IN UINTN StartBit,\r |
| 1847 | IN UINTN EndBit,\r |
| 1848 | IN UINT8 AndData,\r |
| 1849 | IN UINT8 OrData\r |
| 1850 | );\r |
| 1851 | \r |
| 1852 | /**\r |
| 1853 | Returns a bit field from a 16-bit value.\r |
| 1854 | \r |
| 1855 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
| 1856 | \r |
| 1857 | If 16-bit operations are not supported, then ASSERT().\r |
| 1858 | If StartBit is greater than 15, then ASSERT().\r |
| 1859 | If EndBit is greater than 15, then ASSERT().\r |
| 0ffa1286 |
1860 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1861 | \r |
| 1862 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1863 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1864 | Range 0..15.\r |
| 1865 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1866 | Range 0..15.\r |
| 1867 | \r |
| 1868 | @return The bit field read.\r |
| 1869 | \r |
| 1870 | **/\r |
| 1871 | UINT16\r |
| 1872 | EFIAPI\r |
| 1873 | BitFieldRead16 (\r |
| 1874 | IN UINT16 Operand,\r |
| 1875 | IN UINTN StartBit,\r |
| 1876 | IN UINTN EndBit\r |
| 1877 | );\r |
| 1878 | \r |
| 1879 | /**\r |
| 1880 | Writes a bit field to a 16-bit value, and returns the result.\r |
| 1881 | \r |
| 1882 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
| 1883 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r |
| 1884 | returned.\r |
| 1885 | \r |
| 1886 | If 16-bit operations are not supported, then ASSERT().\r |
| 1887 | If StartBit is greater than 15, then ASSERT().\r |
| 1888 | If EndBit is greater than 15, then ASSERT().\r |
| 0ffa1286 |
1889 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1890 | \r |
| 1891 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1892 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1893 | Range 0..15.\r |
| 1894 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1895 | Range 0..15.\r |
| 1896 | @param Value New value of the bit field.\r |
| 1897 | \r |
| 1898 | @return The new 16-bit value.\r |
| 1899 | \r |
| 1900 | **/\r |
| 1901 | UINT16\r |
| 1902 | EFIAPI\r |
| 1903 | BitFieldWrite16 (\r |
| 1904 | IN UINT16 Operand,\r |
| 1905 | IN UINTN StartBit,\r |
| 1906 | IN UINTN EndBit,\r |
| 1907 | IN UINT16 Value\r |
| 1908 | );\r |
| 1909 | \r |
| 1910 | /**\r |
| 1911 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r |
| 1912 | result.\r |
| 1913 | \r |
| 1914 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
| 1915 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 1916 | Operand are preserved. The new 16-bit value is returned.\r |
| 1917 | \r |
| 1918 | If 16-bit operations are not supported, then ASSERT().\r |
| 1919 | If StartBit is greater than 15, then ASSERT().\r |
| 1920 | If EndBit is greater than 15, then ASSERT().\r |
| 0ffa1286 |
1921 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1922 | \r |
| 1923 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1924 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1925 | Range 0..15.\r |
| 1926 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1927 | Range 0..15.\r |
| 1928 | @param OrData The value to OR with the read value from the value\r |
| 1929 | \r |
| 1930 | @return The new 16-bit value.\r |
| 1931 | \r |
| 1932 | **/\r |
| 1933 | UINT16\r |
| 1934 | EFIAPI\r |
| 1935 | BitFieldOr16 (\r |
| 1936 | IN UINT16 Operand,\r |
| 1937 | IN UINTN StartBit,\r |
| 1938 | IN UINTN EndBit,\r |
| 1939 | IN UINT16 OrData\r |
| 1940 | );\r |
| 1941 | \r |
| 1942 | /**\r |
| 1943 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r |
| 1944 | the result.\r |
| 1945 | \r |
| 1946 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 1947 | in Operand and the value specified by AndData. All other bits in Operand are\r |
| 1948 | preserved. The new 16-bit value is returned.\r |
| 1949 | \r |
| 1950 | If 16-bit operations are not supported, then ASSERT().\r |
| 1951 | If StartBit is greater than 15, then ASSERT().\r |
| 1952 | If EndBit is greater than 15, then ASSERT().\r |
| 0ffa1286 |
1953 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1954 | \r |
| 1955 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1956 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1957 | Range 0..15.\r |
| 1958 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1959 | Range 0..15.\r |
| 1960 | @param AndData The value to AND with the read value from the value\r |
| 1961 | \r |
| 1962 | @return The new 16-bit value.\r |
| 1963 | \r |
| 1964 | **/\r |
| 1965 | UINT16\r |
| 1966 | EFIAPI\r |
| 1967 | BitFieldAnd16 (\r |
| 1968 | IN UINT16 Operand,\r |
| 1969 | IN UINTN StartBit,\r |
| 1970 | IN UINTN EndBit,\r |
| 1971 | IN UINT16 AndData\r |
| 1972 | );\r |
| 1973 | \r |
| 1974 | /**\r |
| 1975 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r |
| 1976 | bitwise OR, and returns the result.\r |
| 1977 | \r |
| 1978 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 1979 | in Operand and the value specified by AndData, followed by a bitwise\r |
| 1980 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
| 1981 | preserved. The new 16-bit value is returned.\r |
| 1982 | \r |
| 1983 | If 16-bit operations are not supported, then ASSERT().\r |
| 1984 | If StartBit is greater than 15, then ASSERT().\r |
| 1985 | If EndBit is greater than 15, then ASSERT().\r |
| 0ffa1286 |
1986 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
1987 | \r |
| 1988 | @param Operand Operand on which to perform the bitfield operation.\r |
| 1989 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1990 | Range 0..15.\r |
| 1991 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1992 | Range 0..15.\r |
| 1993 | @param AndData The value to AND with the read value from the value.\r |
| 1994 | @param OrData The value to OR with the result of the AND operation.\r |
| 1995 | \r |
| 1996 | @return The new 16-bit value.\r |
| 1997 | \r |
| 1998 | **/\r |
| 1999 | UINT16\r |
| 2000 | EFIAPI\r |
| 2001 | BitFieldAndThenOr16 (\r |
| 2002 | IN UINT16 Operand,\r |
| 2003 | IN UINTN StartBit,\r |
| 2004 | IN UINTN EndBit,\r |
| 2005 | IN UINT16 AndData,\r |
| 2006 | IN UINT16 OrData\r |
| 2007 | );\r |
| 2008 | \r |
| 2009 | /**\r |
| 2010 | Returns a bit field from a 32-bit value.\r |
| 2011 | \r |
| 2012 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
| 2013 | \r |
| 2014 | If 32-bit operations are not supported, then ASSERT().\r |
| 2015 | If StartBit is greater than 31, then ASSERT().\r |
| 2016 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
2017 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2018 | \r |
| 2019 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2020 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2021 | Range 0..31.\r |
| 2022 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2023 | Range 0..31.\r |
| 2024 | \r |
| 2025 | @return The bit field read.\r |
| 2026 | \r |
| 2027 | **/\r |
| 2028 | UINT32\r |
| 2029 | EFIAPI\r |
| 2030 | BitFieldRead32 (\r |
| 2031 | IN UINT32 Operand,\r |
| 2032 | IN UINTN StartBit,\r |
| 2033 | IN UINTN EndBit\r |
| 2034 | );\r |
| 2035 | \r |
| 2036 | /**\r |
| 2037 | Writes a bit field to a 32-bit value, and returns the result.\r |
| 2038 | \r |
| 2039 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
| 2040 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r |
| 2041 | returned.\r |
| 2042 | \r |
| 2043 | If 32-bit operations are not supported, then ASSERT().\r |
| 2044 | If StartBit is greater than 31, then ASSERT().\r |
| 2045 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
2046 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2047 | \r |
| 2048 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2049 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2050 | Range 0..31.\r |
| 2051 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2052 | Range 0..31.\r |
| 2053 | @param Value New value of the bit field.\r |
| 2054 | \r |
| 2055 | @return The new 32-bit value.\r |
| 2056 | \r |
| 2057 | **/\r |
| 2058 | UINT32\r |
| 2059 | EFIAPI\r |
| 2060 | BitFieldWrite32 (\r |
| 2061 | IN UINT32 Operand,\r |
| 2062 | IN UINTN StartBit,\r |
| 2063 | IN UINTN EndBit,\r |
| 2064 | IN UINT32 Value\r |
| 2065 | );\r |
| 2066 | \r |
| 2067 | /**\r |
| 2068 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r |
| 2069 | result.\r |
| 2070 | \r |
| 2071 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
| 2072 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 2073 | Operand are preserved. The new 32-bit value is returned.\r |
| 2074 | \r |
| 2075 | If 32-bit operations are not supported, then ASSERT().\r |
| 2076 | If StartBit is greater than 31, then ASSERT().\r |
| 2077 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
2078 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2079 | \r |
| 2080 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2081 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2082 | Range 0..31.\r |
| 2083 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2084 | Range 0..31.\r |
| 2085 | @param OrData The value to OR with the read value from the value\r |
| 2086 | \r |
| 2087 | @return The new 32-bit value.\r |
| 2088 | \r |
| 2089 | **/\r |
| 2090 | UINT32\r |
| 2091 | EFIAPI\r |
| 2092 | BitFieldOr32 (\r |
| 2093 | IN UINT32 Operand,\r |
| 2094 | IN UINTN StartBit,\r |
| 2095 | IN UINTN EndBit,\r |
| 2096 | IN UINT32 OrData\r |
| 2097 | );\r |
| 2098 | \r |
| 2099 | /**\r |
| 2100 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r |
| 2101 | the result.\r |
| 2102 | \r |
| 2103 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 2104 | in Operand and the value specified by AndData. All other bits in Operand are\r |
| 2105 | preserved. The new 32-bit value is returned.\r |
| 2106 | \r |
| 2107 | If 32-bit operations are not supported, then ASSERT().\r |
| 2108 | If StartBit is greater than 31, then ASSERT().\r |
| 2109 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
2110 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2111 | \r |
| 2112 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2113 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2114 | Range 0..31.\r |
| 2115 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2116 | Range 0..31.\r |
| 2117 | @param AndData The value to AND with the read value from the value\r |
| 2118 | \r |
| 2119 | @return The new 32-bit value.\r |
| 2120 | \r |
| 2121 | **/\r |
| 2122 | UINT32\r |
| 2123 | EFIAPI\r |
| 2124 | BitFieldAnd32 (\r |
| 2125 | IN UINT32 Operand,\r |
| 2126 | IN UINTN StartBit,\r |
| 2127 | IN UINTN EndBit,\r |
| 2128 | IN UINT32 AndData\r |
| 2129 | );\r |
| 2130 | \r |
| 2131 | /**\r |
| 2132 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r |
| 2133 | bitwise OR, and returns the result.\r |
| 2134 | \r |
| 2135 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 2136 | in Operand and the value specified by AndData, followed by a bitwise\r |
| 2137 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
| 2138 | preserved. The new 32-bit value is returned.\r |
| 2139 | \r |
| 2140 | If 32-bit operations are not supported, then ASSERT().\r |
| 2141 | If StartBit is greater than 31, then ASSERT().\r |
| 2142 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
2143 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2144 | \r |
| 2145 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2146 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2147 | Range 0..31.\r |
| 2148 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2149 | Range 0..31.\r |
| 2150 | @param AndData The value to AND with the read value from the value.\r |
| 2151 | @param OrData The value to OR with the result of the AND operation.\r |
| 2152 | \r |
| 2153 | @return The new 32-bit value.\r |
| 2154 | \r |
| 2155 | **/\r |
| 2156 | UINT32\r |
| 2157 | EFIAPI\r |
| 2158 | BitFieldAndThenOr32 (\r |
| 2159 | IN UINT32 Operand,\r |
| 2160 | IN UINTN StartBit,\r |
| 2161 | IN UINTN EndBit,\r |
| 2162 | IN UINT32 AndData,\r |
| 2163 | IN UINT32 OrData\r |
| 2164 | );\r |
| 2165 | \r |
| 2166 | /**\r |
| 2167 | Returns a bit field from a 64-bit value.\r |
| 2168 | \r |
| 2169 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
| 2170 | \r |
| 2171 | If 64-bit operations are not supported, then ASSERT().\r |
| 2172 | If StartBit is greater than 63, then ASSERT().\r |
| 2173 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
2174 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2175 | \r |
| 2176 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2177 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2178 | Range 0..63.\r |
| 2179 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2180 | Range 0..63.\r |
| 2181 | \r |
| 2182 | @return The bit field read.\r |
| 2183 | \r |
| 2184 | **/\r |
| 2185 | UINT64\r |
| 2186 | EFIAPI\r |
| 2187 | BitFieldRead64 (\r |
| 2188 | IN UINT64 Operand,\r |
| 2189 | IN UINTN StartBit,\r |
| 2190 | IN UINTN EndBit\r |
| 2191 | );\r |
| 2192 | \r |
| 2193 | /**\r |
| 2194 | Writes a bit field to a 64-bit value, and returns the result.\r |
| 2195 | \r |
| 2196 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
| 2197 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r |
| 2198 | returned.\r |
| 2199 | \r |
| 2200 | If 64-bit operations are not supported, then ASSERT().\r |
| 2201 | If StartBit is greater than 63, then ASSERT().\r |
| 2202 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
2203 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2204 | \r |
| 2205 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2206 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2207 | Range 0..63.\r |
| 2208 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2209 | Range 0..63.\r |
| 2210 | @param Value New value of the bit field.\r |
| 2211 | \r |
| 2212 | @return The new 64-bit value.\r |
| 2213 | \r |
| 2214 | **/\r |
| 2215 | UINT64\r |
| 2216 | EFIAPI\r |
| 2217 | BitFieldWrite64 (\r |
| 2218 | IN UINT64 Operand,\r |
| 2219 | IN UINTN StartBit,\r |
| 2220 | IN UINTN EndBit,\r |
| 2221 | IN UINT64 Value\r |
| 2222 | );\r |
| 2223 | \r |
| 2224 | /**\r |
| 2225 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r |
| 2226 | result.\r |
| 2227 | \r |
| 2228 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
| 2229 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 2230 | Operand are preserved. The new 64-bit value is returned.\r |
| 2231 | \r |
| 2232 | If 64-bit operations are not supported, then ASSERT().\r |
| 2233 | If StartBit is greater than 63, then ASSERT().\r |
| 2234 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
2235 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2236 | \r |
| 2237 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2238 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2239 | Range 0..63.\r |
| 2240 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2241 | Range 0..63.\r |
| 2242 | @param OrData The value to OR with the read value from the value\r |
| 2243 | \r |
| 2244 | @return The new 64-bit value.\r |
| 2245 | \r |
| 2246 | **/\r |
| 2247 | UINT64\r |
| 2248 | EFIAPI\r |
| 2249 | BitFieldOr64 (\r |
| 2250 | IN UINT64 Operand,\r |
| 2251 | IN UINTN StartBit,\r |
| 2252 | IN UINTN EndBit,\r |
| 2253 | IN UINT64 OrData\r |
| 2254 | );\r |
| 2255 | \r |
| 2256 | /**\r |
| 2257 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r |
| 2258 | the result.\r |
| 2259 | \r |
| 2260 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 2261 | in Operand and the value specified by AndData. All other bits in Operand are\r |
| 2262 | preserved. The new 64-bit value is returned.\r |
| 2263 | \r |
| 2264 | If 64-bit operations are not supported, then ASSERT().\r |
| 2265 | If StartBit is greater than 63, then ASSERT().\r |
| 2266 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
2267 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2268 | \r |
| 2269 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2270 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2271 | Range 0..63.\r |
| 2272 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2273 | Range 0..63.\r |
| 2274 | @param AndData The value to AND with the read value from the value\r |
| 2275 | \r |
| 2276 | @return The new 64-bit value.\r |
| 2277 | \r |
| 2278 | **/\r |
| 2279 | UINT64\r |
| 2280 | EFIAPI\r |
| 2281 | BitFieldAnd64 (\r |
| 2282 | IN UINT64 Operand,\r |
| 2283 | IN UINTN StartBit,\r |
| 2284 | IN UINTN EndBit,\r |
| 2285 | IN UINT64 AndData\r |
| 2286 | );\r |
| 2287 | \r |
| 2288 | /**\r |
| 2289 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r |
| 2290 | bitwise OR, and returns the result.\r |
| 2291 | \r |
| 2292 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
| 2293 | in Operand and the value specified by AndData, followed by a bitwise\r |
| 2294 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
| 2295 | preserved. The new 64-bit value is returned.\r |
| 2296 | \r |
| 2297 | If 64-bit operations are not supported, then ASSERT().\r |
| 2298 | If StartBit is greater than 63, then ASSERT().\r |
| 2299 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
2300 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
2301 | \r |
| 2302 | @param Operand Operand on which to perform the bitfield operation.\r |
| 2303 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2304 | Range 0..63.\r |
| 2305 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2306 | Range 0..63.\r |
| 2307 | @param AndData The value to AND with the read value from the value.\r |
| 2308 | @param OrData The value to OR with the result of the AND operation.\r |
| 2309 | \r |
| 2310 | @return The new 64-bit value.\r |
| 2311 | \r |
| 2312 | **/\r |
| 2313 | UINT64\r |
| 2314 | EFIAPI\r |
| 2315 | BitFieldAndThenOr64 (\r |
| 2316 | IN UINT64 Operand,\r |
| 2317 | IN UINTN StartBit,\r |
| 2318 | IN UINTN EndBit,\r |
| 2319 | IN UINT64 AndData,\r |
| 2320 | IN UINT64 OrData\r |
| 2321 | );\r |
| 2322 | \r |
| 2323 | //\r |
| 2324 | // Base Library Synchronization Functions\r |
| 2325 | //\r |
| 2326 | \r |
| 2327 | /**\r |
| 2328 | Retrieves the architecture specific spin lock alignment requirements for\r |
| 2329 | optimal spin lock performance.\r |
| 2330 | \r |
| 2331 | This function retrieves the spin lock alignment requirements for optimal\r |
| 2332 | performance on a given CPU architecture. The spin lock alignment must be a\r |
| 2333 | power of two and is returned by this function. If there are no alignment\r |
| 2334 | requirements, then 1 must be returned. The spin lock synchronization\r |
| 2335 | functions must function correctly if the spin lock size and alignment values\r |
| 2336 | returned by this function are not used at all. These values are hints to the\r |
| 2337 | consumers of the spin lock synchronization functions to obtain optimal spin\r |
| 2338 | lock performance.\r |
| 2339 | \r |
| 2340 | @return The architecture specific spin lock alignment.\r |
| 2341 | \r |
| 2342 | **/\r |
| 2343 | UINTN\r |
| 2344 | EFIAPI\r |
| 2345 | GetSpinLockProperties (\r |
| 2346 | VOID\r |
| 2347 | );\r |
| 2348 | \r |
| 2349 | /**\r |
| 2350 | Initializes a spin lock to the released state and returns the spin lock.\r |
| 2351 | \r |
| 2352 | This function initializes the spin lock specified by SpinLock to the released\r |
| 2353 | state, and returns SpinLock. Optimal performance can be achieved by calling\r |
| 2354 | GetSpinLockProperties() to determine the size and alignment requirements for\r |
| 2355 | SpinLock.\r |
| 2356 | \r |
| 2357 | If SpinLock is NULL, then ASSERT().\r |
| 2358 | \r |
| 2359 | @param SpinLock A pointer to the spin lock to initialize to the released\r |
| 2360 | state.\r |
| 2361 | \r |
| 2362 | @return SpinLock\r |
| 2363 | \r |
| 2364 | **/\r |
| 2365 | SPIN_LOCK *\r |
| 2366 | EFIAPI\r |
| 2367 | InitializeSpinLock (\r |
| 2368 | IN SPIN_LOCK *SpinLock\r |
| 2369 | );\r |
| 2370 | \r |
| 2371 | /**\r |
| 2372 | Waits until a spin lock can be placed in the acquired state.\r |
| 2373 | \r |
| 2374 | This function checks the state of the spin lock specified by SpinLock. If\r |
| 2375 | SpinLock is in the released state, then this function places SpinLock in the\r |
| 2376 | acquired state and returns SpinLock. Otherwise, this function waits\r |
| 2377 | indefinitely for the spin lock to be released, and then places it in the\r |
| 2378 | acquired state and returns SpinLock. All state transitions of SpinLock must\r |
| 2379 | be performed using MP safe mechanisms.\r |
| 2380 | \r |
| 2381 | If SpinLock is NULL, then ASSERT().\r |
| 2382 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
| 2383 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r |
| 2384 | PcdSpinLockTimeout microseconds, then ASSERT().\r |
| 2385 | \r |
| 2386 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r |
| 2387 | \r |
| 2388 | @return SpinLock\r |
| 2389 | \r |
| 2390 | **/\r |
| 2391 | SPIN_LOCK *\r |
| 2392 | EFIAPI\r |
| 2393 | AcquireSpinLock (\r |
| 2394 | IN SPIN_LOCK *SpinLock\r |
| 2395 | );\r |
| 2396 | \r |
| 2397 | /**\r |
| 2398 | Attempts to place a spin lock in the acquired state.\r |
| 2399 | \r |
| 2400 | This function checks the state of the spin lock specified by SpinLock. If\r |
| 2401 | SpinLock is in the released state, then this function places SpinLock in the\r |
| 2402 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r |
| 2403 | transitions of SpinLock must be performed using MP safe mechanisms.\r |
| 2404 | \r |
| 2405 | If SpinLock is NULL, then ASSERT().\r |
| 2406 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
| 2407 | \r |
| 2408 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r |
| 2409 | \r |
| 2410 | @retval TRUE SpinLock was placed in the acquired state.\r |
| 2411 | @retval FALSE SpinLock could not be acquired.\r |
| 2412 | \r |
| 2413 | **/\r |
| 2414 | BOOLEAN\r |
| 2415 | EFIAPI\r |
| 2416 | AcquireSpinLockOrFail (\r |
| 2417 | IN SPIN_LOCK *SpinLock\r |
| 2418 | );\r |
| 2419 | \r |
| 2420 | /**\r |
| 2421 | Releases a spin lock.\r |
| 2422 | \r |
| 2423 | This function places the spin lock specified by SpinLock in the release state\r |
| 2424 | and returns SpinLock.\r |
| 2425 | \r |
| 2426 | If SpinLock is NULL, then ASSERT().\r |
| 2427 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
| 2428 | \r |
| 2429 | @param SpinLock A pointer to the spin lock to release.\r |
| 2430 | \r |
| 2431 | @return SpinLock\r |
| 2432 | \r |
| 2433 | **/\r |
| 2434 | SPIN_LOCK *\r |
| 2435 | EFIAPI\r |
| 2436 | ReleaseSpinLock (\r |
| 2437 | IN SPIN_LOCK *SpinLock\r |
| 2438 | );\r |
| 2439 | \r |
| 2440 | /**\r |
| 2441 | Performs an atomic increment of an 32-bit unsigned integer.\r |
| 2442 | \r |
| 2443 | Performs an atomic increment of the 32-bit unsigned integer specified by\r |
| 2444 | Value and returns the incremented value. The increment operation must be\r |
| 2445 | performed using MP safe mechanisms. The state of the return value is not\r |
| 2446 | guaranteed to be MP safe.\r |
| 2447 | \r |
| 2448 | If Value is NULL, then ASSERT().\r |
| 2449 | \r |
| 2450 | @param Value A pointer to the 32-bit value to increment.\r |
| 2451 | \r |
| 2452 | @return The incremented value.\r |
| 2453 | \r |
| 2454 | **/\r |
| 2455 | UINT32\r |
| 2456 | EFIAPI\r |
| 2457 | InterlockedIncrement (\r |
| 2458 | IN UINT32 *Value\r |
| 2459 | );\r |
| 2460 | \r |
| 2461 | /**\r |
| 2462 | Performs an atomic decrement of an 32-bit unsigned integer.\r |
| 2463 | \r |
| 2464 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r |
| 2465 | Value and returns the decremented value. The decrement operation must be\r |
| 2466 | performed using MP safe mechanisms. The state of the return value is not\r |
| 2467 | guaranteed to be MP safe.\r |
| 2468 | \r |
| 2469 | If Value is NULL, then ASSERT().\r |
| 2470 | \r |
| 2471 | @param Value A pointer to the 32-bit value to decrement.\r |
| 2472 | \r |
| 2473 | @return The decremented value.\r |
| 2474 | \r |
| 2475 | **/\r |
| 2476 | UINT32\r |
| 2477 | EFIAPI\r |
| 2478 | InterlockedDecrement (\r |
| 2479 | IN UINT32 *Value\r |
| 2480 | );\r |
| 2481 | \r |
| 2482 | /**\r |
| 2483 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r |
| 2484 | \r |
| 1ea5ca46 |
2485 | Performs an atomic compare exchange operation on the 32-bit unsigned integer\r |
| 681dbac9 |
2486 | specified by Value. If Value is equal to CompareValue, then Value is set to\r |
| 1ea5ca46 |
2487 | ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r |
| 681dbac9 |
2488 | then Value is returned. The compare exchange operation must be performed using\r |
| 1ea5ca46 |
2489 | MP safe mechanisms.\r |
| 2490 | \r |
| 2491 | If Value is NULL, then ASSERT().\r |
| 2492 | \r |
| 878ddf1f |
2493 | @param Value A pointer to the 32-bit value for the compare exchange\r |
| 2494 | operation.\r |
| 2495 | @param CompareValue 32-bit value used in compare operation.\r |
| 2496 | @param ExchangeValue 32-bit value used in exchange operation.\r |
| 2497 | \r |
| 2498 | @return The original *Value before exchange.\r |
| 2499 | \r |
| 2500 | **/\r |
| 2501 | UINT32\r |
| 2502 | EFIAPI\r |
| 2503 | InterlockedCompareExchange32 (\r |
| 0ffa1286 |
2504 | IN OUT UINT32 *Value,\r |
| 878ddf1f |
2505 | IN UINT32 CompareValue,\r |
| 2506 | IN UINT32 ExchangeValue\r |
| 2507 | );\r |
| 2508 | \r |
| 2509 | /**\r |
| 2510 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r |
| 2511 | \r |
| 681dbac9 |
2512 | Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r |
| 2513 | by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r |
| 2514 | CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r |
| 1ea5ca46 |
2515 | The compare exchange operation must be performed using MP safe mechanisms.\r |
| 2516 | \r |
| 2517 | If Value is NULL, then ASSERT().\r |
| 2518 | \r |
| 878ddf1f |
2519 | @param Value A pointer to the 64-bit value for the compare exchange\r |
| 2520 | operation.\r |
| 2521 | @param CompareValue 64-bit value used in compare operation.\r |
| 2522 | @param ExchangeValue 64-bit value used in exchange operation.\r |
| 2523 | \r |
| 2524 | @return The original *Value before exchange.\r |
| 2525 | \r |
| 2526 | **/\r |
| 2527 | UINT64\r |
| 2528 | EFIAPI\r |
| 2529 | InterlockedCompareExchange64 (\r |
| 0ffa1286 |
2530 | IN OUT UINT64 *Value,\r |
| 878ddf1f |
2531 | IN UINT64 CompareValue,\r |
| 2532 | IN UINT64 ExchangeValue\r |
| 2533 | );\r |
| 2534 | \r |
| 2535 | /**\r |
| 2536 | Performs an atomic compare exchange operation on a pointer value.\r |
| 2537 | \r |
| 2538 | Performs an atomic compare exchange operation on the pointer value specified\r |
| 2539 | by Value. If Value is equal to CompareValue, then Value is set to\r |
| 2540 | ExchangeValue and CompareValue is returned. If Value is not equal to\r |
| 2541 | CompareValue, then Value is returned. The compare exchange operation must be\r |
| 2542 | performed using MP safe mechanisms.\r |
| 2543 | \r |
| 2544 | If Value is NULL, then ASSERT().\r |
| 2545 | \r |
| 2546 | @param Value A pointer to the pointer value for the compare exchange\r |
| 2547 | operation.\r |
| 2548 | @param CompareValue Pointer value used in compare operation.\r |
| 2549 | @param ExchangeValue Pointer value used in exchange operation.\r |
| 2550 | \r |
| 2551 | **/\r |
| 2552 | VOID *\r |
| 2553 | EFIAPI\r |
| 2554 | InterlockedCompareExchangePointer (\r |
| 0ffa1286 |
2555 | IN OUT VOID **Value,\r |
| 878ddf1f |
2556 | IN VOID *CompareValue,\r |
| 2557 | IN VOID *ExchangeValue\r |
| 2558 | );\r |
| 2559 | \r |
| 2560 | //\r |
| 2561 | // Base Library CPU Functions\r |
| 2562 | //\r |
| 2563 | typedef\r |
| 2564 | VOID\r |
| 2565 | (EFIAPI *SWITCH_STACK_ENTRY_POINT) (\r |
| 2566 | IN VOID *Context1, OPTIONAL\r |
| 2567 | IN VOID *Context2 OPTIONAL\r |
| 2568 | );\r |
| 2569 | \r |
| 2570 | /**\r |
| 2571 | Used to serialize load and store operations.\r |
| 2572 | \r |
| 2573 | All loads and stores that proceed calls to this function are guaranteed to be\r |
| 2574 | globally visible when this function returns.\r |
| 2575 | \r |
| 2576 | **/\r |
| 2577 | VOID\r |
| 2578 | EFIAPI\r |
| 2579 | MemoryFence (\r |
| 2580 | VOID\r |
| 2581 | );\r |
| 2582 | \r |
| 2583 | /**\r |
| 2584 | Saves the current CPU context that can be restored with a call to LongJump()\r |
| 2585 | and returns 0.\r |
| 2586 | \r |
| 2587 | Saves the current CPU context in the buffer specified by JumpBuffer and\r |
| 2588 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r |
| 2589 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r |
| 2590 | \r |
| 2591 | If JumpBuffer is NULL, then ASSERT().\r |
| 1ea5ca46 |
2592 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| 878ddf1f |
2593 | \r |
| 2594 | @param JumpBuffer A pointer to CPU context buffer.\r |
| 2595 | \r |
| 2596 | @retval 0 Indicates a return from SetJump().\r |
| 2597 | \r |
| 2598 | **/\r |
| 2599 | UINTN\r |
| 2600 | EFIAPI\r |
| 2601 | SetJump (\r |
| 2602 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r |
| 2603 | );\r |
| 2604 | \r |
| 2605 | /**\r |
| 2606 | Restores the CPU context that was saved with SetJump().\r |
| 2607 | \r |
| 2608 | Restores the CPU context from the buffer specified by JumpBuffer. This\r |
| 2609 | function never returns to the caller. Instead is resumes execution based on\r |
| 2610 | the state of JumpBuffer.\r |
| 2611 | \r |
| 2612 | If JumpBuffer is NULL, then ASSERT().\r |
| 1ea5ca46 |
2613 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| 878ddf1f |
2614 | If Value is 0, then ASSERT().\r |
| 2615 | \r |
| 2616 | @param JumpBuffer A pointer to CPU context buffer.\r |
| 2617 | @param Value The value to return when the SetJump() context is\r |
| 2618 | restored and must be non-zero.\r |
| 2619 | \r |
| 2620 | **/\r |
| 2621 | VOID\r |
| 2622 | EFIAPI\r |
| 2623 | LongJump (\r |
| 2624 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r |
| 2625 | IN UINTN Value\r |
| 2626 | );\r |
| 2627 | \r |
| 2628 | /**\r |
| 2629 | Enables CPU interrupts.\r |
| 2630 | \r |
| 2631 | Enables CPU interrupts.\r |
| 2632 | \r |
| 2633 | **/\r |
| 2634 | VOID\r |
| 2635 | EFIAPI\r |
| 2636 | EnableInterrupts (\r |
| 2637 | VOID\r |
| 2638 | );\r |
| 2639 | \r |
| 2640 | /**\r |
| 2641 | Disables CPU interrupts.\r |
| 2642 | \r |
| 2643 | Disables CPU interrupts.\r |
| 2644 | \r |
| 2645 | **/\r |
| 2646 | VOID\r |
| 2647 | EFIAPI\r |
| 2648 | DisableInterrupts (\r |
| 2649 | VOID\r |
| 2650 | );\r |
| 2651 | \r |
| 2652 | /**\r |
| 2653 | Disables CPU interrupts and returns the interrupt state prior to the disable\r |
| 2654 | operation.\r |
| 2655 | \r |
| 2656 | Disables CPU interrupts and returns the interrupt state prior to the disable\r |
| 2657 | operation.\r |
| 2658 | \r |
| 2659 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
| 2660 | @retval FALSE CPU interrupts were disabled on entry to this call.\r |
| 2661 | \r |
| 2662 | **/\r |
| 2663 | BOOLEAN\r |
| 2664 | EFIAPI\r |
| 2665 | SaveAndDisableInterrupts (\r |
| 2666 | VOID\r |
| 2667 | );\r |
| 2668 | \r |
| 2669 | /**\r |
| 2670 | Enables CPU interrupts for the smallest window required to capture any\r |
| 2671 | pending interrupts.\r |
| 2672 | \r |
| 2673 | Enables CPU interrupts for the smallest window required to capture any\r |
| 2674 | pending interrupts.\r |
| 2675 | \r |
| 2676 | **/\r |
| 2677 | VOID\r |
| 2678 | EFIAPI\r |
| 2679 | EnableDisableInterrupts (\r |
| 2680 | VOID\r |
| 2681 | );\r |
| 2682 | \r |
| 2683 | /**\r |
| 2684 | Retrieves the current CPU interrupt state.\r |
| 2685 | \r |
| 2686 | Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r |
| 2687 | currently enabled. Otherwise returns FALSE.\r |
| 2688 | \r |
| 2689 | @retval TRUE CPU interrupts are enabled.\r |
| 2690 | @retval FALSE CPU interrupts are disabled.\r |
| 2691 | \r |
| 2692 | **/\r |
| 2693 | BOOLEAN\r |
| 2694 | EFIAPI\r |
| 2695 | GetInterruptState (\r |
| 2696 | VOID\r |
| 2697 | );\r |
| 2698 | \r |
| 2699 | /**\r |
| 2700 | Set the current CPU interrupt state.\r |
| 2701 | \r |
| 2702 | Sets the current CPU interrupt state to the state specified by\r |
| 2703 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r |
| 2704 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r |
| 2705 | returned.\r |
| 2706 | \r |
| 2707 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r |
| 2708 | interrupts should be disabled.\r |
| 2709 | \r |
| 2710 | @return InterruptState\r |
| 2711 | \r |
| 2712 | **/\r |
| 2713 | BOOLEAN\r |
| 2714 | EFIAPI\r |
| 2715 | SetInterruptState (\r |
| 2716 | IN BOOLEAN InterruptState\r |
| 2717 | );\r |
| 2718 | \r |
| 2719 | /**\r |
| 2720 | Places the CPU in a sleep state until an interrupt is received.\r |
| 2721 | \r |
| 2722 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r |
| 2723 | are disabled prior to calling this function, then the CPU will be placed in a\r |
| 2724 | sleep state indefinitely.\r |
| 2725 | \r |
| 2726 | **/\r |
| 2727 | VOID\r |
| 2728 | EFIAPI\r |
| 2729 | CpuSleep (\r |
| 2730 | VOID\r |
| 2731 | );\r |
| 2732 | \r |
| 2733 | /**\r |
| 2734 | Requests CPU to pause for a short period of time.\r |
| 2735 | \r |
| 2736 | Requests CPU to pause for a short period of time. Typically used in MP\r |
| 2737 | systems to prevent memory starvation while waiting for a spin lock.\r |
| 2738 | \r |
| 2739 | **/\r |
| 2740 | VOID\r |
| 2741 | EFIAPI\r |
| 2742 | CpuPause (\r |
| 2743 | VOID\r |
| 2744 | );\r |
| 2745 | \r |
| 2746 | /**\r |
| 2747 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r |
| 2748 | \r |
| 2749 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r |
| 2750 | \r |
| 2751 | **/\r |
| 2752 | VOID\r |
| 2753 | EFIAPI\r |
| 2754 | CpuFlushTlb (\r |
| 2755 | VOID\r |
| 2756 | );\r |
| 2757 | \r |
| 2758 | /**\r |
| 2759 | Transfers control to a function starting with a new stack.\r |
| 2760 | \r |
| 2761 | Transfers control to the function specified by EntryPoint using the new stack\r |
| 2762 | specified by NewStack and passing in the parameters specified by Context1 and\r |
| 2763 | Context2. Context1 and Context2 are optional and may be NULL. The function\r |
| 2764 | EntryPoint must never return.\r |
| 2765 | \r |
| 2766 | If EntryPoint is NULL, then ASSERT().\r |
| 2767 | If NewStack is NULL, then ASSERT().\r |
| 2768 | \r |
| 2769 | @param EntryPoint A pointer to function to call with the new stack.\r |
| 2770 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
| 2771 | function.\r |
| 2772 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
| 2773 | function.\r |
| 2774 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
| 2775 | function.\r |
| 2776 | \r |
| 2777 | **/\r |
| 2778 | VOID\r |
| 2779 | EFIAPI\r |
| 2780 | SwitchStack (\r |
| 2781 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
| 2782 | IN VOID *Context1, OPTIONAL\r |
| 2783 | IN VOID *Context2, OPTIONAL\r |
| 2784 | IN VOID *NewStack\r |
| 2785 | );\r |
| 2786 | \r |
| 2787 | /**\r |
| 2788 | Generates a breakpoint on the CPU.\r |
| 2789 | \r |
| 2790 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r |
| 2791 | that code can resume normal execution after the breakpoint.\r |
| 2792 | \r |
| 2793 | **/\r |
| 2794 | VOID\r |
| 2795 | EFIAPI\r |
| 2796 | CpuBreakpoint (\r |
| 2797 | VOID\r |
| 2798 | );\r |
| 2799 | \r |
| 2800 | /**\r |
| 2801 | Executes an infinite loop.\r |
| 2802 | \r |
| 2803 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r |
| 2804 | past the loop and the code that follows the loop must execute properly. This\r |
| 2805 | implies that the infinite loop must not cause the code that follow it to be\r |
| 2806 | optimized away.\r |
| 2807 | \r |
| 2808 | **/\r |
| 2809 | VOID\r |
| 2810 | EFIAPI\r |
| 2811 | CpuDeadLoop (\r |
| 2812 | VOID\r |
| 2813 | );\r |
| 2814 | \r |
| 2815 | //\r |
| 2816 | // IA32 and X64 Specific Functions\r |
| 2817 | //\r |
| 2818 | //\r |
| 2819 | // Byte packed structure for 16-bit Real Mode EFLAGS\r |
| 2820 | //\r |
| 2821 | typedef union {\r |
| 2822 | struct {\r |
| 2823 | UINT32 CF:1; // Carry Flag\r |
| 2824 | UINT32 Reserved_0:1; // Reserved\r |
| 2825 | UINT32 PF:1; // Parity Flag\r |
| 2826 | UINT32 Reserved_1:1; // Reserved\r |
| 2827 | UINT32 AF:1; // Auxiliary Carry Flag\r |
| 2828 | UINT32 Reserved_2:1; // Reserved\r |
| 2829 | UINT32 ZF:1; // Zero Flag\r |
| 2830 | UINT32 SF:1; // Sign Flag\r |
| 2831 | UINT32 TF:1; // Trap Flag\r |
| 2832 | UINT32 IF:1; // Interrupt Enable Flag\r |
| 2833 | UINT32 DF:1; // Direction Flag\r |
| 2834 | UINT32 OF:1; // Overflow Flag\r |
| 2835 | UINT32 IOPL:2; // I/O Privilege Level\r |
| 2836 | UINT32 NT:1; // Nested Task\r |
| 2837 | UINT32 Reserved_3:1; // Reserved\r |
| 2838 | } Bits;\r |
| 2839 | UINT16 Uint16;\r |
| 2840 | } IA32_FLAGS16;\r |
| 2841 | \r |
| 2842 | //\r |
| 2843 | // Byte packed structure for EFLAGS/RFLAGS\r |
| 2844 | // 32-bits on IA-32\r |
| 2845 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
| 2846 | //\r |
| 2847 | typedef union {\r |
| 2848 | struct {\r |
| 2849 | UINT32 CF:1; // Carry Flag\r |
| 2850 | UINT32 Reserved_0:1; // Reserved\r |
| 2851 | UINT32 PF:1; // Parity Flag\r |
| 2852 | UINT32 Reserved_1:1; // Reserved\r |
| 2853 | UINT32 AF:1; // Auxiliary Carry Flag\r |
| 2854 | UINT32 Reserved_2:1; // Reserved\r |
| 2855 | UINT32 ZF:1; // Zero Flag\r |
| 2856 | UINT32 SF:1; // Sign Flag\r |
| 2857 | UINT32 TF:1; // Trap Flag\r |
| 2858 | UINT32 IF:1; // Interrupt Enable Flag\r |
| 2859 | UINT32 DF:1; // Direction Flag\r |
| 2860 | UINT32 OF:1; // Overflow Flag\r |
| 2861 | UINT32 IOPL:2; // I/O Privilege Level\r |
| 2862 | UINT32 NT:1; // Nested Task\r |
| 2863 | UINT32 Reserved_3:1; // Reserved\r |
| 2864 | UINT32 RF:1; // Resume Flag\r |
| 2865 | UINT32 VM:1; // Virtual 8086 Mode\r |
| 2866 | UINT32 AC:1; // Alignment Check\r |
| 2867 | UINT32 VIF:1; // Virtual Interrupt Flag\r |
| 2868 | UINT32 VIP:1; // Virtual Interrupt Pending\r |
| 2869 | UINT32 ID:1; // ID Flag\r |
| 2870 | UINT32 Reserved_4:10; // Reserved\r |
| 2871 | } Bits;\r |
| 2872 | UINTN UintN;\r |
| 2873 | } IA32_EFLAGS32;\r |
| 2874 | \r |
| 2875 | //\r |
| 2876 | // Byte packed structure for Control Register 0 (CR0)\r |
| 2877 | // 32-bits on IA-32\r |
| 2878 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
| 2879 | //\r |
| 2880 | typedef union {\r |
| 2881 | struct {\r |
| 2882 | UINT32 PE:1; // Protection Enable\r |
| 2883 | UINT32 MP:1; // Monitor Coprocessor\r |
| 2884 | UINT32 EM:1; // Emulation\r |
| 2885 | UINT32 TS:1; // Task Switched\r |
| 2886 | UINT32 ET:1; // Extension Type\r |
| 2887 | UINT32 NE:1; // Numeric Error\r |
| 2888 | UINT32 Reserved_0:10; // Reserved\r |
| 2889 | UINT32 WP:1; // Write Protect\r |
| 2890 | UINT32 Reserved_1:1; // Reserved\r |
| 2891 | UINT32 AM:1; // Alignment Mask\r |
| 2892 | UINT32 Reserved_2:10; // Reserved\r |
| 2893 | UINT32 NW:1; // Mot Write-through\r |
| 2894 | UINT32 CD:1; // Cache Disable\r |
| 2895 | UINT32 PG:1; // Paging\r |
| 2896 | } Bits;\r |
| 2897 | UINTN UintN;\r |
| 2898 | } IA32_CR0;\r |
| 2899 | \r |
| 2900 | //\r |
| 2901 | // Byte packed structure for Control Register 4 (CR4)\r |
| 2902 | // 32-bits on IA-32\r |
| 2903 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
| 2904 | //\r |
| 2905 | typedef union {\r |
| 2906 | struct {\r |
| 2907 | UINT32 VME:1; // Virtual-8086 Mode Extensions\r |
| 2908 | UINT32 PVI:1; // Protected-Mode Virtual Interrupts\r |
| 2909 | UINT32 TSD:1; // Time Stamp Disable\r |
| 2910 | UINT32 DE:1; // Debugging Extensions\r |
| 2911 | UINT32 PSE:1; // Page Size Extensions\r |
| 2912 | UINT32 PAE:1; // Physical Address Extension\r |
| 2913 | UINT32 MCE:1; // Machine Check Enable\r |
| 2914 | UINT32 PGE:1; // Page Global Enable\r |
| 2915 | UINT32 PCE:1; // Performance Monitoring Counter\r |
| 2916 | // Enable\r |
| 2917 | UINT32 OSFXSR:1; // Operating System Support for\r |
| 2918 | // FXSAVE and FXRSTOR instructions\r |
| 2919 | UINT32 OSXMMEXCPT:1; // Operating System Support for\r |
| 2920 | // Unmasked SIMD Floating Point\r |
| 2921 | // Exceptions\r |
| 2922 | UINT32 Reserved_0:2; // Reserved\r |
| 2923 | UINT32 VMXE:1; // VMX Enable\r |
| 2924 | UINT32 Reserved_1:18; // Reseved\r |
| 2925 | } Bits;\r |
| 2926 | UINTN UintN;\r |
| 2927 | } IA32_CR4;\r |
| 2928 | \r |
| 2929 | //\r |
| 2930 | // Byte packed structure for an IDTR, GDTR, LDTR descriptor\r |
| 4cbd2175 |
2931 | /// @bug How to make this structure byte-packed in a compiler independent way?\r |
| 878ddf1f |
2932 | //\r |
| db8f40e2 |
2933 | #pragma pack (1)\r |
| 878ddf1f |
2934 | typedef struct {\r |
| 2935 | UINT16 Limit;\r |
| 2936 | UINTN Base;\r |
| 2937 | } IA32_DESCRIPTOR;\r |
| db8f40e2 |
2938 | #pragma pack ()\r |
| 878ddf1f |
2939 | \r |
| 2940 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r |
| 2941 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r |
| 2942 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r |
| 2943 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r |
| 2944 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r |
| 2945 | \r |
| 2946 | //\r |
| 2947 | // Byte packed structure for an Interrupt Gate Descriptor\r |
| 2948 | //\r |
| 2949 | typedef union {\r |
| 2950 | struct {\r |
| 2951 | UINT32 OffsetLow:16; // Offset bits 15..0\r |
| 2952 | UINT32 Selector:16; // Selector\r |
| 2953 | UINT32 Reserved_0:8; // Reserved\r |
| 2954 | UINT32 GateType:8; // Gate Type. See #defines above\r |
| 2955 | UINT32 OffsetHigh:16; // Offset bits 31..16\r |
| 2956 | } Bits;\r |
| 2957 | UINT64 Uint64;\r |
| 2958 | } IA32_IDT_GATE_DESCRIPTOR;\r |
| 2959 | \r |
| 2960 | //\r |
| 2961 | // Byte packed structure for an FP/SSE/SSE2 context\r |
| 2962 | //\r |
| 2963 | typedef struct {\r |
| 2964 | UINT8 Buffer[512];\r |
| 2965 | } IA32_FX_BUFFER;\r |
| 2966 | \r |
| 2967 | //\r |
| 2968 | // Structures for the 16-bit real mode thunks\r |
| 2969 | //\r |
| 2970 | typedef struct {\r |
| 2971 | UINT32 Reserved1;\r |
| 2972 | UINT32 Reserved2;\r |
| 2973 | UINT32 Reserved3;\r |
| 2974 | UINT32 Reserved4;\r |
| 2975 | UINT8 BL;\r |
| 2976 | UINT8 BH;\r |
| 2977 | UINT16 Reserved5;\r |
| 2978 | UINT8 DL;\r |
| 2979 | UINT8 DH;\r |
| 2980 | UINT16 Reserved6;\r |
| 2981 | UINT8 CL;\r |
| 2982 | UINT8 CH;\r |
| 2983 | UINT16 Reserved7;\r |
| 2984 | UINT8 AL;\r |
| 2985 | UINT8 AH;\r |
| 2986 | UINT16 Reserved8;\r |
| 2987 | } IA32_BYTE_REGS;\r |
| 2988 | \r |
| 2989 | typedef struct {\r |
| 2990 | UINT16 DI;\r |
| 2991 | UINT16 Reserved1;\r |
| 2992 | UINT16 SI;\r |
| 2993 | UINT16 Reserved2;\r |
| 2994 | UINT16 BP;\r |
| 2995 | UINT16 Reserved3;\r |
| 2996 | UINT16 SP;\r |
| 2997 | UINT16 Reserved4;\r |
| 2998 | UINT16 BX;\r |
| 2999 | UINT16 Reserved5;\r |
| 3000 | UINT16 DX;\r |
| 3001 | UINT16 Reserved6;\r |
| 3002 | UINT16 CX;\r |
| 3003 | UINT16 Reserved7;\r |
| 3004 | UINT16 AX;\r |
| 3005 | UINT16 Reserved8;\r |
| 3006 | } IA32_WORD_REGS;\r |
| 3007 | \r |
| 3008 | typedef struct {\r |
| 3009 | UINT32 EDI;\r |
| 3010 | UINT32 ESI;\r |
| 3011 | UINT32 EBP;\r |
| 3012 | UINT32 ESP;\r |
| 3013 | UINT32 EBX;\r |
| 3014 | UINT32 EDX;\r |
| 3015 | UINT32 ECX;\r |
| 3016 | UINT32 EAX;\r |
| 3017 | UINT16 DS;\r |
| 3018 | UINT16 ES;\r |
| 3019 | UINT16 FS;\r |
| 3020 | UINT16 GS;\r |
| 3021 | IA32_EFLAGS32 EFLAGS;\r |
| 3022 | UINT32 Eip;\r |
| 3023 | UINT16 CS;\r |
| 3024 | UINT16 SS;\r |
| 3025 | } IA32_DWORD_REGS;\r |
| 3026 | \r |
| 3027 | typedef union {\r |
| 3028 | IA32_DWORD_REGS E;\r |
| 3029 | IA32_WORD_REGS X;\r |
| 3030 | IA32_BYTE_REGS H;\r |
| 3031 | } IA32_REGISTER_SET;\r |
| 3032 | \r |
| 3033 | //\r |
| 3034 | // Byte packed structure for an 16-bit real mode thunks\r |
| 3035 | //\r |
| 3036 | typedef struct {\r |
| 97d92bda |
3037 | IA32_REGISTER_SET *RealModeState;\r |
| 878ddf1f |
3038 | VOID *RealModeBuffer;\r |
| 97d92bda |
3039 | UINT32 RealModeBufferSize;\r |
| 3040 | UINT32 ThunkAttributes;\r |
| 878ddf1f |
3041 | } THUNK_CONTEXT;\r |
| 3042 | \r |
| 97d92bda |
3043 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r |
| 3044 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r |
| 3045 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r |
| 3046 | \r |
| 878ddf1f |
3047 | /**\r |
| 3048 | Retrieves CPUID information.\r |
| 3049 | \r |
| 3050 | Executes the CPUID instruction with EAX set to the value specified by Index.\r |
| 3051 | This function always returns Index.\r |
| 3052 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r |
| 3053 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r |
| 3054 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r |
| 3055 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r |
| 3056 | This function is only available on IA-32 and X64.\r |
| 3057 | \r |
| 3058 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r |
| 3059 | instruction.\r |
| 3060 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r |
| 3061 | instruction. This is an optional parameter that may be NULL.\r |
| 3062 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r |
| 3063 | instruction. This is an optional parameter that may be NULL.\r |
| 3064 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r |
| 3065 | instruction. This is an optional parameter that may be NULL.\r |
| 3066 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r |
| 3067 | instruction. This is an optional parameter that may be NULL.\r |
| 3068 | \r |
| 3069 | @return Index\r |
| 3070 | \r |
| 3071 | **/\r |
| 3072 | UINT32\r |
| 3073 | EFIAPI\r |
| 3074 | AsmCpuid (\r |
| 3075 | IN UINT32 Index,\r |
| 3076 | OUT UINT32 *Eax, OPTIONAL\r |
| 3077 | OUT UINT32 *Ebx, OPTIONAL\r |
| 3078 | OUT UINT32 *Ecx, OPTIONAL\r |
| 3079 | OUT UINT32 *Edx OPTIONAL\r |
| 3080 | );\r |
| 3081 | \r |
| dee4740a |
3082 | /**\r |
| 3083 | Retrieves CPUID information using an extended leaf identifier.\r |
| 3084 | \r |
| 3085 | Executes the CPUID instruction with EAX set to the value specified by Index\r |
| 3086 | and ECX set to the value specified by SubIndex. This function always returns\r |
| 3087 | Index. This function is only available on IA-32 and x64.\r |
| 3088 | \r |
| 3089 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r |
| 3090 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r |
| 3091 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r |
| 3092 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r |
| 3093 | \r |
| 3094 | @param Index The 32-bit value to load into EAX prior to invoking the\r |
| 3095 | CPUID instruction.\r |
| 3096 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r |
| 3097 | CPUID instruction.\r |
| 3098 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r |
| 3099 | instruction. This is an optional parameter that may be\r |
| 3100 | NULL.\r |
| 3101 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r |
| 3102 | instruction. This is an optional parameter that may be\r |
| 3103 | NULL.\r |
| 3104 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r |
| 3105 | instruction. This is an optional parameter that may be\r |
| 3106 | NULL.\r |
| 3107 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r |
| 3108 | instruction. This is an optional parameter that may be\r |
| 3109 | NULL.\r |
| 3110 | \r |
| 3111 | @return Index\r |
| 3112 | \r |
| 3113 | **/\r |
| 3114 | UINT32\r |
| 3115 | EFIAPI\r |
| 3116 | AsmCpuidEx (\r |
| 3117 | IN UINT32 Index,\r |
| 3118 | IN UINT32 SubIndex,\r |
| 3119 | OUT UINT32 *Eax, OPTIONAL\r |
| 3120 | OUT UINT32 *Ebx, OPTIONAL\r |
| 3121 | OUT UINT32 *Ecx, OPTIONAL\r |
| 3122 | OUT UINT32 *Edx OPTIONAL\r |
| 3123 | );\r |
| 3124 | \r |
| 878ddf1f |
3125 | /**\r |
| 3126 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r |
| 3127 | \r |
| 3128 | Reads and returns the lower 32-bits of the MSR specified by Index.\r |
| 3129 | No parameter checking is performed on Index, and some Index values may cause\r |
| 3130 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r |
| 3131 | caller must set up exception handlers to catch the exceptions. This function\r |
| 3132 | is only available on IA-32 and X64.\r |
| 3133 | \r |
| 3134 | @param Index The 32-bit MSR index to read.\r |
| 3135 | \r |
| 3136 | @return The lower 32 bits of the MSR identified by Index.\r |
| 3137 | \r |
| 3138 | **/\r |
| 3139 | UINT32\r |
| 3140 | EFIAPI\r |
| 3141 | AsmReadMsr32 (\r |
| 3142 | IN UINT32 Index\r |
| 3143 | );\r |
| 3144 | \r |
| 3145 | /**\r |
| 3146 | Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r |
| 3147 | \r |
| 3148 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r |
| 3149 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r |
| 3150 | the MSR is returned. No parameter checking is performed on Index or Value,\r |
| 3151 | and some of these may cause CPU exceptions. The caller must either guarantee\r |
| 3152 | that Index and Value are valid, or the caller must establish proper exception\r |
| 3153 | handlers. This function is only available on IA-32 and X64.\r |
| 3154 | \r |
| 3155 | @param Index The 32-bit MSR index to write.\r |
| 3156 | @param Value The 32-bit value to write to the MSR.\r |
| 3157 | \r |
| 3158 | @return Value\r |
| 3159 | \r |
| 3160 | **/\r |
| 3161 | UINT32\r |
| 3162 | EFIAPI\r |
| 3163 | AsmWriteMsr32 (\r |
| 3164 | IN UINT32 Index,\r |
| 3165 | IN UINT32 Value\r |
| 3166 | );\r |
| 3167 | \r |
| 3168 | /**\r |
| 3169 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r |
| 3170 | writes the result back to the 64-bit MSR.\r |
| 3171 | \r |
| 3172 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
| 3173 | between the lower 32-bits of the read result and the value specified by\r |
| 3174 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r |
| 3175 | 32-bits of the value written to the MSR is returned. No parameter checking is\r |
| 3176 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r |
| 3177 | caller must either guarantee that Index and OrData are valid, or the caller\r |
| 3178 | must establish proper exception handlers. This function is only available on\r |
| 3179 | IA-32 and X64.\r |
| 3180 | \r |
| 3181 | @param Index The 32-bit MSR index to write.\r |
| 3182 | @param OrData The value to OR with the read value from the MSR.\r |
| 3183 | \r |
| 3184 | @return The lower 32-bit value written to the MSR.\r |
| 3185 | \r |
| 3186 | **/\r |
| 3187 | UINT32\r |
| 3188 | EFIAPI\r |
| 3189 | AsmMsrOr32 (\r |
| 3190 | IN UINT32 Index,\r |
| 3191 | IN UINT32 OrData\r |
| 3192 | );\r |
| 3193 | \r |
| 3194 | /**\r |
| 3195 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r |
| 3196 | the result back to the 64-bit MSR.\r |
| 3197 | \r |
| 3198 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
| 3199 | lower 32-bits of the read result and the value specified by AndData, and\r |
| 3200 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r |
| 3201 | the value written to the MSR is returned. No parameter checking is performed\r |
| 3202 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r |
| 3203 | must either guarantee that Index and AndData are valid, or the caller must\r |
| 3204 | establish proper exception handlers. This function is only available on IA-32\r |
| 3205 | and X64.\r |
| 3206 | \r |
| 3207 | @param Index The 32-bit MSR index to write.\r |
| 3208 | @param AndData The value to AND with the read value from the MSR.\r |
| 3209 | \r |
| 3210 | @return The lower 32-bit value written to the MSR.\r |
| 3211 | \r |
| 3212 | **/\r |
| 3213 | UINT32\r |
| 3214 | EFIAPI\r |
| 3215 | AsmMsrAnd32 (\r |
| 3216 | IN UINT32 Index,\r |
| 3217 | IN UINT32 AndData\r |
| 3218 | );\r |
| 3219 | \r |
| 3220 | /**\r |
| 3221 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r |
| 3222 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
| 3223 | \r |
| 3224 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
| 3225 | lower 32-bits of the read result and the value specified by AndData\r |
| 3226 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r |
| 3227 | result of the AND operation and the value specified by OrData, and writes the\r |
| 3228 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r |
| 3229 | written to the MSR is returned. No parameter checking is performed on Index,\r |
| 3230 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r |
| 3231 | must either guarantee that Index, AndData, and OrData are valid, or the\r |
| 3232 | caller must establish proper exception handlers. This function is only\r |
| 3233 | available on IA-32 and X64.\r |
| 3234 | \r |
| 3235 | @param Index The 32-bit MSR index to write.\r |
| 3236 | @param AndData The value to AND with the read value from the MSR.\r |
| 3237 | @param OrData The value to OR with the result of the AND operation.\r |
| 3238 | \r |
| 3239 | @return The lower 32-bit value written to the MSR.\r |
| 3240 | \r |
| 3241 | **/\r |
| 3242 | UINT32\r |
| 3243 | EFIAPI\r |
| 3244 | AsmMsrAndThenOr32 (\r |
| 3245 | IN UINT32 Index,\r |
| 3246 | IN UINT32 AndData,\r |
| 3247 | IN UINT32 OrData\r |
| 3248 | );\r |
| 3249 | \r |
| 3250 | /**\r |
| 3251 | Reads a bit field of an MSR.\r |
| 3252 | \r |
| 3253 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r |
| 3254 | specified by the StartBit and the EndBit. The value of the bit field is\r |
| 3255 | returned. The caller must either guarantee that Index is valid, or the caller\r |
| 3256 | must set up exception handlers to catch the exceptions. This function is only\r |
| 3257 | available on IA-32 and X64.\r |
| 3258 | \r |
| 3259 | If StartBit is greater than 31, then ASSERT().\r |
| 3260 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
3261 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3262 | \r |
| 3263 | @param Index The 32-bit MSR index to read.\r |
| 3264 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3265 | Range 0..31.\r |
| 3266 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3267 | Range 0..31.\r |
| 3268 | \r |
| 3269 | @return The bit field read from the MSR.\r |
| 3270 | \r |
| 3271 | **/\r |
| 3272 | UINT32\r |
| 3273 | EFIAPI\r |
| 3274 | AsmMsrBitFieldRead32 (\r |
| 3275 | IN UINT32 Index,\r |
| 3276 | IN UINTN StartBit,\r |
| 3277 | IN UINTN EndBit\r |
| 3278 | );\r |
| 3279 | \r |
| 3280 | /**\r |
| 3281 | Writes a bit field to an MSR.\r |
| 3282 | \r |
| 3283 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
| 3284 | field is specified by the StartBit and the EndBit. All other bits in the\r |
| 3285 | destination MSR are preserved. The lower 32-bits of the MSR written is\r |
| 3286 | returned. Extra left bits in Value are stripped. The caller must either\r |
| 3287 | guarantee that Index and the data written is valid, or the caller must set up\r |
| 3288 | exception handlers to catch the exceptions. This function is only available\r |
| 3289 | on IA-32 and X64.\r |
| 3290 | \r |
| 3291 | If StartBit is greater than 31, then ASSERT().\r |
| 3292 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
3293 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3294 | \r |
| 3295 | @param Index The 32-bit MSR index to write.\r |
| 3296 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3297 | Range 0..31.\r |
| 3298 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3299 | Range 0..31.\r |
| 3300 | @param Value New value of the bit field.\r |
| 3301 | \r |
| 3302 | @return The lower 32-bit of the value written to the MSR.\r |
| 3303 | \r |
| 3304 | **/\r |
| 3305 | UINT32\r |
| 3306 | EFIAPI\r |
| 3307 | AsmMsrBitFieldWrite32 (\r |
| 3308 | IN UINT32 Index,\r |
| 3309 | IN UINTN StartBit,\r |
| 3310 | IN UINTN EndBit,\r |
| 3311 | IN UINT32 Value\r |
| 3312 | );\r |
| 3313 | \r |
| 3314 | /**\r |
| 3315 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r |
| 3316 | result back to the bit field in the 64-bit MSR.\r |
| 3317 | \r |
| 3318 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
| 3319 | between the read result and the value specified by OrData, and writes the\r |
| 3320 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r |
| 3321 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r |
| 3322 | caller must either guarantee that Index and the data written is valid, or\r |
| 3323 | the caller must set up exception handlers to catch the exceptions. This\r |
| 3324 | function is only available on IA-32 and X64.\r |
| 3325 | \r |
| 3326 | If StartBit is greater than 31, then ASSERT().\r |
| 3327 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
3328 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3329 | \r |
| 3330 | @param Index The 32-bit MSR index to write.\r |
| 3331 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3332 | Range 0..31.\r |
| 3333 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3334 | Range 0..31.\r |
| 3335 | @param OrData The value to OR with the read value from the MSR.\r |
| 3336 | \r |
| 3337 | @return The lower 32-bit of the value written to the MSR.\r |
| 3338 | \r |
| 3339 | **/\r |
| 3340 | UINT32\r |
| 3341 | EFIAPI\r |
| 3342 | AsmMsrBitFieldOr32 (\r |
| 3343 | IN UINT32 Index,\r |
| 3344 | IN UINTN StartBit,\r |
| 3345 | IN UINTN EndBit,\r |
| 3346 | IN UINT32 OrData\r |
| 3347 | );\r |
| 3348 | \r |
| 3349 | /**\r |
| 3350 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r |
| 3351 | result back to the bit field in the 64-bit MSR.\r |
| 3352 | \r |
| 3353 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
| 3354 | read result and the value specified by AndData, and writes the result to the\r |
| 3355 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r |
| 3356 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r |
| 3357 | either guarantee that Index and the data written is valid, or the caller must\r |
| 3358 | set up exception handlers to catch the exceptions. This function is only\r |
| 3359 | available on IA-32 and X64.\r |
| 3360 | \r |
| 3361 | If StartBit is greater than 31, then ASSERT().\r |
| 3362 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
3363 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3364 | \r |
| 3365 | @param Index The 32-bit MSR index to write.\r |
| 3366 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3367 | Range 0..31.\r |
| 3368 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3369 | Range 0..31.\r |
| 3370 | @param AndData The value to AND with the read value from the MSR.\r |
| 3371 | \r |
| 3372 | @return The lower 32-bit of the value written to the MSR.\r |
| 3373 | \r |
| 3374 | **/\r |
| 3375 | UINT32\r |
| 3376 | EFIAPI\r |
| 3377 | AsmMsrBitFieldAnd32 (\r |
| 3378 | IN UINT32 Index,\r |
| 3379 | IN UINTN StartBit,\r |
| 3380 | IN UINTN EndBit,\r |
| 3381 | IN UINT32 AndData\r |
| 3382 | );\r |
| 3383 | \r |
| 3384 | /**\r |
| 3385 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r |
| 3386 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 3387 | 64-bit MSR.\r |
| 3388 | \r |
| 3389 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r |
| 3390 | bitwise inclusive OR between the read result and the value specified by\r |
| 3391 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
| 3392 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r |
| 3393 | in both AndData and OrData are stripped. The caller must either guarantee\r |
| 3394 | that Index and the data written is valid, or the caller must set up exception\r |
| 3395 | handlers to catch the exceptions. This function is only available on IA-32\r |
| 3396 | and X64.\r |
| 3397 | \r |
| 3398 | If StartBit is greater than 31, then ASSERT().\r |
| 3399 | If EndBit is greater than 31, then ASSERT().\r |
| 0ffa1286 |
3400 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3401 | \r |
| 3402 | @param Index The 32-bit MSR index to write.\r |
| 3403 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3404 | Range 0..31.\r |
| 3405 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3406 | Range 0..31.\r |
| 3407 | @param AndData The value to AND with the read value from the MSR.\r |
| 3408 | @param OrData The value to OR with the result of the AND operation.\r |
| 3409 | \r |
| 3410 | @return The lower 32-bit of the value written to the MSR.\r |
| 3411 | \r |
| 3412 | **/\r |
| 3413 | UINT32\r |
| 3414 | EFIAPI\r |
| 3415 | AsmMsrBitFieldAndThenOr32 (\r |
| 3416 | IN UINT32 Index,\r |
| 3417 | IN UINTN StartBit,\r |
| 3418 | IN UINTN EndBit,\r |
| 3419 | IN UINT32 AndData,\r |
| 3420 | IN UINT32 OrData\r |
| 3421 | );\r |
| 3422 | \r |
| 3423 | /**\r |
| 3424 | Returns a 64-bit Machine Specific Register(MSR).\r |
| 3425 | \r |
| 3426 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r |
| 3427 | performed on Index, and some Index values may cause CPU exceptions. The\r |
| 3428 | caller must either guarantee that Index is valid, or the caller must set up\r |
| 3429 | exception handlers to catch the exceptions. This function is only available\r |
| 3430 | on IA-32 and X64.\r |
| 3431 | \r |
| 3432 | @param Index The 32-bit MSR index to read.\r |
| 3433 | \r |
| 3434 | @return The value of the MSR identified by Index.\r |
| 3435 | \r |
| 3436 | **/\r |
| 3437 | UINT64\r |
| 3438 | EFIAPI\r |
| 3439 | AsmReadMsr64 (\r |
| 3440 | IN UINT32 Index\r |
| 3441 | );\r |
| 3442 | \r |
| 3443 | /**\r |
| 3444 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r |
| 3445 | value.\r |
| 3446 | \r |
| 3447 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r |
| 3448 | 64-bit value written to the MSR is returned. No parameter checking is\r |
| 3449 | performed on Index or Value, and some of these may cause CPU exceptions. The\r |
| 3450 | caller must either guarantee that Index and Value are valid, or the caller\r |
| 3451 | must establish proper exception handlers. This function is only available on\r |
| 3452 | IA-32 and X64.\r |
| 3453 | \r |
| 3454 | @param Index The 32-bit MSR index to write.\r |
| 3455 | @param Value The 64-bit value to write to the MSR.\r |
| 3456 | \r |
| 3457 | @return Value\r |
| 3458 | \r |
| 3459 | **/\r |
| 3460 | UINT64\r |
| 3461 | EFIAPI\r |
| 3462 | AsmWriteMsr64 (\r |
| 3463 | IN UINT32 Index,\r |
| 3464 | IN UINT64 Value\r |
| 3465 | );\r |
| 3466 | \r |
| 3467 | /**\r |
| 3468 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r |
| 3469 | back to the 64-bit MSR.\r |
| 3470 | \r |
| 3471 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
| 3472 | between the read result and the value specified by OrData, and writes the\r |
| 3473 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r |
| 3474 | returned. No parameter checking is performed on Index or OrData, and some of\r |
| 3475 | these may cause CPU exceptions. The caller must either guarantee that Index\r |
| 3476 | and OrData are valid, or the caller must establish proper exception handlers.\r |
| 3477 | This function is only available on IA-32 and X64.\r |
| 3478 | \r |
| 3479 | @param Index The 32-bit MSR index to write.\r |
| 3480 | @param OrData The value to OR with the read value from the MSR.\r |
| 3481 | \r |
| 3482 | @return The value written back to the MSR.\r |
| 3483 | \r |
| 3484 | **/\r |
| 3485 | UINT64\r |
| 3486 | EFIAPI\r |
| 3487 | AsmMsrOr64 (\r |
| 3488 | IN UINT32 Index,\r |
| 3489 | IN UINT64 OrData\r |
| 3490 | );\r |
| 3491 | \r |
| 3492 | /**\r |
| 3493 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r |
| 3494 | 64-bit MSR.\r |
| 3495 | \r |
| 3496 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
| 3497 | read result and the value specified by OrData, and writes the result to the\r |
| 3498 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r |
| 3499 | parameter checking is performed on Index or OrData, and some of these may\r |
| 3500 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r |
| 3501 | are valid, or the caller must establish proper exception handlers. This\r |
| 3502 | function is only available on IA-32 and X64.\r |
| 3503 | \r |
| 3504 | @param Index The 32-bit MSR index to write.\r |
| 3505 | @param AndData The value to AND with the read value from the MSR.\r |
| 3506 | \r |
| 3507 | @return The value written back to the MSR.\r |
| 3508 | \r |
| 3509 | **/\r |
| 3510 | UINT64\r |
| 3511 | EFIAPI\r |
| 3512 | AsmMsrAnd64 (\r |
| 3513 | IN UINT32 Index,\r |
| 3514 | IN UINT64 AndData\r |
| 3515 | );\r |
| 3516 | \r |
| 3517 | /**\r |
| 3518 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r |
| 3519 | OR, and writes the result back to the 64-bit MSR.\r |
| 3520 | \r |
| 3521 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r |
| 3522 | result and the value specified by AndData, performs a bitwise inclusive OR\r |
| 3523 | between the result of the AND operation and the value specified by OrData,\r |
| 3524 | and writes the result to the 64-bit MSR specified by Index. The value written\r |
| 3525 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r |
| 3526 | or OrData, and some of these may cause CPU exceptions. The caller must either\r |
| 3527 | guarantee that Index, AndData, and OrData are valid, or the caller must\r |
| 3528 | establish proper exception handlers. This function is only available on IA-32\r |
| 3529 | and X64.\r |
| 3530 | \r |
| 3531 | @param Index The 32-bit MSR index to write.\r |
| 3532 | @param AndData The value to AND with the read value from the MSR.\r |
| 3533 | @param OrData The value to OR with the result of the AND operation.\r |
| 3534 | \r |
| 3535 | @return The value written back to the MSR.\r |
| 3536 | \r |
| 3537 | **/\r |
| 3538 | UINT64\r |
| 3539 | EFIAPI\r |
| 3540 | AsmMsrAndThenOr64 (\r |
| 3541 | IN UINT32 Index,\r |
| 3542 | IN UINT64 AndData,\r |
| 3543 | IN UINT64 OrData\r |
| 3544 | );\r |
| 3545 | \r |
| 3546 | /**\r |
| 3547 | Reads a bit field of an MSR.\r |
| 3548 | \r |
| 3549 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r |
| 3550 | StartBit and the EndBit. The value of the bit field is returned. The caller\r |
| 3551 | must either guarantee that Index is valid, or the caller must set up\r |
| 3552 | exception handlers to catch the exceptions. This function is only available\r |
| 3553 | on IA-32 and X64.\r |
| 3554 | \r |
| 3555 | If StartBit is greater than 63, then ASSERT().\r |
| 3556 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
3557 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3558 | \r |
| 3559 | @param Index The 32-bit MSR index to read.\r |
| 3560 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3561 | Range 0..63.\r |
| 3562 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3563 | Range 0..63.\r |
| 3564 | \r |
| 3565 | @return The value read from the MSR.\r |
| 3566 | \r |
| 3567 | **/\r |
| 3568 | UINT64\r |
| 3569 | EFIAPI\r |
| 3570 | AsmMsrBitFieldRead64 (\r |
| 3571 | IN UINT32 Index,\r |
| 3572 | IN UINTN StartBit,\r |
| 3573 | IN UINTN EndBit\r |
| 3574 | );\r |
| 3575 | \r |
| 3576 | /**\r |
| 3577 | Writes a bit field to an MSR.\r |
| 3578 | \r |
| 3579 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r |
| 3580 | the StartBit and the EndBit. All other bits in the destination MSR are\r |
| 3581 | preserved. The MSR written is returned. Extra left bits in Value are\r |
| 3582 | stripped. The caller must either guarantee that Index and the data written is\r |
| 3583 | valid, or the caller must set up exception handlers to catch the exceptions.\r |
| 3584 | This function is only available on IA-32 and X64.\r |
| 3585 | \r |
| 3586 | If StartBit is greater than 63, then ASSERT().\r |
| 3587 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
3588 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3589 | \r |
| 3590 | @param Index The 32-bit MSR index to write.\r |
| 3591 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3592 | Range 0..63.\r |
| 3593 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3594 | Range 0..63.\r |
| 3595 | @param Value New value of the bit field.\r |
| 3596 | \r |
| 3597 | @return The value written back to the MSR.\r |
| 3598 | \r |
| 3599 | **/\r |
| 3600 | UINT64\r |
| 3601 | EFIAPI\r |
| 3602 | AsmMsrBitFieldWrite64 (\r |
| 3603 | IN UINT32 Index,\r |
| 3604 | IN UINTN StartBit,\r |
| 3605 | IN UINTN EndBit,\r |
| 3606 | IN UINT64 Value\r |
| 3607 | );\r |
| 3608 | \r |
| 3609 | /**\r |
| 3610 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r |
| 3611 | writes the result back to the bit field in the 64-bit MSR.\r |
| 3612 | \r |
| 3613 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
| 3614 | between the read result and the value specified by OrData, and writes the\r |
| 3615 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r |
| 3616 | returned. Extra left bits in OrData are stripped. The caller must either\r |
| 3617 | guarantee that Index and the data written is valid, or the caller must set up\r |
| 3618 | exception handlers to catch the exceptions. This function is only available\r |
| 3619 | on IA-32 and X64.\r |
| 3620 | \r |
| 3621 | If StartBit is greater than 63, then ASSERT().\r |
| 3622 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
3623 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3624 | \r |
| 3625 | @param Index The 32-bit MSR index to write.\r |
| 3626 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3627 | Range 0..63.\r |
| 3628 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3629 | Range 0..63.\r |
| 3630 | @param OrData The value to OR with the read value from the bit field.\r |
| 3631 | \r |
| 3632 | @return The value written back to the MSR.\r |
| 3633 | \r |
| 3634 | **/\r |
| 3635 | UINT64\r |
| 3636 | EFIAPI\r |
| 3637 | AsmMsrBitFieldOr64 (\r |
| 3638 | IN UINT32 Index,\r |
| 3639 | IN UINTN StartBit,\r |
| 3640 | IN UINTN EndBit,\r |
| 3641 | IN UINT64 OrData\r |
| 3642 | );\r |
| 3643 | \r |
| 3644 | /**\r |
| 3645 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r |
| 3646 | result back to the bit field in the 64-bit MSR.\r |
| 3647 | \r |
| 3648 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
| 3649 | read result and the value specified by AndData, and writes the result to the\r |
| 3650 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r |
| 3651 | Extra left bits in AndData are stripped. The caller must either guarantee\r |
| 3652 | that Index and the data written is valid, or the caller must set up exception\r |
| 3653 | handlers to catch the exceptions. This function is only available on IA-32\r |
| 3654 | and X64.\r |
| 3655 | \r |
| 3656 | If StartBit is greater than 63, then ASSERT().\r |
| 3657 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
3658 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3659 | \r |
| 3660 | @param Index The 32-bit MSR index to write.\r |
| 3661 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3662 | Range 0..63.\r |
| 3663 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3664 | Range 0..63.\r |
| 3665 | @param AndData The value to AND with the read value from the bit field.\r |
| 3666 | \r |
| 3667 | @return The value written back to the MSR.\r |
| 3668 | \r |
| 3669 | **/\r |
| 3670 | UINT64\r |
| 3671 | EFIAPI\r |
| 3672 | AsmMsrBitFieldAnd64 (\r |
| 3673 | IN UINT32 Index,\r |
| 3674 | IN UINTN StartBit,\r |
| 3675 | IN UINTN EndBit,\r |
| 3676 | IN UINT64 AndData\r |
| 3677 | );\r |
| 3678 | \r |
| 3679 | /**\r |
| 3680 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r |
| 3681 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 3682 | 64-bit MSR.\r |
| 3683 | \r |
| 3684 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r |
| 3685 | a bitwise inclusive OR between the read result and the value specified by\r |
| 3686 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
| 3687 | value written to the MSR is returned. Extra left bits in both AndData and\r |
| 3688 | OrData are stripped. The caller must either guarantee that Index and the data\r |
| 3689 | written is valid, or the caller must set up exception handlers to catch the\r |
| 3690 | exceptions. This function is only available on IA-32 and X64.\r |
| 3691 | \r |
| 3692 | If StartBit is greater than 63, then ASSERT().\r |
| 3693 | If EndBit is greater than 63, then ASSERT().\r |
| 0ffa1286 |
3694 | If EndBit is less than StartBit, then ASSERT().\r |
| 878ddf1f |
3695 | \r |
| 3696 | @param Index The 32-bit MSR index to write.\r |
| 3697 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 3698 | Range 0..63.\r |
| 3699 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 3700 | Range 0..63.\r |
| 3701 | @param AndData The value to AND with the read value from the bit field.\r |
| 3702 | @param OrData The value to OR with the result of the AND operation.\r |
| 3703 | \r |
| 3704 | @return The value written back to the MSR.\r |
| 3705 | \r |
| 3706 | **/\r |
| 3707 | UINT64\r |
| 3708 | EFIAPI\r |
| 3709 | AsmMsrBitFieldAndThenOr64 (\r |
| 3710 | IN UINT32 Index,\r |
| 3711 | IN UINTN StartBit,\r |
| 3712 | IN UINTN EndBit,\r |
| 3713 | IN UINT64 AndData,\r |
| 3714 | IN UINT64 OrData\r |
| 3715 | );\r |
| 3716 | \r |
| 3717 | /**\r |
| 3718 | Reads the current value of the EFLAGS register.\r |
| 3719 | \r |
| 3720 | Reads and returns the current value of the EFLAGS register. This function is\r |
| 3721 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r |
| 3722 | 64-bit value on X64.\r |
| 3723 | \r |
| 3724 | @return EFLAGS on IA-32 or RFLAGS on X64.\r |
| 3725 | \r |
| 3726 | **/\r |
| 3727 | UINTN\r |
| 3728 | EFIAPI\r |
| 3729 | AsmReadEflags (\r |
| 3730 | VOID\r |
| 3731 | );\r |
| 3732 | \r |
| 3733 | /**\r |
| 3734 | Reads the current value of the Control Register 0 (CR0).\r |
| 3735 | \r |
| 3736 | Reads and returns the current value of CR0. This function is only available\r |
| 3737 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3738 | X64.\r |
| 3739 | \r |
| 3740 | @return The value of the Control Register 0 (CR0).\r |
| 3741 | \r |
| 3742 | **/\r |
| 3743 | UINTN\r |
| 3744 | EFIAPI\r |
| 3745 | AsmReadCr0 (\r |
| 3746 | VOID\r |
| 3747 | );\r |
| 3748 | \r |
| 3749 | /**\r |
| 3750 | Reads the current value of the Control Register 2 (CR2).\r |
| 3751 | \r |
| 3752 | Reads and returns the current value of CR2. This function is only available\r |
| 3753 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3754 | X64.\r |
| 3755 | \r |
| 3756 | @return The value of the Control Register 2 (CR2).\r |
| 3757 | \r |
| 3758 | **/\r |
| 3759 | UINTN\r |
| 3760 | EFIAPI\r |
| 3761 | AsmReadCr2 (\r |
| 3762 | VOID\r |
| 3763 | );\r |
| 3764 | \r |
| 3765 | /**\r |
| 3766 | Reads the current value of the Control Register 3 (CR3).\r |
| 3767 | \r |
| 3768 | Reads and returns the current value of CR3. This function is only available\r |
| 3769 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3770 | X64.\r |
| 3771 | \r |
| 3772 | @return The value of the Control Register 3 (CR3).\r |
| 3773 | \r |
| 3774 | **/\r |
| 3775 | UINTN\r |
| 3776 | EFIAPI\r |
| 3777 | AsmReadCr3 (\r |
| 3778 | VOID\r |
| 3779 | );\r |
| 3780 | \r |
| 3781 | /**\r |
| 3782 | Reads the current value of the Control Register 4 (CR4).\r |
| 3783 | \r |
| 3784 | Reads and returns the current value of CR4. This function is only available\r |
| 3785 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3786 | X64.\r |
| 3787 | \r |
| 3788 | @return The value of the Control Register 4 (CR4).\r |
| 3789 | \r |
| 3790 | **/\r |
| 3791 | UINTN\r |
| 3792 | EFIAPI\r |
| 3793 | AsmReadCr4 (\r |
| 3794 | VOID\r |
| 3795 | );\r |
| 3796 | \r |
| 3797 | /**\r |
| 3798 | Writes a value to Control Register 0 (CR0).\r |
| 3799 | \r |
| 3800 | Writes and returns a new value to CR0. This function is only available on\r |
| 3801 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 3802 | \r |
| 3803 | @param Cr0 The value to write to CR0.\r |
| 3804 | \r |
| 3805 | @return The value written to CR0.\r |
| 3806 | \r |
| 3807 | **/\r |
| 3808 | UINTN\r |
| 3809 | EFIAPI\r |
| 3810 | AsmWriteCr0 (\r |
| 3811 | UINTN Cr0\r |
| 3812 | );\r |
| 3813 | \r |
| 3814 | /**\r |
| 3815 | Writes a value to Control Register 2 (CR2).\r |
| 3816 | \r |
| 3817 | Writes and returns a new value to CR2. This function is only available on\r |
| 3818 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 3819 | \r |
| 3820 | @param Cr2 The value to write to CR2.\r |
| 3821 | \r |
| 3822 | @return The value written to CR2.\r |
| 3823 | \r |
| 3824 | **/\r |
| 3825 | UINTN\r |
| 3826 | EFIAPI\r |
| 3827 | AsmWriteCr2 (\r |
| 3828 | UINTN Cr2\r |
| 3829 | );\r |
| 3830 | \r |
| 3831 | /**\r |
| 3832 | Writes a value to Control Register 3 (CR3).\r |
| 3833 | \r |
| 3834 | Writes and returns a new value to CR3. This function is only available on\r |
| 3835 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 3836 | \r |
| 3837 | @param Cr3 The value to write to CR3.\r |
| 3838 | \r |
| 3839 | @return The value written to CR3.\r |
| 3840 | \r |
| 3841 | **/\r |
| 3842 | UINTN\r |
| 3843 | EFIAPI\r |
| 3844 | AsmWriteCr3 (\r |
| 3845 | UINTN Cr3\r |
| 3846 | );\r |
| 3847 | \r |
| 3848 | /**\r |
| 3849 | Writes a value to Control Register 4 (CR4).\r |
| 3850 | \r |
| 3851 | Writes and returns a new value to CR4. This function is only available on\r |
| 3852 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 3853 | \r |
| 3854 | @param Cr4 The value to write to CR4.\r |
| 3855 | \r |
| 3856 | @return The value written to CR4.\r |
| 3857 | \r |
| 3858 | **/\r |
| 3859 | UINTN\r |
| 3860 | EFIAPI\r |
| 3861 | AsmWriteCr4 (\r |
| 3862 | UINTN Cr4\r |
| 3863 | );\r |
| 3864 | \r |
| 3865 | /**\r |
| 3866 | Reads the current value of Debug Register 0 (DR0).\r |
| 3867 | \r |
| 3868 | Reads and returns the current value of DR0. This function is only available\r |
| 3869 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3870 | X64.\r |
| 3871 | \r |
| 3872 | @return The value of Debug Register 0 (DR0).\r |
| 3873 | \r |
| 3874 | **/\r |
| 3875 | UINTN\r |
| 3876 | EFIAPI\r |
| 3877 | AsmReadDr0 (\r |
| 3878 | VOID\r |
| 3879 | );\r |
| 3880 | \r |
| 3881 | /**\r |
| 3882 | Reads the current value of Debug Register 1 (DR1).\r |
| 3883 | \r |
| 3884 | Reads and returns the current value of DR1. This function is only available\r |
| 3885 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3886 | X64.\r |
| 3887 | \r |
| 3888 | @return The value of Debug Register 1 (DR1).\r |
| 3889 | \r |
| 3890 | **/\r |
| 3891 | UINTN\r |
| 3892 | EFIAPI\r |
| 3893 | AsmReadDr1 (\r |
| 3894 | VOID\r |
| 3895 | );\r |
| 3896 | \r |
| 3897 | /**\r |
| 3898 | Reads the current value of Debug Register 2 (DR2).\r |
| 3899 | \r |
| 3900 | Reads and returns the current value of DR2. This function is only available\r |
| 3901 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3902 | X64.\r |
| 3903 | \r |
| 3904 | @return The value of Debug Register 2 (DR2).\r |
| 3905 | \r |
| 3906 | **/\r |
| 3907 | UINTN\r |
| 3908 | EFIAPI\r |
| 3909 | AsmReadDr2 (\r |
| 3910 | VOID\r |
| 3911 | );\r |
| 3912 | \r |
| 3913 | /**\r |
| 3914 | Reads the current value of Debug Register 3 (DR3).\r |
| 3915 | \r |
| 3916 | Reads and returns the current value of DR3. This function is only available\r |
| 3917 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3918 | X64.\r |
| 3919 | \r |
| 3920 | @return The value of Debug Register 3 (DR3).\r |
| 3921 | \r |
| 3922 | **/\r |
| 3923 | UINTN\r |
| 3924 | EFIAPI\r |
| 3925 | AsmReadDr3 (\r |
| 3926 | VOID\r |
| 3927 | );\r |
| 3928 | \r |
| 3929 | /**\r |
| 3930 | Reads the current value of Debug Register 4 (DR4).\r |
| 3931 | \r |
| 3932 | Reads and returns the current value of DR4. This function is only available\r |
| 3933 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3934 | X64.\r |
| 3935 | \r |
| 3936 | @return The value of Debug Register 4 (DR4).\r |
| 3937 | \r |
| 3938 | **/\r |
| 3939 | UINTN\r |
| 3940 | EFIAPI\r |
| 3941 | AsmReadDr4 (\r |
| 3942 | VOID\r |
| 3943 | );\r |
| 3944 | \r |
| 3945 | /**\r |
| 3946 | Reads the current value of Debug Register 5 (DR5).\r |
| 3947 | \r |
| 3948 | Reads and returns the current value of DR5. This function is only available\r |
| 3949 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3950 | X64.\r |
| 3951 | \r |
| 3952 | @return The value of Debug Register 5 (DR5).\r |
| 3953 | \r |
| 3954 | **/\r |
| 3955 | UINTN\r |
| 3956 | EFIAPI\r |
| 3957 | AsmReadDr5 (\r |
| 3958 | VOID\r |
| 3959 | );\r |
| 3960 | \r |
| 3961 | /**\r |
| 3962 | Reads the current value of Debug Register 6 (DR6).\r |
| 3963 | \r |
| 3964 | Reads and returns the current value of DR6. This function is only available\r |
| 3965 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3966 | X64.\r |
| 3967 | \r |
| 3968 | @return The value of Debug Register 6 (DR6).\r |
| 3969 | \r |
| 3970 | **/\r |
| 3971 | UINTN\r |
| 3972 | EFIAPI\r |
| 3973 | AsmReadDr6 (\r |
| 3974 | VOID\r |
| 3975 | );\r |
| 3976 | \r |
| 3977 | /**\r |
| 3978 | Reads the current value of Debug Register 7 (DR7).\r |
| 3979 | \r |
| 3980 | Reads and returns the current value of DR7. This function is only available\r |
| 3981 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 3982 | X64.\r |
| 3983 | \r |
| 3984 | @return The value of Debug Register 7 (DR7).\r |
| 3985 | \r |
| 3986 | **/\r |
| 3987 | UINTN\r |
| 3988 | EFIAPI\r |
| 3989 | AsmReadDr7 (\r |
| 3990 | VOID\r |
| 3991 | );\r |
| 3992 | \r |
| 3993 | /**\r |
| 3994 | Writes a value to Debug Register 0 (DR0).\r |
| 3995 | \r |
| 3996 | Writes and returns a new value to DR0. This function is only available on\r |
| 3997 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 3998 | \r |
| 3999 | @param Dr0 The value to write to Dr0.\r |
| 4000 | \r |
| 4001 | @return The value written to Debug Register 0 (DR0).\r |
| 4002 | \r |
| 4003 | **/\r |
| 4004 | UINTN\r |
| 4005 | EFIAPI\r |
| 4006 | AsmWriteDr0 (\r |
| 4007 | UINTN Dr0\r |
| 4008 | );\r |
| 4009 | \r |
| 4010 | /**\r |
| 4011 | Writes a value to Debug Register 1 (DR1).\r |
| 4012 | \r |
| 4013 | Writes and returns a new value to DR1. This function is only available on\r |
| 4014 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4015 | \r |
| 4016 | @param Dr1 The value to write to Dr1.\r |
| 4017 | \r |
| 4018 | @return The value written to Debug Register 1 (DR1).\r |
| 4019 | \r |
| 4020 | **/\r |
| 4021 | UINTN\r |
| 4022 | EFIAPI\r |
| 4023 | AsmWriteDr1 (\r |
| 4024 | UINTN Dr1\r |
| 4025 | );\r |
| 4026 | \r |
| 4027 | /**\r |
| 4028 | Writes a value to Debug Register 2 (DR2).\r |
| 4029 | \r |
| 4030 | Writes and returns a new value to DR2. This function is only available on\r |
| 4031 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4032 | \r |
| 4033 | @param Dr2 The value to write to Dr2.\r |
| 4034 | \r |
| 4035 | @return The value written to Debug Register 2 (DR2).\r |
| 4036 | \r |
| 4037 | **/\r |
| 4038 | UINTN\r |
| 4039 | EFIAPI\r |
| 4040 | AsmWriteDr2 (\r |
| 4041 | UINTN Dr2\r |
| 4042 | );\r |
| 4043 | \r |
| 4044 | /**\r |
| 4045 | Writes a value to Debug Register 3 (DR3).\r |
| 4046 | \r |
| 4047 | Writes and returns a new value to DR3. This function is only available on\r |
| 4048 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4049 | \r |
| 4050 | @param Dr3 The value to write to Dr3.\r |
| 4051 | \r |
| 4052 | @return The value written to Debug Register 3 (DR3).\r |
| 4053 | \r |
| 4054 | **/\r |
| 4055 | UINTN\r |
| 4056 | EFIAPI\r |
| 4057 | AsmWriteDr3 (\r |
| 4058 | UINTN Dr3\r |
| 4059 | );\r |
| 4060 | \r |
| 4061 | /**\r |
| 4062 | Writes a value to Debug Register 4 (DR4).\r |
| 4063 | \r |
| 4064 | Writes and returns a new value to DR4. This function is only available on\r |
| 4065 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4066 | \r |
| 4067 | @param Dr4 The value to write to Dr4.\r |
| 4068 | \r |
| 4069 | @return The value written to Debug Register 4 (DR4).\r |
| 4070 | \r |
| 4071 | **/\r |
| 4072 | UINTN\r |
| 4073 | EFIAPI\r |
| 4074 | AsmWriteDr4 (\r |
| 4075 | UINTN Dr4\r |
| 4076 | );\r |
| 4077 | \r |
| 4078 | /**\r |
| 4079 | Writes a value to Debug Register 5 (DR5).\r |
| 4080 | \r |
| 4081 | Writes and returns a new value to DR5. This function is only available on\r |
| 4082 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4083 | \r |
| 4084 | @param Dr5 The value to write to Dr5.\r |
| 4085 | \r |
| 4086 | @return The value written to Debug Register 5 (DR5).\r |
| 4087 | \r |
| 4088 | **/\r |
| 4089 | UINTN\r |
| 4090 | EFIAPI\r |
| 4091 | AsmWriteDr5 (\r |
| 4092 | UINTN Dr5\r |
| 4093 | );\r |
| 4094 | \r |
| 4095 | /**\r |
| 4096 | Writes a value to Debug Register 6 (DR6).\r |
| 4097 | \r |
| 4098 | Writes and returns a new value to DR6. This function is only available on\r |
| 4099 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4100 | \r |
| 4101 | @param Dr6 The value to write to Dr6.\r |
| 4102 | \r |
| 4103 | @return The value written to Debug Register 6 (DR6).\r |
| 4104 | \r |
| 4105 | **/\r |
| 4106 | UINTN\r |
| 4107 | EFIAPI\r |
| 4108 | AsmWriteDr6 (\r |
| 4109 | UINTN Dr6\r |
| 4110 | );\r |
| 4111 | \r |
| 4112 | /**\r |
| 4113 | Writes a value to Debug Register 7 (DR7).\r |
| 4114 | \r |
| 4115 | Writes and returns a new value to DR7. This function is only available on\r |
| 4116 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
| 4117 | \r |
| 4118 | @param Dr7 The value to write to Dr7.\r |
| 4119 | \r |
| 4120 | @return The value written to Debug Register 7 (DR7).\r |
| 4121 | \r |
| 4122 | **/\r |
| 4123 | UINTN\r |
| 4124 | EFIAPI\r |
| 4125 | AsmWriteDr7 (\r |
| 4126 | UINTN Dr7\r |
| 4127 | );\r |
| 4128 | \r |
| 4129 | /**\r |
| 4130 | Reads the current value of Code Segment Register (CS).\r |
| 4131 | \r |
| 4132 | Reads and returns the current value of CS. This function is only available on\r |
| 4133 | IA-32 and X64.\r |
| 4134 | \r |
| 4135 | @return The current value of CS.\r |
| 4136 | \r |
| 4137 | **/\r |
| 4138 | UINT16\r |
| 4139 | EFIAPI\r |
| 4140 | AsmReadCs (\r |
| 4141 | VOID\r |
| 4142 | );\r |
| 4143 | \r |
| 4144 | /**\r |
| 4145 | Reads the current value of Data Segment Register (DS).\r |
| 4146 | \r |
| 4147 | Reads and returns the current value of DS. This function is only available on\r |
| 4148 | IA-32 and X64.\r |
| 4149 | \r |
| 4150 | @return The current value of DS.\r |
| 4151 | \r |
| 4152 | **/\r |
| 4153 | UINT16\r |
| 4154 | EFIAPI\r |
| 4155 | AsmReadDs (\r |
| 4156 | VOID\r |
| 4157 | );\r |
| 4158 | \r |
| 4159 | /**\r |
| 4160 | Reads the current value of Extra Segment Register (ES).\r |
| 4161 | \r |
| 4162 | Reads and returns the current value of ES. This function is only available on\r |
| 4163 | IA-32 and X64.\r |
| 4164 | \r |
| 4165 | @return The current value of ES.\r |
| 4166 | \r |
| 4167 | **/\r |
| 4168 | UINT16\r |
| 4169 | EFIAPI\r |
| 4170 | AsmReadEs (\r |
| 4171 | VOID\r |
| 4172 | );\r |
| 4173 | \r |
| 4174 | /**\r |
| 4175 | Reads the current value of FS Data Segment Register (FS).\r |
| 4176 | \r |
| 4177 | Reads and returns the current value of FS. This function is only available on\r |
| 4178 | IA-32 and X64.\r |
| 4179 | \r |
| 4180 | @return The current value of FS.\r |
| 4181 | \r |
| 4182 | **/\r |
| 4183 | UINT16\r |
| 4184 | EFIAPI\r |
| 4185 | AsmReadFs (\r |
| 4186 | VOID\r |
| 4187 | );\r |
| 4188 | \r |
| 4189 | /**\r |
| 4190 | Reads the current value of GS Data Segment Register (GS).\r |
| 4191 | \r |
| 4192 | Reads and returns the current value of GS. This function is only available on\r |
| 4193 | IA-32 and X64.\r |
| 4194 | \r |
| 4195 | @return The current value of GS.\r |
| 4196 | \r |
| 4197 | **/\r |
| 4198 | UINT16\r |
| 4199 | EFIAPI\r |
| 4200 | AsmReadGs (\r |
| 4201 | VOID\r |
| 4202 | );\r |
| 4203 | \r |
| 4204 | /**\r |
| 4205 | Reads the current value of Stack Segment Register (SS).\r |
| 4206 | \r |
| 4207 | Reads and returns the current value of SS. This function is only available on\r |
| 4208 | IA-32 and X64.\r |
| 4209 | \r |
| 4210 | @return The current value of SS.\r |
| 4211 | \r |
| 4212 | **/\r |
| 4213 | UINT16\r |
| 4214 | EFIAPI\r |
| 4215 | AsmReadSs (\r |
| 4216 | VOID\r |
| 4217 | );\r |
| 4218 | \r |
| 4219 | /**\r |
| 4220 | Reads the current value of Task Register (TR).\r |
| 4221 | \r |
| 4222 | Reads and returns the current value of TR. This function is only available on\r |
| 4223 | IA-32 and X64.\r |
| 4224 | \r |
| 4225 | @return The current value of TR.\r |
| 4226 | \r |
| 4227 | **/\r |
| 4228 | UINT16\r |
| 4229 | EFIAPI\r |
| 4230 | AsmReadTr (\r |
| 4231 | VOID\r |
| 4232 | );\r |
| 4233 | \r |
| 4234 | /**\r |
| 4235 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r |
| 4236 | \r |
| 4237 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r |
| 4238 | function is only available on IA-32 and X64.\r |
| 4239 | \r |
| 4240 | If Gdtr is NULL, then ASSERT().\r |
| 4241 | \r |
| 4242 | @param Gdtr Pointer to a GDTR descriptor.\r |
| 4243 | \r |
| 4244 | **/\r |
| 4245 | VOID\r |
| 4246 | EFIAPI\r |
| 4247 | AsmReadGdtr (\r |
| 4248 | OUT IA32_DESCRIPTOR *Gdtr\r |
| 4249 | );\r |
| 4250 | \r |
| 4251 | /**\r |
| 4252 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r |
| 4253 | \r |
| 4254 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r |
| 4255 | only available on IA-32 and X64.\r |
| 4256 | \r |
| 4257 | If Gdtr is NULL, then ASSERT().\r |
| 4258 | \r |
| 4259 | @param Gdtr Pointer to a GDTR descriptor.\r |
| 4260 | \r |
| 4261 | **/\r |
| 4262 | VOID\r |
| 4263 | EFIAPI\r |
| 4264 | AsmWriteGdtr (\r |
| 4265 | IN CONST IA32_DESCRIPTOR *Gdtr\r |
| 4266 | );\r |
| 4267 | \r |
| 4268 | /**\r |
| 4269 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r |
| 4270 | \r |
| 4271 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r |
| 4272 | function is only available on IA-32 and X64.\r |
| 4273 | \r |
| 4274 | If Idtr is NULL, then ASSERT().\r |
| 4275 | \r |
| 4276 | @param Idtr Pointer to a IDTR descriptor.\r |
| 4277 | \r |
| 4278 | **/\r |
| 4279 | VOID\r |
| 4280 | EFIAPI\r |
| 4281 | AsmReadIdtr (\r |
| 4282 | OUT IA32_DESCRIPTOR *Idtr\r |
| 4283 | );\r |
| 4284 | \r |
| 4285 | /**\r |
| 4286 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r |
| 4287 | \r |
| 4288 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r |
| 4289 | only available on IA-32 and X64.\r |
| 4290 | \r |
| 4291 | If Idtr is NULL, then ASSERT().\r |
| 4292 | \r |
| 4293 | @param Idtr Pointer to a IDTR descriptor.\r |
| 4294 | \r |
| 4295 | **/\r |
| 4296 | VOID\r |
| 4297 | EFIAPI\r |
| 4298 | AsmWriteIdtr (\r |
| 4299 | IN CONST IA32_DESCRIPTOR *Idtr\r |
| 4300 | );\r |
| 4301 | \r |
| 4302 | /**\r |
| 4303 | Reads the current Local Descriptor Table Register(LDTR) selector.\r |
| 4304 | \r |
| 4305 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r |
| 4306 | only available on IA-32 and X64.\r |
| 4307 | \r |
| 4308 | @return The current selector of LDT.\r |
| 4309 | \r |
| 4310 | **/\r |
| 4311 | UINT16\r |
| 4312 | EFIAPI\r |
| 4313 | AsmReadLdtr (\r |
| 4314 | VOID\r |
| 4315 | );\r |
| 4316 | \r |
| 4317 | /**\r |
| 4318 | Writes the current Local Descriptor Table Register (GDTR) selector.\r |
| 4319 | \r |
| 4320 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r |
| 4321 | only available on IA-32 and X64.\r |
| 4322 | \r |
| 4323 | @param Ldtr 16-bit LDTR selector value.\r |
| 4324 | \r |
| 4325 | **/\r |
| 4326 | VOID\r |
| 4327 | EFIAPI\r |
| 4328 | AsmWriteLdtr (\r |
| 4329 | IN UINT16 Ldtr\r |
| 4330 | );\r |
| 4331 | \r |
| 4332 | /**\r |
| 4333 | Save the current floating point/SSE/SSE2 context to a buffer.\r |
| 4334 | \r |
| 4335 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r |
| 4336 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r |
| 4337 | available on IA-32 and X64.\r |
| 4338 | \r |
| 4339 | If Buffer is NULL, then ASSERT().\r |
| 4340 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| 4341 | \r |
| 4342 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
| 4343 | \r |
| 4344 | **/\r |
| 4345 | VOID\r |
| 4346 | EFIAPI\r |
| 4347 | AsmFxSave (\r |
| 4348 | OUT IA32_FX_BUFFER *Buffer\r |
| 4349 | );\r |
| 4350 | \r |
| 4351 | /**\r |
| 4352 | Restores the current floating point/SSE/SSE2 context from a buffer.\r |
| 4353 | \r |
| 4354 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r |
| 4355 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r |
| 4356 | only available on IA-32 and X64.\r |
| 4357 | \r |
| 4358 | If Buffer is NULL, then ASSERT().\r |
| 4359 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| 4360 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r |
| 4361 | \r |
| 4362 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
| 4363 | \r |
| 4364 | **/\r |
| 4365 | VOID\r |
| 4366 | EFIAPI\r |
| 4367 | AsmFxRestore (\r |
| 4368 | IN CONST IA32_FX_BUFFER *Buffer\r |
| 4369 | );\r |
| 4370 | \r |
| 4371 | /**\r |
| 4372 | Reads the current value of 64-bit MMX Register #0 (MM0).\r |
| 4373 | \r |
| 4374 | Reads and returns the current value of MM0. This function is only available\r |
| 4375 | on IA-32 and X64.\r |
| 4376 | \r |
| 4377 | @return The current value of MM0.\r |
| 4378 | \r |
| 4379 | **/\r |
| 4380 | UINT64\r |
| 4381 | EFIAPI\r |
| 4382 | AsmReadMm0 (\r |
| 4383 | VOID\r |
| 4384 | );\r |
| 4385 | \r |
| 4386 | /**\r |
| 4387 | Reads the current value of 64-bit MMX Register #1 (MM1).\r |
| 4388 | \r |
| 4389 | Reads and returns the current value of MM1. This function is only available\r |
| 4390 | on IA-32 and X64.\r |
| 4391 | \r |
| 4392 | @return The current value of MM1.\r |
| 4393 | \r |
| 4394 | **/\r |
| 4395 | UINT64\r |
| 4396 | EFIAPI\r |
| 4397 | AsmReadMm1 (\r |
| 4398 | VOID\r |
| 4399 | );\r |
| 4400 | \r |
| 4401 | /**\r |
| 4402 | Reads the current value of 64-bit MMX Register #2 (MM2).\r |
| 4403 | \r |
| 4404 | Reads and returns the current value of MM2. This function is only available\r |
| 4405 | on IA-32 and X64.\r |
| 4406 | \r |
| 4407 | @return The current value of MM2.\r |
| 4408 | \r |
| 4409 | **/\r |
| 4410 | UINT64\r |
| 4411 | EFIAPI\r |
| 4412 | AsmReadMm2 (\r |
| 4413 | VOID\r |
| 4414 | );\r |
| 4415 | \r |
| 4416 | /**\r |
| 4417 | Reads the current value of 64-bit MMX Register #3 (MM3).\r |
| 4418 | \r |
| 4419 | Reads and returns the current value of MM3. This function is only available\r |
| 4420 | on IA-32 and X64.\r |
| 4421 | \r |
| 4422 | @return The current value of MM3.\r |
| 4423 | \r |
| 4424 | **/\r |
| 4425 | UINT64\r |
| 4426 | EFIAPI\r |
| 4427 | AsmReadMm3 (\r |
| 4428 | VOID\r |
| 4429 | );\r |
| 4430 | \r |
| 4431 | /**\r |
| 4432 | Reads the current value of 64-bit MMX Register #4 (MM4).\r |
| 4433 | \r |
| 4434 | Reads and returns the current value of MM4. This function is only available\r |
| 4435 | on IA-32 and X64.\r |
| 4436 | \r |
| 4437 | @return The current value of MM4.\r |
| 4438 | \r |
| 4439 | **/\r |
| 4440 | UINT64\r |
| 4441 | EFIAPI\r |
| 4442 | AsmReadMm4 (\r |
| 4443 | VOID\r |
| 4444 | );\r |
| 4445 | \r |
| 4446 | /**\r |
| 4447 | Reads the current value of 64-bit MMX Register #5 (MM5).\r |
| 4448 | \r |
| 4449 | Reads and returns the current value of MM5. This function is only available\r |
| 4450 | on IA-32 and X64.\r |
| 4451 | \r |
| 4452 | @return The current value of MM5.\r |
| 4453 | \r |
| 4454 | **/\r |
| 4455 | UINT64\r |
| 4456 | EFIAPI\r |
| 4457 | AsmReadMm5 (\r |
| 4458 | VOID\r |
| 4459 | );\r |
| 4460 | \r |
| 4461 | /**\r |
| 4462 | Reads the current value of 64-bit MMX Register #6 (MM6).\r |
| 4463 | \r |
| 4464 | Reads and returns the current value of MM6. This function is only available\r |
| 4465 | on IA-32 and X64.\r |
| 4466 | \r |
| 4467 | @return The current value of MM6.\r |
| 4468 | \r |
| 4469 | **/\r |
| 4470 | UINT64\r |
| 4471 | EFIAPI\r |
| 4472 | AsmReadMm6 (\r |
| 4473 | VOID\r |
| 4474 | );\r |
| 4475 | \r |
| 4476 | /**\r |
| 4477 | Reads the current value of 64-bit MMX Register #7 (MM7).\r |
| 4478 | \r |
| 4479 | Reads and returns the current value of MM7. This function is only available\r |
| 4480 | on IA-32 and X64.\r |
| 4481 | \r |
| 4482 | @return The current value of MM7.\r |
| 4483 | \r |
| 4484 | **/\r |
| 4485 | UINT64\r |
| 4486 | EFIAPI\r |
| 4487 | AsmReadMm7 (\r |
| 4488 | VOID\r |
| 4489 | );\r |
| 4490 | \r |
| 4491 | /**\r |
| 4492 | Writes the current value of 64-bit MMX Register #0 (MM0).\r |
| 4493 | \r |
| 4494 | Writes the current value of MM0. This function is only available on IA32 and\r |
| 4495 | X64.\r |
| 4496 | \r |
| 4497 | @param Value The 64-bit value to write to MM0.\r |
| 4498 | \r |
| 4499 | **/\r |
| 4500 | VOID\r |
| 4501 | EFIAPI\r |
| 4502 | AsmWriteMm0 (\r |
| 4503 | IN UINT64 Value\r |
| 4504 | );\r |
| 4505 | \r |
| 4506 | /**\r |
| 4507 | Writes the current value of 64-bit MMX Register #1 (MM1).\r |
| 4508 | \r |
| 4509 | Writes the current value of MM1. This function is only available on IA32 and\r |
| 4510 | X64.\r |
| 4511 | \r |
| 4512 | @param Value The 64-bit value to write to MM1.\r |
| 4513 | \r |
| 4514 | **/\r |
| 4515 | VOID\r |
| 4516 | EFIAPI\r |
| 4517 | AsmWriteMm1 (\r |
| 4518 | IN UINT64 Value\r |
| 4519 | );\r |
| 4520 | \r |
| 4521 | /**\r |
| 4522 | Writes the current value of 64-bit MMX Register #2 (MM2).\r |
| 4523 | \r |
| 4524 | Writes the current value of MM2. This function is only available on IA32 and\r |
| 4525 | X64.\r |
| 4526 | \r |
| 4527 | @param Value The 64-bit value to write to MM2.\r |
| 4528 | \r |
| 4529 | **/\r |
| 4530 | VOID\r |
| 4531 | EFIAPI\r |
| 4532 | AsmWriteMm2 (\r |
| 4533 | IN UINT64 Value\r |
| 4534 | );\r |
| 4535 | \r |
| 4536 | /**\r |
| 4537 | Writes the current value of 64-bit MMX Register #3 (MM3).\r |
| 4538 | \r |
| 4539 | Writes the current value of MM3. This function is only available on IA32 and\r |
| 4540 | X64.\r |
| 4541 | \r |
| 4542 | @param Value The 64-bit value to write to MM3.\r |
| 4543 | \r |
| 4544 | **/\r |
| 4545 | VOID\r |
| 4546 | EFIAPI\r |
| 4547 | AsmWriteMm3 (\r |
| 4548 | IN UINT64 Value\r |
| 4549 | );\r |
| 4550 | \r |
| 4551 | /**\r |
| 4552 | Writes the current value of 64-bit MMX Register #4 (MM4).\r |
| 4553 | \r |
| 4554 | Writes the current value of MM4. This function is only available on IA32 and\r |
| 4555 | X64.\r |
| 4556 | \r |
| 4557 | @param Value The 64-bit value to write to MM4.\r |
| 4558 | \r |
| 4559 | **/\r |
| 4560 | VOID\r |
| 4561 | EFIAPI\r |
| 4562 | AsmWriteMm4 (\r |
| 4563 | IN UINT64 Value\r |
| 4564 | );\r |
| 4565 | \r |
| 4566 | /**\r |
| 4567 | Writes the current value of 64-bit MMX Register #5 (MM5).\r |
| 4568 | \r |
| 4569 | Writes the current value of MM5. This function is only available on IA32 and\r |
| 4570 | X64.\r |
| 4571 | \r |
| 4572 | @param Value The 64-bit value to write to MM5.\r |
| 4573 | \r |
| 4574 | **/\r |
| 4575 | VOID\r |
| 4576 | EFIAPI\r |
| 4577 | AsmWriteMm5 (\r |
| 4578 | IN UINT64 Value\r |
| 4579 | );\r |
| 4580 | \r |
| 4581 | /**\r |
| 4582 | Writes the current value of 64-bit MMX Register #6 (MM6).\r |
| 4583 | \r |
| 4584 | Writes the current value of MM6. This function is only available on IA32 and\r |
| 4585 | X64.\r |
| 4586 | \r |
| 4587 | @param Value The 64-bit value to write to MM6.\r |
| 4588 | \r |
| 4589 | **/\r |
| 4590 | VOID\r |
| 4591 | EFIAPI\r |
| 4592 | AsmWriteMm6 (\r |
| 4593 | IN UINT64 Value\r |
| 4594 | );\r |
| 4595 | \r |
| 4596 | /**\r |
| 4597 | Writes the current value of 64-bit MMX Register #7 (MM7).\r |
| 4598 | \r |
| 4599 | Writes the current value of MM7. This function is only available on IA32 and\r |
| 4600 | X64.\r |
| 4601 | \r |
| 4602 | @param Value The 64-bit value to write to MM7.\r |
| 4603 | \r |
| 4604 | **/\r |
| 4605 | VOID\r |
| 4606 | EFIAPI\r |
| 4607 | AsmWriteMm7 (\r |
| 4608 | IN UINT64 Value\r |
| 4609 | );\r |
| 4610 | \r |
| 4611 | /**\r |
| 4612 | Reads the current value of Time Stamp Counter (TSC).\r |
| 4613 | \r |
| 4614 | Reads and returns the current value of TSC. This function is only available\r |
| 4615 | on IA-32 and X64.\r |
| 4616 | \r |
| 4617 | @return The current value of TSC\r |
| 4618 | \r |
| 4619 | **/\r |
| 4620 | UINT64\r |
| 4621 | EFIAPI\r |
| 4622 | AsmReadTsc (\r |
| 4623 | VOID\r |
| 4624 | );\r |
| 4625 | \r |
| 4626 | /**\r |
| 4627 | Reads the current value of a Performance Counter (PMC).\r |
| 4628 | \r |
| 4629 | Reads and returns the current value of performance counter specified by\r |
| 4630 | Index. This function is only available on IA-32 and X64.\r |
| 4631 | \r |
| 4632 | @param Index The 32-bit Performance Counter index to read.\r |
| 4633 | \r |
| 4634 | @return The value of the PMC specified by Index.\r |
| 4635 | \r |
| 4636 | **/\r |
| 4637 | UINT64\r |
| 4638 | EFIAPI\r |
| 4639 | AsmReadPmc (\r |
| 4640 | IN UINT32 Index\r |
| 4641 | );\r |
| 4642 | \r |
| 4643 | /**\r |
| 4644 | Sets up a monitor buffer that is used by AsmMwait().\r |
| 4645 | \r |
| 4646 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r |
| 4647 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r |
| 4648 | \r |
| 4649 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r |
| 4650 | instruction.\r |
| 4651 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r |
| 4652 | instruction.\r |
| 4653 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r |
| 4654 | instruction.\r |
| 4655 | \r |
| 4656 | @return Eax\r |
| 4657 | \r |
| 4658 | **/\r |
| 4659 | UINTN\r |
| 4660 | EFIAPI\r |
| 4661 | AsmMonitor (\r |
| 4662 | IN UINTN Eax,\r |
| 4663 | IN UINTN Ecx,\r |
| 4664 | IN UINTN Edx\r |
| 4665 | );\r |
| 4666 | \r |
| 4667 | /**\r |
| 4668 | Executes an MWAIT instruction.\r |
| 4669 | \r |
| 4670 | Executes an MWAIT instruction with the register state specified by Eax and\r |
| 4671 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r |
| 4672 | \r |
| 4673 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r |
| 4674 | instruction.\r |
| 4675 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r |
| 4676 | instruction.\r |
| 4677 | \r |
| 4678 | @return Eax\r |
| 4679 | \r |
| 4680 | **/\r |
| 4681 | UINTN\r |
| 4682 | EFIAPI\r |
| 4683 | AsmMwait (\r |
| 4684 | IN UINTN Eax,\r |
| 4685 | IN UINTN Ecx\r |
| 4686 | );\r |
| 4687 | \r |
| 4688 | /**\r |
| 4689 | Executes a WBINVD instruction.\r |
| 4690 | \r |
| 4691 | Executes a WBINVD instruction. This function is only available on IA-32 and\r |
| 4692 | X64.\r |
| 4693 | \r |
| 4694 | **/\r |
| 4695 | VOID\r |
| 4696 | EFIAPI\r |
| 4697 | AsmWbinvd (\r |
| 4698 | VOID\r |
| 4699 | );\r |
| 4700 | \r |
| 4701 | /**\r |
| 4702 | Executes a INVD instruction.\r |
| 4703 | \r |
| 4704 | Executes a INVD instruction. This function is only available on IA-32 and\r |
| 4705 | X64.\r |
| 4706 | \r |
| 4707 | **/\r |
| 4708 | VOID\r |
| 4709 | EFIAPI\r |
| 4710 | AsmInvd (\r |
| 4711 | VOID\r |
| 4712 | );\r |
| 4713 | \r |
| 4714 | /**\r |
| 4715 | Flushes a cache line from all the instruction and data caches within the\r |
| 4716 | coherency domain of the CPU.\r |
| 4717 | \r |
| 4718 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r |
| 4719 | This function is only available on IA-32 and X64.\r |
| 4720 | \r |
| 4721 | @param LinearAddress The address of the cache line to flush. If the CPU is\r |
| 4722 | in a physical addressing mode, then LinearAddress is a\r |
| 4723 | physical address. If the CPU is in a virtual\r |
| 4724 | addressing mode, then LinearAddress is a virtual\r |
| 4725 | address.\r |
| 4726 | \r |
| 4727 | @return LinearAddress\r |
| 4728 | **/\r |
| 4729 | VOID *\r |
| 4730 | EFIAPI\r |
| 4731 | AsmFlushCacheLine (\r |
| 4732 | IN VOID *LinearAddress\r |
| 4733 | );\r |
| 4734 | \r |
| 4735 | /**\r |
| 4736 | Enables the 32-bit paging mode on the CPU.\r |
| 4737 | \r |
| 4738 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r |
| 4739 | must be properly initialized prior to calling this service. This function\r |
| 4740 | assumes the current execution mode is 32-bit protected mode. This function is\r |
| 4741 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r |
| 4742 | transferred to the function specified by EntryPoint using the new stack\r |
| 4743 | specified by NewStack and passing in the parameters specified by Context1 and\r |
| 4744 | Context2. Context1 and Context2 are optional and may be NULL. The function\r |
| 4745 | EntryPoint must never return.\r |
| 4746 | \r |
| 4747 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r |
| 4748 | If EntryPoint is NULL, then ASSERT().\r |
| 4749 | If NewStack is NULL, then ASSERT().\r |
| 4750 | \r |
| 4751 | There are a number of constraints that must be followed before calling this\r |
| 4752 | function:\r |
| 4753 | 1) Interrupts must be disabled.\r |
| 4754 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r |
| 4755 | means all descriptors must have a base of 0 and a limit of 4GB.\r |
| 4756 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r |
| 4757 | descriptors.\r |
| 4758 | 4) CR3 must point to valid page tables that will be used once the transition\r |
| 4759 | is complete, and those page tables must guarantee that the pages for this\r |
| 4760 | function and the stack are identity mapped.\r |
| 4761 | \r |
| 4762 | @param EntryPoint A pointer to function to call with the new stack after\r |
| 4763 | paging is enabled.\r |
| 4764 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
| 4765 | function as the first parameter after paging is enabled.\r |
| 4766 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
| 4767 | function as the second parameter after paging is enabled.\r |
| 4768 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
| 4769 | function after paging is enabled.\r |
| 4770 | \r |
| 4771 | **/\r |
| 4772 | VOID\r |
| 4773 | EFIAPI\r |
| 4774 | AsmEnablePaging32 (\r |
| 4775 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
| 4776 | IN VOID *Context1, OPTIONAL\r |
| 4777 | IN VOID *Context2, OPTIONAL\r |
| 4778 | IN VOID *NewStack\r |
| 4779 | );\r |
| 4780 | \r |
| 4781 | /**\r |
| 4782 | Disables the 32-bit paging mode on the CPU.\r |
| 4783 | \r |
| 4784 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r |
| 4785 | mode. This function assumes the current execution mode is 32-paged protected\r |
| 4786 | mode. This function is only available on IA-32. After the 32-bit paging mode\r |
| 4787 | is disabled, control is transferred to the function specified by EntryPoint\r |
| 4788 | using the new stack specified by NewStack and passing in the parameters\r |
| 4789 | specified by Context1 and Context2. Context1 and Context2 are optional and\r |
| 4790 | may be NULL. The function EntryPoint must never return.\r |
| 4791 | \r |
| 4792 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r |
| 4793 | If EntryPoint is NULL, then ASSERT().\r |
| 4794 | If NewStack is NULL, then ASSERT().\r |
| 4795 | \r |
| 4796 | There are a number of constraints that must be followed before calling this\r |
| 4797 | function:\r |
| 4798 | 1) Interrupts must be disabled.\r |
| 4799 | 2) The caller must be in 32-bit paged mode.\r |
| 4800 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r |
| 4801 | 4) CR3 must point to valid page tables that guarantee that the pages for\r |
| 4802 | this function and the stack are identity mapped.\r |
| 4803 | \r |
| 4804 | @param EntryPoint A pointer to function to call with the new stack after\r |
| 4805 | paging is disabled.\r |
| 4806 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
| 4807 | function as the first parameter after paging is disabled.\r |
| 4808 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
| 4809 | function as the second parameter after paging is\r |
| 4810 | disabled.\r |
| 4811 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
| 4812 | function after paging is disabled.\r |
| 4813 | \r |
| 4814 | **/\r |
| 4815 | VOID\r |
| 4816 | EFIAPI\r |
| 4817 | AsmDisablePaging32 (\r |
| 4818 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
| 4819 | IN VOID *Context1, OPTIONAL\r |
| 4820 | IN VOID *Context2, OPTIONAL\r |
| 4821 | IN VOID *NewStack\r |
| 4822 | );\r |
| 4823 | \r |
| 4824 | /**\r |
| 4825 | Enables the 64-bit paging mode on the CPU.\r |
| 4826 | \r |
| 4827 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r |
| 4828 | must be properly initialized prior to calling this service. This function\r |
| 4829 | assumes the current execution mode is 32-bit protected mode with flat\r |
| 4830 | descriptors. This function is only available on IA-32. After the 64-bit\r |
| 4831 | paging mode is enabled, control is transferred to the function specified by\r |
| 4832 | EntryPoint using the new stack specified by NewStack and passing in the\r |
| 4833 | parameters specified by Context1 and Context2. Context1 and Context2 are\r |
| 4834 | optional and may be 0. The function EntryPoint must never return.\r |
| 4835 | \r |
| 4836 | If the current execution mode is not 32-bit protected mode with flat\r |
| 4837 | descriptors, then ASSERT().\r |
| 4838 | If EntryPoint is 0, then ASSERT().\r |
| 4839 | If NewStack is 0, then ASSERT().\r |
| 4840 | \r |
| 4841 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
| 4842 | is called. The descriptor in the GDT that this selector\r |
| 4843 | references must be setup for long mode.\r |
| 4844 | @param EntryPoint The 64-bit virtual address of the function to call with\r |
| 4845 | the new stack after paging is enabled.\r |
| 4846 | @param Context1 The 64-bit virtual address of the context to pass into\r |
| 4847 | the EntryPoint function as the first parameter after\r |
| 4848 | paging is enabled.\r |
| 4849 | @param Context2 The 64-bit virtual address of the context to pass into\r |
| 4850 | the EntryPoint function as the second parameter after\r |
| 4851 | paging is enabled.\r |
| 4852 | @param NewStack The 64-bit virtual address of the new stack to use for\r |
| 4853 | the EntryPoint function after paging is enabled.\r |
| 4854 | \r |
| 4855 | **/\r |
| 4856 | VOID\r |
| 4857 | EFIAPI\r |
| 4858 | AsmEnablePaging64 (\r |
| 4859 | IN UINT16 CodeSelector,\r |
| 4860 | IN UINT64 EntryPoint,\r |
| 4861 | IN UINT64 Context1, OPTIONAL\r |
| 4862 | IN UINT64 Context2, OPTIONAL\r |
| 4863 | IN UINT64 NewStack\r |
| 4864 | );\r |
| 4865 | \r |
| 4866 | /**\r |
| 4867 | Disables the 64-bit paging mode on the CPU.\r |
| 4868 | \r |
| 4869 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r |
| 4870 | mode. This function assumes the current execution mode is 64-paging mode.\r |
| 4871 | This function is only available on X64. After the 64-bit paging mode is\r |
| 4872 | disabled, control is transferred to the function specified by EntryPoint\r |
| 4873 | using the new stack specified by NewStack and passing in the parameters\r |
| 4874 | specified by Context1 and Context2. Context1 and Context2 are optional and\r |
| 4875 | may be 0. The function EntryPoint must never return.\r |
| 4876 | \r |
| 4877 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r |
| 4878 | If EntryPoint is 0, then ASSERT().\r |
| 4879 | If NewStack is 0, then ASSERT().\r |
| 4880 | \r |
| 4881 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
| 4882 | is called. The descriptor in the GDT that this selector\r |
| 4883 | references must be setup for 32-bit protected mode.\r |
| 4884 | @param EntryPoint The 64-bit virtual address of the function to call with\r |
| 4885 | the new stack after paging is disabled.\r |
| 4886 | @param Context1 The 64-bit virtual address of the context to pass into\r |
| 4887 | the EntryPoint function as the first parameter after\r |
| 4888 | paging is disabled.\r |
| 4889 | @param Context2 The 64-bit virtual address of the context to pass into\r |
| 4890 | the EntryPoint function as the second parameter after\r |
| 4891 | paging is disabled.\r |
| 4892 | @param NewStack The 64-bit virtual address of the new stack to use for\r |
| 4893 | the EntryPoint function after paging is disabled.\r |
| 4894 | \r |
| 4895 | **/\r |
| 4896 | VOID\r |
| 4897 | EFIAPI\r |
| 4898 | AsmDisablePaging64 (\r |
| 4899 | IN UINT16 CodeSelector,\r |
| 4900 | IN UINT32 EntryPoint,\r |
| 4901 | IN UINT32 Context1, OPTIONAL\r |
| 4902 | IN UINT32 Context2, OPTIONAL\r |
| 4903 | IN UINT32 NewStack\r |
| 4904 | );\r |
| 4905 | \r |
| 4906 | //\r |
| 4907 | // 16-bit thunking services\r |
| 4908 | //\r |
| 4909 | \r |
| 97d92bda |
4910 | /**\r |
| 4911 | Retrieves the properties for 16-bit thunk functions.\r |
| 4912 | \r |
| 4913 | Computes the size of the buffer and stack below 1MB required to use the\r |
| 4914 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r |
| 4915 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r |
| 4916 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r |
| 4917 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r |
| 4918 | of bytes that need to be passed to the 16-bit real mode code.\r |
| 4919 | \r |
| 4920 | If RealModeBufferSize is NULL, then ASSERT().\r |
| 4921 | If ExtraStackSize is NULL, then ASSERT().\r |
| 4922 | \r |
| 4923 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r |
| 4924 | required to use the 16-bit thunk functions.\r |
| 4925 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r |
| 4926 | that the 16-bit thunk functions require for\r |
| 4927 | temporary storage in the transition to and from\r |
| 4928 | 16-bit real mode.\r |
| 4929 | \r |
| 4930 | **/\r |
| 4931 | VOID\r |
| 4932 | EFIAPI\r |
| 4933 | AsmGetThunk16Properties (\r |
| 4934 | OUT UINT32 *RealModeBufferSize,\r |
| 4935 | OUT UINT32 *ExtraStackSize\r |
| 4936 | );\r |
| 4937 | \r |
| 878ddf1f |
4938 | /**\r |
| 4939 | Prepares all structures a code required to use AsmThunk16().\r |
| 4940 | \r |
| 4941 | Prepares all structures and code required to use AsmThunk16().\r |
| 4942 | \r |
| 4943 | If ThunkContext is NULL, then ASSERT().\r |
| 4944 | \r |
| 4945 | @param ThunkContext A pointer to the context structure that describes the\r |
| 4946 | 16-bit real mode code to call.\r |
| 4947 | \r |
| 4948 | **/\r |
| 4949 | VOID\r |
| 4950 | EFIAPI\r |
| 4951 | AsmPrepareThunk16 (\r |
| 4952 | OUT THUNK_CONTEXT *ThunkContext\r |
| 4953 | );\r |
| 4954 | \r |
| 4955 | /**\r |
| 4956 | Transfers control to a 16-bit real mode entry point and returns the results.\r |
| 4957 | \r |
| 4958 | Transfers control to a 16-bit real mode entry point and returns the results.\r |
| 4959 | AsmPrepareThunk16() must be called with ThunkContext before this function is\r |
| 4960 | used.\r |
| 4961 | \r |
| 4962 | If ThunkContext is NULL, then ASSERT().\r |
| 4963 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r |
| 4964 | \r |
| 4965 | @param ThunkContext A pointer to the context structure that describes the\r |
| 4966 | 16-bit real mode code to call.\r |
| 4967 | \r |
| 4968 | **/\r |
| 4969 | VOID\r |
| 4970 | EFIAPI\r |
| 4971 | AsmThunk16 (\r |
| 4972 | IN OUT THUNK_CONTEXT *ThunkContext\r |
| 4973 | );\r |
| 4974 | \r |
| 4975 | /**\r |
| 4976 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r |
| 4977 | control to a 16-bit real mode entry point, and returns the results.\r |
| 4978 | \r |
| 4979 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r |
| 4980 | control to a 16-bit real mode entry point, and returns the results. If the\r |
| 4981 | caller only need to perform a single 16-bit real mode thunk, then this\r |
| 4982 | service should be used. If the caller intends to make more than one 16-bit\r |
| 4983 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r |
| 4984 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r |
| 4985 | \r |
| 4986 | If ThunkContext is NULL, then ASSERT().\r |
| 4987 | \r |
| 4988 | @param ThunkContext A pointer to the context structure that describes the\r |
| 4989 | 16-bit real mode code to call.\r |
| 4990 | \r |
| 4991 | **/\r |
| 4992 | VOID\r |
| 4993 | EFIAPI\r |
| 4994 | AsmPrepareAndThunk16 (\r |
| 4995 | IN OUT THUNK_CONTEXT *ThunkContext\r |
| 4996 | );\r |
| 4997 | \r |
| 681dbac9 |
4998 | /**\r |
| 4999 | Transfers control to a function starting with a new stack.\r |
| 5000 | \r |
| 5001 | Transfers control to the function specified by EntryPoint using the new stack\r |
| 5002 | specified by NewStack and passing in the parameters specified by Context1 and\r |
| 5003 | Context2. Context1 and Context2 are optional and may be NULL. The function\r |
| 5004 | EntryPoint must never return.\r |
| 5005 | \r |
| 5006 | If EntryPoint is NULL, then ASSERT().\r |
| 5007 | If NewStack is NULL, then ASSERT().\r |
| 5008 | \r |
| 5009 | @param EntryPoint A pointer to function to call with the new stack.\r |
| 5010 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
| 5011 | function.\r |
| 5012 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
| 5013 | function.\r |
| 5014 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
| 5015 | function.\r |
| 5016 | @param NewBsp A pointer to the new memory location for RSE backing\r |
| 5017 | store.\r |
| 5018 | \r |
| 5019 | **/\r |
| 5020 | VOID\r |
| 5021 | EFIAPI\r |
| 5022 | AsmSwitchStackAndBackingStore (\r |
| 5023 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
| 5024 | IN VOID *Context1, OPTIONAL\r |
| 5025 | IN VOID *Context2, OPTIONAL\r |
| 5026 | IN VOID *NewStack,\r |
| 5027 | IN VOID *NewBsp\r |
| 5028 | );\r |
| 5029 | \r |
| cd4903c4 |
5030 | typedef struct {\r |
| 5031 | UINT64 Status;\r |
| 5032 | UINT64 r9;\r |
| 5033 | UINT64 r10;\r |
| 5034 | UINT64 r11;\r |
| 5035 | } PAL_PROC_RETURN;\r |
| 5036 | \r |
| 5037 | //\r |
| 5038 | // IPF Specific functions\r |
| 5039 | //\r |
| 5040 | \r |
| 5041 | \r |
| 5042 | /**\r |
| 5043 | Performs a PAL call using static calling convention.\r |
| 5044 | \r |
| 5045 | An internal function to perform a PAL call using static calling convention.\r |
| 5046 | \r |
| 5047 | @param PalEntryPoint The entry point address of PAL. The address in ar.kr5\r |
| 5048 | would be used if this parameter were NULL on input.\r |
| 5049 | @param Arg1 The first argument of a PAL call.\r |
| 5050 | @param Arg1 The second argument of a PAL call.\r |
| 5051 | @param Arg1 The third argument of a PAL call.\r |
| 5052 | @param Arg1 The fourth argument of a PAL call.\r |
| 5053 | \r |
| 5054 | @return The values returned in r8, r9, r10 and r11.\r |
| 5055 | \r |
| 5056 | **/\r |
| 5057 | PAL_PROC_RETURN\r |
| 5058 | PalCallStatic (\r |
| 5059 | IN CONST VOID *PalEntryPoint,\r |
| 5060 | IN UINT64 Arg1,\r |
| 5061 | IN UINT64 Arg2,\r |
| 5062 | IN UINT64 Arg3,\r |
| 5063 | IN UINT64 Arg4\r |
| 5064 | );\r |
| 5065 | \r |
| 5066 | \r |
| 5067 | /**\r |
| 5068 | Returns the current value of ar.itc.\r |
| 5069 | \r |
| 5070 | An internal function to return the current value of ar.itc, which is the\r |
| 5071 | timer tick on IPF.\r |
| 5072 | \r |
| 5073 | @return The currect value of ar.itc\r |
| 5074 | \r |
| 5075 | **/\r |
| 5076 | INT64\r |
| 5077 | IpfReadItc (\r |
| 5078 | VOID\r |
| 5079 | );\r |
| 5080 | \r |
| 5081 | \r |
| 5082 | /**\r |
| 92ea7f23 |
5083 | Flush a range of cache lines in the cache coherency domain of the calling \r |
| 5084 | CPU.\r |
| 5085 | \r |
| 5086 | Invalidates the cache lines specified by Address and Length. If Address is \r |
| 5087 | not aligned on a cache line boundary, then entire cache line containing \r |
| 5088 | Address is invalidated. If Address + Length is not aligned on a cache line \r |
| 5089 | boundary, then the entire instruction cache line containing Address + Length\r |
| 5090 | -1 is invalidated. This function may choose to invalidate the entire \r |
| 5091 | instruction cache if that is more efficient than invalidating the specified \r |
| 5092 | range. If Length is 0, the no instruction cache lines are invalidated. \r |
| 5093 | Address is returned.\r |
| cd4903c4 |
5094 | \r |
| 5095 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r |
| 5096 | \r |
| 92ea7f23 |
5097 | @param Address The base address of the instruction lines to invalidate. If \r |
| 5098 | the CPU is in a physical addressing mode, then Address is a\r |
| 5099 | physical address. If the CPU is in a virtual addressing mode,\r |
| 5100 | then Address is a virtual address.\r |
| cd4903c4 |
5101 | \r |
| 5102 | @param Length The number of bytes to invalidate from the instruction cache.\r |
| 5103 | \r |
| 5104 | @return Address\r |
| 5105 | \r |
| 5106 | **/\r |
| 5107 | VOID *\r |
| 5108 | EFIAPI\r |
| 92ea7f23 |
5109 | IpfFlushCacheRange (\r |
| cd4903c4 |
5110 | IN VOID *Address,\r |
| 5111 | IN UINTN Length\r |
| 5112 | );\r |
| 5113 | \r |
| 878ddf1f |
5114 | #endif\r |
projects / mirror_edk2.git / blame