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878ddf1f | 1 | /** @file\r |
24e25d11 | 2 | Memory-only library functions with no library constructor/destructor\r |
878ddf1f | 3 | \r |
24e25d11 | 4 | Copyright (c) 2006, Intel Corporation\r |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
878ddf1f | 9 | \r |
24e25d11 | 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
878ddf1f | 12 | \r |
24e25d11 | 13 | Module Name: BaseLib.h\r |
878ddf1f | 14 | \r |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
20 | //\r | |
21 | // Definitions for architecture specific types\r | |
22 | // These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER\r | |
23 | //\r | |
24 | \r | |
25 | //\r | |
26 | // SPIN_LOCK\r | |
27 | //\r | |
28 | typedef UINTN SPIN_LOCK;\r | |
29 | \r | |
30 | #if defined (MDE_CPU_IA32)\r | |
31 | //\r | |
32 | // IA32 context buffer used by SetJump() and LongJump()\r | |
33 | //\r | |
34 | typedef struct {\r | |
35 | UINT32 Ebx;\r | |
36 | UINT32 Esi;\r | |
37 | UINT32 Edi;\r | |
38 | UINT32 Ebp;\r | |
39 | UINT32 Esp;\r | |
40 | UINT32 Eip;\r | |
41 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
42 | \r | |
4a328620 | 43 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
44 | \r | |
878ddf1f | 45 | #elif defined (MDE_CPU_IPF)\r |
46 | //\r | |
47 | // IPF context buffer used by SetJump() and LongJump()\r | |
48 | //\r | |
49 | typedef struct {\r | |
4cbd2175 | 50 | UINT64 F2[2];\r |
51 | UINT64 F3[2];\r | |
52 | UINT64 F4[2];\r | |
53 | UINT64 F5[2];\r | |
54 | UINT64 F16[2];\r | |
55 | UINT64 F17[2];\r | |
56 | UINT64 F18[2];\r | |
57 | UINT64 F19[2];\r | |
58 | UINT64 F20[2];\r | |
59 | UINT64 F21[2];\r | |
60 | UINT64 F22[2];\r | |
61 | UINT64 F23[2];\r | |
62 | UINT64 F24[2];\r | |
63 | UINT64 F25[2];\r | |
64 | UINT64 F26[2];\r | |
65 | UINT64 F27[2];\r | |
66 | UINT64 F28[2];\r | |
67 | UINT64 F29[2];\r | |
68 | UINT64 F30[2];\r | |
69 | UINT64 F31[2];\r | |
878ddf1f | 70 | UINT64 R4;\r |
71 | UINT64 R5;\r | |
72 | UINT64 R6;\r | |
73 | UINT64 R7;\r | |
74 | UINT64 SP;\r | |
878ddf1f | 75 | UINT64 BR0;\r |
76 | UINT64 BR1;\r | |
77 | UINT64 BR2;\r | |
78 | UINT64 BR3;\r | |
79 | UINT64 BR4;\r | |
80 | UINT64 BR5;\r | |
4cbd2175 | 81 | UINT64 InitialUNAT;\r |
82 | UINT64 AfterSpillUNAT;\r | |
83 | UINT64 PFS;\r | |
84 | UINT64 BSP;\r | |
85 | UINT64 Predicates;\r | |
86 | UINT64 LoopCount;\r | |
87 | UINT64 FPSR;\r | |
878ddf1f | 88 | } BASE_LIBRARY_JUMP_BUFFER;\r |
89 | \r | |
4a328620 | 90 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r |
91 | \r | |
878ddf1f | 92 | #elif defined (MDE_CPU_X64)\r |
93 | //\r | |
94 | // X64 context buffer used by SetJump() and LongJump()\r | |
95 | //\r | |
96 | typedef struct {\r | |
97 | UINT64 Rbx;\r | |
98 | UINT64 Rsp;\r | |
99 | UINT64 Rbp;\r | |
100 | UINT64 Rdi;\r | |
101 | UINT64 Rsi;\r | |
102 | UINT64 R12;\r | |
103 | UINT64 R13;\r | |
104 | UINT64 R14;\r | |
105 | UINT64 R15;\r | |
106 | UINT64 Rip;\r | |
107 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
108 | \r | |
4a328620 | 109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
110 | \r | |
878ddf1f | 111 | #elif defined (MDE_CPU_EBC)\r |
112 | //\r | |
113 | // EBC context buffer used by SetJump() and LongJump()\r | |
114 | //\r | |
115 | typedef struct {\r | |
116 | UINT64 R0;\r | |
117 | UINT64 R1;\r | |
118 | UINT64 R2;\r | |
119 | UINT64 R3;\r | |
120 | UINT64 IP;\r | |
121 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
122 | \r | |
4a328620 | 123 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r |
124 | \r | |
878ddf1f | 125 | #else\r |
126 | #error Unknown Processor Type\r | |
127 | #endif\r | |
128 | \r | |
129 | //\r | |
130 | // String Services\r | |
131 | //\r | |
132 | \r | |
133 | /**\r | |
134 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
135 | string and returns the new Unicode string.\r | |
136 | \r | |
137 | This function copies the contents of the Unicode string Source to the Unicode\r | |
138 | string Destination, and returns Destination. If Source and Destination\r | |
139 | overlap, then the results are undefined.\r | |
140 | \r | |
141 | If Destination is NULL, then ASSERT().\r | |
142 | If Source is NULL, then ASSERT().\r | |
143 | If Source and Destination overlap, then ASSERT().\r | |
144 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
db8f40e2 | 145 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 146 | Null-terminator, then ASSERT().\r |
878ddf1f | 147 | \r |
148 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
149 | @param Source Pointer to a Null-terminated Unicode string.\r | |
150 | \r | |
151 | @return Destiantion\r | |
152 | \r | |
153 | **/\r | |
154 | CHAR16 *\r | |
155 | EFIAPI\r | |
156 | StrCpy (\r | |
157 | OUT CHAR16 *Destination,\r | |
158 | IN CONST CHAR16 *Source\r | |
159 | );\r | |
878ddf1f | 160 | /**\r |
161 | Copies one Null-terminated Unicode string with a maximum length to another\r | |
162 | Null-terminated Unicode string with a maximum length and returns the new\r | |
163 | Unicode string.\r | |
164 | \r | |
165 | This function copies the contents of the Unicode string Source to the Unicode\r | |
166 | string Destination, and returns Destination. At most, Length Unicode\r | |
167 | characters are copied from Source to Destination. If Length is 0, then\r | |
168 | Destination is returned unmodified. If Length is greater that the number of\r | |
169 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
170 | characters. If Source and Destination overlap, then the results are\r | |
171 | undefined.\r | |
172 | \r | |
173 | If Destination is NULL, then ASSERT().\r | |
174 | If Source is NULL, then ASSERT().\r | |
175 | If Source and Destination overlap, then ASSERT().\r | |
176 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
db8f40e2 | 177 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 178 | Null-terminator, then ASSERT().\r |
878ddf1f | 179 | \r |
180 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
181 | @param Source Pointer to a Null-terminated Unicode string.\r | |
182 | @param Length Maximum number of Unicode characters to copy.\r | |
183 | \r | |
184 | @return Destination\r | |
185 | \r | |
186 | **/\r | |
187 | CHAR16 *\r | |
188 | EFIAPI\r | |
189 | StrnCpy (\r | |
190 | OUT CHAR16 *Destination,\r | |
191 | IN CONST CHAR16 *Source,\r | |
192 | IN UINTN Length\r | |
193 | );\r | |
878ddf1f | 194 | /**\r |
195 | Returns the length of a Null-terminated Unicode string.\r | |
196 | \r | |
197 | This function returns the number of Unicode characters in the Null-terminated\r | |
198 | Unicode string specified by String.\r | |
199 | \r | |
200 | If String is NULL, then ASSERT().\r | |
201 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
db8f40e2 | 202 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 203 | Null-terminator, then ASSERT().\r |
878ddf1f | 204 | \r |
205 | @param String Pointer to a Null-terminated Unicode string.\r | |
206 | \r | |
207 | @return The length of String.\r | |
208 | \r | |
209 | **/\r | |
210 | UINTN\r | |
211 | EFIAPI\r | |
212 | StrLen (\r | |
213 | IN CONST CHAR16 *String\r | |
214 | );\r | |
878ddf1f | 215 | /**\r |
216 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
217 | Null terminator.\r | |
218 | \r | |
219 | This function returns the size, in bytes, of the Null-terminated Unicode\r | |
220 | string specified by String.\r | |
221 | \r | |
222 | If String is NULL, then ASSERT().\r | |
223 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
db8f40e2 | 224 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 225 | Null-terminator, then ASSERT().\r |
878ddf1f | 226 | \r |
227 | @param String Pointer to a Null-terminated Unicode string.\r | |
228 | \r | |
229 | @return The size of String.\r | |
230 | \r | |
231 | **/\r | |
232 | UINTN\r | |
233 | EFIAPI\r | |
234 | StrSize (\r | |
235 | IN CONST CHAR16 *String\r | |
236 | );\r | |
878ddf1f | 237 | /**\r |
238 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
239 | between the first mismatched Unicode characters.\r | |
240 | \r | |
241 | This function compares the Null-terminated Unicode string FirstString to the\r | |
242 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
243 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
244 | mismatched Unicode character in SecondString subtracted from the first\r | |
245 | mismatched Unicode character in FirstString.\r | |
246 | \r | |
247 | If FirstString is NULL, then ASSERT().\r | |
248 | If SecondString is NULL, then ASSERT().\r | |
249 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
db8f40e2 | 250 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 251 | Null-terminator, then ASSERT().\r |
878ddf1f | 252 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
db8f40e2 | 253 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
30817eb4 | 254 | Null-terminator, then ASSERT().\r |
878ddf1f | 255 | \r |
256 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
257 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
258 | \r | |
259 | @retval 0 FirstString is identical to SecondString.\r | |
260 | @retval !=0 FirstString is not identical to SecondString.\r | |
261 | \r | |
262 | **/\r | |
263 | INTN\r | |
264 | EFIAPI\r | |
265 | StrCmp (\r | |
266 | IN CONST CHAR16 *FirstString,\r | |
267 | IN CONST CHAR16 *SecondString\r | |
268 | );\r | |
878ddf1f | 269 | /**\r |
270 | Compares two Null-terminated Unicode strings with maximum lengths, and\r | |
271 | returns the difference between the first mismatched Unicode characters.\r | |
272 | \r | |
273 | This function compares the Null-terminated Unicode string FirstString to the\r | |
274 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
275 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
276 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
277 | value returned is the first mismatched Unicode character in SecondString\r | |
278 | subtracted from the first mismatched Unicode character in FirstString.\r | |
279 | \r | |
280 | If FirstString is NULL, then ASSERT().\r | |
281 | If SecondString is NULL, then ASSERT().\r | |
282 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
30817eb4 | 283 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
284 | Null-terminator, then ASSERT().\r | |
878ddf1f | 285 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
30817eb4 | 286 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
287 | Null-terminator, then ASSERT().\r | |
878ddf1f | 288 | \r |
289 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
290 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
291 | @param Length Maximum number of Unicode characters to compare.\r | |
292 | \r | |
293 | @retval 0 FirstString is identical to SecondString.\r | |
294 | @retval !=0 FirstString is not identical to SecondString.\r | |
295 | \r | |
296 | **/\r | |
297 | INTN\r | |
298 | EFIAPI\r | |
299 | StrnCmp (\r | |
300 | IN CONST CHAR16 *FirstString,\r | |
301 | IN CONST CHAR16 *SecondString,\r | |
302 | IN UINTN Length\r | |
303 | );\r | |
878ddf1f | 304 | /**\r |
305 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
306 | Unicode string, and returns the concatenated Unicode string.\r | |
307 | \r | |
308 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
309 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
310 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
311 | Unicode String is returned. If Source and Destination overlap, then the\r | |
312 | results are undefined.\r | |
313 | \r | |
314 | If Destination is NULL, then ASSERT().\r | |
315 | If Source is NULL, then ASSERT().\r | |
316 | If Source and Destination overlap, then ASSERT().\r | |
317 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
30817eb4 | 318 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
319 | Null-terminator, then ASSERT().\r | |
878ddf1f | 320 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
30817eb4 | 321 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
322 | Null-terminator, then ASSERT().\r | |
878ddf1f | 323 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
324 | and Source results in a Unicode string with more than\r | |
30817eb4 | 325 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
326 | Null-terminator, then ASSERT().\r | |
878ddf1f | 327 | \r |
328 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
329 | @param Source Pointer to a Null-terminated Unicode string.\r | |
330 | \r | |
331 | @return Destination\r | |
332 | \r | |
333 | **/\r | |
334 | CHAR16 *\r | |
335 | EFIAPI\r | |
336 | StrCat (\r | |
337 | IN OUT CHAR16 *Destination,\r | |
338 | IN CONST CHAR16 *Source\r | |
339 | );\r | |
878ddf1f | 340 | /**\r |
341 | Concatenates one Null-terminated Unicode string with a maximum length to the\r | |
342 | end of another Null-terminated Unicode string, and returns the concatenated\r | |
343 | Unicode string.\r | |
344 | \r | |
345 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
346 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
347 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
348 | most, Length Unicode characters are concatenated from Source to the end of\r | |
349 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
350 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
351 | the results are undefined.\r | |
352 | \r | |
353 | If Destination is NULL, then ASSERT().\r | |
354 | If Source is NULL, then ASSERT().\r | |
355 | If Source and Destination overlap, then ASSERT().\r | |
356 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
30817eb4 | 357 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
358 | Null-terminator, then ASSERT().\r | |
878ddf1f | 359 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
30817eb4 | 360 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
361 | Null-terminator, then ASSERT().\r | |
878ddf1f | 362 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
363 | and Source results in a Unicode string with more than\r | |
30817eb4 | 364 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
365 | Null-terminator, then ASSERT().\r | |
878ddf1f | 366 | \r |
367 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
368 | @param Source Pointer to a Null-terminated Unicode string.\r | |
369 | @param Length Maximum number of Unicode characters to concatenate from\r | |
370 | Source.\r | |
371 | \r | |
372 | @return Destination\r | |
373 | \r | |
374 | **/\r | |
375 | CHAR16 *\r | |
376 | EFIAPI\r | |
377 | StrnCat (\r | |
378 | IN OUT CHAR16 *Destination,\r | |
379 | IN CONST CHAR16 *Source,\r | |
380 | IN UINTN Length\r | |
381 | );\r | |
878ddf1f | 382 | /**\r |
383 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
384 | string and returns the new ASCII string.\r | |
385 | \r | |
386 | This function copies the contents of the ASCII string Source to the ASCII\r | |
387 | string Destination, and returns Destination. If Source and Destination\r | |
388 | overlap, then the results are undefined.\r | |
389 | \r | |
390 | If Destination is NULL, then ASSERT().\r | |
391 | If Source is NULL, then ASSERT().\r | |
392 | If Source and Destination overlap, then ASSERT().\r | |
393 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
30817eb4 | 394 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
395 | then ASSERT().\r | |
878ddf1f | 396 | \r |
397 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
398 | @param Source Pointer to a Null-terminated ASCII string.\r | |
399 | \r | |
400 | @return Destination\r | |
401 | \r | |
402 | **/\r | |
403 | CHAR8 *\r | |
404 | EFIAPI\r | |
405 | AsciiStrCpy (\r | |
406 | OUT CHAR8 *Destination,\r | |
407 | IN CONST CHAR8 *Source\r | |
408 | );\r | |
878ddf1f | 409 | /**\r |
410 | Copies one Null-terminated ASCII string with a maximum length to another\r | |
411 | Null-terminated ASCII string with a maximum length and returns the new ASCII\r | |
412 | string.\r | |
413 | \r | |
414 | This function copies the contents of the ASCII string Source to the ASCII\r | |
415 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
416 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
417 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
418 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
419 | and Destination overlap, then the results are undefined.\r | |
420 | \r | |
421 | If Destination is NULL, then ASSERT().\r | |
422 | If Source is NULL, then ASSERT().\r | |
423 | If Source and Destination overlap, then ASSERT().\r | |
424 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
30817eb4 | 425 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
426 | then ASSERT().\r | |
878ddf1f | 427 | \r |
428 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
429 | @param Source Pointer to a Null-terminated ASCII string.\r | |
430 | @param Length Maximum number of ASCII characters to copy.\r | |
431 | \r | |
432 | @return Destination\r | |
433 | \r | |
434 | **/\r | |
435 | CHAR8 *\r | |
436 | EFIAPI\r | |
437 | AsciiStrnCpy (\r | |
438 | OUT CHAR8 *Destination,\r | |
439 | IN CONST CHAR8 *Source,\r | |
440 | IN UINTN Length\r | |
441 | );\r | |
878ddf1f | 442 | /**\r |
443 | Returns the length of a Null-terminated ASCII string.\r | |
444 | \r | |
445 | This function returns the number of ASCII characters in the Null-terminated\r | |
446 | ASCII string specified by String.\r | |
447 | \r | |
448 | If String is NULL, then ASSERT().\r | |
449 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
30817eb4 | 450 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
451 | then ASSERT().\r | |
878ddf1f | 452 | \r |
453 | @param String Pointer to a Null-terminated ASCII string.\r | |
454 | \r | |
455 | @return The length of String.\r | |
456 | \r | |
457 | **/\r | |
458 | UINTN\r | |
459 | EFIAPI\r | |
460 | AsciiStrLen (\r | |
461 | IN CONST CHAR8 *String\r | |
462 | );\r | |
878ddf1f | 463 | /**\r |
464 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
465 | Null terminator.\r | |
466 | \r | |
467 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
468 | specified by String.\r | |
469 | \r | |
470 | If String is NULL, then ASSERT().\r | |
471 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
30817eb4 | 472 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
473 | then ASSERT().\r | |
878ddf1f | 474 | \r |
475 | @param String Pointer to a Null-terminated ASCII string.\r | |
476 | \r | |
477 | @return The size of String.\r | |
478 | \r | |
479 | **/\r | |
480 | UINTN\r | |
481 | EFIAPI\r | |
482 | AsciiStrSize (\r | |
483 | IN CONST CHAR8 *String\r | |
484 | );\r | |
878ddf1f | 485 | /**\r |
486 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
487 | between the first mismatched ASCII characters.\r | |
488 | \r | |
489 | This function compares the Null-terminated ASCII string FirstString to the\r | |
490 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
491 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
492 | mismatched ASCII character in SecondString subtracted from the first\r | |
493 | mismatched ASCII character in FirstString.\r | |
494 | \r | |
495 | If FirstString is NULL, then ASSERT().\r | |
496 | If SecondString is NULL, then ASSERT().\r | |
497 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
30817eb4 | 498 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
499 | then ASSERT().\r | |
878ddf1f | 500 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
30817eb4 | 501 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
502 | Null-terminator, then ASSERT().\r | |
878ddf1f | 503 | \r |
504 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
505 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
506 | \r | |
507 | @retval 0 FirstString is identical to SecondString.\r | |
508 | @retval !=0 FirstString is not identical to SecondString.\r | |
509 | \r | |
510 | **/\r | |
511 | INTN\r | |
512 | EFIAPI\r | |
513 | AsciiStrCmp (\r | |
514 | IN CONST CHAR8 *FirstString,\r | |
515 | IN CONST CHAR8 *SecondString\r | |
516 | );\r | |
878ddf1f | 517 | /**\r |
518 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
519 | and returns the difference between the first mismatched ASCII characters.\r | |
520 | \r | |
521 | This function performs a case insensitive comparison of the Null-terminated\r | |
522 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
523 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
524 | value returned is the first mismatched lower case ASCII character in\r | |
525 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
526 | in FirstString.\r | |
527 | \r | |
528 | If FirstString is NULL, then ASSERT().\r | |
529 | If SecondString is NULL, then ASSERT().\r | |
530 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
30817eb4 | 531 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
532 | then ASSERT().\r | |
878ddf1f | 533 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
30817eb4 | 534 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
535 | Null-terminator, then ASSERT().\r | |
878ddf1f | 536 | \r |
537 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
538 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
539 | \r | |
540 | @retval 0 FirstString is identical to SecondString using case insensitive\r | |
541 | comparisons.\r | |
542 | @retval !=0 FirstString is not identical to SecondString using case\r | |
543 | insensitive comparisons.\r | |
544 | \r | |
545 | **/\r | |
546 | INTN\r | |
547 | EFIAPI\r | |
548 | AsciiStriCmp (\r | |
549 | IN CONST CHAR8 *FirstString,\r | |
550 | IN CONST CHAR8 *SecondString\r | |
551 | );\r | |
878ddf1f | 552 | /**\r |
553 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
554 | the difference between the first mismatched ASCII characters.\r | |
555 | \r | |
556 | This function compares the Null-terminated ASCII string FirstString to the\r | |
557 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
558 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
559 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
560 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
561 | first mismatched ASCII character in FirstString.\r | |
562 | \r | |
563 | If FirstString is NULL, then ASSERT().\r | |
564 | If SecondString is NULL, then ASSERT().\r | |
565 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
30817eb4 | 566 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
567 | then ASSERT().\r | |
568 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r | |
569 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
570 | then ASSERT().\r | |
878ddf1f | 571 | \r |
572 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
573 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
574 | \r | |
575 | @retval 0 FirstString is identical to SecondString.\r | |
576 | @retval !=0 FirstString is not identical to SecondString.\r | |
577 | \r | |
578 | **/\r | |
579 | INTN\r | |
580 | EFIAPI\r | |
581 | AsciiStrnCmp (\r | |
582 | IN CONST CHAR8 *FirstString,\r | |
583 | IN CONST CHAR8 *SecondString,\r | |
584 | IN UINTN Length\r | |
585 | );\r | |
878ddf1f | 586 | /**\r |
587 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
588 | ASCII string, and returns the concatenated ASCII string.\r | |
589 | \r | |
590 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
591 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
592 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
593 | String is returned.\r | |
594 | \r | |
595 | If Destination is NULL, then ASSERT().\r | |
596 | If Source is NULL, then ASSERT().\r | |
597 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
30817eb4 | 598 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
599 | then ASSERT().\r | |
878ddf1f | 600 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r |
30817eb4 | 601 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
602 | then ASSERT().\r | |
878ddf1f | 603 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r |
604 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
605 | ASCII characters, then ASSERT().\r | |
606 | \r | |
607 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
608 | @param Source Pointer to a Null-terminated ASCII string.\r | |
609 | \r | |
610 | @return Destination\r | |
611 | \r | |
612 | **/\r | |
613 | CHAR8 *\r | |
614 | EFIAPI\r | |
615 | AsciiStrCat (\r | |
30817eb4 | 616 | IN OUT CHAR8 *Destination,\r |
617 | IN CONST CHAR8 *Source\r | |
878ddf1f | 618 | );\r |
878ddf1f | 619 | /**\r |
620 | Concatenates one Null-terminated ASCII string with a maximum length to the\r | |
621 | end of another Null-terminated ASCII string, and returns the concatenated\r | |
622 | ASCII string.\r | |
623 | \r | |
624 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
625 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
626 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
627 | Length ASCII characters are concatenated from Source to the end of\r | |
628 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
629 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
630 | the results are undefined.\r | |
631 | \r | |
632 | If Destination is NULL, then ASSERT().\r | |
633 | If Source is NULL, then ASSERT().\r | |
634 | If Source and Destination overlap, then ASSERT().\r | |
30817eb4 | 635 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
636 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
637 | then ASSERT().\r | |
878ddf1f | 638 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
30817eb4 | 639 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
640 | then ASSERT().\r | |
878ddf1f | 641 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r |
642 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
30817eb4 | 643 | ASCII characters not including the Null-terminator, then ASSERT().\r |
878ddf1f | 644 | \r |
645 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
646 | @param Source Pointer to a Null-terminated ASCII string.\r | |
647 | @param Length Maximum number of ASCII characters to concatenate from\r | |
648 | Source.\r | |
649 | \r | |
650 | @return Destination\r | |
651 | \r | |
652 | **/\r | |
653 | CHAR8 *\r | |
654 | EFIAPI\r | |
655 | AsciiStrnCat (\r | |
656 | IN OUT CHAR8 *Destination,\r | |
657 | IN CONST CHAR8 *Source,\r | |
658 | IN UINTN Length\r | |
659 | );\r | |
dee4740a | 660 | /**\r |
661 | Converts an 8-bit value to an 8-bit BCD value.\r | |
662 | \r | |
663 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
664 | returned.\r | |
665 | \r | |
666 | If Value >= 100, then ASSERT().\r | |
667 | \r | |
668 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
669 | \r | |
670 | @return The BCD value\r | |
671 | \r | |
672 | **/\r | |
673 | UINT8\r | |
674 | EFIAPI\r | |
675 | DecimalToBcd8 (\r | |
676 | IN UINT8 Value\r | |
677 | );\r | |
678 | \r | |
679 | /**\r | |
680 | Converts an 8-bit BCD value to an 8-bit value.\r | |
681 | \r | |
682 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
683 | value is returned.\r | |
684 | \r | |
685 | If Value >= 0xA0, then ASSERT().\r | |
686 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
687 | \r | |
688 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
689 | \r | |
690 | @return The 8-bit value is returned.\r | |
691 | \r | |
692 | **/\r | |
693 | UINT8\r | |
694 | EFIAPI\r | |
695 | BcdToDecimal8 (\r | |
696 | IN UINT8 Value\r | |
697 | );\r | |
698 | \r | |
878ddf1f | 699 | //\r |
700 | // Linked List Functions and Macros\r | |
701 | //\r | |
702 | \r | |
703 | /**\r | |
704 | Initializes the head node of a doubly linked list that is declared as a\r | |
705 | global variable in a module.\r | |
706 | \r | |
707 | Initializes the forward and backward links of a new linked list. After\r | |
708 | initializing a linked list with this macro, the other linked list functions\r | |
709 | may be used to add and remove nodes from the linked list. This macro results\r | |
710 | in smaller executables by initializing the linked list in the data section,\r | |
711 | instead if calling the InitializeListHead() function to perform the\r | |
712 | equivalent operation.\r | |
713 | \r | |
714 | @param ListHead The head note of a list to initiailize.\r | |
715 | \r | |
716 | **/\r | |
717 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}\r | |
718 | \r | |
719 | /**\r | |
720 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
721 | the head node of the doubly linked list.\r | |
722 | \r | |
723 | Initializes the forward and backward links of a new linked list. After\r | |
724 | initializing a linked list with this function, the other linked list\r | |
725 | functions may be used to add and remove nodes from the linked list. It is up\r | |
726 | to the caller of this function to allocate the memory for ListHead.\r | |
727 | \r | |
728 | If ListHead is NULL, then ASSERT().\r | |
729 | \r | |
730 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
731 | \r | |
732 | @return ListHead\r | |
733 | \r | |
734 | **/\r | |
735 | LIST_ENTRY *\r | |
736 | EFIAPI\r | |
737 | InitializeListHead (\r | |
738 | IN LIST_ENTRY *ListHead\r | |
739 | );\r | |
740 | \r | |
741 | /**\r | |
742 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
743 | to the head node of the doubly linked list.\r | |
744 | \r | |
745 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
746 | ListHead, and returns ListHead.\r | |
747 | \r | |
748 | If ListHead is NULL, then ASSERT().\r | |
749 | If Entry is NULL, then ASSERT().\r | |
750 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
30817eb4 | 751 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
db8f40e2 | 752 | of nodes in ListHead, including the ListHead node, is greater than or\r |
30817eb4 | 753 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 754 | \r |
755 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
756 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
757 | of a doubly linked list.\r | |
758 | \r | |
759 | @return ListHead\r | |
760 | \r | |
761 | **/\r | |
762 | LIST_ENTRY *\r | |
763 | EFIAPI\r | |
764 | InsertHeadList (\r | |
765 | IN LIST_ENTRY *ListHead,\r | |
766 | IN LIST_ENTRY *Entry\r | |
767 | );\r | |
768 | \r | |
769 | /**\r | |
770 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
771 | the head node of the doubly linked list.\r | |
772 | \r | |
773 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
774 | and returns ListHead.\r | |
775 | \r | |
776 | If ListHead is NULL, then ASSERT().\r | |
777 | If Entry is NULL, then ASSERT().\r | |
778 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
30817eb4 | 779 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
db8f40e2 | 780 | of nodes in ListHead, including the ListHead node, is greater than or\r |
30817eb4 | 781 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 782 | \r |
783 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
784 | @param Entry A pointer to a node that is to be added at the end of the\r | |
785 | doubly linked list.\r | |
786 | \r | |
787 | @return ListHead\r | |
788 | \r | |
789 | **/\r | |
790 | LIST_ENTRY *\r | |
791 | EFIAPI\r | |
792 | InsertTailList (\r | |
793 | IN LIST_ENTRY *ListHead,\r | |
794 | IN LIST_ENTRY *Entry\r | |
795 | );\r | |
796 | \r | |
797 | /**\r | |
798 | Retrieves the first node of a doubly linked list.\r | |
799 | \r | |
800 | Returns the first node of a doubly linked list. List must have been\r | |
801 | initialized with InitializeListHead(). If List is empty, then NULL is\r | |
802 | returned.\r | |
803 | \r | |
804 | If List is NULL, then ASSERT().\r | |
805 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
db8f40e2 | 806 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
807 | in List, including the List node, is greater than or equal to\r | |
30817eb4 | 808 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 809 | \r |
810 | @param List A pointer to the head node of a doubly linked list.\r | |
811 | \r | |
812 | @return The first node of a doubly linked list.\r | |
813 | @retval NULL The list is empty.\r | |
814 | \r | |
815 | **/\r | |
816 | LIST_ENTRY *\r | |
817 | EFIAPI\r | |
818 | GetFirstNode (\r | |
819 | IN CONST LIST_ENTRY *List\r | |
820 | );\r | |
821 | \r | |
822 | /**\r | |
823 | Retrieves the next node of a doubly linked list.\r | |
824 | \r | |
825 | Returns the node of a doubly linked list that follows Node. List must have\r | |
826 | been initialized with InitializeListHead(). If List is empty, then List is\r | |
827 | returned.\r | |
828 | \r | |
829 | If List is NULL, then ASSERT().\r | |
830 | If Node is NULL, then ASSERT().\r | |
831 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
832 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
833 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
834 | If Node is not a node in List, then ASSERT().\r | |
835 | \r | |
836 | @param List A pointer to the head node of a doubly linked list.\r | |
837 | @param Node A pointer to a node in the doubly linked list.\r | |
838 | \r | |
839 | @return Pointer to the next node if one exists. Otherwise a null value which\r | |
840 | is actually List is returned.\r | |
841 | \r | |
842 | **/\r | |
843 | LIST_ENTRY *\r | |
844 | EFIAPI\r | |
845 | GetNextNode (\r | |
846 | IN CONST LIST_ENTRY *List,\r | |
847 | IN CONST LIST_ENTRY *Node\r | |
848 | );\r | |
849 | \r | |
850 | /**\r | |
851 | Checks to see if a doubly linked list is empty or not.\r | |
852 | \r | |
853 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
854 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
855 | \r | |
856 | If ListHead is NULL, then ASSERT().\r | |
857 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
db8f40e2 | 858 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
859 | in List, including the List node, is greater than or equal to\r | |
30817eb4 | 860 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 861 | \r |
862 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
863 | \r | |
864 | @retval TRUE The linked list is empty.\r | |
865 | @retval FALSE The linked list is not empty.\r | |
866 | \r | |
867 | **/\r | |
868 | BOOLEAN\r | |
869 | EFIAPI\r | |
870 | IsListEmpty (\r | |
871 | IN CONST LIST_ENTRY *ListHead\r | |
872 | );\r | |
873 | \r | |
874 | /**\r | |
875 | Determines if a node in a doubly linked list is null.\r | |
876 | \r | |
877 | Returns FALSE if Node is one of the nodes in the doubly linked list specified\r | |
878 | by List. Otherwise, TRUE is returned. List must have been initialized with\r | |
879 | InitializeListHead().\r | |
880 | \r | |
881 | If List is NULL, then ASSERT().\r | |
882 | If Node is NULL, then ASSERT().\r | |
883 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
db8f40e2 | 884 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
885 | in List, including the List node, is greater than or equal to\r | |
30817eb4 | 886 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 887 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r |
888 | \r | |
889 | @param List A pointer to the head node of a doubly linked list.\r | |
24e25d11 | 890 | @param Node A pointer to a node in the doubly linked list.\r |
878ddf1f | 891 | \r |
892 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
893 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
894 | \r | |
895 | **/\r | |
896 | BOOLEAN\r | |
897 | EFIAPI\r | |
898 | IsNull (\r | |
899 | IN CONST LIST_ENTRY *List,\r | |
900 | IN CONST LIST_ENTRY *Node\r | |
901 | );\r | |
902 | \r | |
903 | /**\r | |
904 | Determines if a node the last node in a doubly linked list.\r | |
905 | \r | |
906 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
907 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
908 | InitializeListHead().\r | |
909 | \r | |
910 | If List is NULL, then ASSERT().\r | |
911 | If Node is NULL, then ASSERT().\r | |
912 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
db8f40e2 | 913 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
914 | in List, including the List node, is greater than or equal to\r | |
30817eb4 | 915 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 916 | If Node is not a node in List, then ASSERT().\r |
917 | \r | |
918 | @param List A pointer to the head node of a doubly linked list.\r | |
24e25d11 | 919 | @param Node A pointer to a node in the doubly linked list.\r |
878ddf1f | 920 | \r |
921 | @retval TRUE Node is the last node in the linked list.\r | |
922 | @retval FALSE Node is not the last node in the linked list.\r | |
923 | \r | |
924 | **/\r | |
925 | BOOLEAN\r | |
926 | EFIAPI\r | |
927 | IsNodeAtEnd (\r | |
928 | IN CONST LIST_ENTRY *List,\r | |
929 | IN CONST LIST_ENTRY *Node\r | |
930 | );\r | |
931 | \r | |
932 | /**\r | |
933 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
934 | first node after the swap.\r | |
935 | \r | |
936 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
937 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
938 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
939 | same double linked list as FirstEntry and that double linked list must have\r | |
940 | been initialized with InitializeListHead(). SecondEntry is returned after the\r | |
941 | nodes are swapped.\r | |
942 | \r | |
943 | If FirstEntry is NULL, then ASSERT().\r | |
944 | If SecondEntry is NULL, then ASSERT().\r | |
945 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r | |
30817eb4 | 946 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
947 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
db8f40e2 | 948 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r |
30817eb4 | 949 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 950 | \r |
951 | @param FirstEntry A pointer to a node in a linked list.\r | |
952 | @param SecondEntry A pointer to another node in the same linked list.\r | |
953 | \r | |
954 | **/\r | |
955 | LIST_ENTRY *\r | |
956 | EFIAPI\r | |
957 | SwapListEntries (\r | |
958 | IN LIST_ENTRY *FirstEntry,\r | |
959 | IN LIST_ENTRY *SecondEntry\r | |
960 | );\r | |
961 | \r | |
962 | /**\r | |
963 | Removes a node from a doubly linked list, and returns the node that follows\r | |
964 | the removed node.\r | |
965 | \r | |
966 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
967 | this function to release the memory used by this node if that is required. On\r | |
968 | exit, the node following Entry in the doubly linked list is returned. If\r | |
969 | Entry is the only node in the linked list, then the head node of the linked\r | |
970 | list is returned.\r | |
971 | \r | |
972 | If Entry is NULL, then ASSERT().\r | |
973 | If Entry is the head node of an empty list, then ASSERT().\r | |
db8f40e2 | 974 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
975 | linked list containing Entry, including the Entry node, is greater than\r | |
30817eb4 | 976 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f | 977 | \r |
978 | @param Entry A pointer to a node in a linked list\r | |
979 | \r | |
980 | @return Entry\r | |
981 | \r | |
982 | **/\r | |
983 | LIST_ENTRY *\r | |
984 | EFIAPI\r | |
985 | RemoveEntryList (\r | |
986 | IN CONST LIST_ENTRY *Entry\r | |
987 | );\r | |
988 | \r | |
989 | //\r | |
990 | // Math Services\r | |
991 | //\r | |
992 | \r | |
993 | /**\r | |
994 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
995 | with zeros. The shifted value is returned.\r | |
996 | \r | |
997 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
998 | low Count bits are set to zero. The shifted value is returned.\r | |
999 | \r | |
1000 | If Count is greater than 63, then ASSERT().\r | |
1001 | \r | |
1002 | @param Operand The 64-bit operand to shift left.\r | |
1003 | @param Count The number of bits to shift left.\r | |
1004 | \r | |
1005 | @return Operand << Count\r | |
1006 | \r | |
1007 | **/\r | |
1008 | UINT64\r | |
1009 | EFIAPI\r | |
1010 | LShiftU64 (\r | |
1011 | IN UINT64 Operand,\r | |
1012 | IN UINTN Count\r | |
1013 | );\r | |
1014 | \r | |
1015 | /**\r | |
1016 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1017 | filled with zeros. The shifted value is returned.\r | |
1018 | \r | |
1019 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1020 | high Count bits are set to zero. The shifted value is returned.\r | |
1021 | \r | |
1022 | If Count is greater than 63, then ASSERT().\r | |
1023 | \r | |
1024 | @param Operand The 64-bit operand to shift right.\r | |
1025 | @param Count The number of bits to shift right.\r | |
1026 | \r | |
1027 | @return Operand >> Count\r | |
1028 | \r | |
1029 | **/\r | |
1030 | UINT64\r | |
1031 | EFIAPI\r | |
1032 | RShiftU64 (\r | |
1033 | IN UINT64 Operand,\r | |
1034 | IN UINTN Count\r | |
1035 | );\r | |
1036 | \r | |
1037 | /**\r | |
1038 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1039 | with original integer's bit 63. The shifted value is returned.\r | |
1040 | \r | |
1041 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1042 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1043 | \r | |
1044 | If Count is greater than 63, then ASSERT().\r | |
1045 | \r | |
1046 | @param Operand The 64-bit operand to shift right.\r | |
1047 | @param Count The number of bits to shift right.\r | |
1048 | \r | |
1049 | @return Operand >> Count\r | |
1050 | \r | |
1051 | **/\r | |
1052 | UINT64\r | |
1053 | EFIAPI\r | |
1054 | ARShiftU64 (\r | |
1055 | IN UINT64 Operand,\r | |
1056 | IN UINTN Count\r | |
1057 | );\r | |
1058 | \r | |
1059 | /**\r | |
1060 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1061 | with the high bits that were rotated.\r | |
1062 | \r | |
1063 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1064 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1065 | value is returned.\r | |
1066 | \r | |
1067 | If Count is greater than 31, then ASSERT().\r | |
1068 | \r | |
1069 | @param Operand The 32-bit operand to rotate left.\r | |
1070 | @param Count The number of bits to rotate left.\r | |
1071 | \r | |
1072 | @return Operand <<< Count\r | |
1073 | \r | |
1074 | **/\r | |
1075 | UINT32\r | |
1076 | EFIAPI\r | |
1077 | LRotU32 (\r | |
1078 | IN UINT32 Operand,\r | |
1079 | IN UINTN Count\r | |
1080 | );\r | |
1081 | \r | |
1082 | /**\r | |
1083 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1084 | with the low bits that were rotated.\r | |
1085 | \r | |
1086 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1087 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1088 | value is returned.\r | |
1089 | \r | |
1090 | If Count is greater than 31, then ASSERT().\r | |
1091 | \r | |
1092 | @param Operand The 32-bit operand to rotate right.\r | |
1093 | @param Count The number of bits to rotate right.\r | |
1094 | \r | |
1095 | @return Operand >>> Count\r | |
1096 | \r | |
1097 | **/\r | |
1098 | UINT32\r | |
1099 | EFIAPI\r | |
1100 | RRotU32 (\r | |
1101 | IN UINT32 Operand,\r | |
1102 | IN UINTN Count\r | |
1103 | );\r | |
1104 | \r | |
1105 | /**\r | |
1106 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1107 | with the high bits that were rotated.\r | |
1108 | \r | |
1109 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1110 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1111 | value is returned.\r | |
1112 | \r | |
1113 | If Count is greater than 63, then ASSERT().\r | |
1114 | \r | |
1115 | @param Operand The 64-bit operand to rotate left.\r | |
1116 | @param Count The number of bits to rotate left.\r | |
1117 | \r | |
1118 | @return Operand <<< Count\r | |
1119 | \r | |
1120 | **/\r | |
1121 | UINT64\r | |
1122 | EFIAPI\r | |
1123 | LRotU64 (\r | |
1124 | IN UINT64 Operand,\r | |
1125 | IN UINTN Count\r | |
1126 | );\r | |
1127 | \r | |
1128 | /**\r | |
1129 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1130 | with the high low bits that were rotated.\r | |
1131 | \r | |
1132 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1133 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1134 | value is returned.\r | |
1135 | \r | |
1136 | If Count is greater than 63, then ASSERT().\r | |
1137 | \r | |
1138 | @param Operand The 64-bit operand to rotate right.\r | |
1139 | @param Count The number of bits to rotate right.\r | |
1140 | \r | |
1141 | @return Operand >>> Count\r | |
1142 | \r | |
1143 | **/\r | |
1144 | UINT64\r | |
1145 | EFIAPI\r | |
1146 | RRotU64 (\r | |
1147 | IN UINT64 Operand,\r | |
1148 | IN UINTN Count\r | |
1149 | );\r | |
1150 | \r | |
1151 | /**\r | |
1152 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1153 | \r | |
1154 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1155 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1156 | Otherwise, a value between 0 and 31 is returned.\r | |
1157 | \r | |
1158 | @param Operand The 32-bit operand to evaluate.\r | |
1159 | \r | |
1160 | @return Position of the lowest bit set in Operand if found.\r | |
1161 | @retval -1 Operand is zero.\r | |
1162 | \r | |
1163 | **/\r | |
1164 | INTN\r | |
1165 | EFIAPI\r | |
1166 | LowBitSet32 (\r | |
1167 | IN UINT32 Operand\r | |
1168 | );\r | |
1169 | \r | |
1170 | /**\r | |
1171 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1172 | \r | |
1173 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1174 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1175 | Otherwise, a value between 0 and 63 is returned.\r | |
1176 | \r | |
1177 | @param Operand The 64-bit operand to evaluate.\r | |
1178 | \r | |
1179 | @return Position of the lowest bit set in Operand if found.\r | |
1180 | @retval -1 Operand is zero.\r | |
1181 | \r | |
1182 | **/\r | |
1183 | INTN\r | |
1184 | EFIAPI\r | |
1185 | LowBitSet64 (\r | |
1186 | IN UINT64 Operand\r | |
1187 | );\r | |
1188 | \r | |
1189 | /**\r | |
1190 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1191 | to log2(x).\r | |
1192 | \r | |
1193 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1194 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1195 | Otherwise, a value between 0 and 31 is returned.\r | |
1196 | \r | |
1197 | @param Operand The 32-bit operand to evaluate.\r | |
1198 | \r | |
1199 | @return Position of the highest bit set in Operand if found.\r | |
1200 | @retval -1 Operand is zero.\r | |
1201 | \r | |
1202 | **/\r | |
1203 | INTN\r | |
1204 | EFIAPI\r | |
1205 | HighBitSet32 (\r | |
1206 | IN UINT32 Operand\r | |
1207 | );\r | |
1208 | \r | |
1209 | /**\r | |
1210 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1211 | to log2(x).\r | |
1212 | \r | |
1213 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1214 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1215 | Otherwise, a value between 0 and 63 is returned.\r | |
1216 | \r | |
1217 | @param Operand The 64-bit operand to evaluate.\r | |
1218 | \r | |
1219 | @return Position of the highest bit set in Operand if found.\r | |
1220 | @retval -1 Operand is zero.\r | |
1221 | \r | |
1222 | **/\r | |
1223 | INTN\r | |
1224 | EFIAPI\r | |
1225 | HighBitSet64 (\r | |
1226 | IN UINT64 Operand\r | |
1227 | );\r | |
1228 | \r | |
1229 | /**\r | |
1230 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
1231 | 1 << HighBitSet32(x).\r | |
1232 | \r | |
1233 | This function computes the value of the highest bit set in the 32-bit value\r | |
1234 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1235 | \r | |
1236 | @param Operand The 32-bit operand to evaluate.\r | |
1237 | \r | |
1238 | @return 1 << HighBitSet32(Operand)\r | |
1239 | @retval 0 Operand is zero.\r | |
1240 | \r | |
1241 | **/\r | |
1242 | UINT32\r | |
1243 | EFIAPI\r | |
1244 | GetPowerOfTwo32 (\r | |
1245 | IN UINT32 Operand\r | |
1246 | );\r | |
1247 | \r | |
1248 | /**\r | |
1249 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
1250 | 1 << HighBitSet64(x).\r | |
1251 | \r | |
1252 | This function computes the value of the highest bit set in the 64-bit value\r | |
1253 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1254 | \r | |
1255 | @param Operand The 64-bit operand to evaluate.\r | |
1256 | \r | |
1257 | @return 1 << HighBitSet64(Operand)\r | |
1258 | @retval 0 Operand is zero.\r | |
1259 | \r | |
1260 | **/\r | |
1261 | UINT64\r | |
1262 | EFIAPI\r | |
1263 | GetPowerOfTwo64 (\r | |
1264 | IN UINT64 Operand\r | |
1265 | );\r | |
1266 | \r | |
1267 | /**\r | |
1268 | Switches the endianess of a 16-bit integer.\r | |
1269 | \r | |
1270 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1271 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1272 | returned.\r | |
1273 | \r | |
1274 | @param Operand A 16-bit unsigned value.\r | |
1275 | \r | |
1276 | @return The byte swaped Operand.\r | |
1277 | \r | |
1278 | **/\r | |
1279 | UINT16\r | |
1280 | EFIAPI\r | |
1281 | SwapBytes16 (\r | |
1282 | IN UINT16 Value\r | |
1283 | );\r | |
1284 | \r | |
1285 | /**\r | |
1286 | Switches the endianess of a 32-bit integer.\r | |
1287 | \r | |
1288 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1289 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1290 | returned.\r | |
1291 | \r | |
1292 | @param Operand A 32-bit unsigned value.\r | |
1293 | \r | |
1294 | @return The byte swaped Operand.\r | |
1295 | \r | |
1296 | **/\r | |
1297 | UINT32\r | |
1298 | EFIAPI\r | |
1299 | SwapBytes32 (\r | |
1300 | IN UINT32 Value\r | |
1301 | );\r | |
1302 | \r | |
1303 | /**\r | |
1304 | Switches the endianess of a 64-bit integer.\r | |
1305 | \r | |
1306 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1307 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1308 | returned.\r | |
1309 | \r | |
1310 | @param Operand A 64-bit unsigned value.\r | |
1311 | \r | |
1312 | @return The byte swaped Operand.\r | |
1313 | \r | |
1314 | **/\r | |
1315 | UINT64\r | |
1316 | EFIAPI\r | |
1317 | SwapBytes64 (\r | |
1318 | IN UINT64 Value\r | |
1319 | );\r | |
1320 | \r | |
1321 | /**\r | |
1322 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1323 | generates a 64-bit unsigned result.\r | |
1324 | \r | |
1325 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1326 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1327 | bit unsigned result is returned.\r | |
1328 | \r | |
1329 | If the result overflows, then ASSERT().\r | |
1330 | \r | |
1331 | @param Multiplicand A 64-bit unsigned value.\r | |
1332 | @param Multiplier A 32-bit unsigned value.\r | |
1333 | \r | |
1334 | @return Multiplicand * Multiplier\r | |
1335 | \r | |
1336 | **/\r | |
1337 | UINT64\r | |
1338 | EFIAPI\r | |
1339 | MultU64x32 (\r | |
1340 | IN UINT64 Multiplicand,\r | |
1341 | IN UINT32 Multiplier\r | |
1342 | );\r | |
1343 | \r | |
1344 | /**\r | |
1345 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1346 | generates a 64-bit unsigned result.\r | |
1347 | \r | |
1348 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1349 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1350 | bit unsigned result is returned.\r | |
1351 | \r | |
1352 | If the result overflows, then ASSERT().\r | |
1353 | \r | |
1354 | @param Multiplicand A 64-bit unsigned value.\r | |
1355 | @param Multiplier A 64-bit unsigned value.\r | |
1356 | \r | |
1357 | @return Multiplicand * Multiplier\r | |
1358 | \r | |
1359 | **/\r | |
1360 | UINT64\r | |
1361 | EFIAPI\r | |
1362 | MultU64x64 (\r | |
1363 | IN UINT64 Multiplicand,\r | |
1364 | IN UINT64 Multiplier\r | |
1365 | );\r | |
1366 | \r | |
1367 | /**\r | |
1368 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1369 | 64-bit signed result.\r | |
1370 | \r | |
1371 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
1372 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
1373 | signed result is returned.\r | |
1374 | \r | |
1375 | If the result overflows, then ASSERT().\r | |
1376 | \r | |
1377 | @param Multiplicand A 64-bit signed value.\r | |
1378 | @param Multiplier A 64-bit signed value.\r | |
1379 | \r | |
1380 | @return Multiplicand * Multiplier\r | |
1381 | \r | |
1382 | **/\r | |
1383 | INT64\r | |
1384 | EFIAPI\r | |
1385 | MultS64x64 (\r | |
1386 | IN INT64 Multiplicand,\r | |
1387 | IN INT64 Multiplier\r | |
1388 | );\r | |
1389 | \r | |
1390 | /**\r | |
1391 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1392 | a 64-bit unsigned result.\r | |
1393 | \r | |
1394 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1395 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
1396 | function returns the 64-bit unsigned quotient.\r | |
1397 | \r | |
1398 | If Divisor is 0, then ASSERT().\r | |
1399 | \r | |
1400 | @param Dividend A 64-bit unsigned value.\r | |
1401 | @param Divisor A 32-bit unsigned value.\r | |
1402 | \r | |
1403 | @return Dividend / Divisor\r | |
1404 | \r | |
1405 | **/\r | |
1406 | UINT64\r | |
1407 | EFIAPI\r | |
1408 | DivU64x32 (\r | |
1409 | IN UINT64 Dividend,\r | |
1410 | IN UINT32 Divisor\r | |
1411 | );\r | |
1412 | \r | |
1413 | /**\r | |
1414 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1415 | a 32-bit unsigned remainder.\r | |
1416 | \r | |
1417 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1418 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
1419 | returns the 32-bit unsigned remainder.\r | |
1420 | \r | |
1421 | If Divisor is 0, then ASSERT().\r | |
1422 | \r | |
1423 | @param Dividend A 64-bit unsigned value.\r | |
1424 | @param Divisor A 32-bit unsigned value.\r | |
1425 | \r | |
1426 | @return Dividend % Divisor\r | |
1427 | \r | |
1428 | **/\r | |
1429 | UINT32\r | |
1430 | EFIAPI\r | |
1431 | ModU64x32 (\r | |
1432 | IN UINT64 Dividend,\r | |
1433 | IN UINT32 Divisor\r | |
1434 | );\r | |
1435 | \r | |
1436 | /**\r | |
1437 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1438 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
1439 | \r | |
1440 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1441 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
1442 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
1443 | This function returns the 64-bit unsigned quotient.\r | |
1444 | \r | |
1445 | If Divisor is 0, then ASSERT().\r | |
1446 | \r | |
1447 | @param Dividend A 64-bit unsigned value.\r | |
1448 | @param Divisor A 32-bit unsigned value.\r | |
1449 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
1450 | optional and may be NULL.\r | |
1451 | \r | |
1452 | @return Dividend / Divisor\r | |
1453 | \r | |
1454 | **/\r | |
1455 | UINT64\r | |
1456 | EFIAPI\r | |
1457 | DivU64x32Remainder (\r | |
1458 | IN UINT64 Dividend,\r | |
1459 | IN UINT32 Divisor,\r | |
1460 | OUT UINT32 *Remainder OPTIONAL\r | |
1461 | );\r | |
1462 | \r | |
1463 | /**\r | |
1464 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
1465 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
1466 | \r | |
1467 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
1468 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
1469 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
1470 | This function returns the 64-bit unsigned quotient.\r | |
1471 | \r | |
1472 | If Divisor is 0, then ASSERT().\r | |
1473 | \r | |
1474 | @param Dividend A 64-bit unsigned value.\r | |
1475 | @param Divisor A 64-bit unsigned value.\r | |
1476 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
1477 | optional and may be NULL.\r | |
1478 | \r | |
1479 | @return Dividend / Divisor\r | |
1480 | \r | |
1481 | **/\r | |
1482 | UINT64\r | |
1483 | EFIAPI\r | |
1484 | DivU64x64Remainder (\r | |
1485 | IN UINT64 Dividend,\r | |
1486 | IN UINT64 Divisor,\r | |
1487 | OUT UINT64 *Remainder OPTIONAL\r | |
1488 | );\r | |
1489 | \r | |
1490 | /**\r | |
1491 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1492 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
1493 | \r | |
1494 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
1495 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
1496 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
1497 | function returns the 64-bit signed quotient.\r | |
1498 | \r | |
1499 | If Divisor is 0, then ASSERT().\r | |
1500 | \r | |
1501 | @param Dividend A 64-bit signed value.\r | |
1502 | @param Divisor A 64-bit signed value.\r | |
1503 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
1504 | optional and may be NULL.\r | |
1505 | \r | |
1506 | @return Dividend / Divisor\r | |
1507 | \r | |
1508 | **/\r | |
1509 | INT64\r | |
1510 | EFIAPI\r | |
1511 | DivS64x64Remainder (\r | |
1512 | IN INT64 Dividend,\r | |
1513 | IN INT64 Divisor,\r | |
1514 | OUT INT64 *Remainder OPTIONAL\r | |
1515 | );\r | |
1516 | \r | |
1517 | /**\r | |
1518 | Reads a 16-bit value from memory that may be unaligned.\r | |
1519 | \r | |
1520 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
1521 | guarantees that the read operation does not produce an alignment fault.\r | |
1522 | \r | |
1523 | If the Buffer is NULL, then ASSERT().\r | |
1524 | \r | |
1525 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
1526 | \r | |
1527 | @return *Uint16\r | |
1528 | \r | |
1529 | **/\r | |
1530 | UINT16\r | |
1531 | EFIAPI\r | |
1532 | ReadUnaligned16 (\r | |
1533 | IN CONST UINT16 *Uint16\r | |
1534 | );\r | |
1535 | \r | |
1536 | /**\r | |
1537 | Writes a 16-bit value to memory that may be unaligned.\r | |
1538 | \r | |
1539 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
1540 | returned. The function guarantees that the write operation does not produce\r | |
1541 | an alignment fault.\r | |
1542 | \r | |
1543 | If the Buffer is NULL, then ASSERT().\r | |
1544 | \r | |
1545 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
1546 | @param Value 16-bit value to write to Buffer.\r | |
1547 | \r | |
1548 | @return Value\r | |
1549 | \r | |
1550 | **/\r | |
1551 | UINT16\r | |
1552 | EFIAPI\r | |
1553 | WriteUnaligned16 (\r | |
1554 | OUT UINT16 *Uint16,\r | |
1555 | IN UINT16 Value\r | |
1556 | );\r | |
1557 | \r | |
1558 | /**\r | |
1559 | Reads a 24-bit value from memory that may be unaligned.\r | |
1560 | \r | |
1561 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
1562 | guarantees that the read operation does not produce an alignment fault.\r | |
1563 | \r | |
1564 | If the Buffer is NULL, then ASSERT().\r | |
1565 | \r | |
1566 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
1567 | \r | |
1568 | @return The value read.\r | |
1569 | \r | |
1570 | **/\r | |
1571 | UINT32\r | |
1572 | EFIAPI\r | |
1573 | ReadUnaligned24 (\r | |
1574 | IN CONST UINT32 *Buffer\r | |
1575 | );\r | |
1576 | \r | |
1577 | /**\r | |
1578 | Writes a 24-bit value to memory that may be unaligned.\r | |
1579 | \r | |
1580 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
1581 | returned. The function guarantees that the write operation does not produce\r | |
1582 | an alignment fault.\r | |
1583 | \r | |
1584 | If the Buffer is NULL, then ASSERT().\r | |
1585 | \r | |
1586 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
1587 | @param Value 24-bit value to write to Buffer.\r | |
1588 | \r | |
1589 | @return The value written.\r | |
1590 | \r | |
1591 | **/\r | |
1592 | UINT32\r | |
1593 | EFIAPI\r | |
1594 | WriteUnaligned24 (\r | |
1595 | OUT UINT32 *Buffer,\r | |
1596 | IN UINT32 Value\r | |
1597 | );\r | |
1598 | \r | |
1599 | /**\r | |
1600 | Reads a 32-bit value from memory that may be unaligned.\r | |
1601 | \r | |
1602 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
1603 | guarantees that the read operation does not produce an alignment fault.\r | |
1604 | \r | |
1605 | If the Buffer is NULL, then ASSERT().\r | |
1606 | \r | |
1607 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
1608 | \r | |
1609 | @return *Uint32\r | |
1610 | \r | |
1611 | **/\r | |
1612 | UINT32\r | |
1613 | EFIAPI\r | |
1614 | ReadUnaligned32 (\r | |
1615 | IN CONST UINT32 *Uint32\r | |
1616 | );\r | |
1617 | \r | |
1618 | /**\r | |
1619 | Writes a 32-bit value to memory that may be unaligned.\r | |
1620 | \r | |
1621 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
1622 | returned. The function guarantees that the write operation does not produce\r | |
1623 | an alignment fault.\r | |
1624 | \r | |
1625 | If the Buffer is NULL, then ASSERT().\r | |
1626 | \r | |
1627 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
1628 | @param Value 32-bit value to write to Buffer.\r | |
1629 | \r | |
1630 | @return Value\r | |
1631 | \r | |
1632 | **/\r | |
1633 | UINT32\r | |
1634 | EFIAPI\r | |
1635 | WriteUnaligned32 (\r | |
1636 | OUT UINT32 *Uint32,\r | |
1637 | IN UINT32 Value\r | |
1638 | );\r | |
1639 | \r | |
1640 | /**\r | |
1641 | Reads a 64-bit value from memory that may be unaligned.\r | |
1642 | \r | |
1643 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
1644 | guarantees that the read operation does not produce an alignment fault.\r | |
1645 | \r | |
1646 | If the Buffer is NULL, then ASSERT().\r | |
1647 | \r | |
1648 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
1649 | \r | |
1650 | @return *Uint64\r | |
1651 | \r | |
1652 | **/\r | |
1653 | UINT64\r | |
1654 | EFIAPI\r | |
1655 | ReadUnaligned64 (\r | |
1656 | IN CONST UINT64 *Uint64\r | |
1657 | );\r | |
1658 | \r | |
1659 | /**\r | |
1660 | Writes a 64-bit value to memory that may be unaligned.\r | |
1661 | \r | |
1662 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
1663 | returned. The function guarantees that the write operation does not produce\r | |
1664 | an alignment fault.\r | |
1665 | \r | |
1666 | If the Buffer is NULL, then ASSERT().\r | |
1667 | \r | |
1668 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
1669 | @param Value 64-bit value to write to Buffer.\r | |
1670 | \r | |
1671 | @return Value\r | |
1672 | \r | |
1673 | **/\r | |
1674 | UINT64\r | |
1675 | EFIAPI\r | |
1676 | WriteUnaligned64 (\r | |
1677 | OUT UINT64 *Uint64,\r | |
1678 | IN UINT64 Value\r | |
1679 | );\r | |
1680 | \r | |
1681 | //\r | |
1682 | // Bit Field Functions\r | |
1683 | //\r | |
1684 | \r | |
1685 | /**\r | |
1686 | Returns a bit field from an 8-bit value.\r | |
1687 | \r | |
1688 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
1689 | \r | |
1690 | If 8-bit operations are not supported, then ASSERT().\r | |
1691 | If StartBit is greater than 7, then ASSERT().\r | |
1692 | If EndBit is greater than 7, then ASSERT().\r | |
0ffa1286 | 1693 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1694 | \r |
1695 | @param Operand Operand on which to perform the bitfield operation.\r | |
1696 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1697 | Range 0..7.\r | |
1698 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1699 | Range 0..7.\r | |
1700 | \r | |
1701 | @return The bit field read.\r | |
1702 | \r | |
1703 | **/\r | |
1704 | UINT8\r | |
1705 | EFIAPI\r | |
1706 | BitFieldRead8 (\r | |
1707 | IN UINT8 Operand,\r | |
1708 | IN UINTN StartBit,\r | |
1709 | IN UINTN EndBit\r | |
1710 | );\r | |
1711 | \r | |
1712 | /**\r | |
1713 | Writes a bit field to an 8-bit value, and returns the result.\r | |
1714 | \r | |
1715 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
1716 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
1717 | returned.\r | |
1718 | \r | |
1719 | If 8-bit operations are not supported, then ASSERT().\r | |
1720 | If StartBit is greater than 7, then ASSERT().\r | |
1721 | If EndBit is greater than 7, then ASSERT().\r | |
0ffa1286 | 1722 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1723 | \r |
1724 | @param Operand Operand on which to perform the bitfield operation.\r | |
1725 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1726 | Range 0..7.\r | |
1727 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1728 | Range 0..7.\r | |
1729 | @param Value New value of the bit field.\r | |
1730 | \r | |
1731 | @return The new 8-bit value.\r | |
1732 | \r | |
1733 | **/\r | |
1734 | UINT8\r | |
1735 | EFIAPI\r | |
1736 | BitFieldWrite8 (\r | |
1737 | IN UINT8 Operand,\r | |
1738 | IN UINTN StartBit,\r | |
1739 | IN UINTN EndBit,\r | |
1740 | IN UINT8 Value\r | |
1741 | );\r | |
1742 | \r | |
1743 | /**\r | |
1744 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
1745 | result.\r | |
1746 | \r | |
1747 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
1748 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
1749 | Operand are preserved. The new 8-bit value is returned.\r | |
1750 | \r | |
1751 | If 8-bit operations are not supported, then ASSERT().\r | |
1752 | If StartBit is greater than 7, then ASSERT().\r | |
1753 | If EndBit is greater than 7, then ASSERT().\r | |
0ffa1286 | 1754 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1755 | \r |
1756 | @param Operand Operand on which to perform the bitfield operation.\r | |
1757 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1758 | Range 0..7.\r | |
1759 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1760 | Range 0..7.\r | |
1761 | @param OrData The value to OR with the read value from the value\r | |
1762 | \r | |
1763 | @return The new 8-bit value.\r | |
1764 | \r | |
1765 | **/\r | |
1766 | UINT8\r | |
1767 | EFIAPI\r | |
1768 | BitFieldOr8 (\r | |
1769 | IN UINT8 Operand,\r | |
1770 | IN UINTN StartBit,\r | |
1771 | IN UINTN EndBit,\r | |
1772 | IN UINT8 OrData\r | |
1773 | );\r | |
1774 | \r | |
1775 | /**\r | |
1776 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
1777 | the result.\r | |
1778 | \r | |
1779 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1780 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
1781 | preserved. The new 8-bit value is returned.\r | |
1782 | \r | |
1783 | If 8-bit operations are not supported, then ASSERT().\r | |
1784 | If StartBit is greater than 7, then ASSERT().\r | |
1785 | If EndBit is greater than 7, then ASSERT().\r | |
0ffa1286 | 1786 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1787 | \r |
1788 | @param Operand Operand on which to perform the bitfield operation.\r | |
1789 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1790 | Range 0..7.\r | |
1791 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1792 | Range 0..7.\r | |
1793 | @param AndData The value to AND with the read value from the value.\r | |
1794 | \r | |
1795 | @return The new 8-bit value.\r | |
1796 | \r | |
1797 | **/\r | |
1798 | UINT8\r | |
1799 | EFIAPI\r | |
1800 | BitFieldAnd8 (\r | |
1801 | IN UINT8 Operand,\r | |
1802 | IN UINTN StartBit,\r | |
1803 | IN UINTN EndBit,\r | |
1804 | IN UINT8 AndData\r | |
1805 | );\r | |
1806 | \r | |
1807 | /**\r | |
1808 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
1809 | bitwise OR, and returns the result.\r | |
1810 | \r | |
1811 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1812 | in Operand and the value specified by AndData, followed by a bitwise\r | |
1813 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
1814 | preserved. The new 8-bit value is returned.\r | |
1815 | \r | |
1816 | If 8-bit operations are not supported, then ASSERT().\r | |
1817 | If StartBit is greater than 7, then ASSERT().\r | |
1818 | If EndBit is greater than 7, then ASSERT().\r | |
0ffa1286 | 1819 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1820 | \r |
1821 | @param Operand Operand on which to perform the bitfield operation.\r | |
1822 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1823 | Range 0..7.\r | |
1824 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1825 | Range 0..7.\r | |
1826 | @param AndData The value to AND with the read value from the value.\r | |
1827 | @param OrData The value to OR with the result of the AND operation.\r | |
1828 | \r | |
1829 | @return The new 8-bit value.\r | |
1830 | \r | |
1831 | **/\r | |
1832 | UINT8\r | |
1833 | EFIAPI\r | |
1834 | BitFieldAndThenOr8 (\r | |
1835 | IN UINT8 Operand,\r | |
1836 | IN UINTN StartBit,\r | |
1837 | IN UINTN EndBit,\r | |
1838 | IN UINT8 AndData,\r | |
1839 | IN UINT8 OrData\r | |
1840 | );\r | |
1841 | \r | |
1842 | /**\r | |
1843 | Returns a bit field from a 16-bit value.\r | |
1844 | \r | |
1845 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
1846 | \r | |
1847 | If 16-bit operations are not supported, then ASSERT().\r | |
1848 | If StartBit is greater than 15, then ASSERT().\r | |
1849 | If EndBit is greater than 15, then ASSERT().\r | |
0ffa1286 | 1850 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1851 | \r |
1852 | @param Operand Operand on which to perform the bitfield operation.\r | |
1853 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1854 | Range 0..15.\r | |
1855 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1856 | Range 0..15.\r | |
1857 | \r | |
1858 | @return The bit field read.\r | |
1859 | \r | |
1860 | **/\r | |
1861 | UINT16\r | |
1862 | EFIAPI\r | |
1863 | BitFieldRead16 (\r | |
1864 | IN UINT16 Operand,\r | |
1865 | IN UINTN StartBit,\r | |
1866 | IN UINTN EndBit\r | |
1867 | );\r | |
1868 | \r | |
1869 | /**\r | |
1870 | Writes a bit field to a 16-bit value, and returns the result.\r | |
1871 | \r | |
1872 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
1873 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
1874 | returned.\r | |
1875 | \r | |
1876 | If 16-bit operations are not supported, then ASSERT().\r | |
1877 | If StartBit is greater than 15, then ASSERT().\r | |
1878 | If EndBit is greater than 15, then ASSERT().\r | |
0ffa1286 | 1879 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1880 | \r |
1881 | @param Operand Operand on which to perform the bitfield operation.\r | |
1882 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1883 | Range 0..15.\r | |
1884 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1885 | Range 0..15.\r | |
1886 | @param Value New value of the bit field.\r | |
1887 | \r | |
1888 | @return The new 16-bit value.\r | |
1889 | \r | |
1890 | **/\r | |
1891 | UINT16\r | |
1892 | EFIAPI\r | |
1893 | BitFieldWrite16 (\r | |
1894 | IN UINT16 Operand,\r | |
1895 | IN UINTN StartBit,\r | |
1896 | IN UINTN EndBit,\r | |
1897 | IN UINT16 Value\r | |
1898 | );\r | |
1899 | \r | |
1900 | /**\r | |
1901 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
1902 | result.\r | |
1903 | \r | |
1904 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
1905 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
1906 | Operand are preserved. The new 16-bit value is returned.\r | |
1907 | \r | |
1908 | If 16-bit operations are not supported, then ASSERT().\r | |
1909 | If StartBit is greater than 15, then ASSERT().\r | |
1910 | If EndBit is greater than 15, then ASSERT().\r | |
0ffa1286 | 1911 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1912 | \r |
1913 | @param Operand Operand on which to perform the bitfield operation.\r | |
1914 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1915 | Range 0..15.\r | |
1916 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1917 | Range 0..15.\r | |
1918 | @param OrData The value to OR with the read value from the value\r | |
1919 | \r | |
1920 | @return The new 16-bit value.\r | |
1921 | \r | |
1922 | **/\r | |
1923 | UINT16\r | |
1924 | EFIAPI\r | |
1925 | BitFieldOr16 (\r | |
1926 | IN UINT16 Operand,\r | |
1927 | IN UINTN StartBit,\r | |
1928 | IN UINTN EndBit,\r | |
1929 | IN UINT16 OrData\r | |
1930 | );\r | |
1931 | \r | |
1932 | /**\r | |
1933 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
1934 | the result.\r | |
1935 | \r | |
1936 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1937 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
1938 | preserved. The new 16-bit value is returned.\r | |
1939 | \r | |
1940 | If 16-bit operations are not supported, then ASSERT().\r | |
1941 | If StartBit is greater than 15, then ASSERT().\r | |
1942 | If EndBit is greater than 15, then ASSERT().\r | |
0ffa1286 | 1943 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1944 | \r |
1945 | @param Operand Operand on which to perform the bitfield operation.\r | |
1946 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1947 | Range 0..15.\r | |
1948 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1949 | Range 0..15.\r | |
1950 | @param AndData The value to AND with the read value from the value\r | |
1951 | \r | |
1952 | @return The new 16-bit value.\r | |
1953 | \r | |
1954 | **/\r | |
1955 | UINT16\r | |
1956 | EFIAPI\r | |
1957 | BitFieldAnd16 (\r | |
1958 | IN UINT16 Operand,\r | |
1959 | IN UINTN StartBit,\r | |
1960 | IN UINTN EndBit,\r | |
1961 | IN UINT16 AndData\r | |
1962 | );\r | |
1963 | \r | |
1964 | /**\r | |
1965 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
1966 | bitwise OR, and returns the result.\r | |
1967 | \r | |
1968 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1969 | in Operand and the value specified by AndData, followed by a bitwise\r | |
1970 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
1971 | preserved. The new 16-bit value is returned.\r | |
1972 | \r | |
1973 | If 16-bit operations are not supported, then ASSERT().\r | |
1974 | If StartBit is greater than 15, then ASSERT().\r | |
1975 | If EndBit is greater than 15, then ASSERT().\r | |
0ffa1286 | 1976 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 1977 | \r |
1978 | @param Operand Operand on which to perform the bitfield operation.\r | |
1979 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1980 | Range 0..15.\r | |
1981 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1982 | Range 0..15.\r | |
1983 | @param AndData The value to AND with the read value from the value.\r | |
1984 | @param OrData The value to OR with the result of the AND operation.\r | |
1985 | \r | |
1986 | @return The new 16-bit value.\r | |
1987 | \r | |
1988 | **/\r | |
1989 | UINT16\r | |
1990 | EFIAPI\r | |
1991 | BitFieldAndThenOr16 (\r | |
1992 | IN UINT16 Operand,\r | |
1993 | IN UINTN StartBit,\r | |
1994 | IN UINTN EndBit,\r | |
1995 | IN UINT16 AndData,\r | |
1996 | IN UINT16 OrData\r | |
1997 | );\r | |
1998 | \r | |
1999 | /**\r | |
2000 | Returns a bit field from a 32-bit value.\r | |
2001 | \r | |
2002 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2003 | \r | |
2004 | If 32-bit operations are not supported, then ASSERT().\r | |
2005 | If StartBit is greater than 31, then ASSERT().\r | |
2006 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 2007 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2008 | \r |
2009 | @param Operand Operand on which to perform the bitfield operation.\r | |
2010 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2011 | Range 0..31.\r | |
2012 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2013 | Range 0..31.\r | |
2014 | \r | |
2015 | @return The bit field read.\r | |
2016 | \r | |
2017 | **/\r | |
2018 | UINT32\r | |
2019 | EFIAPI\r | |
2020 | BitFieldRead32 (\r | |
2021 | IN UINT32 Operand,\r | |
2022 | IN UINTN StartBit,\r | |
2023 | IN UINTN EndBit\r | |
2024 | );\r | |
2025 | \r | |
2026 | /**\r | |
2027 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2028 | \r | |
2029 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2030 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2031 | returned.\r | |
2032 | \r | |
2033 | If 32-bit operations are not supported, then ASSERT().\r | |
2034 | If StartBit is greater than 31, then ASSERT().\r | |
2035 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 2036 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2037 | \r |
2038 | @param Operand Operand on which to perform the bitfield operation.\r | |
2039 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2040 | Range 0..31.\r | |
2041 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2042 | Range 0..31.\r | |
2043 | @param Value New value of the bit field.\r | |
2044 | \r | |
2045 | @return The new 32-bit value.\r | |
2046 | \r | |
2047 | **/\r | |
2048 | UINT32\r | |
2049 | EFIAPI\r | |
2050 | BitFieldWrite32 (\r | |
2051 | IN UINT32 Operand,\r | |
2052 | IN UINTN StartBit,\r | |
2053 | IN UINTN EndBit,\r | |
2054 | IN UINT32 Value\r | |
2055 | );\r | |
2056 | \r | |
2057 | /**\r | |
2058 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2059 | result.\r | |
2060 | \r | |
2061 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2062 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2063 | Operand are preserved. The new 32-bit value is returned.\r | |
2064 | \r | |
2065 | If 32-bit operations are not supported, then ASSERT().\r | |
2066 | If StartBit is greater than 31, then ASSERT().\r | |
2067 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 2068 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2069 | \r |
2070 | @param Operand Operand on which to perform the bitfield operation.\r | |
2071 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2072 | Range 0..31.\r | |
2073 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2074 | Range 0..31.\r | |
2075 | @param OrData The value to OR with the read value from the value\r | |
2076 | \r | |
2077 | @return The new 32-bit value.\r | |
2078 | \r | |
2079 | **/\r | |
2080 | UINT32\r | |
2081 | EFIAPI\r | |
2082 | BitFieldOr32 (\r | |
2083 | IN UINT32 Operand,\r | |
2084 | IN UINTN StartBit,\r | |
2085 | IN UINTN EndBit,\r | |
2086 | IN UINT32 OrData\r | |
2087 | );\r | |
2088 | \r | |
2089 | /**\r | |
2090 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2091 | the result.\r | |
2092 | \r | |
2093 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2094 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2095 | preserved. The new 32-bit value is returned.\r | |
2096 | \r | |
2097 | If 32-bit operations are not supported, then ASSERT().\r | |
2098 | If StartBit is greater than 31, then ASSERT().\r | |
2099 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 2100 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2101 | \r |
2102 | @param Operand Operand on which to perform the bitfield operation.\r | |
2103 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2104 | Range 0..31.\r | |
2105 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2106 | Range 0..31.\r | |
2107 | @param AndData The value to AND with the read value from the value\r | |
2108 | \r | |
2109 | @return The new 32-bit value.\r | |
2110 | \r | |
2111 | **/\r | |
2112 | UINT32\r | |
2113 | EFIAPI\r | |
2114 | BitFieldAnd32 (\r | |
2115 | IN UINT32 Operand,\r | |
2116 | IN UINTN StartBit,\r | |
2117 | IN UINTN EndBit,\r | |
2118 | IN UINT32 AndData\r | |
2119 | );\r | |
2120 | \r | |
2121 | /**\r | |
2122 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2123 | bitwise OR, and returns the result.\r | |
2124 | \r | |
2125 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2126 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2127 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2128 | preserved. The new 32-bit value is returned.\r | |
2129 | \r | |
2130 | If 32-bit operations are not supported, then ASSERT().\r | |
2131 | If StartBit is greater than 31, then ASSERT().\r | |
2132 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 2133 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2134 | \r |
2135 | @param Operand Operand on which to perform the bitfield operation.\r | |
2136 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2137 | Range 0..31.\r | |
2138 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2139 | Range 0..31.\r | |
2140 | @param AndData The value to AND with the read value from the value.\r | |
2141 | @param OrData The value to OR with the result of the AND operation.\r | |
2142 | \r | |
2143 | @return The new 32-bit value.\r | |
2144 | \r | |
2145 | **/\r | |
2146 | UINT32\r | |
2147 | EFIAPI\r | |
2148 | BitFieldAndThenOr32 (\r | |
2149 | IN UINT32 Operand,\r | |
2150 | IN UINTN StartBit,\r | |
2151 | IN UINTN EndBit,\r | |
2152 | IN UINT32 AndData,\r | |
2153 | IN UINT32 OrData\r | |
2154 | );\r | |
2155 | \r | |
2156 | /**\r | |
2157 | Returns a bit field from a 64-bit value.\r | |
2158 | \r | |
2159 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2160 | \r | |
2161 | If 64-bit operations are not supported, then ASSERT().\r | |
2162 | If StartBit is greater than 63, then ASSERT().\r | |
2163 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 2164 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2165 | \r |
2166 | @param Operand Operand on which to perform the bitfield operation.\r | |
2167 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2168 | Range 0..63.\r | |
2169 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2170 | Range 0..63.\r | |
2171 | \r | |
2172 | @return The bit field read.\r | |
2173 | \r | |
2174 | **/\r | |
2175 | UINT64\r | |
2176 | EFIAPI\r | |
2177 | BitFieldRead64 (\r | |
2178 | IN UINT64 Operand,\r | |
2179 | IN UINTN StartBit,\r | |
2180 | IN UINTN EndBit\r | |
2181 | );\r | |
2182 | \r | |
2183 | /**\r | |
2184 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2185 | \r | |
2186 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2187 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2188 | returned.\r | |
2189 | \r | |
2190 | If 64-bit operations are not supported, then ASSERT().\r | |
2191 | If StartBit is greater than 63, then ASSERT().\r | |
2192 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 2193 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2194 | \r |
2195 | @param Operand Operand on which to perform the bitfield operation.\r | |
2196 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2197 | Range 0..63.\r | |
2198 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2199 | Range 0..63.\r | |
2200 | @param Value New value of the bit field.\r | |
2201 | \r | |
2202 | @return The new 64-bit value.\r | |
2203 | \r | |
2204 | **/\r | |
2205 | UINT64\r | |
2206 | EFIAPI\r | |
2207 | BitFieldWrite64 (\r | |
2208 | IN UINT64 Operand,\r | |
2209 | IN UINTN StartBit,\r | |
2210 | IN UINTN EndBit,\r | |
2211 | IN UINT64 Value\r | |
2212 | );\r | |
2213 | \r | |
2214 | /**\r | |
2215 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2216 | result.\r | |
2217 | \r | |
2218 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2219 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2220 | Operand are preserved. The new 64-bit value is returned.\r | |
2221 | \r | |
2222 | If 64-bit operations are not supported, then ASSERT().\r | |
2223 | If StartBit is greater than 63, then ASSERT().\r | |
2224 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 2225 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2226 | \r |
2227 | @param Operand Operand on which to perform the bitfield operation.\r | |
2228 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2229 | Range 0..63.\r | |
2230 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2231 | Range 0..63.\r | |
2232 | @param OrData The value to OR with the read value from the value\r | |
2233 | \r | |
2234 | @return The new 64-bit value.\r | |
2235 | \r | |
2236 | **/\r | |
2237 | UINT64\r | |
2238 | EFIAPI\r | |
2239 | BitFieldOr64 (\r | |
2240 | IN UINT64 Operand,\r | |
2241 | IN UINTN StartBit,\r | |
2242 | IN UINTN EndBit,\r | |
2243 | IN UINT64 OrData\r | |
2244 | );\r | |
2245 | \r | |
2246 | /**\r | |
2247 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2248 | the result.\r | |
2249 | \r | |
2250 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2251 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2252 | preserved. The new 64-bit value is returned.\r | |
2253 | \r | |
2254 | If 64-bit operations are not supported, then ASSERT().\r | |
2255 | If StartBit is greater than 63, then ASSERT().\r | |
2256 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 2257 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2258 | \r |
2259 | @param Operand Operand on which to perform the bitfield operation.\r | |
2260 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2261 | Range 0..63.\r | |
2262 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2263 | Range 0..63.\r | |
2264 | @param AndData The value to AND with the read value from the value\r | |
2265 | \r | |
2266 | @return The new 64-bit value.\r | |
2267 | \r | |
2268 | **/\r | |
2269 | UINT64\r | |
2270 | EFIAPI\r | |
2271 | BitFieldAnd64 (\r | |
2272 | IN UINT64 Operand,\r | |
2273 | IN UINTN StartBit,\r | |
2274 | IN UINTN EndBit,\r | |
2275 | IN UINT64 AndData\r | |
2276 | );\r | |
2277 | \r | |
2278 | /**\r | |
2279 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2280 | bitwise OR, and returns the result.\r | |
2281 | \r | |
2282 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2283 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2284 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2285 | preserved. The new 64-bit value is returned.\r | |
2286 | \r | |
2287 | If 64-bit operations are not supported, then ASSERT().\r | |
2288 | If StartBit is greater than 63, then ASSERT().\r | |
2289 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 2290 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 2291 | \r |
2292 | @param Operand Operand on which to perform the bitfield operation.\r | |
2293 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2294 | Range 0..63.\r | |
2295 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2296 | Range 0..63.\r | |
2297 | @param AndData The value to AND with the read value from the value.\r | |
2298 | @param OrData The value to OR with the result of the AND operation.\r | |
2299 | \r | |
2300 | @return The new 64-bit value.\r | |
2301 | \r | |
2302 | **/\r | |
2303 | UINT64\r | |
2304 | EFIAPI\r | |
2305 | BitFieldAndThenOr64 (\r | |
2306 | IN UINT64 Operand,\r | |
2307 | IN UINTN StartBit,\r | |
2308 | IN UINTN EndBit,\r | |
2309 | IN UINT64 AndData,\r | |
2310 | IN UINT64 OrData\r | |
2311 | );\r | |
2312 | \r | |
2313 | //\r | |
2314 | // Base Library Synchronization Functions\r | |
2315 | //\r | |
2316 | \r | |
2317 | /**\r | |
2318 | Retrieves the architecture specific spin lock alignment requirements for\r | |
2319 | optimal spin lock performance.\r | |
2320 | \r | |
2321 | This function retrieves the spin lock alignment requirements for optimal\r | |
2322 | performance on a given CPU architecture. The spin lock alignment must be a\r | |
2323 | power of two and is returned by this function. If there are no alignment\r | |
2324 | requirements, then 1 must be returned. The spin lock synchronization\r | |
2325 | functions must function correctly if the spin lock size and alignment values\r | |
2326 | returned by this function are not used at all. These values are hints to the\r | |
2327 | consumers of the spin lock synchronization functions to obtain optimal spin\r | |
2328 | lock performance.\r | |
2329 | \r | |
2330 | @return The architecture specific spin lock alignment.\r | |
2331 | \r | |
2332 | **/\r | |
2333 | UINTN\r | |
2334 | EFIAPI\r | |
2335 | GetSpinLockProperties (\r | |
2336 | VOID\r | |
2337 | );\r | |
2338 | \r | |
2339 | /**\r | |
2340 | Initializes a spin lock to the released state and returns the spin lock.\r | |
2341 | \r | |
2342 | This function initializes the spin lock specified by SpinLock to the released\r | |
2343 | state, and returns SpinLock. Optimal performance can be achieved by calling\r | |
2344 | GetSpinLockProperties() to determine the size and alignment requirements for\r | |
2345 | SpinLock.\r | |
2346 | \r | |
2347 | If SpinLock is NULL, then ASSERT().\r | |
2348 | \r | |
2349 | @param SpinLock A pointer to the spin lock to initialize to the released\r | |
2350 | state.\r | |
2351 | \r | |
2352 | @return SpinLock\r | |
2353 | \r | |
2354 | **/\r | |
2355 | SPIN_LOCK *\r | |
2356 | EFIAPI\r | |
2357 | InitializeSpinLock (\r | |
2358 | IN SPIN_LOCK *SpinLock\r | |
2359 | );\r | |
2360 | \r | |
2361 | /**\r | |
2362 | Waits until a spin lock can be placed in the acquired state.\r | |
2363 | \r | |
2364 | This function checks the state of the spin lock specified by SpinLock. If\r | |
2365 | SpinLock is in the released state, then this function places SpinLock in the\r | |
2366 | acquired state and returns SpinLock. Otherwise, this function waits\r | |
2367 | indefinitely for the spin lock to be released, and then places it in the\r | |
2368 | acquired state and returns SpinLock. All state transitions of SpinLock must\r | |
2369 | be performed using MP safe mechanisms.\r | |
2370 | \r | |
2371 | If SpinLock is NULL, then ASSERT().\r | |
2372 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2373 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r | |
2374 | PcdSpinLockTimeout microseconds, then ASSERT().\r | |
2375 | \r | |
2376 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
2377 | \r | |
2378 | @return SpinLock\r | |
2379 | \r | |
2380 | **/\r | |
2381 | SPIN_LOCK *\r | |
2382 | EFIAPI\r | |
2383 | AcquireSpinLock (\r | |
2384 | IN SPIN_LOCK *SpinLock\r | |
2385 | );\r | |
2386 | \r | |
2387 | /**\r | |
2388 | Attempts to place a spin lock in the acquired state.\r | |
2389 | \r | |
2390 | This function checks the state of the spin lock specified by SpinLock. If\r | |
2391 | SpinLock is in the released state, then this function places SpinLock in the\r | |
2392 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r | |
2393 | transitions of SpinLock must be performed using MP safe mechanisms.\r | |
2394 | \r | |
2395 | If SpinLock is NULL, then ASSERT().\r | |
2396 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2397 | \r | |
2398 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
2399 | \r | |
2400 | @retval TRUE SpinLock was placed in the acquired state.\r | |
2401 | @retval FALSE SpinLock could not be acquired.\r | |
2402 | \r | |
2403 | **/\r | |
2404 | BOOLEAN\r | |
2405 | EFIAPI\r | |
2406 | AcquireSpinLockOrFail (\r | |
2407 | IN SPIN_LOCK *SpinLock\r | |
2408 | );\r | |
2409 | \r | |
2410 | /**\r | |
2411 | Releases a spin lock.\r | |
2412 | \r | |
2413 | This function places the spin lock specified by SpinLock in the release state\r | |
2414 | and returns SpinLock.\r | |
2415 | \r | |
2416 | If SpinLock is NULL, then ASSERT().\r | |
2417 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2418 | \r | |
2419 | @param SpinLock A pointer to the spin lock to release.\r | |
2420 | \r | |
2421 | @return SpinLock\r | |
2422 | \r | |
2423 | **/\r | |
2424 | SPIN_LOCK *\r | |
2425 | EFIAPI\r | |
2426 | ReleaseSpinLock (\r | |
2427 | IN SPIN_LOCK *SpinLock\r | |
2428 | );\r | |
2429 | \r | |
2430 | /**\r | |
2431 | Performs an atomic increment of an 32-bit unsigned integer.\r | |
2432 | \r | |
2433 | Performs an atomic increment of the 32-bit unsigned integer specified by\r | |
2434 | Value and returns the incremented value. The increment operation must be\r | |
2435 | performed using MP safe mechanisms. The state of the return value is not\r | |
2436 | guaranteed to be MP safe.\r | |
2437 | \r | |
2438 | If Value is NULL, then ASSERT().\r | |
2439 | \r | |
2440 | @param Value A pointer to the 32-bit value to increment.\r | |
2441 | \r | |
2442 | @return The incremented value.\r | |
2443 | \r | |
2444 | **/\r | |
2445 | UINT32\r | |
2446 | EFIAPI\r | |
2447 | InterlockedIncrement (\r | |
2448 | IN UINT32 *Value\r | |
2449 | );\r | |
2450 | \r | |
2451 | /**\r | |
2452 | Performs an atomic decrement of an 32-bit unsigned integer.\r | |
2453 | \r | |
2454 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r | |
2455 | Value and returns the decremented value. The decrement operation must be\r | |
2456 | performed using MP safe mechanisms. The state of the return value is not\r | |
2457 | guaranteed to be MP safe.\r | |
2458 | \r | |
2459 | If Value is NULL, then ASSERT().\r | |
2460 | \r | |
2461 | @param Value A pointer to the 32-bit value to decrement.\r | |
2462 | \r | |
2463 | @return The decremented value.\r | |
2464 | \r | |
2465 | **/\r | |
2466 | UINT32\r | |
2467 | EFIAPI\r | |
2468 | InterlockedDecrement (\r | |
2469 | IN UINT32 *Value\r | |
2470 | );\r | |
2471 | \r | |
2472 | /**\r | |
2473 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r | |
2474 | \r | |
1ea5ca46 | 2475 | Performs an atomic compare exchange operation on the 32-bit unsigned integer\r |
681dbac9 | 2476 | specified by Value. If Value is equal to CompareValue, then Value is set to\r |
1ea5ca46 | 2477 | ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r |
681dbac9 | 2478 | then Value is returned. The compare exchange operation must be performed using\r |
1ea5ca46 | 2479 | MP safe mechanisms.\r |
2480 | \r | |
2481 | If Value is NULL, then ASSERT().\r | |
2482 | \r | |
878ddf1f | 2483 | @param Value A pointer to the 32-bit value for the compare exchange\r |
2484 | operation.\r | |
2485 | @param CompareValue 32-bit value used in compare operation.\r | |
2486 | @param ExchangeValue 32-bit value used in exchange operation.\r | |
2487 | \r | |
2488 | @return The original *Value before exchange.\r | |
2489 | \r | |
2490 | **/\r | |
2491 | UINT32\r | |
2492 | EFIAPI\r | |
2493 | InterlockedCompareExchange32 (\r | |
0ffa1286 | 2494 | IN OUT UINT32 *Value,\r |
878ddf1f | 2495 | IN UINT32 CompareValue,\r |
2496 | IN UINT32 ExchangeValue\r | |
2497 | );\r | |
2498 | \r | |
2499 | /**\r | |
2500 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r | |
2501 | \r | |
681dbac9 | 2502 | Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r |
2503 | by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r | |
2504 | CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r | |
1ea5ca46 | 2505 | The compare exchange operation must be performed using MP safe mechanisms.\r |
2506 | \r | |
2507 | If Value is NULL, then ASSERT().\r | |
2508 | \r | |
878ddf1f | 2509 | @param Value A pointer to the 64-bit value for the compare exchange\r |
2510 | operation.\r | |
2511 | @param CompareValue 64-bit value used in compare operation.\r | |
2512 | @param ExchangeValue 64-bit value used in exchange operation.\r | |
2513 | \r | |
2514 | @return The original *Value before exchange.\r | |
2515 | \r | |
2516 | **/\r | |
2517 | UINT64\r | |
2518 | EFIAPI\r | |
2519 | InterlockedCompareExchange64 (\r | |
0ffa1286 | 2520 | IN OUT UINT64 *Value,\r |
878ddf1f | 2521 | IN UINT64 CompareValue,\r |
2522 | IN UINT64 ExchangeValue\r | |
2523 | );\r | |
2524 | \r | |
2525 | /**\r | |
2526 | Performs an atomic compare exchange operation on a pointer value.\r | |
2527 | \r | |
2528 | Performs an atomic compare exchange operation on the pointer value specified\r | |
2529 | by Value. If Value is equal to CompareValue, then Value is set to\r | |
2530 | ExchangeValue and CompareValue is returned. If Value is not equal to\r | |
2531 | CompareValue, then Value is returned. The compare exchange operation must be\r | |
2532 | performed using MP safe mechanisms.\r | |
2533 | \r | |
2534 | If Value is NULL, then ASSERT().\r | |
2535 | \r | |
2536 | @param Value A pointer to the pointer value for the compare exchange\r | |
2537 | operation.\r | |
2538 | @param CompareValue Pointer value used in compare operation.\r | |
2539 | @param ExchangeValue Pointer value used in exchange operation.\r | |
2540 | \r | |
2541 | **/\r | |
2542 | VOID *\r | |
2543 | EFIAPI\r | |
2544 | InterlockedCompareExchangePointer (\r | |
0ffa1286 | 2545 | IN OUT VOID **Value,\r |
878ddf1f | 2546 | IN VOID *CompareValue,\r |
2547 | IN VOID *ExchangeValue\r | |
2548 | );\r | |
2549 | \r | |
2550 | //\r | |
2551 | // Base Library CPU Functions\r | |
2552 | //\r | |
2553 | typedef\r | |
2554 | VOID\r | |
2555 | (EFIAPI *SWITCH_STACK_ENTRY_POINT) (\r | |
2556 | IN VOID *Context1, OPTIONAL\r | |
2557 | IN VOID *Context2 OPTIONAL\r | |
2558 | );\r | |
2559 | \r | |
2560 | /**\r | |
2561 | Used to serialize load and store operations.\r | |
2562 | \r | |
2563 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
2564 | globally visible when this function returns.\r | |
2565 | \r | |
2566 | **/\r | |
2567 | VOID\r | |
2568 | EFIAPI\r | |
2569 | MemoryFence (\r | |
2570 | VOID\r | |
2571 | );\r | |
2572 | \r | |
2573 | /**\r | |
2574 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
2575 | and returns 0.\r | |
2576 | \r | |
2577 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
2578 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
2579 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
2580 | \r | |
2581 | If JumpBuffer is NULL, then ASSERT().\r | |
1ea5ca46 | 2582 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
878ddf1f | 2583 | \r |
2584 | @param JumpBuffer A pointer to CPU context buffer.\r | |
2585 | \r | |
2586 | @retval 0 Indicates a return from SetJump().\r | |
2587 | \r | |
2588 | **/\r | |
2589 | UINTN\r | |
2590 | EFIAPI\r | |
2591 | SetJump (\r | |
2592 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
2593 | );\r | |
2594 | \r | |
2595 | /**\r | |
2596 | Restores the CPU context that was saved with SetJump().\r | |
2597 | \r | |
2598 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
2599 | function never returns to the caller. Instead is resumes execution based on\r | |
2600 | the state of JumpBuffer.\r | |
2601 | \r | |
2602 | If JumpBuffer is NULL, then ASSERT().\r | |
1ea5ca46 | 2603 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
878ddf1f | 2604 | If Value is 0, then ASSERT().\r |
2605 | \r | |
2606 | @param JumpBuffer A pointer to CPU context buffer.\r | |
2607 | @param Value The value to return when the SetJump() context is\r | |
2608 | restored and must be non-zero.\r | |
2609 | \r | |
2610 | **/\r | |
2611 | VOID\r | |
2612 | EFIAPI\r | |
2613 | LongJump (\r | |
2614 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
2615 | IN UINTN Value\r | |
2616 | );\r | |
2617 | \r | |
2618 | /**\r | |
2619 | Enables CPU interrupts.\r | |
2620 | \r | |
2621 | Enables CPU interrupts.\r | |
2622 | \r | |
2623 | **/\r | |
2624 | VOID\r | |
2625 | EFIAPI\r | |
2626 | EnableInterrupts (\r | |
2627 | VOID\r | |
2628 | );\r | |
2629 | \r | |
2630 | /**\r | |
2631 | Disables CPU interrupts.\r | |
2632 | \r | |
2633 | Disables CPU interrupts.\r | |
2634 | \r | |
2635 | **/\r | |
2636 | VOID\r | |
2637 | EFIAPI\r | |
2638 | DisableInterrupts (\r | |
2639 | VOID\r | |
2640 | );\r | |
2641 | \r | |
2642 | /**\r | |
2643 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
2644 | operation.\r | |
2645 | \r | |
2646 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
2647 | operation.\r | |
2648 | \r | |
2649 | @retval TRUE CPU interrupts were enabled on entry to this call.\r | |
2650 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
2651 | \r | |
2652 | **/\r | |
2653 | BOOLEAN\r | |
2654 | EFIAPI\r | |
2655 | SaveAndDisableInterrupts (\r | |
2656 | VOID\r | |
2657 | );\r | |
2658 | \r | |
2659 | /**\r | |
2660 | Enables CPU interrupts for the smallest window required to capture any\r | |
2661 | pending interrupts.\r | |
2662 | \r | |
2663 | Enables CPU interrupts for the smallest window required to capture any\r | |
2664 | pending interrupts.\r | |
2665 | \r | |
2666 | **/\r | |
2667 | VOID\r | |
2668 | EFIAPI\r | |
2669 | EnableDisableInterrupts (\r | |
2670 | VOID\r | |
2671 | );\r | |
2672 | \r | |
2673 | /**\r | |
2674 | Retrieves the current CPU interrupt state.\r | |
2675 | \r | |
2676 | Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r | |
2677 | currently enabled. Otherwise returns FALSE.\r | |
2678 | \r | |
2679 | @retval TRUE CPU interrupts are enabled.\r | |
2680 | @retval FALSE CPU interrupts are disabled.\r | |
2681 | \r | |
2682 | **/\r | |
2683 | BOOLEAN\r | |
2684 | EFIAPI\r | |
2685 | GetInterruptState (\r | |
2686 | VOID\r | |
2687 | );\r | |
2688 | \r | |
2689 | /**\r | |
2690 | Set the current CPU interrupt state.\r | |
2691 | \r | |
2692 | Sets the current CPU interrupt state to the state specified by\r | |
2693 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
2694 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
2695 | returned.\r | |
2696 | \r | |
2697 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
2698 | interrupts should be disabled.\r | |
2699 | \r | |
2700 | @return InterruptState\r | |
2701 | \r | |
2702 | **/\r | |
2703 | BOOLEAN\r | |
2704 | EFIAPI\r | |
2705 | SetInterruptState (\r | |
2706 | IN BOOLEAN InterruptState\r | |
2707 | );\r | |
2708 | \r | |
2709 | /**\r | |
2710 | Places the CPU in a sleep state until an interrupt is received.\r | |
2711 | \r | |
2712 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
2713 | are disabled prior to calling this function, then the CPU will be placed in a\r | |
2714 | sleep state indefinitely.\r | |
2715 | \r | |
2716 | **/\r | |
2717 | VOID\r | |
2718 | EFIAPI\r | |
2719 | CpuSleep (\r | |
2720 | VOID\r | |
2721 | );\r | |
2722 | \r | |
2723 | /**\r | |
2724 | Requests CPU to pause for a short period of time.\r | |
2725 | \r | |
2726 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
2727 | systems to prevent memory starvation while waiting for a spin lock.\r | |
2728 | \r | |
2729 | **/\r | |
2730 | VOID\r | |
2731 | EFIAPI\r | |
2732 | CpuPause (\r | |
2733 | VOID\r | |
2734 | );\r | |
2735 | \r | |
2736 | /**\r | |
2737 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
2738 | \r | |
2739 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
2740 | \r | |
2741 | **/\r | |
2742 | VOID\r | |
2743 | EFIAPI\r | |
2744 | CpuFlushTlb (\r | |
2745 | VOID\r | |
2746 | );\r | |
2747 | \r | |
2748 | /**\r | |
2749 | Transfers control to a function starting with a new stack.\r | |
2750 | \r | |
2751 | Transfers control to the function specified by EntryPoint using the new stack\r | |
2752 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
2753 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
2754 | EntryPoint must never return.\r | |
2755 | \r | |
2756 | If EntryPoint is NULL, then ASSERT().\r | |
2757 | If NewStack is NULL, then ASSERT().\r | |
2758 | \r | |
2759 | @param EntryPoint A pointer to function to call with the new stack.\r | |
2760 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
2761 | function.\r | |
2762 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
2763 | function.\r | |
2764 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
2765 | function.\r | |
2766 | \r | |
2767 | **/\r | |
2768 | VOID\r | |
2769 | EFIAPI\r | |
2770 | SwitchStack (\r | |
2771 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
2772 | IN VOID *Context1, OPTIONAL\r | |
2773 | IN VOID *Context2, OPTIONAL\r | |
2774 | IN VOID *NewStack\r | |
2775 | );\r | |
2776 | \r | |
2777 | /**\r | |
2778 | Generates a breakpoint on the CPU.\r | |
2779 | \r | |
2780 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
2781 | that code can resume normal execution after the breakpoint.\r | |
2782 | \r | |
2783 | **/\r | |
2784 | VOID\r | |
2785 | EFIAPI\r | |
2786 | CpuBreakpoint (\r | |
2787 | VOID\r | |
2788 | );\r | |
2789 | \r | |
2790 | /**\r | |
2791 | Executes an infinite loop.\r | |
2792 | \r | |
2793 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
2794 | past the loop and the code that follows the loop must execute properly. This\r | |
2795 | implies that the infinite loop must not cause the code that follow it to be\r | |
2796 | optimized away.\r | |
2797 | \r | |
2798 | **/\r | |
2799 | VOID\r | |
2800 | EFIAPI\r | |
2801 | CpuDeadLoop (\r | |
2802 | VOID\r | |
2803 | );\r | |
2804 | \r | |
2805 | //\r | |
2806 | // IA32 and X64 Specific Functions\r | |
2807 | //\r | |
2808 | //\r | |
2809 | // Byte packed structure for 16-bit Real Mode EFLAGS\r | |
2810 | //\r | |
2811 | typedef union {\r | |
2812 | struct {\r | |
2813 | UINT32 CF:1; // Carry Flag\r | |
2814 | UINT32 Reserved_0:1; // Reserved\r | |
2815 | UINT32 PF:1; // Parity Flag\r | |
2816 | UINT32 Reserved_1:1; // Reserved\r | |
2817 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
2818 | UINT32 Reserved_2:1; // Reserved\r | |
2819 | UINT32 ZF:1; // Zero Flag\r | |
2820 | UINT32 SF:1; // Sign Flag\r | |
2821 | UINT32 TF:1; // Trap Flag\r | |
2822 | UINT32 IF:1; // Interrupt Enable Flag\r | |
2823 | UINT32 DF:1; // Direction Flag\r | |
2824 | UINT32 OF:1; // Overflow Flag\r | |
2825 | UINT32 IOPL:2; // I/O Privilege Level\r | |
2826 | UINT32 NT:1; // Nested Task\r | |
2827 | UINT32 Reserved_3:1; // Reserved\r | |
2828 | } Bits;\r | |
2829 | UINT16 Uint16;\r | |
2830 | } IA32_FLAGS16;\r | |
2831 | \r | |
2832 | //\r | |
2833 | // Byte packed structure for EFLAGS/RFLAGS\r | |
2834 | // 32-bits on IA-32\r | |
2835 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2836 | //\r | |
2837 | typedef union {\r | |
2838 | struct {\r | |
2839 | UINT32 CF:1; // Carry Flag\r | |
2840 | UINT32 Reserved_0:1; // Reserved\r | |
2841 | UINT32 PF:1; // Parity Flag\r | |
2842 | UINT32 Reserved_1:1; // Reserved\r | |
2843 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
2844 | UINT32 Reserved_2:1; // Reserved\r | |
2845 | UINT32 ZF:1; // Zero Flag\r | |
2846 | UINT32 SF:1; // Sign Flag\r | |
2847 | UINT32 TF:1; // Trap Flag\r | |
2848 | UINT32 IF:1; // Interrupt Enable Flag\r | |
2849 | UINT32 DF:1; // Direction Flag\r | |
2850 | UINT32 OF:1; // Overflow Flag\r | |
2851 | UINT32 IOPL:2; // I/O Privilege Level\r | |
2852 | UINT32 NT:1; // Nested Task\r | |
2853 | UINT32 Reserved_3:1; // Reserved\r | |
2854 | UINT32 RF:1; // Resume Flag\r | |
2855 | UINT32 VM:1; // Virtual 8086 Mode\r | |
2856 | UINT32 AC:1; // Alignment Check\r | |
2857 | UINT32 VIF:1; // Virtual Interrupt Flag\r | |
2858 | UINT32 VIP:1; // Virtual Interrupt Pending\r | |
2859 | UINT32 ID:1; // ID Flag\r | |
2860 | UINT32 Reserved_4:10; // Reserved\r | |
2861 | } Bits;\r | |
2862 | UINTN UintN;\r | |
2863 | } IA32_EFLAGS32;\r | |
2864 | \r | |
2865 | //\r | |
2866 | // Byte packed structure for Control Register 0 (CR0)\r | |
2867 | // 32-bits on IA-32\r | |
2868 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2869 | //\r | |
2870 | typedef union {\r | |
2871 | struct {\r | |
2872 | UINT32 PE:1; // Protection Enable\r | |
2873 | UINT32 MP:1; // Monitor Coprocessor\r | |
2874 | UINT32 EM:1; // Emulation\r | |
2875 | UINT32 TS:1; // Task Switched\r | |
2876 | UINT32 ET:1; // Extension Type\r | |
2877 | UINT32 NE:1; // Numeric Error\r | |
2878 | UINT32 Reserved_0:10; // Reserved\r | |
2879 | UINT32 WP:1; // Write Protect\r | |
2880 | UINT32 Reserved_1:1; // Reserved\r | |
2881 | UINT32 AM:1; // Alignment Mask\r | |
2882 | UINT32 Reserved_2:10; // Reserved\r | |
2883 | UINT32 NW:1; // Mot Write-through\r | |
2884 | UINT32 CD:1; // Cache Disable\r | |
2885 | UINT32 PG:1; // Paging\r | |
2886 | } Bits;\r | |
2887 | UINTN UintN;\r | |
2888 | } IA32_CR0;\r | |
2889 | \r | |
2890 | //\r | |
2891 | // Byte packed structure for Control Register 4 (CR4)\r | |
2892 | // 32-bits on IA-32\r | |
2893 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2894 | //\r | |
2895 | typedef union {\r | |
2896 | struct {\r | |
2897 | UINT32 VME:1; // Virtual-8086 Mode Extensions\r | |
2898 | UINT32 PVI:1; // Protected-Mode Virtual Interrupts\r | |
2899 | UINT32 TSD:1; // Time Stamp Disable\r | |
2900 | UINT32 DE:1; // Debugging Extensions\r | |
2901 | UINT32 PSE:1; // Page Size Extensions\r | |
2902 | UINT32 PAE:1; // Physical Address Extension\r | |
2903 | UINT32 MCE:1; // Machine Check Enable\r | |
2904 | UINT32 PGE:1; // Page Global Enable\r | |
2905 | UINT32 PCE:1; // Performance Monitoring Counter\r | |
2906 | // Enable\r | |
2907 | UINT32 OSFXSR:1; // Operating System Support for\r | |
2908 | // FXSAVE and FXRSTOR instructions\r | |
2909 | UINT32 OSXMMEXCPT:1; // Operating System Support for\r | |
2910 | // Unmasked SIMD Floating Point\r | |
2911 | // Exceptions\r | |
2912 | UINT32 Reserved_0:2; // Reserved\r | |
2913 | UINT32 VMXE:1; // VMX Enable\r | |
2914 | UINT32 Reserved_1:18; // Reseved\r | |
2915 | } Bits;\r | |
2916 | UINTN UintN;\r | |
2917 | } IA32_CR4;\r | |
2918 | \r | |
2919 | //\r | |
2920 | // Byte packed structure for an IDTR, GDTR, LDTR descriptor\r | |
4cbd2175 | 2921 | /// @bug How to make this structure byte-packed in a compiler independent way?\r |
878ddf1f | 2922 | //\r |
db8f40e2 | 2923 | #pragma pack (1)\r |
878ddf1f | 2924 | typedef struct {\r |
2925 | UINT16 Limit;\r | |
2926 | UINTN Base;\r | |
2927 | } IA32_DESCRIPTOR;\r | |
db8f40e2 | 2928 | #pragma pack ()\r |
878ddf1f | 2929 | \r |
2930 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
2931 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
2932 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
2933 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
2934 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
2935 | \r | |
2936 | //\r | |
2937 | // Byte packed structure for an Interrupt Gate Descriptor\r | |
2938 | //\r | |
2939 | typedef union {\r | |
2940 | struct {\r | |
2941 | UINT32 OffsetLow:16; // Offset bits 15..0\r | |
2942 | UINT32 Selector:16; // Selector\r | |
2943 | UINT32 Reserved_0:8; // Reserved\r | |
2944 | UINT32 GateType:8; // Gate Type. See #defines above\r | |
2945 | UINT32 OffsetHigh:16; // Offset bits 31..16\r | |
2946 | } Bits;\r | |
2947 | UINT64 Uint64;\r | |
2948 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
2949 | \r | |
2950 | //\r | |
2951 | // Byte packed structure for an FP/SSE/SSE2 context\r | |
2952 | //\r | |
2953 | typedef struct {\r | |
2954 | UINT8 Buffer[512];\r | |
2955 | } IA32_FX_BUFFER;\r | |
2956 | \r | |
2957 | //\r | |
2958 | // Structures for the 16-bit real mode thunks\r | |
2959 | //\r | |
2960 | typedef struct {\r | |
2961 | UINT32 Reserved1;\r | |
2962 | UINT32 Reserved2;\r | |
2963 | UINT32 Reserved3;\r | |
2964 | UINT32 Reserved4;\r | |
2965 | UINT8 BL;\r | |
2966 | UINT8 BH;\r | |
2967 | UINT16 Reserved5;\r | |
2968 | UINT8 DL;\r | |
2969 | UINT8 DH;\r | |
2970 | UINT16 Reserved6;\r | |
2971 | UINT8 CL;\r | |
2972 | UINT8 CH;\r | |
2973 | UINT16 Reserved7;\r | |
2974 | UINT8 AL;\r | |
2975 | UINT8 AH;\r | |
2976 | UINT16 Reserved8;\r | |
2977 | } IA32_BYTE_REGS;\r | |
2978 | \r | |
2979 | typedef struct {\r | |
2980 | UINT16 DI;\r | |
2981 | UINT16 Reserved1;\r | |
2982 | UINT16 SI;\r | |
2983 | UINT16 Reserved2;\r | |
2984 | UINT16 BP;\r | |
2985 | UINT16 Reserved3;\r | |
2986 | UINT16 SP;\r | |
2987 | UINT16 Reserved4;\r | |
2988 | UINT16 BX;\r | |
2989 | UINT16 Reserved5;\r | |
2990 | UINT16 DX;\r | |
2991 | UINT16 Reserved6;\r | |
2992 | UINT16 CX;\r | |
2993 | UINT16 Reserved7;\r | |
2994 | UINT16 AX;\r | |
2995 | UINT16 Reserved8;\r | |
2996 | } IA32_WORD_REGS;\r | |
2997 | \r | |
2998 | typedef struct {\r | |
2999 | UINT32 EDI;\r | |
3000 | UINT32 ESI;\r | |
3001 | UINT32 EBP;\r | |
3002 | UINT32 ESP;\r | |
3003 | UINT32 EBX;\r | |
3004 | UINT32 EDX;\r | |
3005 | UINT32 ECX;\r | |
3006 | UINT32 EAX;\r | |
3007 | UINT16 DS;\r | |
3008 | UINT16 ES;\r | |
3009 | UINT16 FS;\r | |
3010 | UINT16 GS;\r | |
3011 | IA32_EFLAGS32 EFLAGS;\r | |
3012 | UINT32 Eip;\r | |
3013 | UINT16 CS;\r | |
3014 | UINT16 SS;\r | |
3015 | } IA32_DWORD_REGS;\r | |
3016 | \r | |
3017 | typedef union {\r | |
3018 | IA32_DWORD_REGS E;\r | |
3019 | IA32_WORD_REGS X;\r | |
3020 | IA32_BYTE_REGS H;\r | |
3021 | } IA32_REGISTER_SET;\r | |
3022 | \r | |
3023 | //\r | |
3024 | // Byte packed structure for an 16-bit real mode thunks\r | |
3025 | //\r | |
3026 | typedef struct {\r | |
97d92bda | 3027 | IA32_REGISTER_SET *RealModeState;\r |
878ddf1f | 3028 | VOID *RealModeBuffer;\r |
97d92bda | 3029 | UINT32 RealModeBufferSize;\r |
3030 | UINT32 ThunkAttributes;\r | |
878ddf1f | 3031 | } THUNK_CONTEXT;\r |
3032 | \r | |
97d92bda | 3033 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r |
3034 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
3035 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
3036 | \r | |
878ddf1f | 3037 | /**\r |
3038 | Retrieves CPUID information.\r | |
3039 | \r | |
3040 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
3041 | This function always returns Index.\r | |
3042 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
3043 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
3044 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
3045 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
3046 | This function is only available on IA-32 and X64.\r | |
3047 | \r | |
3048 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
3049 | instruction.\r | |
3050 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
3051 | instruction. This is an optional parameter that may be NULL.\r | |
3052 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
3053 | instruction. This is an optional parameter that may be NULL.\r | |
3054 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
3055 | instruction. This is an optional parameter that may be NULL.\r | |
3056 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
3057 | instruction. This is an optional parameter that may be NULL.\r | |
3058 | \r | |
3059 | @return Index\r | |
3060 | \r | |
3061 | **/\r | |
3062 | UINT32\r | |
3063 | EFIAPI\r | |
3064 | AsmCpuid (\r | |
3065 | IN UINT32 Index,\r | |
3066 | OUT UINT32 *Eax, OPTIONAL\r | |
3067 | OUT UINT32 *Ebx, OPTIONAL\r | |
3068 | OUT UINT32 *Ecx, OPTIONAL\r | |
3069 | OUT UINT32 *Edx OPTIONAL\r | |
3070 | );\r | |
3071 | \r | |
dee4740a | 3072 | /**\r |
3073 | Retrieves CPUID information using an extended leaf identifier.\r | |
3074 | \r | |
3075 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
3076 | and ECX set to the value specified by SubIndex. This function always returns\r | |
3077 | Index. This function is only available on IA-32 and x64.\r | |
3078 | \r | |
3079 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
3080 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
3081 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
3082 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
3083 | \r | |
3084 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
3085 | CPUID instruction.\r | |
3086 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
3087 | CPUID instruction.\r | |
3088 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
3089 | instruction. This is an optional parameter that may be\r | |
3090 | NULL.\r | |
3091 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
3092 | instruction. This is an optional parameter that may be\r | |
3093 | NULL.\r | |
3094 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
3095 | instruction. This is an optional parameter that may be\r | |
3096 | NULL.\r | |
3097 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
3098 | instruction. This is an optional parameter that may be\r | |
3099 | NULL.\r | |
3100 | \r | |
3101 | @return Index\r | |
3102 | \r | |
3103 | **/\r | |
3104 | UINT32\r | |
3105 | EFIAPI\r | |
3106 | AsmCpuidEx (\r | |
3107 | IN UINT32 Index,\r | |
3108 | IN UINT32 SubIndex,\r | |
3109 | OUT UINT32 *Eax, OPTIONAL\r | |
3110 | OUT UINT32 *Ebx, OPTIONAL\r | |
3111 | OUT UINT32 *Ecx, OPTIONAL\r | |
3112 | OUT UINT32 *Edx OPTIONAL\r | |
3113 | );\r | |
3114 | \r | |
878ddf1f | 3115 | /**\r |
3116 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
3117 | \r | |
3118 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
3119 | No parameter checking is performed on Index, and some Index values may cause\r | |
3120 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
3121 | caller must set up exception handlers to catch the exceptions. This function\r | |
3122 | is only available on IA-32 and X64.\r | |
3123 | \r | |
3124 | @param Index The 32-bit MSR index to read.\r | |
3125 | \r | |
3126 | @return The lower 32 bits of the MSR identified by Index.\r | |
3127 | \r | |
3128 | **/\r | |
3129 | UINT32\r | |
3130 | EFIAPI\r | |
3131 | AsmReadMsr32 (\r | |
3132 | IN UINT32 Index\r | |
3133 | );\r | |
3134 | \r | |
3135 | /**\r | |
3136 | Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r | |
3137 | \r | |
3138 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
3139 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
3140 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
3141 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
3142 | that Index and Value are valid, or the caller must establish proper exception\r | |
3143 | handlers. This function is only available on IA-32 and X64.\r | |
3144 | \r | |
3145 | @param Index The 32-bit MSR index to write.\r | |
3146 | @param Value The 32-bit value to write to the MSR.\r | |
3147 | \r | |
3148 | @return Value\r | |
3149 | \r | |
3150 | **/\r | |
3151 | UINT32\r | |
3152 | EFIAPI\r | |
3153 | AsmWriteMsr32 (\r | |
3154 | IN UINT32 Index,\r | |
3155 | IN UINT32 Value\r | |
3156 | );\r | |
3157 | \r | |
3158 | /**\r | |
3159 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r | |
3160 | writes the result back to the 64-bit MSR.\r | |
3161 | \r | |
3162 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3163 | between the lower 32-bits of the read result and the value specified by\r | |
3164 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
3165 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
3166 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
3167 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
3168 | must establish proper exception handlers. This function is only available on\r | |
3169 | IA-32 and X64.\r | |
3170 | \r | |
3171 | @param Index The 32-bit MSR index to write.\r | |
3172 | @param OrData The value to OR with the read value from the MSR.\r | |
3173 | \r | |
3174 | @return The lower 32-bit value written to the MSR.\r | |
3175 | \r | |
3176 | **/\r | |
3177 | UINT32\r | |
3178 | EFIAPI\r | |
3179 | AsmMsrOr32 (\r | |
3180 | IN UINT32 Index,\r | |
3181 | IN UINT32 OrData\r | |
3182 | );\r | |
3183 | \r | |
3184 | /**\r | |
3185 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
3186 | the result back to the 64-bit MSR.\r | |
3187 | \r | |
3188 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3189 | lower 32-bits of the read result and the value specified by AndData, and\r | |
3190 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
3191 | the value written to the MSR is returned. No parameter checking is performed\r | |
3192 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
3193 | must either guarantee that Index and AndData are valid, or the caller must\r | |
3194 | establish proper exception handlers. This function is only available on IA-32\r | |
3195 | and X64.\r | |
3196 | \r | |
3197 | @param Index The 32-bit MSR index to write.\r | |
3198 | @param AndData The value to AND with the read value from the MSR.\r | |
3199 | \r | |
3200 | @return The lower 32-bit value written to the MSR.\r | |
3201 | \r | |
3202 | **/\r | |
3203 | UINT32\r | |
3204 | EFIAPI\r | |
3205 | AsmMsrAnd32 (\r | |
3206 | IN UINT32 Index,\r | |
3207 | IN UINT32 AndData\r | |
3208 | );\r | |
3209 | \r | |
3210 | /**\r | |
3211 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r | |
3212 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r | |
3213 | \r | |
3214 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3215 | lower 32-bits of the read result and the value specified by AndData\r | |
3216 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r | |
3217 | result of the AND operation and the value specified by OrData, and writes the\r | |
3218 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
3219 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
3220 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
3221 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
3222 | caller must establish proper exception handlers. This function is only\r | |
3223 | available on IA-32 and X64.\r | |
3224 | \r | |
3225 | @param Index The 32-bit MSR index to write.\r | |
3226 | @param AndData The value to AND with the read value from the MSR.\r | |
3227 | @param OrData The value to OR with the result of the AND operation.\r | |
3228 | \r | |
3229 | @return The lower 32-bit value written to the MSR.\r | |
3230 | \r | |
3231 | **/\r | |
3232 | UINT32\r | |
3233 | EFIAPI\r | |
3234 | AsmMsrAndThenOr32 (\r | |
3235 | IN UINT32 Index,\r | |
3236 | IN UINT32 AndData,\r | |
3237 | IN UINT32 OrData\r | |
3238 | );\r | |
3239 | \r | |
3240 | /**\r | |
3241 | Reads a bit field of an MSR.\r | |
3242 | \r | |
3243 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
3244 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
3245 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
3246 | must set up exception handlers to catch the exceptions. This function is only\r | |
3247 | available on IA-32 and X64.\r | |
3248 | \r | |
3249 | If StartBit is greater than 31, then ASSERT().\r | |
3250 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 3251 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3252 | \r |
3253 | @param Index The 32-bit MSR index to read.\r | |
3254 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3255 | Range 0..31.\r | |
3256 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3257 | Range 0..31.\r | |
3258 | \r | |
3259 | @return The bit field read from the MSR.\r | |
3260 | \r | |
3261 | **/\r | |
3262 | UINT32\r | |
3263 | EFIAPI\r | |
3264 | AsmMsrBitFieldRead32 (\r | |
3265 | IN UINT32 Index,\r | |
3266 | IN UINTN StartBit,\r | |
3267 | IN UINTN EndBit\r | |
3268 | );\r | |
3269 | \r | |
3270 | /**\r | |
3271 | Writes a bit field to an MSR.\r | |
3272 | \r | |
3273 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r | |
3274 | field is specified by the StartBit and the EndBit. All other bits in the\r | |
3275 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
3276 | returned. Extra left bits in Value are stripped. The caller must either\r | |
3277 | guarantee that Index and the data written is valid, or the caller must set up\r | |
3278 | exception handlers to catch the exceptions. This function is only available\r | |
3279 | on IA-32 and X64.\r | |
3280 | \r | |
3281 | If StartBit is greater than 31, then ASSERT().\r | |
3282 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 3283 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3284 | \r |
3285 | @param Index The 32-bit MSR index to write.\r | |
3286 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3287 | Range 0..31.\r | |
3288 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3289 | Range 0..31.\r | |
3290 | @param Value New value of the bit field.\r | |
3291 | \r | |
3292 | @return The lower 32-bit of the value written to the MSR.\r | |
3293 | \r | |
3294 | **/\r | |
3295 | UINT32\r | |
3296 | EFIAPI\r | |
3297 | AsmMsrBitFieldWrite32 (\r | |
3298 | IN UINT32 Index,\r | |
3299 | IN UINTN StartBit,\r | |
3300 | IN UINTN EndBit,\r | |
3301 | IN UINT32 Value\r | |
3302 | );\r | |
3303 | \r | |
3304 | /**\r | |
3305 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
3306 | result back to the bit field in the 64-bit MSR.\r | |
3307 | \r | |
3308 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3309 | between the read result and the value specified by OrData, and writes the\r | |
3310 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
3311 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
3312 | caller must either guarantee that Index and the data written is valid, or\r | |
3313 | the caller must set up exception handlers to catch the exceptions. This\r | |
3314 | function is only available on IA-32 and X64.\r | |
3315 | \r | |
3316 | If StartBit is greater than 31, then ASSERT().\r | |
3317 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 3318 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3319 | \r |
3320 | @param Index The 32-bit MSR index to write.\r | |
3321 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3322 | Range 0..31.\r | |
3323 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3324 | Range 0..31.\r | |
3325 | @param OrData The value to OR with the read value from the MSR.\r | |
3326 | \r | |
3327 | @return The lower 32-bit of the value written to the MSR.\r | |
3328 | \r | |
3329 | **/\r | |
3330 | UINT32\r | |
3331 | EFIAPI\r | |
3332 | AsmMsrBitFieldOr32 (\r | |
3333 | IN UINT32 Index,\r | |
3334 | IN UINTN StartBit,\r | |
3335 | IN UINTN EndBit,\r | |
3336 | IN UINT32 OrData\r | |
3337 | );\r | |
3338 | \r | |
3339 | /**\r | |
3340 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
3341 | result back to the bit field in the 64-bit MSR.\r | |
3342 | \r | |
3343 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3344 | read result and the value specified by AndData, and writes the result to the\r | |
3345 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
3346 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
3347 | either guarantee that Index and the data written is valid, or the caller must\r | |
3348 | set up exception handlers to catch the exceptions. This function is only\r | |
3349 | available on IA-32 and X64.\r | |
3350 | \r | |
3351 | If StartBit is greater than 31, then ASSERT().\r | |
3352 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 3353 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3354 | \r |
3355 | @param Index The 32-bit MSR index to write.\r | |
3356 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3357 | Range 0..31.\r | |
3358 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3359 | Range 0..31.\r | |
3360 | @param AndData The value to AND with the read value from the MSR.\r | |
3361 | \r | |
3362 | @return The lower 32-bit of the value written to the MSR.\r | |
3363 | \r | |
3364 | **/\r | |
3365 | UINT32\r | |
3366 | EFIAPI\r | |
3367 | AsmMsrBitFieldAnd32 (\r | |
3368 | IN UINT32 Index,\r | |
3369 | IN UINTN StartBit,\r | |
3370 | IN UINTN EndBit,\r | |
3371 | IN UINT32 AndData\r | |
3372 | );\r | |
3373 | \r | |
3374 | /**\r | |
3375 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
3376 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
3377 | 64-bit MSR.\r | |
3378 | \r | |
3379 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
3380 | bitwise inclusive OR between the read result and the value specified by\r | |
3381 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
3382 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
3383 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
3384 | that Index and the data written is valid, or the caller must set up exception\r | |
3385 | handlers to catch the exceptions. This function is only available on IA-32\r | |
3386 | and X64.\r | |
3387 | \r | |
3388 | If StartBit is greater than 31, then ASSERT().\r | |
3389 | If EndBit is greater than 31, then ASSERT().\r | |
0ffa1286 | 3390 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3391 | \r |
3392 | @param Index The 32-bit MSR index to write.\r | |
3393 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3394 | Range 0..31.\r | |
3395 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3396 | Range 0..31.\r | |
3397 | @param AndData The value to AND with the read value from the MSR.\r | |
3398 | @param OrData The value to OR with the result of the AND operation.\r | |
3399 | \r | |
3400 | @return The lower 32-bit of the value written to the MSR.\r | |
3401 | \r | |
3402 | **/\r | |
3403 | UINT32\r | |
3404 | EFIAPI\r | |
3405 | AsmMsrBitFieldAndThenOr32 (\r | |
3406 | IN UINT32 Index,\r | |
3407 | IN UINTN StartBit,\r | |
3408 | IN UINTN EndBit,\r | |
3409 | IN UINT32 AndData,\r | |
3410 | IN UINT32 OrData\r | |
3411 | );\r | |
3412 | \r | |
3413 | /**\r | |
3414 | Returns a 64-bit Machine Specific Register(MSR).\r | |
3415 | \r | |
3416 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
3417 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
3418 | caller must either guarantee that Index is valid, or the caller must set up\r | |
3419 | exception handlers to catch the exceptions. This function is only available\r | |
3420 | on IA-32 and X64.\r | |
3421 | \r | |
3422 | @param Index The 32-bit MSR index to read.\r | |
3423 | \r | |
3424 | @return The value of the MSR identified by Index.\r | |
3425 | \r | |
3426 | **/\r | |
3427 | UINT64\r | |
3428 | EFIAPI\r | |
3429 | AsmReadMsr64 (\r | |
3430 | IN UINT32 Index\r | |
3431 | );\r | |
3432 | \r | |
3433 | /**\r | |
3434 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
3435 | value.\r | |
3436 | \r | |
3437 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
3438 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
3439 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
3440 | caller must either guarantee that Index and Value are valid, or the caller\r | |
3441 | must establish proper exception handlers. This function is only available on\r | |
3442 | IA-32 and X64.\r | |
3443 | \r | |
3444 | @param Index The 32-bit MSR index to write.\r | |
3445 | @param Value The 64-bit value to write to the MSR.\r | |
3446 | \r | |
3447 | @return Value\r | |
3448 | \r | |
3449 | **/\r | |
3450 | UINT64\r | |
3451 | EFIAPI\r | |
3452 | AsmWriteMsr64 (\r | |
3453 | IN UINT32 Index,\r | |
3454 | IN UINT64 Value\r | |
3455 | );\r | |
3456 | \r | |
3457 | /**\r | |
3458 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r | |
3459 | back to the 64-bit MSR.\r | |
3460 | \r | |
3461 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3462 | between the read result and the value specified by OrData, and writes the\r | |
3463 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
3464 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
3465 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
3466 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
3467 | This function is only available on IA-32 and X64.\r | |
3468 | \r | |
3469 | @param Index The 32-bit MSR index to write.\r | |
3470 | @param OrData The value to OR with the read value from the MSR.\r | |
3471 | \r | |
3472 | @return The value written back to the MSR.\r | |
3473 | \r | |
3474 | **/\r | |
3475 | UINT64\r | |
3476 | EFIAPI\r | |
3477 | AsmMsrOr64 (\r | |
3478 | IN UINT32 Index,\r | |
3479 | IN UINT64 OrData\r | |
3480 | );\r | |
3481 | \r | |
3482 | /**\r | |
3483 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
3484 | 64-bit MSR.\r | |
3485 | \r | |
3486 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3487 | read result and the value specified by OrData, and writes the result to the\r | |
3488 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
3489 | parameter checking is performed on Index or OrData, and some of these may\r | |
3490 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
3491 | are valid, or the caller must establish proper exception handlers. This\r | |
3492 | function is only available on IA-32 and X64.\r | |
3493 | \r | |
3494 | @param Index The 32-bit MSR index to write.\r | |
3495 | @param AndData The value to AND with the read value from the MSR.\r | |
3496 | \r | |
3497 | @return The value written back to the MSR.\r | |
3498 | \r | |
3499 | **/\r | |
3500 | UINT64\r | |
3501 | EFIAPI\r | |
3502 | AsmMsrAnd64 (\r | |
3503 | IN UINT32 Index,\r | |
3504 | IN UINT64 AndData\r | |
3505 | );\r | |
3506 | \r | |
3507 | /**\r | |
3508 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r | |
3509 | OR, and writes the result back to the 64-bit MSR.\r | |
3510 | \r | |
3511 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
3512 | result and the value specified by AndData, performs a bitwise inclusive OR\r | |
3513 | between the result of the AND operation and the value specified by OrData,\r | |
3514 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
3515 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
3516 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
3517 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
3518 | establish proper exception handlers. This function is only available on IA-32\r | |
3519 | and X64.\r | |
3520 | \r | |
3521 | @param Index The 32-bit MSR index to write.\r | |
3522 | @param AndData The value to AND with the read value from the MSR.\r | |
3523 | @param OrData The value to OR with the result of the AND operation.\r | |
3524 | \r | |
3525 | @return The value written back to the MSR.\r | |
3526 | \r | |
3527 | **/\r | |
3528 | UINT64\r | |
3529 | EFIAPI\r | |
3530 | AsmMsrAndThenOr64 (\r | |
3531 | IN UINT32 Index,\r | |
3532 | IN UINT64 AndData,\r | |
3533 | IN UINT64 OrData\r | |
3534 | );\r | |
3535 | \r | |
3536 | /**\r | |
3537 | Reads a bit field of an MSR.\r | |
3538 | \r | |
3539 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
3540 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
3541 | must either guarantee that Index is valid, or the caller must set up\r | |
3542 | exception handlers to catch the exceptions. This function is only available\r | |
3543 | on IA-32 and X64.\r | |
3544 | \r | |
3545 | If StartBit is greater than 63, then ASSERT().\r | |
3546 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 3547 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3548 | \r |
3549 | @param Index The 32-bit MSR index to read.\r | |
3550 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3551 | Range 0..63.\r | |
3552 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3553 | Range 0..63.\r | |
3554 | \r | |
3555 | @return The value read from the MSR.\r | |
3556 | \r | |
3557 | **/\r | |
3558 | UINT64\r | |
3559 | EFIAPI\r | |
3560 | AsmMsrBitFieldRead64 (\r | |
3561 | IN UINT32 Index,\r | |
3562 | IN UINTN StartBit,\r | |
3563 | IN UINTN EndBit\r | |
3564 | );\r | |
3565 | \r | |
3566 | /**\r | |
3567 | Writes a bit field to an MSR.\r | |
3568 | \r | |
3569 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
3570 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
3571 | preserved. The MSR written is returned. Extra left bits in Value are\r | |
3572 | stripped. The caller must either guarantee that Index and the data written is\r | |
3573 | valid, or the caller must set up exception handlers to catch the exceptions.\r | |
3574 | This function is only available on IA-32 and X64.\r | |
3575 | \r | |
3576 | If StartBit is greater than 63, then ASSERT().\r | |
3577 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 3578 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3579 | \r |
3580 | @param Index The 32-bit MSR index to write.\r | |
3581 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3582 | Range 0..63.\r | |
3583 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3584 | Range 0..63.\r | |
3585 | @param Value New value of the bit field.\r | |
3586 | \r | |
3587 | @return The value written back to the MSR.\r | |
3588 | \r | |
3589 | **/\r | |
3590 | UINT64\r | |
3591 | EFIAPI\r | |
3592 | AsmMsrBitFieldWrite64 (\r | |
3593 | IN UINT32 Index,\r | |
3594 | IN UINTN StartBit,\r | |
3595 | IN UINTN EndBit,\r | |
3596 | IN UINT64 Value\r | |
3597 | );\r | |
3598 | \r | |
3599 | /**\r | |
3600 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r | |
3601 | writes the result back to the bit field in the 64-bit MSR.\r | |
3602 | \r | |
3603 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3604 | between the read result and the value specified by OrData, and writes the\r | |
3605 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
3606 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
3607 | guarantee that Index and the data written is valid, or the caller must set up\r | |
3608 | exception handlers to catch the exceptions. This function is only available\r | |
3609 | on IA-32 and X64.\r | |
3610 | \r | |
3611 | If StartBit is greater than 63, then ASSERT().\r | |
3612 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 3613 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3614 | \r |
3615 | @param Index The 32-bit MSR index to write.\r | |
3616 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3617 | Range 0..63.\r | |
3618 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3619 | Range 0..63.\r | |
3620 | @param OrData The value to OR with the read value from the bit field.\r | |
3621 | \r | |
3622 | @return The value written back to the MSR.\r | |
3623 | \r | |
3624 | **/\r | |
3625 | UINT64\r | |
3626 | EFIAPI\r | |
3627 | AsmMsrBitFieldOr64 (\r | |
3628 | IN UINT32 Index,\r | |
3629 | IN UINTN StartBit,\r | |
3630 | IN UINTN EndBit,\r | |
3631 | IN UINT64 OrData\r | |
3632 | );\r | |
3633 | \r | |
3634 | /**\r | |
3635 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
3636 | result back to the bit field in the 64-bit MSR.\r | |
3637 | \r | |
3638 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3639 | read result and the value specified by AndData, and writes the result to the\r | |
3640 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
3641 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
3642 | that Index and the data written is valid, or the caller must set up exception\r | |
3643 | handlers to catch the exceptions. This function is only available on IA-32\r | |
3644 | and X64.\r | |
3645 | \r | |
3646 | If StartBit is greater than 63, then ASSERT().\r | |
3647 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 3648 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3649 | \r |
3650 | @param Index The 32-bit MSR index to write.\r | |
3651 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3652 | Range 0..63.\r | |
3653 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3654 | Range 0..63.\r | |
3655 | @param AndData The value to AND with the read value from the bit field.\r | |
3656 | \r | |
3657 | @return The value written back to the MSR.\r | |
3658 | \r | |
3659 | **/\r | |
3660 | UINT64\r | |
3661 | EFIAPI\r | |
3662 | AsmMsrBitFieldAnd64 (\r | |
3663 | IN UINT32 Index,\r | |
3664 | IN UINTN StartBit,\r | |
3665 | IN UINTN EndBit,\r | |
3666 | IN UINT64 AndData\r | |
3667 | );\r | |
3668 | \r | |
3669 | /**\r | |
3670 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
3671 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
3672 | 64-bit MSR.\r | |
3673 | \r | |
3674 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
3675 | a bitwise inclusive OR between the read result and the value specified by\r | |
3676 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
3677 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
3678 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
3679 | written is valid, or the caller must set up exception handlers to catch the\r | |
3680 | exceptions. This function is only available on IA-32 and X64.\r | |
3681 | \r | |
3682 | If StartBit is greater than 63, then ASSERT().\r | |
3683 | If EndBit is greater than 63, then ASSERT().\r | |
0ffa1286 | 3684 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f | 3685 | \r |
3686 | @param Index The 32-bit MSR index to write.\r | |
3687 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3688 | Range 0..63.\r | |
3689 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3690 | Range 0..63.\r | |
3691 | @param AndData The value to AND with the read value from the bit field.\r | |
3692 | @param OrData The value to OR with the result of the AND operation.\r | |
3693 | \r | |
3694 | @return The value written back to the MSR.\r | |
3695 | \r | |
3696 | **/\r | |
3697 | UINT64\r | |
3698 | EFIAPI\r | |
3699 | AsmMsrBitFieldAndThenOr64 (\r | |
3700 | IN UINT32 Index,\r | |
3701 | IN UINTN StartBit,\r | |
3702 | IN UINTN EndBit,\r | |
3703 | IN UINT64 AndData,\r | |
3704 | IN UINT64 OrData\r | |
3705 | );\r | |
3706 | \r | |
3707 | /**\r | |
3708 | Reads the current value of the EFLAGS register.\r | |
3709 | \r | |
3710 | Reads and returns the current value of the EFLAGS register. This function is\r | |
3711 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r | |
3712 | 64-bit value on X64.\r | |
3713 | \r | |
3714 | @return EFLAGS on IA-32 or RFLAGS on X64.\r | |
3715 | \r | |
3716 | **/\r | |
3717 | UINTN\r | |
3718 | EFIAPI\r | |
3719 | AsmReadEflags (\r | |
3720 | VOID\r | |
3721 | );\r | |
3722 | \r | |
3723 | /**\r | |
3724 | Reads the current value of the Control Register 0 (CR0).\r | |
3725 | \r | |
3726 | Reads and returns the current value of CR0. This function is only available\r | |
3727 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3728 | X64.\r | |
3729 | \r | |
3730 | @return The value of the Control Register 0 (CR0).\r | |
3731 | \r | |
3732 | **/\r | |
3733 | UINTN\r | |
3734 | EFIAPI\r | |
3735 | AsmReadCr0 (\r | |
3736 | VOID\r | |
3737 | );\r | |
3738 | \r | |
3739 | /**\r | |
3740 | Reads the current value of the Control Register 2 (CR2).\r | |
3741 | \r | |
3742 | Reads and returns the current value of CR2. This function is only available\r | |
3743 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3744 | X64.\r | |
3745 | \r | |
3746 | @return The value of the Control Register 2 (CR2).\r | |
3747 | \r | |
3748 | **/\r | |
3749 | UINTN\r | |
3750 | EFIAPI\r | |
3751 | AsmReadCr2 (\r | |
3752 | VOID\r | |
3753 | );\r | |
3754 | \r | |
3755 | /**\r | |
3756 | Reads the current value of the Control Register 3 (CR3).\r | |
3757 | \r | |
3758 | Reads and returns the current value of CR3. This function is only available\r | |
3759 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3760 | X64.\r | |
3761 | \r | |
3762 | @return The value of the Control Register 3 (CR3).\r | |
3763 | \r | |
3764 | **/\r | |
3765 | UINTN\r | |
3766 | EFIAPI\r | |
3767 | AsmReadCr3 (\r | |
3768 | VOID\r | |
3769 | );\r | |
3770 | \r | |
3771 | /**\r | |
3772 | Reads the current value of the Control Register 4 (CR4).\r | |
3773 | \r | |
3774 | Reads and returns the current value of CR4. This function is only available\r | |
3775 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3776 | X64.\r | |
3777 | \r | |
3778 | @return The value of the Control Register 4 (CR4).\r | |
3779 | \r | |
3780 | **/\r | |
3781 | UINTN\r | |
3782 | EFIAPI\r | |
3783 | AsmReadCr4 (\r | |
3784 | VOID\r | |
3785 | );\r | |
3786 | \r | |
3787 | /**\r | |
3788 | Writes a value to Control Register 0 (CR0).\r | |
3789 | \r | |
3790 | Writes and returns a new value to CR0. This function is only available on\r | |
3791 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3792 | \r | |
3793 | @param Cr0 The value to write to CR0.\r | |
3794 | \r | |
3795 | @return The value written to CR0.\r | |
3796 | \r | |
3797 | **/\r | |
3798 | UINTN\r | |
3799 | EFIAPI\r | |
3800 | AsmWriteCr0 (\r | |
3801 | UINTN Cr0\r | |
3802 | );\r | |
3803 | \r | |
3804 | /**\r | |
3805 | Writes a value to Control Register 2 (CR2).\r | |
3806 | \r | |
3807 | Writes and returns a new value to CR2. This function is only available on\r | |
3808 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3809 | \r | |
3810 | @param Cr2 The value to write to CR2.\r | |
3811 | \r | |
3812 | @return The value written to CR2.\r | |
3813 | \r | |
3814 | **/\r | |
3815 | UINTN\r | |
3816 | EFIAPI\r | |
3817 | AsmWriteCr2 (\r | |
3818 | UINTN Cr2\r | |
3819 | );\r | |
3820 | \r | |
3821 | /**\r | |
3822 | Writes a value to Control Register 3 (CR3).\r | |
3823 | \r | |
3824 | Writes and returns a new value to CR3. This function is only available on\r | |
3825 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3826 | \r | |
3827 | @param Cr3 The value to write to CR3.\r | |
3828 | \r | |
3829 | @return The value written to CR3.\r | |
3830 | \r | |
3831 | **/\r | |
3832 | UINTN\r | |
3833 | EFIAPI\r | |
3834 | AsmWriteCr3 (\r | |
3835 | UINTN Cr3\r | |
3836 | );\r | |
3837 | \r | |
3838 | /**\r | |
3839 | Writes a value to Control Register 4 (CR4).\r | |
3840 | \r | |
3841 | Writes and returns a new value to CR4. This function is only available on\r | |
3842 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3843 | \r | |
3844 | @param Cr4 The value to write to CR4.\r | |
3845 | \r | |
3846 | @return The value written to CR4.\r | |
3847 | \r | |
3848 | **/\r | |
3849 | UINTN\r | |
3850 | EFIAPI\r | |
3851 | AsmWriteCr4 (\r | |
3852 | UINTN Cr4\r | |
3853 | );\r | |
3854 | \r | |
3855 | /**\r | |
3856 | Reads the current value of Debug Register 0 (DR0).\r | |
3857 | \r | |
3858 | Reads and returns the current value of DR0. This function is only available\r | |
3859 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3860 | X64.\r | |
3861 | \r | |
3862 | @return The value of Debug Register 0 (DR0).\r | |
3863 | \r | |
3864 | **/\r | |
3865 | UINTN\r | |
3866 | EFIAPI\r | |
3867 | AsmReadDr0 (\r | |
3868 | VOID\r | |
3869 | );\r | |
3870 | \r | |
3871 | /**\r | |
3872 | Reads the current value of Debug Register 1 (DR1).\r | |
3873 | \r | |
3874 | Reads and returns the current value of DR1. This function is only available\r | |
3875 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3876 | X64.\r | |
3877 | \r | |
3878 | @return The value of Debug Register 1 (DR1).\r | |
3879 | \r | |
3880 | **/\r | |
3881 | UINTN\r | |
3882 | EFIAPI\r | |
3883 | AsmReadDr1 (\r | |
3884 | VOID\r | |
3885 | );\r | |
3886 | \r | |
3887 | /**\r | |
3888 | Reads the current value of Debug Register 2 (DR2).\r | |
3889 | \r | |
3890 | Reads and returns the current value of DR2. This function is only available\r | |
3891 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3892 | X64.\r | |
3893 | \r | |
3894 | @return The value of Debug Register 2 (DR2).\r | |
3895 | \r | |
3896 | **/\r | |
3897 | UINTN\r | |
3898 | EFIAPI\r | |
3899 | AsmReadDr2 (\r | |
3900 | VOID\r | |
3901 | );\r | |
3902 | \r | |
3903 | /**\r | |
3904 | Reads the current value of Debug Register 3 (DR3).\r | |
3905 | \r | |
3906 | Reads and returns the current value of DR3. This function is only available\r | |
3907 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3908 | X64.\r | |
3909 | \r | |
3910 | @return The value of Debug Register 3 (DR3).\r | |
3911 | \r | |
3912 | **/\r | |
3913 | UINTN\r | |
3914 | EFIAPI\r | |
3915 | AsmReadDr3 (\r | |
3916 | VOID\r | |
3917 | );\r | |
3918 | \r | |
3919 | /**\r | |
3920 | Reads the current value of Debug Register 4 (DR4).\r | |
3921 | \r | |
3922 | Reads and returns the current value of DR4. This function is only available\r | |
3923 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3924 | X64.\r | |
3925 | \r | |
3926 | @return The value of Debug Register 4 (DR4).\r | |
3927 | \r | |
3928 | **/\r | |
3929 | UINTN\r | |
3930 | EFIAPI\r | |
3931 | AsmReadDr4 (\r | |
3932 | VOID\r | |
3933 | );\r | |
3934 | \r | |
3935 | /**\r | |
3936 | Reads the current value of Debug Register 5 (DR5).\r | |
3937 | \r | |
3938 | Reads and returns the current value of DR5. This function is only available\r | |
3939 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3940 | X64.\r | |
3941 | \r | |
3942 | @return The value of Debug Register 5 (DR5).\r | |
3943 | \r | |
3944 | **/\r | |
3945 | UINTN\r | |
3946 | EFIAPI\r | |
3947 | AsmReadDr5 (\r | |
3948 | VOID\r | |
3949 | );\r | |
3950 | \r | |
3951 | /**\r | |
3952 | Reads the current value of Debug Register 6 (DR6).\r | |
3953 | \r | |
3954 | Reads and returns the current value of DR6. This function is only available\r | |
3955 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3956 | X64.\r | |
3957 | \r | |
3958 | @return The value of Debug Register 6 (DR6).\r | |
3959 | \r | |
3960 | **/\r | |
3961 | UINTN\r | |
3962 | EFIAPI\r | |
3963 | AsmReadDr6 (\r | |
3964 | VOID\r | |
3965 | );\r | |
3966 | \r | |
3967 | /**\r | |
3968 | Reads the current value of Debug Register 7 (DR7).\r | |
3969 | \r | |
3970 | Reads and returns the current value of DR7. This function is only available\r | |
3971 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3972 | X64.\r | |
3973 | \r | |
3974 | @return The value of Debug Register 7 (DR7).\r | |
3975 | \r | |
3976 | **/\r | |
3977 | UINTN\r | |
3978 | EFIAPI\r | |
3979 | AsmReadDr7 (\r | |
3980 | VOID\r | |
3981 | );\r | |
3982 | \r | |
3983 | /**\r | |
3984 | Writes a value to Debug Register 0 (DR0).\r | |
3985 | \r | |
3986 | Writes and returns a new value to DR0. This function is only available on\r | |
3987 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3988 | \r | |
3989 | @param Dr0 The value to write to Dr0.\r | |
3990 | \r | |
3991 | @return The value written to Debug Register 0 (DR0).\r | |
3992 | \r | |
3993 | **/\r | |
3994 | UINTN\r | |
3995 | EFIAPI\r | |
3996 | AsmWriteDr0 (\r | |
3997 | UINTN Dr0\r | |
3998 | );\r | |
3999 | \r | |
4000 | /**\r | |
4001 | Writes a value to Debug Register 1 (DR1).\r | |
4002 | \r | |
4003 | Writes and returns a new value to DR1. This function is only available on\r | |
4004 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4005 | \r | |
4006 | @param Dr1 The value to write to Dr1.\r | |
4007 | \r | |
4008 | @return The value written to Debug Register 1 (DR1).\r | |
4009 | \r | |
4010 | **/\r | |
4011 | UINTN\r | |
4012 | EFIAPI\r | |
4013 | AsmWriteDr1 (\r | |
4014 | UINTN Dr1\r | |
4015 | );\r | |
4016 | \r | |
4017 | /**\r | |
4018 | Writes a value to Debug Register 2 (DR2).\r | |
4019 | \r | |
4020 | Writes and returns a new value to DR2. This function is only available on\r | |
4021 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4022 | \r | |
4023 | @param Dr2 The value to write to Dr2.\r | |
4024 | \r | |
4025 | @return The value written to Debug Register 2 (DR2).\r | |
4026 | \r | |
4027 | **/\r | |
4028 | UINTN\r | |
4029 | EFIAPI\r | |
4030 | AsmWriteDr2 (\r | |
4031 | UINTN Dr2\r | |
4032 | );\r | |
4033 | \r | |
4034 | /**\r | |
4035 | Writes a value to Debug Register 3 (DR3).\r | |
4036 | \r | |
4037 | Writes and returns a new value to DR3. This function is only available on\r | |
4038 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4039 | \r | |
4040 | @param Dr3 The value to write to Dr3.\r | |
4041 | \r | |
4042 | @return The value written to Debug Register 3 (DR3).\r | |
4043 | \r | |
4044 | **/\r | |
4045 | UINTN\r | |
4046 | EFIAPI\r | |
4047 | AsmWriteDr3 (\r | |
4048 | UINTN Dr3\r | |
4049 | );\r | |
4050 | \r | |
4051 | /**\r | |
4052 | Writes a value to Debug Register 4 (DR4).\r | |
4053 | \r | |
4054 | Writes and returns a new value to DR4. This function is only available on\r | |
4055 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4056 | \r | |
4057 | @param Dr4 The value to write to Dr4.\r | |
4058 | \r | |
4059 | @return The value written to Debug Register 4 (DR4).\r | |
4060 | \r | |
4061 | **/\r | |
4062 | UINTN\r | |
4063 | EFIAPI\r | |
4064 | AsmWriteDr4 (\r | |
4065 | UINTN Dr4\r | |
4066 | );\r | |
4067 | \r | |
4068 | /**\r | |
4069 | Writes a value to Debug Register 5 (DR5).\r | |
4070 | \r | |
4071 | Writes and returns a new value to DR5. This function is only available on\r | |
4072 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4073 | \r | |
4074 | @param Dr5 The value to write to Dr5.\r | |
4075 | \r | |
4076 | @return The value written to Debug Register 5 (DR5).\r | |
4077 | \r | |
4078 | **/\r | |
4079 | UINTN\r | |
4080 | EFIAPI\r | |
4081 | AsmWriteDr5 (\r | |
4082 | UINTN Dr5\r | |
4083 | );\r | |
4084 | \r | |
4085 | /**\r | |
4086 | Writes a value to Debug Register 6 (DR6).\r | |
4087 | \r | |
4088 | Writes and returns a new value to DR6. This function is only available on\r | |
4089 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4090 | \r | |
4091 | @param Dr6 The value to write to Dr6.\r | |
4092 | \r | |
4093 | @return The value written to Debug Register 6 (DR6).\r | |
4094 | \r | |
4095 | **/\r | |
4096 | UINTN\r | |
4097 | EFIAPI\r | |
4098 | AsmWriteDr6 (\r | |
4099 | UINTN Dr6\r | |
4100 | );\r | |
4101 | \r | |
4102 | /**\r | |
4103 | Writes a value to Debug Register 7 (DR7).\r | |
4104 | \r | |
4105 | Writes and returns a new value to DR7. This function is only available on\r | |
4106 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4107 | \r | |
4108 | @param Dr7 The value to write to Dr7.\r | |
4109 | \r | |
4110 | @return The value written to Debug Register 7 (DR7).\r | |
4111 | \r | |
4112 | **/\r | |
4113 | UINTN\r | |
4114 | EFIAPI\r | |
4115 | AsmWriteDr7 (\r | |
4116 | UINTN Dr7\r | |
4117 | );\r | |
4118 | \r | |
4119 | /**\r | |
4120 | Reads the current value of Code Segment Register (CS).\r | |
4121 | \r | |
4122 | Reads and returns the current value of CS. This function is only available on\r | |
4123 | IA-32 and X64.\r | |
4124 | \r | |
4125 | @return The current value of CS.\r | |
4126 | \r | |
4127 | **/\r | |
4128 | UINT16\r | |
4129 | EFIAPI\r | |
4130 | AsmReadCs (\r | |
4131 | VOID\r | |
4132 | );\r | |
4133 | \r | |
4134 | /**\r | |
4135 | Reads the current value of Data Segment Register (DS).\r | |
4136 | \r | |
4137 | Reads and returns the current value of DS. This function is only available on\r | |
4138 | IA-32 and X64.\r | |
4139 | \r | |
4140 | @return The current value of DS.\r | |
4141 | \r | |
4142 | **/\r | |
4143 | UINT16\r | |
4144 | EFIAPI\r | |
4145 | AsmReadDs (\r | |
4146 | VOID\r | |
4147 | );\r | |
4148 | \r | |
4149 | /**\r | |
4150 | Reads the current value of Extra Segment Register (ES).\r | |
4151 | \r | |
4152 | Reads and returns the current value of ES. This function is only available on\r | |
4153 | IA-32 and X64.\r | |
4154 | \r | |
4155 | @return The current value of ES.\r | |
4156 | \r | |
4157 | **/\r | |
4158 | UINT16\r | |
4159 | EFIAPI\r | |
4160 | AsmReadEs (\r | |
4161 | VOID\r | |
4162 | );\r | |
4163 | \r | |
4164 | /**\r | |
4165 | Reads the current value of FS Data Segment Register (FS).\r | |
4166 | \r | |
4167 | Reads and returns the current value of FS. This function is only available on\r | |
4168 | IA-32 and X64.\r | |
4169 | \r | |
4170 | @return The current value of FS.\r | |
4171 | \r | |
4172 | **/\r | |
4173 | UINT16\r | |
4174 | EFIAPI\r | |
4175 | AsmReadFs (\r | |
4176 | VOID\r | |
4177 | );\r | |
4178 | \r | |
4179 | /**\r | |
4180 | Reads the current value of GS Data Segment Register (GS).\r | |
4181 | \r | |
4182 | Reads and returns the current value of GS. This function is only available on\r | |
4183 | IA-32 and X64.\r | |
4184 | \r | |
4185 | @return The current value of GS.\r | |
4186 | \r | |
4187 | **/\r | |
4188 | UINT16\r | |
4189 | EFIAPI\r | |
4190 | AsmReadGs (\r | |
4191 | VOID\r | |
4192 | );\r | |
4193 | \r | |
4194 | /**\r | |
4195 | Reads the current value of Stack Segment Register (SS).\r | |
4196 | \r | |
4197 | Reads and returns the current value of SS. This function is only available on\r | |
4198 | IA-32 and X64.\r | |
4199 | \r | |
4200 | @return The current value of SS.\r | |
4201 | \r | |
4202 | **/\r | |
4203 | UINT16\r | |
4204 | EFIAPI\r | |
4205 | AsmReadSs (\r | |
4206 | VOID\r | |
4207 | );\r | |
4208 | \r | |
4209 | /**\r | |
4210 | Reads the current value of Task Register (TR).\r | |
4211 | \r | |
4212 | Reads and returns the current value of TR. This function is only available on\r | |
4213 | IA-32 and X64.\r | |
4214 | \r | |
4215 | @return The current value of TR.\r | |
4216 | \r | |
4217 | **/\r | |
4218 | UINT16\r | |
4219 | EFIAPI\r | |
4220 | AsmReadTr (\r | |
4221 | VOID\r | |
4222 | );\r | |
4223 | \r | |
4224 | /**\r | |
4225 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
4226 | \r | |
4227 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
4228 | function is only available on IA-32 and X64.\r | |
4229 | \r | |
4230 | If Gdtr is NULL, then ASSERT().\r | |
4231 | \r | |
4232 | @param Gdtr Pointer to a GDTR descriptor.\r | |
4233 | \r | |
4234 | **/\r | |
4235 | VOID\r | |
4236 | EFIAPI\r | |
4237 | AsmReadGdtr (\r | |
4238 | OUT IA32_DESCRIPTOR *Gdtr\r | |
4239 | );\r | |
4240 | \r | |
4241 | /**\r | |
4242 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
4243 | \r | |
4244 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
4245 | only available on IA-32 and X64.\r | |
4246 | \r | |
4247 | If Gdtr is NULL, then ASSERT().\r | |
4248 | \r | |
4249 | @param Gdtr Pointer to a GDTR descriptor.\r | |
4250 | \r | |
4251 | **/\r | |
4252 | VOID\r | |
4253 | EFIAPI\r | |
4254 | AsmWriteGdtr (\r | |
4255 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
4256 | );\r | |
4257 | \r | |
4258 | /**\r | |
4259 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
4260 | \r | |
4261 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
4262 | function is only available on IA-32 and X64.\r | |
4263 | \r | |
4264 | If Idtr is NULL, then ASSERT().\r | |
4265 | \r | |
4266 | @param Idtr Pointer to a IDTR descriptor.\r | |
4267 | \r | |
4268 | **/\r | |
4269 | VOID\r | |
4270 | EFIAPI\r | |
4271 | AsmReadIdtr (\r | |
4272 | OUT IA32_DESCRIPTOR *Idtr\r | |
4273 | );\r | |
4274 | \r | |
4275 | /**\r | |
4276 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
4277 | \r | |
4278 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
4279 | only available on IA-32 and X64.\r | |
4280 | \r | |
4281 | If Idtr is NULL, then ASSERT().\r | |
4282 | \r | |
4283 | @param Idtr Pointer to a IDTR descriptor.\r | |
4284 | \r | |
4285 | **/\r | |
4286 | VOID\r | |
4287 | EFIAPI\r | |
4288 | AsmWriteIdtr (\r | |
4289 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
4290 | );\r | |
4291 | \r | |
4292 | /**\r | |
4293 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
4294 | \r | |
4295 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
4296 | only available on IA-32 and X64.\r | |
4297 | \r | |
4298 | @return The current selector of LDT.\r | |
4299 | \r | |
4300 | **/\r | |
4301 | UINT16\r | |
4302 | EFIAPI\r | |
4303 | AsmReadLdtr (\r | |
4304 | VOID\r | |
4305 | );\r | |
4306 | \r | |
4307 | /**\r | |
4308 | Writes the current Local Descriptor Table Register (GDTR) selector.\r | |
4309 | \r | |
4310 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
4311 | only available on IA-32 and X64.\r | |
4312 | \r | |
4313 | @param Ldtr 16-bit LDTR selector value.\r | |
4314 | \r | |
4315 | **/\r | |
4316 | VOID\r | |
4317 | EFIAPI\r | |
4318 | AsmWriteLdtr (\r | |
4319 | IN UINT16 Ldtr\r | |
4320 | );\r | |
4321 | \r | |
4322 | /**\r | |
4323 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
4324 | \r | |
4325 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
4326 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
4327 | available on IA-32 and X64.\r | |
4328 | \r | |
4329 | If Buffer is NULL, then ASSERT().\r | |
4330 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
4331 | \r | |
4332 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
4333 | \r | |
4334 | **/\r | |
4335 | VOID\r | |
4336 | EFIAPI\r | |
4337 | AsmFxSave (\r | |
4338 | OUT IA32_FX_BUFFER *Buffer\r | |
4339 | );\r | |
4340 | \r | |
4341 | /**\r | |
4342 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
4343 | \r | |
4344 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
4345 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
4346 | only available on IA-32 and X64.\r | |
4347 | \r | |
4348 | If Buffer is NULL, then ASSERT().\r | |
4349 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
4350 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
4351 | \r | |
4352 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
4353 | \r | |
4354 | **/\r | |
4355 | VOID\r | |
4356 | EFIAPI\r | |
4357 | AsmFxRestore (\r | |
4358 | IN CONST IA32_FX_BUFFER *Buffer\r | |
4359 | );\r | |
4360 | \r | |
4361 | /**\r | |
4362 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
4363 | \r | |
4364 | Reads and returns the current value of MM0. This function is only available\r | |
4365 | on IA-32 and X64.\r | |
4366 | \r | |
4367 | @return The current value of MM0.\r | |
4368 | \r | |
4369 | **/\r | |
4370 | UINT64\r | |
4371 | EFIAPI\r | |
4372 | AsmReadMm0 (\r | |
4373 | VOID\r | |
4374 | );\r | |
4375 | \r | |
4376 | /**\r | |
4377 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
4378 | \r | |
4379 | Reads and returns the current value of MM1. This function is only available\r | |
4380 | on IA-32 and X64.\r | |
4381 | \r | |
4382 | @return The current value of MM1.\r | |
4383 | \r | |
4384 | **/\r | |
4385 | UINT64\r | |
4386 | EFIAPI\r | |
4387 | AsmReadMm1 (\r | |
4388 | VOID\r | |
4389 | );\r | |
4390 | \r | |
4391 | /**\r | |
4392 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
4393 | \r | |
4394 | Reads and returns the current value of MM2. This function is only available\r | |
4395 | on IA-32 and X64.\r | |
4396 | \r | |
4397 | @return The current value of MM2.\r | |
4398 | \r | |
4399 | **/\r | |
4400 | UINT64\r | |
4401 | EFIAPI\r | |
4402 | AsmReadMm2 (\r | |
4403 | VOID\r | |
4404 | );\r | |
4405 | \r | |
4406 | /**\r | |
4407 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
4408 | \r | |
4409 | Reads and returns the current value of MM3. This function is only available\r | |
4410 | on IA-32 and X64.\r | |
4411 | \r | |
4412 | @return The current value of MM3.\r | |
4413 | \r | |
4414 | **/\r | |
4415 | UINT64\r | |
4416 | EFIAPI\r | |
4417 | AsmReadMm3 (\r | |
4418 | VOID\r | |
4419 | );\r | |
4420 | \r | |
4421 | /**\r | |
4422 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
4423 | \r | |
4424 | Reads and returns the current value of MM4. This function is only available\r | |
4425 | on IA-32 and X64.\r | |
4426 | \r | |
4427 | @return The current value of MM4.\r | |
4428 | \r | |
4429 | **/\r | |
4430 | UINT64\r | |
4431 | EFIAPI\r | |
4432 | AsmReadMm4 (\r | |
4433 | VOID\r | |
4434 | );\r | |
4435 | \r | |
4436 | /**\r | |
4437 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
4438 | \r | |
4439 | Reads and returns the current value of MM5. This function is only available\r | |
4440 | on IA-32 and X64.\r | |
4441 | \r | |
4442 | @return The current value of MM5.\r | |
4443 | \r | |
4444 | **/\r | |
4445 | UINT64\r | |
4446 | EFIAPI\r | |
4447 | AsmReadMm5 (\r | |
4448 | VOID\r | |
4449 | );\r | |
4450 | \r | |
4451 | /**\r | |
4452 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
4453 | \r | |
4454 | Reads and returns the current value of MM6. This function is only available\r | |
4455 | on IA-32 and X64.\r | |
4456 | \r | |
4457 | @return The current value of MM6.\r | |
4458 | \r | |
4459 | **/\r | |
4460 | UINT64\r | |
4461 | EFIAPI\r | |
4462 | AsmReadMm6 (\r | |
4463 | VOID\r | |
4464 | );\r | |
4465 | \r | |
4466 | /**\r | |
4467 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
4468 | \r | |
4469 | Reads and returns the current value of MM7. This function is only available\r | |
4470 | on IA-32 and X64.\r | |
4471 | \r | |
4472 | @return The current value of MM7.\r | |
4473 | \r | |
4474 | **/\r | |
4475 | UINT64\r | |
4476 | EFIAPI\r | |
4477 | AsmReadMm7 (\r | |
4478 | VOID\r | |
4479 | );\r | |
4480 | \r | |
4481 | /**\r | |
4482 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
4483 | \r | |
4484 | Writes the current value of MM0. This function is only available on IA32 and\r | |
4485 | X64.\r | |
4486 | \r | |
4487 | @param Value The 64-bit value to write to MM0.\r | |
4488 | \r | |
4489 | **/\r | |
4490 | VOID\r | |
4491 | EFIAPI\r | |
4492 | AsmWriteMm0 (\r | |
4493 | IN UINT64 Value\r | |
4494 | );\r | |
4495 | \r | |
4496 | /**\r | |
4497 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
4498 | \r | |
4499 | Writes the current value of MM1. This function is only available on IA32 and\r | |
4500 | X64.\r | |
4501 | \r | |
4502 | @param Value The 64-bit value to write to MM1.\r | |
4503 | \r | |
4504 | **/\r | |
4505 | VOID\r | |
4506 | EFIAPI\r | |
4507 | AsmWriteMm1 (\r | |
4508 | IN UINT64 Value\r | |
4509 | );\r | |
4510 | \r | |
4511 | /**\r | |
4512 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
4513 | \r | |
4514 | Writes the current value of MM2. This function is only available on IA32 and\r | |
4515 | X64.\r | |
4516 | \r | |
4517 | @param Value The 64-bit value to write to MM2.\r | |
4518 | \r | |
4519 | **/\r | |
4520 | VOID\r | |
4521 | EFIAPI\r | |
4522 | AsmWriteMm2 (\r | |
4523 | IN UINT64 Value\r | |
4524 | );\r | |
4525 | \r | |
4526 | /**\r | |
4527 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
4528 | \r | |
4529 | Writes the current value of MM3. This function is only available on IA32 and\r | |
4530 | X64.\r | |
4531 | \r | |
4532 | @param Value The 64-bit value to write to MM3.\r | |
4533 | \r | |
4534 | **/\r | |
4535 | VOID\r | |
4536 | EFIAPI\r | |
4537 | AsmWriteMm3 (\r | |
4538 | IN UINT64 Value\r | |
4539 | );\r | |
4540 | \r | |
4541 | /**\r | |
4542 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
4543 | \r | |
4544 | Writes the current value of MM4. This function is only available on IA32 and\r | |
4545 | X64.\r | |
4546 | \r | |
4547 | @param Value The 64-bit value to write to MM4.\r | |
4548 | \r | |
4549 | **/\r | |
4550 | VOID\r | |
4551 | EFIAPI\r | |
4552 | AsmWriteMm4 (\r | |
4553 | IN UINT64 Value\r | |
4554 | );\r | |
4555 | \r | |
4556 | /**\r | |
4557 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
4558 | \r | |
4559 | Writes the current value of MM5. This function is only available on IA32 and\r | |
4560 | X64.\r | |
4561 | \r | |
4562 | @param Value The 64-bit value to write to MM5.\r | |
4563 | \r | |
4564 | **/\r | |
4565 | VOID\r | |
4566 | EFIAPI\r | |
4567 | AsmWriteMm5 (\r | |
4568 | IN UINT64 Value\r | |
4569 | );\r | |
4570 | \r | |
4571 | /**\r | |
4572 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
4573 | \r | |
4574 | Writes the current value of MM6. This function is only available on IA32 and\r | |
4575 | X64.\r | |
4576 | \r | |
4577 | @param Value The 64-bit value to write to MM6.\r | |
4578 | \r | |
4579 | **/\r | |
4580 | VOID\r | |
4581 | EFIAPI\r | |
4582 | AsmWriteMm6 (\r | |
4583 | IN UINT64 Value\r | |
4584 | );\r | |
4585 | \r | |
4586 | /**\r | |
4587 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
4588 | \r | |
4589 | Writes the current value of MM7. This function is only available on IA32 and\r | |
4590 | X64.\r | |
4591 | \r | |
4592 | @param Value The 64-bit value to write to MM7.\r | |
4593 | \r | |
4594 | **/\r | |
4595 | VOID\r | |
4596 | EFIAPI\r | |
4597 | AsmWriteMm7 (\r | |
4598 | IN UINT64 Value\r | |
4599 | );\r | |
4600 | \r | |
4601 | /**\r | |
4602 | Reads the current value of Time Stamp Counter (TSC).\r | |
4603 | \r | |
4604 | Reads and returns the current value of TSC. This function is only available\r | |
4605 | on IA-32 and X64.\r | |
4606 | \r | |
4607 | @return The current value of TSC\r | |
4608 | \r | |
4609 | **/\r | |
4610 | UINT64\r | |
4611 | EFIAPI\r | |
4612 | AsmReadTsc (\r | |
4613 | VOID\r | |
4614 | );\r | |
4615 | \r | |
4616 | /**\r | |
4617 | Reads the current value of a Performance Counter (PMC).\r | |
4618 | \r | |
4619 | Reads and returns the current value of performance counter specified by\r | |
4620 | Index. This function is only available on IA-32 and X64.\r | |
4621 | \r | |
4622 | @param Index The 32-bit Performance Counter index to read.\r | |
4623 | \r | |
4624 | @return The value of the PMC specified by Index.\r | |
4625 | \r | |
4626 | **/\r | |
4627 | UINT64\r | |
4628 | EFIAPI\r | |
4629 | AsmReadPmc (\r | |
4630 | IN UINT32 Index\r | |
4631 | );\r | |
4632 | \r | |
4633 | /**\r | |
4634 | Sets up a monitor buffer that is used by AsmMwait().\r | |
4635 | \r | |
4636 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
4637 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r | |
4638 | \r | |
4639 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
4640 | instruction.\r | |
4641 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
4642 | instruction.\r | |
4643 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
4644 | instruction.\r | |
4645 | \r | |
4646 | @return Eax\r | |
4647 | \r | |
4648 | **/\r | |
4649 | UINTN\r | |
4650 | EFIAPI\r | |
4651 | AsmMonitor (\r | |
4652 | IN UINTN Eax,\r | |
4653 | IN UINTN Ecx,\r | |
4654 | IN UINTN Edx\r | |
4655 | );\r | |
4656 | \r | |
4657 | /**\r | |
4658 | Executes an MWAIT instruction.\r | |
4659 | \r | |
4660 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
4661 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r | |
4662 | \r | |
4663 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
4664 | instruction.\r | |
4665 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
4666 | instruction.\r | |
4667 | \r | |
4668 | @return Eax\r | |
4669 | \r | |
4670 | **/\r | |
4671 | UINTN\r | |
4672 | EFIAPI\r | |
4673 | AsmMwait (\r | |
4674 | IN UINTN Eax,\r | |
4675 | IN UINTN Ecx\r | |
4676 | );\r | |
4677 | \r | |
4678 | /**\r | |
4679 | Executes a WBINVD instruction.\r | |
4680 | \r | |
4681 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
4682 | X64.\r | |
4683 | \r | |
4684 | **/\r | |
4685 | VOID\r | |
4686 | EFIAPI\r | |
4687 | AsmWbinvd (\r | |
4688 | VOID\r | |
4689 | );\r | |
4690 | \r | |
4691 | /**\r | |
4692 | Executes a INVD instruction.\r | |
4693 | \r | |
4694 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
4695 | X64.\r | |
4696 | \r | |
4697 | **/\r | |
4698 | VOID\r | |
4699 | EFIAPI\r | |
4700 | AsmInvd (\r | |
4701 | VOID\r | |
4702 | );\r | |
4703 | \r | |
4704 | /**\r | |
4705 | Flushes a cache line from all the instruction and data caches within the\r | |
4706 | coherency domain of the CPU.\r | |
4707 | \r | |
4708 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
4709 | This function is only available on IA-32 and X64.\r | |
4710 | \r | |
4711 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
4712 | in a physical addressing mode, then LinearAddress is a\r | |
4713 | physical address. If the CPU is in a virtual\r | |
4714 | addressing mode, then LinearAddress is a virtual\r | |
4715 | address.\r | |
4716 | \r | |
4717 | @return LinearAddress\r | |
4718 | **/\r | |
4719 | VOID *\r | |
4720 | EFIAPI\r | |
4721 | AsmFlushCacheLine (\r | |
4722 | IN VOID *LinearAddress\r | |
4723 | );\r | |
4724 | \r | |
4725 | /**\r | |
4726 | Enables the 32-bit paging mode on the CPU.\r | |
4727 | \r | |
4728 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
4729 | must be properly initialized prior to calling this service. This function\r | |
4730 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
4731 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
4732 | transferred to the function specified by EntryPoint using the new stack\r | |
4733 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
4734 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
4735 | EntryPoint must never return.\r | |
4736 | \r | |
4737 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
4738 | If EntryPoint is NULL, then ASSERT().\r | |
4739 | If NewStack is NULL, then ASSERT().\r | |
4740 | \r | |
4741 | There are a number of constraints that must be followed before calling this\r | |
4742 | function:\r | |
4743 | 1) Interrupts must be disabled.\r | |
4744 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
4745 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
4746 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
4747 | descriptors.\r | |
4748 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
4749 | is complete, and those page tables must guarantee that the pages for this\r | |
4750 | function and the stack are identity mapped.\r | |
4751 | \r | |
4752 | @param EntryPoint A pointer to function to call with the new stack after\r | |
4753 | paging is enabled.\r | |
4754 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4755 | function as the first parameter after paging is enabled.\r | |
4756 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4757 | function as the second parameter after paging is enabled.\r | |
4758 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4759 | function after paging is enabled.\r | |
4760 | \r | |
4761 | **/\r | |
4762 | VOID\r | |
4763 | EFIAPI\r | |
4764 | AsmEnablePaging32 (\r | |
4765 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4766 | IN VOID *Context1, OPTIONAL\r | |
4767 | IN VOID *Context2, OPTIONAL\r | |
4768 | IN VOID *NewStack\r | |
4769 | );\r | |
4770 | \r | |
4771 | /**\r | |
4772 | Disables the 32-bit paging mode on the CPU.\r | |
4773 | \r | |
4774 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
4775 | mode. This function assumes the current execution mode is 32-paged protected\r | |
4776 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
4777 | is disabled, control is transferred to the function specified by EntryPoint\r | |
4778 | using the new stack specified by NewStack and passing in the parameters\r | |
4779 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
4780 | may be NULL. The function EntryPoint must never return.\r | |
4781 | \r | |
4782 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
4783 | If EntryPoint is NULL, then ASSERT().\r | |
4784 | If NewStack is NULL, then ASSERT().\r | |
4785 | \r | |
4786 | There are a number of constraints that must be followed before calling this\r | |
4787 | function:\r | |
4788 | 1) Interrupts must be disabled.\r | |
4789 | 2) The caller must be in 32-bit paged mode.\r | |
4790 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
4791 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
4792 | this function and the stack are identity mapped.\r | |
4793 | \r | |
4794 | @param EntryPoint A pointer to function to call with the new stack after\r | |
4795 | paging is disabled.\r | |
4796 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4797 | function as the first parameter after paging is disabled.\r | |
4798 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4799 | function as the second parameter after paging is\r | |
4800 | disabled.\r | |
4801 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4802 | function after paging is disabled.\r | |
4803 | \r | |
4804 | **/\r | |
4805 | VOID\r | |
4806 | EFIAPI\r | |
4807 | AsmDisablePaging32 (\r | |
4808 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4809 | IN VOID *Context1, OPTIONAL\r | |
4810 | IN VOID *Context2, OPTIONAL\r | |
4811 | IN VOID *NewStack\r | |
4812 | );\r | |
4813 | \r | |
4814 | /**\r | |
4815 | Enables the 64-bit paging mode on the CPU.\r | |
4816 | \r | |
4817 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
4818 | must be properly initialized prior to calling this service. This function\r | |
4819 | assumes the current execution mode is 32-bit protected mode with flat\r | |
4820 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
4821 | paging mode is enabled, control is transferred to the function specified by\r | |
4822 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
4823 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
4824 | optional and may be 0. The function EntryPoint must never return.\r | |
4825 | \r | |
4826 | If the current execution mode is not 32-bit protected mode with flat\r | |
4827 | descriptors, then ASSERT().\r | |
4828 | If EntryPoint is 0, then ASSERT().\r | |
4829 | If NewStack is 0, then ASSERT().\r | |
4830 | \r | |
4831 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
4832 | is called. The descriptor in the GDT that this selector\r | |
4833 | references must be setup for long mode.\r | |
4834 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
4835 | the new stack after paging is enabled.\r | |
4836 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
4837 | the EntryPoint function as the first parameter after\r | |
4838 | paging is enabled.\r | |
4839 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
4840 | the EntryPoint function as the second parameter after\r | |
4841 | paging is enabled.\r | |
4842 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
4843 | the EntryPoint function after paging is enabled.\r | |
4844 | \r | |
4845 | **/\r | |
4846 | VOID\r | |
4847 | EFIAPI\r | |
4848 | AsmEnablePaging64 (\r | |
4849 | IN UINT16 CodeSelector,\r | |
4850 | IN UINT64 EntryPoint,\r | |
4851 | IN UINT64 Context1, OPTIONAL\r | |
4852 | IN UINT64 Context2, OPTIONAL\r | |
4853 | IN UINT64 NewStack\r | |
4854 | );\r | |
4855 | \r | |
4856 | /**\r | |
4857 | Disables the 64-bit paging mode on the CPU.\r | |
4858 | \r | |
4859 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
4860 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
4861 | This function is only available on X64. After the 64-bit paging mode is\r | |
4862 | disabled, control is transferred to the function specified by EntryPoint\r | |
4863 | using the new stack specified by NewStack and passing in the parameters\r | |
4864 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
4865 | may be 0. The function EntryPoint must never return.\r | |
4866 | \r | |
4867 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
4868 | If EntryPoint is 0, then ASSERT().\r | |
4869 | If NewStack is 0, then ASSERT().\r | |
4870 | \r | |
4871 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
4872 | is called. The descriptor in the GDT that this selector\r | |
4873 | references must be setup for 32-bit protected mode.\r | |
4874 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
4875 | the new stack after paging is disabled.\r | |
4876 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
4877 | the EntryPoint function as the first parameter after\r | |
4878 | paging is disabled.\r | |
4879 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
4880 | the EntryPoint function as the second parameter after\r | |
4881 | paging is disabled.\r | |
4882 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
4883 | the EntryPoint function after paging is disabled.\r | |
4884 | \r | |
4885 | **/\r | |
4886 | VOID\r | |
4887 | EFIAPI\r | |
4888 | AsmDisablePaging64 (\r | |
4889 | IN UINT16 CodeSelector,\r | |
4890 | IN UINT32 EntryPoint,\r | |
4891 | IN UINT32 Context1, OPTIONAL\r | |
4892 | IN UINT32 Context2, OPTIONAL\r | |
4893 | IN UINT32 NewStack\r | |
4894 | );\r | |
4895 | \r | |
4896 | //\r | |
4897 | // 16-bit thunking services\r | |
4898 | //\r | |
4899 | \r | |
97d92bda | 4900 | /**\r |
4901 | Retrieves the properties for 16-bit thunk functions.\r | |
4902 | \r | |
4903 | Computes the size of the buffer and stack below 1MB required to use the\r | |
4904 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
4905 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
4906 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
4907 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
4908 | of bytes that need to be passed to the 16-bit real mode code.\r | |
4909 | \r | |
4910 | If RealModeBufferSize is NULL, then ASSERT().\r | |
4911 | If ExtraStackSize is NULL, then ASSERT().\r | |
4912 | \r | |
4913 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
4914 | required to use the 16-bit thunk functions.\r | |
4915 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
4916 | that the 16-bit thunk functions require for\r | |
4917 | temporary storage in the transition to and from\r | |
4918 | 16-bit real mode.\r | |
4919 | \r | |
4920 | **/\r | |
4921 | VOID\r | |
4922 | EFIAPI\r | |
4923 | AsmGetThunk16Properties (\r | |
4924 | OUT UINT32 *RealModeBufferSize,\r | |
4925 | OUT UINT32 *ExtraStackSize\r | |
4926 | );\r | |
4927 | \r | |
878ddf1f | 4928 | /**\r |
4929 | Prepares all structures a code required to use AsmThunk16().\r | |
4930 | \r | |
4931 | Prepares all structures and code required to use AsmThunk16().\r | |
4932 | \r | |
4933 | If ThunkContext is NULL, then ASSERT().\r | |
4934 | \r | |
4935 | @param ThunkContext A pointer to the context structure that describes the\r | |
4936 | 16-bit real mode code to call.\r | |
4937 | \r | |
4938 | **/\r | |
4939 | VOID\r | |
4940 | EFIAPI\r | |
4941 | AsmPrepareThunk16 (\r | |
4942 | OUT THUNK_CONTEXT *ThunkContext\r | |
4943 | );\r | |
4944 | \r | |
4945 | /**\r | |
4946 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
4947 | \r | |
4948 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
4949 | AsmPrepareThunk16() must be called with ThunkContext before this function is\r | |
4950 | used.\r | |
4951 | \r | |
4952 | If ThunkContext is NULL, then ASSERT().\r | |
4953 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
4954 | \r | |
4955 | @param ThunkContext A pointer to the context structure that describes the\r | |
4956 | 16-bit real mode code to call.\r | |
4957 | \r | |
4958 | **/\r | |
4959 | VOID\r | |
4960 | EFIAPI\r | |
4961 | AsmThunk16 (\r | |
4962 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
4963 | );\r | |
4964 | \r | |
4965 | /**\r | |
4966 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
4967 | control to a 16-bit real mode entry point, and returns the results.\r | |
4968 | \r | |
4969 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
4970 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
4971 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
4972 | service should be used. If the caller intends to make more than one 16-bit\r | |
4973 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
4974 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
4975 | \r | |
4976 | If ThunkContext is NULL, then ASSERT().\r | |
4977 | \r | |
4978 | @param ThunkContext A pointer to the context structure that describes the\r | |
4979 | 16-bit real mode code to call.\r | |
4980 | \r | |
4981 | **/\r | |
4982 | VOID\r | |
4983 | EFIAPI\r | |
4984 | AsmPrepareAndThunk16 (\r | |
4985 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
4986 | );\r | |
4987 | \r | |
681dbac9 | 4988 | /**\r |
4989 | Transfers control to a function starting with a new stack.\r | |
4990 | \r | |
4991 | Transfers control to the function specified by EntryPoint using the new stack\r | |
4992 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
4993 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
4994 | EntryPoint must never return.\r | |
4995 | \r | |
4996 | If EntryPoint is NULL, then ASSERT().\r | |
4997 | If NewStack is NULL, then ASSERT().\r | |
4998 | \r | |
4999 | @param EntryPoint A pointer to function to call with the new stack.\r | |
5000 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
5001 | function.\r | |
5002 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
5003 | function.\r | |
5004 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
5005 | function.\r | |
5006 | @param NewBsp A pointer to the new memory location for RSE backing\r | |
5007 | store.\r | |
5008 | \r | |
5009 | **/\r | |
5010 | VOID\r | |
5011 | EFIAPI\r | |
5012 | AsmSwitchStackAndBackingStore (\r | |
5013 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
5014 | IN VOID *Context1, OPTIONAL\r | |
5015 | IN VOID *Context2, OPTIONAL\r | |
5016 | IN VOID *NewStack,\r | |
5017 | IN VOID *NewBsp\r | |
5018 | );\r | |
5019 | \r | |
cd4903c4 | 5020 | typedef struct {\r |
5021 | UINT64 Status;\r | |
5022 | UINT64 r9;\r | |
5023 | UINT64 r10;\r | |
5024 | UINT64 r11;\r | |
5025 | } PAL_PROC_RETURN;\r | |
5026 | \r | |
5027 | //\r | |
5028 | // IPF Specific functions\r | |
5029 | //\r | |
5030 | \r | |
5031 | \r | |
5032 | /**\r | |
5033 | Performs a PAL call using static calling convention.\r | |
5034 | \r | |
5035 | An internal function to perform a PAL call using static calling convention.\r | |
5036 | \r | |
5037 | @param PalEntryPoint The entry point address of PAL. The address in ar.kr5\r | |
5038 | would be used if this parameter were NULL on input.\r | |
5039 | @param Arg1 The first argument of a PAL call.\r | |
5040 | @param Arg1 The second argument of a PAL call.\r | |
5041 | @param Arg1 The third argument of a PAL call.\r | |
5042 | @param Arg1 The fourth argument of a PAL call.\r | |
5043 | \r | |
5044 | @return The values returned in r8, r9, r10 and r11.\r | |
5045 | \r | |
5046 | **/\r | |
5047 | PAL_PROC_RETURN\r | |
5048 | PalCallStatic (\r | |
5049 | IN CONST VOID *PalEntryPoint,\r | |
5050 | IN UINT64 Arg1,\r | |
5051 | IN UINT64 Arg2,\r | |
5052 | IN UINT64 Arg3,\r | |
5053 | IN UINT64 Arg4\r | |
5054 | );\r | |
5055 | \r | |
5056 | \r | |
5057 | /**\r | |
5058 | Returns the current value of ar.itc.\r | |
5059 | \r | |
5060 | An internal function to return the current value of ar.itc, which is the\r | |
5061 | timer tick on IPF.\r | |
5062 | \r | |
5063 | @return The currect value of ar.itc\r | |
5064 | \r | |
5065 | **/\r | |
5066 | INT64\r | |
5067 | IpfReadItc (\r | |
5068 | VOID\r | |
5069 | );\r | |
5070 | \r | |
5071 | \r | |
5072 | /**\r | |
92ea7f23 | 5073 | Flush a range of cache lines in the cache coherency domain of the calling \r |
5074 | CPU.\r | |
5075 | \r | |
5076 | Invalidates the cache lines specified by Address and Length. If Address is \r | |
5077 | not aligned on a cache line boundary, then entire cache line containing \r | |
5078 | Address is invalidated. If Address + Length is not aligned on a cache line \r | |
5079 | boundary, then the entire instruction cache line containing Address + Length\r | |
5080 | -1 is invalidated. This function may choose to invalidate the entire \r | |
5081 | instruction cache if that is more efficient than invalidating the specified \r | |
5082 | range. If Length is 0, the no instruction cache lines are invalidated. \r | |
5083 | Address is returned.\r | |
cd4903c4 | 5084 | \r |
5085 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
5086 | \r | |
92ea7f23 | 5087 | @param Address The base address of the instruction lines to invalidate. If \r |
5088 | the CPU is in a physical addressing mode, then Address is a\r | |
5089 | physical address. If the CPU is in a virtual addressing mode,\r | |
5090 | then Address is a virtual address.\r | |
cd4903c4 | 5091 | \r |
5092 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
5093 | \r | |
5094 | @return Address\r | |
5095 | \r | |
5096 | **/\r | |
5097 | VOID *\r | |
5098 | EFIAPI\r | |
92ea7f23 | 5099 | IpfFlushCacheRange (\r |
cd4903c4 | 5100 | IN VOID *Address,\r |
5101 | IN UINTN Length\r | |
5102 | );\r | |
5103 | \r | |
878ddf1f | 5104 | #endif\r |