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1/** @file\r
2 EFI MM Control PPI definition.\r
3\r
4 This PPI is used initiate synchronous MMI activations. This PPI could be published by a processor\r
5 driver to abstract the MMI IPI or a driver which abstracts the ASIC that is supporting the APM port.\r
6 Because of the possibility of performing MMI IPI transactions, the ability to generate this event\r
7 from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.\r
8\r
9 Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
10 SPDX-License-Identifier: BSD-2-Clause-Patent\r
11\r
12 @par Revision Reference:\r
13 This PPI is introduced in PI Version 1.5.\r
14\r
15**/\r
16\r
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17#ifndef _MM_CONTROL_PPI_H_\r
18#define _MM_CONTROL_PPI_H_\r
19\r
20#define EFI_PEI_MM_CONTROL_PPI_GUID \\r
21 { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }\r
22\r
2f88bd3a 23typedef struct _EFI_PEI_MM_CONTROL_PPI EFI_PEI_MM_CONTROL_PPI;\r
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24\r
25/**\r
26 Invokes PPI activation from the PI PEI environment.\r
27\r
28 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
29 @param This The PEI_MM_CONTROL_PPI instance.\r
30 @param ArgumentBuffer The value passed to the MMI handler. This value corresponds to the\r
31 SwMmiInputValue in the RegisterContext parameter for the Register()\r
32 function in the EFI_MM_SW_DISPATCH_PROTOCOL and in the Context parameter\r
33 in the call to the DispatchFunction\r
34 @param ArgumentBufferSize The size of the data passed in ArgumentBuffer or NULL if ArgumentBuffer is NULL.\r
35 @param Periodic An optional mechanism to periodically repeat activation.\r
36 @param ActivationInterval An optional parameter to repeat at this period one\r
37 time or, if the Periodic Boolean is set, periodically.\r
38\r
39 @retval EFI_SUCCESS The MMI has been engendered.\r
40 @retval EFI_DEVICE_ERROR The timing is unsupported.\r
41 @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
42 @retval EFI_NOT_STARTED The MM base service has not been initialized.\r
43\r
44**/\r
45typedef\r
46EFI_STATUS\r
2f88bd3a 47(EFIAPI *EFI_PEI_MM_ACTIVATE)(\r
6f33f7a2 48 IN EFI_PEI_SERVICES **PeiServices,\r
2f88bd3a 49 IN EFI_PEI_MM_CONTROL_PPI *This,\r
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50 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
51 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
52 IN BOOLEAN Periodic OPTIONAL,\r
53 IN UINTN ActivationInterval OPTIONAL\r
54 );\r
55\r
56/**\r
57 Clears any system state that was created in response to the Trigger() call.\r
58\r
59 @param PeiServices General purpose services available to every PEIM.\r
60 @param This The PEI_MM_CONTROL_PPI instance.\r
61 @param Periodic Optional parameter to repeat at this period one\r
62 time or, if the Periodic Boolean is set, periodically.\r
63\r
64 @retval EFI_SUCCESS The MMI has been engendered.\r
65 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
66 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
67\r
68**/\r
69typedef\r
70EFI_STATUS\r
2f88bd3a 71(EFIAPI *EFI_PEI_MM_DEACTIVATE)(\r
6f33f7a2 72 IN EFI_PEI_SERVICES **PeiServices,\r
2f88bd3a 73 IN EFI_PEI_MM_CONTROL_PPI *This,\r
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74 IN BOOLEAN Periodic OPTIONAL\r
75 );\r
76\r
77///\r
78/// The EFI_PEI_MM_CONTROL_PPI is produced by a PEIM. It provides an abstraction of the\r
79/// platform hardware that generates an MMI. There are often I/O ports that, when accessed, will\r
80/// generate the MMI. Also, the hardware optionally supports the periodic generation of these signals.\r
81///\r
d3ff5dbe 82struct _EFI_PEI_MM_CONTROL_PPI {\r
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83 EFI_PEI_MM_ACTIVATE Trigger;\r
84 EFI_PEI_MM_DEACTIVATE Clear;\r
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85};\r
86\r
2f88bd3a 87extern EFI_GUID gEfiPeiMmControlPpiGuid;\r
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88\r
89#endif\r