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d1f95000 | 1 | /** @file\r |
8a7d75b0 | 2 | Device IO protocol as defined in the EFI 1.10 specification.\r |
d1f95000 | 3 | \r |
4 | Device IO is used to abstract hardware access to devices. It includes\r | |
5 | memory mapped IO, IO, PCI Config space, and DMA.\r | |
6 | \r | |
4ca9b6c4 | 7 | Copyright (c) 2006 - 2008, Intel Corporation \r |
d1f95000 | 8 | All rights reserved. This program and the accompanying materials \r |
9 | are licensed and made available under the terms and conditions of the BSD License \r | |
10 | which accompanies this distribution. The full text of the license may be found at \r | |
11 | http://opensource.org/licenses/bsd-license.php \r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
15 | \r | |
d1f95000 | 16 | **/\r |
17 | \r | |
18 | #ifndef __DEVICE_IO_H__\r | |
19 | #define __DEVICE_IO_H__\r | |
20 | \r | |
21 | #define EFI_DEVICE_IO_PROTOCOL_GUID \\r | |
22 | { \\r | |
23 | 0xaf6ac311, 0x84c3, 0x11d2, {0x8e, 0x3c, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \\r | |
24 | }\r | |
25 | \r | |
26 | typedef struct _EFI_DEVICE_IO_PROTOCOL EFI_DEVICE_IO_PROTOCOL;\r | |
27 | \r | |
99e8ed21 | 28 | ///\r |
29 | /// Protocol GUID name defined in EFI1.1.\r | |
30 | /// \r | |
a6508c05 | 31 | #define DEVICE_IO_PROTOCOL EFI_DEVICE_IO_PROTOCOL_GUID\r |
32 | \r | |
99e8ed21 | 33 | ///\r |
34 | /// Protocol defined in EFI1.1.\r | |
35 | /// \r | |
a6508c05 | 36 | typedef EFI_DEVICE_IO_PROTOCOL EFI_DEVICE_IO_INTERFACE;\r |
37 | \r | |
d1f95000 | 38 | typedef enum {\r |
0365b951 LG |
39 | IO_UINT8 = 0,\r |
40 | IO_UINT16 = 1,\r | |
41 | IO_UINT32 = 2,\r | |
42 | IO_UINT64 = 3,\r | |
2f320412 | 43 | //\r |
44 | // Below enumerations are added in "EFI 1.10 Specification update - 001", which\r | |
45 | // is downloadable from http://download.intel.com/technology/efi/docs/EFI_1-10_Update.zip\r | |
46 | //\r | |
0365b951 LG |
47 | MMIO_COPY_UINT8 = 4,\r |
48 | MMIO_COPY_UINT16 = 5,\r | |
49 | MMIO_COPY_UINT32 = 6,\r | |
50 | MMIO_COPY_UINT64 = 7\r | |
d1f95000 | 51 | } EFI_IO_WIDTH;\r |
52 | \r | |
53 | /** \r | |
54 | Enables a driver to access device registers in the appropriate memory or I/O space.\r | |
55 | \r | |
56 | @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.\r | |
57 | @param Width Signifies the width of the I/O operations. \r | |
58 | @param Address The base address of the I/O operations. \r | |
59 | @param Count The number of I/O operations to perform.\r | |
60 | @param Buffer For read operations, the destination buffer to store the results. For write\r | |
73fa61fc | 61 | operations, the source buffer to write data from. If\r |
0365b951 LG |
62 | Width is MMIO_COPY_UINT8, MMIO_COPY_UINT16,\r |
63 | MMIO_COPY_UINT32, or MMIO_COPY_UINT64, then\r | |
64 | Buffer is interpreted as a base address of an I/O operation such as Address. \r | |
d1f95000 | 65 | \r |
66 | @retval EFI_SUCCESS The data was read from or written to the device.\r | |
67 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r | |
68 | @retval EFI_INVALID_PARAMETER Width is invalid.\r | |
69 | \r | |
70 | **/\r | |
71 | typedef\r | |
72 | EFI_STATUS\r | |
8b13229b | 73 | (EFIAPI *EFI_DEVICE_IO)(\r |
d1f95000 | 74 | IN EFI_DEVICE_IO_PROTOCOL *This,\r |
75 | IN EFI_IO_WIDTH Width,\r | |
76 | IN UINT64 Address,\r | |
77 | IN UINTN Count,\r | |
78 | IN OUT VOID *Buffer\r | |
79 | );\r | |
80 | \r | |
81 | typedef struct {\r | |
82 | EFI_DEVICE_IO Read;\r | |
83 | EFI_DEVICE_IO Write;\r | |
84 | } EFI_IO_ACCESS;\r | |
85 | \r | |
86 | /** \r | |
87 | Provides an EFI Device Path for a PCI device with the given PCI configuration space address.\r | |
88 | \r | |
89 | @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.\r | |
90 | @param PciAddress The PCI configuration space address of the device whose Device Path\r | |
91 | is going to be returned. \r | |
92 | @param PciDevicePath A pointer to the pointer for the EFI Device Path for PciAddress.\r | |
93 | Memory for the Device Path is allocated from the pool. \r | |
94 | \r | |
95 | @retval EFI_SUCCESS The PciDevicePath returns a pointer to a valid EFI Device Path.\r | |
96 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r | |
97 | @retval EFI_UNSUPPORTED The PciAddress does not map to a valid EFI Device Path.\r | |
98 | \r | |
99 | **/\r | |
100 | typedef\r | |
101 | EFI_STATUS\r | |
8b13229b | 102 | (EFIAPI *EFI_PCI_DEVICE_PATH)(\r |
d1f95000 | 103 | IN EFI_DEVICE_IO_PROTOCOL *This,\r |
104 | IN UINT64 PciAddress,\r | |
105 | IN OUT EFI_DEVICE_PATH_PROTOCOL **PciDevicePath\r | |
106 | );\r | |
107 | \r | |
108 | typedef enum {\r | |
f1004231 LG |
109 | ///\r |
110 | /// A read operation from system memory by a bus master.\r | |
111 | ///\r | |
d1f95000 | 112 | EfiBusMasterRead,\r |
f1004231 LG |
113 | \r |
114 | ///\r | |
115 | /// A write operation to system memory by a bus master.\r | |
116 | ///\r | |
d1f95000 | 117 | EfiBusMasterWrite,\r |
f1004231 LG |
118 | \r |
119 | ///\r | |
120 | /// Provides both read and write access to system memory\r | |
121 | /// by both the processor and a bus master. The buffer is\r | |
122 |