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MdePkg/GHCB: increase the GHCB protocol max version
[mirror_edk2.git] / MdePkg / Include / Register / Amd / Ghcb.h
CommitLineData
1c0eb915
TL		 1/** @file\r
2 Guest-Hypervisor Communication Block (GHCB) Definition.\r
3\r
4 Provides data types allowing an SEV-ES guest to interact with the hypervisor\r
5 using the GHCB protocol.\r
6\r
7 Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
9\r
10 @par Specification Reference:\r
11 SEV-ES Guest-Hypervisor Communication Block Standardization\r
12\r
13**/\r
14\r
15#ifndef __GHCB_H__\r
16#define __GHCB_H__\r
17\r
18#include <Base.h>\r
19#include <Library/BaseLib.h>\r
20#include <Library/DebugLib.h>\r
21\r
22#define UD_EXCEPTION 6\r
2f88bd3a
MK		 23#define GP_EXCEPTION 13\r
24#define VC_EXCEPTION 29\r
1c0eb915 25\r
2f88bd3a 26#define GHCB_VERSION_MIN 1\r
2c354252 27#define GHCB_VERSION_MAX 2\r
1c0eb915
TL		 28\r
29#define GHCB_STANDARD_USAGE 0\r
30\r
31//\r
32// SVM Exit Codes\r
33//\r
2f88bd3a
MK		 34#define SVM_EXIT_DR7_READ 0x27ULL\r
35#define SVM_EXIT_DR7_WRITE 0x37ULL\r
36#define SVM_EXIT_RDTSC 0x6EULL\r
37#define SVM_EXIT_RDPMC 0x6FULL\r
38#define SVM_EXIT_CPUID 0x72ULL\r
39#define SVM_EXIT_INVD 0x76ULL\r
40#define SVM_EXIT_IOIO_PROT 0x7BULL\r
41#define SVM_EXIT_MSR 0x7CULL\r
42#define SVM_EXIT_VMMCALL 0x81ULL\r
43#define SVM_EXIT_RDTSCP 0x87ULL\r
44#define SVM_EXIT_WBINVD 0x89ULL\r
45#define SVM_EXIT_MONITOR 0x8AULL\r
46#define SVM_EXIT_MWAIT 0x8BULL\r
47#define SVM_EXIT_NPF 0x400ULL\r
1c0eb915
TL		 48\r
49//\r
50// VMG Special Exit Codes\r
51//\r
2f88bd3a
MK		 52#define SVM_EXIT_MMIO_READ 0x80000001ULL\r
53#define SVM_EXIT_MMIO_WRITE 0x80000002ULL\r
54#define SVM_EXIT_NMI_COMPLETE 0x80000003ULL\r
55#define SVM_EXIT_AP_RESET_HOLD 0x80000004ULL\r
56#define SVM_EXIT_AP_JUMP_TABLE 0x80000005ULL\r
57#define SVM_EXIT_SNP_PAGE_STATE_CHANGE 0x80000010ULL\r
58#define SVM_EXIT_SNP_AP_CREATION 0x80000013ULL\r
59#define SVM_EXIT_HYPERVISOR_FEATURES 0x8000FFFDULL\r
60#define SVM_EXIT_UNSUPPORTED 0x8000FFFFULL\r
1c0eb915
TL		 61\r
62//\r
63// IOIO Exit Information\r
64//\r
2f88bd3a
MK		 65#define IOIO_TYPE_STR BIT2\r
66#define IOIO_TYPE_IN 1\r
67#define IOIO_TYPE_INS (IOIO_TYPE_IN | IOIO_TYPE_STR)\r
68#define IOIO_TYPE_OUT 0\r
69#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)\r
70\r
71#define IOIO_REP BIT3\r
72\r
73#define IOIO_ADDR_64 BIT9\r
74#define IOIO_ADDR_32 BIT8\r
75#define IOIO_ADDR_16 BIT7\r
76\r
77#define IOIO_DATA_32 BIT6\r
78#define IOIO_DATA_16 BIT5\r
79#define IOIO_DATA_8 BIT4\r
80#define IOIO_DATA_MASK (BIT6 | BIT5 | BIT4)\r
81#define IOIO_DATA_OFFSET 4\r
1c0eb915
TL		 82#define IOIO_DATA_BYTES(x) (((x) & IOIO_DATA_MASK) >> IOIO_DATA_OFFSET)\r
83\r
2f88bd3a
MK		 84#define IOIO_SEG_ES 0\r
85#define IOIO_SEG_DS (BIT11 | BIT10)\r
1c0eb915 86\r
dfd41aef
TL		 87//\r
88// AP Creation Information\r
89//\r
90#define SVM_VMGEXIT_SNP_AP_CREATE_ON_INIT 0\r
91#define SVM_VMGEXIT_SNP_AP_CREATE 1\r
92#define SVM_VMGEXIT_SNP_AP_DESTROY 2\r
1c0eb915 93\r
1c0eb915 94typedef PACKED struct {\r
2f88bd3a
MK		 95 UINT8 Reserved1[203];\r
96 UINT8 Cpl;\r
97 UINT8 Reserved8[300];\r
98 UINT64 Rax;\r
99 UINT8 Reserved4[264];\r
100 UINT64 Rcx;\r
101 UINT64 Rdx;\r
102 UINT64 Rbx;\r
103 UINT8 Reserved5[112];\r
104 UINT64 SwExitCode;\r
105 UINT64 SwExitInfo1;\r
106 UINT64 SwExitInfo2;\r
107 UINT64 SwScratch;\r
108 UINT8 Reserved6[56];\r
109 UINT64 XCr0;\r
110 UINT8 ValidBitmap[16];\r
111 UINT64 X87StateGpa;\r
112 UINT8 Reserved7[1016];\r
1c0eb915
TL		 113} GHCB_SAVE_AREA;\r
114\r
115typedef PACKED struct {\r
2f88bd3a
MK		 116 GHCB_SAVE_AREA SaveArea;\r
117 UINT8 SharedBuffer[2032];\r
118 UINT8 Reserved1[10];\r
119 UINT16 ProtocolVersion;\r
120 UINT32 GhcbUsage;\r
1c0eb915
TL		 121} GHCB;\r
122\r
990ab937
TL		 123#define GHCB_SAVE_AREA_QWORD_OFFSET(RegisterField) \\r
124 (OFFSET_OF (GHCB, SaveArea.RegisterField) / sizeof (UINT64))\r
125\r
126typedef enum {\r
2f88bd3a
MK		 127 GhcbCpl = GHCB_SAVE_AREA_QWORD_OFFSET (Cpl),\r
128 GhcbRax = GHCB_SAVE_AREA_QWORD_OFFSET (Rax),\r
129 GhcbRbx = GHCB_SAVE_AREA_QWORD_OFFSET (Rbx),\r
130 GhcbRcx = GHCB_SAVE_AREA_QWORD_OFFSET (Rcx),\r
131 GhcbRdx = GHCB_SAVE_AREA_QWORD_OFFSET (Rdx),\r
132 GhcbXCr0 = GHCB_SAVE_AREA_QWORD_OFFSET (XCr0),\r
133 GhcbSwExitCode = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitCode),\r
134 GhcbSwExitInfo1 = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitInfo1),\r
135 GhcbSwExitInfo2 = GHCB_SAVE_AREA_QWORD_OFFSET (SwExitInfo2),\r
136 GhcbSwScratch = GHCB_SAVE_AREA_QWORD_OFFSET (SwScratch),\r
990ab937
TL		 137} GHCB_REGISTER;\r
138\r
1c0eb915
TL		 139typedef union {\r
140 struct {\r
2f88bd3a
MK		 141 UINT32 Lower32Bits;\r
142 UINT32 Upper32Bits;\r
1c0eb915
TL		 143 } Elements;\r
144\r
145 UINT64 Uint64;\r
146} GHCB_EXIT_INFO;\r
147\r
148typedef union {\r
149 struct {\r
2f88bd3a
MK		 150 UINT32 Vector : 8;\r
151 UINT32 Type : 3;\r
152 UINT32 ErrorCodeValid : 1;\r
153 UINT32 Rsvd : 19;\r
154 UINT32 Valid : 1;\r
155 UINT32 ErrorCode;\r
1c0eb915
TL		 156 } Elements;\r
157\r
158 UINT64 Uint64;\r
159} GHCB_EVENT_INJECTION;\r
160\r
161#define GHCB_EVENT_INJECTION_TYPE_INT 0\r
162#define GHCB_EVENT_INJECTION_TYPE_NMI 2\r
163#define GHCB_EVENT_INJECTION_TYPE_EXCEPTION 3\r
164#define GHCB_EVENT_INJECTION_TYPE_SOFT_INT 4\r
165\r
34e16ff8
BS		 166//\r
167// Hypervisor features\r
168//\r
2f88bd3a
MK		 169#define GHCB_HV_FEATURES_SNP BIT0\r
170#define GHCB_HV_FEATURES_SNP_AP_CREATE (GHCB_HV_FEATURES_SNP | BIT1)\r
171#define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION (GHCB_HV_FEATURES_SNP_AP_CREATE | BIT2)\r
172#define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION_TIMER (GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION | BIT3)\r
4665fa65
BS		 173\r
174//\r
175// SNP Page State Change.\r
176//\r
177// Note that the PSMASH and UNSMASH operations are not supported when using the MSR protocol.\r
178//\r
2f88bd3a
MK		 179#define SNP_PAGE_STATE_PRIVATE 1\r
180#define SNP_PAGE_STATE_SHARED 2\r
181#define SNP_PAGE_STATE_PSMASH 3\r
182#define SNP_PAGE_STATE_UNSMASH 4\r
4665fa65
BS		 183\r
184typedef struct {\r
2f88bd3a
MK		 185 UINT64 CurrentPage : 12;\r
186 UINT64 GuestFrameNumber : 40;\r
187 UINT64 Operation : 4;\r
188 UINT64 PageSize : 1;\r
189 UINT64 Reserved : 7;\r
4665fa65
BS		 190} SNP_PAGE_STATE_ENTRY;\r
191\r
192typedef struct {\r
2f88bd3a
MK		 193 UINT16 CurrentEntry;\r
194 UINT16 EndEntry;\r
195 UINT32 Reserved;\r
4665fa65
BS		 196} SNP_PAGE_STATE_HEADER;\r
197\r
2f88bd3a 198#define SNP_PAGE_STATE_MAX_ENTRY 253\r
4665fa65
BS		 199\r
200typedef struct {\r
2f88bd3a
MK		 201 SNP_PAGE_STATE_HEADER Header;\r
202 SNP_PAGE_STATE_ENTRY Entry[SNP_PAGE_STATE_MAX_ENTRY];\r
4665fa65
BS		 203} SNP_PAGE_STATE_CHANGE_INFO;\r
204\r
dfd41aef
TL		 205//\r
206// SEV-ES save area mapping structures used for SEV-SNP AP Creation.\r
207// Only the fields required to be set to a non-zero value are defined.\r
208//\r
209// The segment register definition is defined for processor reset/real mode\r
210// (as when an INIT of the vCPU is requested). Should other modes (long mode,\r
211// etc.) be required, then the definitions can be enhanced.\r
212//\r
213\r
214//\r
215// Segment types at processor reset, See AMD APM Volume 2, Table 14-2.\r
216//\r
217#define SEV_ES_RESET_CODE_SEGMENT_TYPE 0xA\r
218#define SEV_ES_RESET_DATA_SEGMENT_TYPE 0x2\r
219\r
2f88bd3a
MK		 220#define SEV_ES_RESET_LDT_TYPE 0x2\r
221#define SEV_ES_RESET_TSS_TYPE 0x3\r
dfd41aef
TL		 222\r
223#pragma pack (1)\r
224typedef union {\r
2f88bd3a
MK		 225 struct {\r
226 UINT16 Type : 4;\r
227 UINT16 Sbit : 1;\r
228 UINT16 Dpl : 2;\r
229 UINT16 Present : 1;\r
230 UINT16 Avl : 1;\r
231 UINT16 Reserved1 : 1;\r
232 UINT16 Db : 1;\r
233 UINT16 Granularity : 1;\r
234 } Bits;\r
235 UINT16 Uint16;\r
dfd41aef
TL		 236} SEV_ES_SEGMENT_REGISTER_ATTRIBUTES;\r
237\r
238typedef struct {\r
239 UINT16 Selector;\r
240 SEV_ES_SEGMENT_REGISTER_ATTRIBUTES Attributes;\r
241 UINT32 Limit;\r
242 UINT64 Base;\r
243} SEV_ES_SEGMENT_REGISTER;\r
244\r
245typedef struct {\r
2f88bd3a
MK		 246 SEV_ES_SEGMENT_REGISTER Es;\r
247 SEV_ES_SEGMENT_REGISTER Cs;\r
248 SEV_ES_SEGMENT_REGISTER Ss;\r
249 SEV_ES_SEGMENT_REGISTER Ds;\r
250 SEV_ES_SEGMENT_REGISTER Fs;\r
251 SEV_ES_SEGMENT_REGISTER Gs;\r
252 SEV_ES_SEGMENT_REGISTER Gdtr;\r
253 SEV_ES_SEGMENT_REGISTER Ldtr;\r
254 SEV_ES_SEGMENT_REGISTER Idtr;\r
255 SEV_ES_SEGMENT_REGISTER Tr;\r
256 UINT8 Reserved1[42];\r
257 UINT8 Vmpl;\r
258 UINT8 Reserved2[5];\r
259 UINT64 Efer;\r
260 UINT8 Reserved3[112];\r
261 UINT64 Cr4;\r
262 UINT8 Reserved4[8];\r
263 UINT64 Cr0;\r
264 UINT64 Dr7;\r
265 UINT64 Dr6;\r
266 UINT64 Rflags;\r
267 UINT64 Rip;\r
268 UINT8 Reserved5[232];\r
269 UINT64 GPat;\r
270 UINT8 Reserved6[320];\r
271 UINT64 SevFeatures;\r
272 UINT8 Reserved7[48];\r
273 UINT64 XCr0;\r
274 UINT8 Reserved8[24];\r
275 UINT32 Mxcsr;\r
276 UINT16 X87Ftw;\r
277 UINT8 Reserved9[2];\r
278 UINT16 X87Fcw;\r
dfd41aef
TL		 279} SEV_ES_SAVE_AREA;\r
280#pragma pack ()\r
281\r
1c0eb915 282#endif\r
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