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9095d37b | 1 | #------------------------------------------------------------------------------\r |
990e25aa | 2 | #\r |
f7c8bd9f | 3 | # CpuSleep() for ARMv7\r |
4 | #\r | |
5 | # ARMv6 versions was:\r | |
6 | # MOV r0,#0\r | |
7 | # MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction\r | |
8 | #\r | |
9 | # But this is a no-op on ARMv7\r | |
990e25aa | 10 | #\r |
9095d37b | 11 | # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
de2d3419 | 12 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
9344f092 | 13 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
990e25aa | 14 | #\r |
15 | #------------------------------------------------------------------------------\r | |
16 | \r | |
17 | .text\r | |
18 | .p2align 2\r | |
4c8a6e06 | 19 | GCC_ASM_EXPORT(CpuSleep)\r |
990e25aa | 20 | \r |
21 | #/**\r | |
22 | # Places the CPU in a sleep state until an interrupt is received.\r | |
23 | #\r | |
24 | # Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
25 | # are disabled prior to calling this function, then the CPU will be placed in a\r | |
26 | # sleep state indefinitely.\r | |
27 | #\r | |
28 | #**/\r | |
29 | #VOID\r | |
30 | #EFIAPI\r | |
31 | #CpuSleep (\r | |
32 | # VOID\r | |
33 | # );\r | |
34 | #\r | |
35 | ASM_PFX(CpuSleep):\r | |
f7c8bd9f | 36 | wfi\r |
990e25aa | 37 | bx lr\r |