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e1f414b6 | 1 | /** @file\r |
2 | Common I/O Library routines.\r | |
3 | \r | |
9095d37b | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 6 | \r |
e1f414b6 | 7 | **/\r |
8 | \r | |
f734a10a | 9 | #include "BaseIoLibIntrinsicInternal.h"\r |
e1f414b6 | 10 | \r |
11 | /**\r | |
12 | Reads a 64-bit I/O port.\r | |
13 | \r | |
14 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
15 | This function must guarantee that all I/O read and write operations are\r | |
16 | serialized.\r | |
17 | \r | |
18 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 19 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 20 | \r |
21 | @param Port The I/O port to read.\r | |
22 | \r | |
2281e7a9 | 23 | @return The value read.\r |
e1f414b6 | 24 | \r |
25 | **/\r | |
26 | UINT64\r | |
27 | EFIAPI\r | |
28 | IoRead64 (\r | |
29 | IN UINTN Port\r | |
30 | )\r | |
31 | {\r | |
32 | ASSERT (FALSE);\r | |
33 | return 0;\r | |
34 | }\r | |
35 | \r | |
36 | /**\r | |
37 | Writes a 64-bit I/O port.\r | |
38 | \r | |
39 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
40 | and returns Value. This function must guarantee that all I/O read and write\r | |
41 | operations are serialized.\r | |
42 | \r | |
43 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 44 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 45 | \r |
46 | @param Port The I/O port to write.\r | |
47 | @param Value The value to write to the I/O port.\r | |
48 | \r | |
2281e7a9 | 49 | @return The value written the I/O port.\r |
e1f414b6 | 50 | \r |
51 | **/\r | |
52 | UINT64\r | |
53 | EFIAPI\r | |
54 | IoWrite64 (\r | |
55 | IN UINTN Port,\r | |
56 | IN UINT64 Value\r | |
57 | )\r | |
58 | {\r | |
59 | ASSERT (FALSE);\r | |
60 | return 0;\r | |
61 | }\r | |
62 | \r | |
9de780dc LG |
63 | \r |
64 | /**\r | |
65 | Reads an 8-bit MMIO register.\r | |
66 | \r | |
67 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
68 | returned. This function must guarantee that all MMIO read and write\r | |
69 | operations are serialized.\r | |
70 | \r | |
71 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
72 | \r | |
73 | @param Address The MMIO register to read.\r | |
74 | \r | |
75 | @return The value read.\r | |
76 | \r | |
77 | **/\r | |
78 | UINT8\r | |
79 | EFIAPI\r | |
80 | MmioRead8 (\r | |
81 | IN UINTN Address\r | |
82 | )\r | |
83 | {\r | |
84 | UINT8 Value;\r | |
85 | \r | |
86 | MemoryFence ();\r | |
87 | Value = *(volatile UINT8*)Address;\r | |
88 | MemoryFence ();\r | |
89 | \r | |
90 | return Value;\r | |
91 | }\r | |
92 | \r | |
93 | /**\r | |
94 | Writes an 8-bit MMIO register.\r | |
95 | \r | |
96 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
97 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
98 | and write operations are serialized.\r | |
99 | \r | |
100 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
101 | \r | |
102 | @param Address The MMIO register to write.\r | |
103 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 104 | \r |
9de780dc LG |
105 | @return Value.\r |
106 | \r | |
107 | **/\r | |
108 | UINT8\r | |
109 | EFIAPI\r | |
110 | MmioWrite8 (\r | |
111 | IN UINTN Address,\r | |
112 | IN UINT8 Value\r | |
113 | )\r | |
114 | {\r | |
115 | MemoryFence ();\r | |
116 | *(volatile UINT8*)Address = Value;\r | |
117 | MemoryFence ();\r | |
118 | \r | |
119 | return Value;\r | |
120 | }\r | |
121 | \r | |
122 | /**\r | |
123 | Reads a 16-bit MMIO register.\r | |
124 | \r | |
125 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
126 | returned. This function must guarantee that all MMIO read and write\r | |
127 | operations are serialized.\r | |
128 | \r | |
129 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
130 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
131 | \r | |
132 | @param Address The MMIO register to read.\r | |
133 | \r | |
134 | @return The value read.\r | |
135 | \r | |
136 | **/\r | |
137 | UINT16\r | |
138 | EFIAPI\r | |
139 | MmioRead16 (\r | |
140 | IN UINTN Address\r | |
141 | )\r | |
142 | {\r | |
143 | UINT16 Value;\r | |
144 | \r | |
145 | ASSERT ((Address & 1) == 0);\r | |
146 | \r | |
147 | MemoryFence ();\r | |
148 | Value = *(volatile UINT16*)Address;\r | |
149 | MemoryFence ();\r | |
150 | \r | |
151 | return Value;\r | |
152 | }\r | |
153 | \r | |
154 | /**\r | |
155 | Writes a 16-bit MMIO register.\r | |
156 | \r | |
157 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
158 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
159 | and write operations are serialized.\r | |
160 | \r | |
161 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
162 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
163 | \r | |
164 | @param Address The MMIO register to write.\r | |
165 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 166 | \r |
9de780dc LG |
167 | @return Value.\r |
168 | \r | |
169 | **/\r | |
170 | UINT16\r | |
171 | EFIAPI\r | |
172 | MmioWrite16 (\r | |
173 | IN UINTN Address,\r | |
174 | IN UINT16 Value\r | |
175 | )\r | |
176 | {\r | |
177 | ASSERT ((Address & 1) == 0);\r | |
178 | \r | |
179 | MemoryFence ();\r | |
180 | *(volatile UINT16*)Address = Value;\r | |
181 | MemoryFence ();\r | |
9095d37b | 182 | \r |
9de780dc LG |
183 | return Value;\r |
184 | }\r | |
185 | \r | |
186 | /**\r | |
187 | Reads a 32-bit MMIO register.\r | |
188 | \r | |
189 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
190 | returned. This function must guarantee that all MMIO read and write\r | |
191 | operations are serialized.\r | |
192 | \r | |
193 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
194 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
195 | \r | |
196 | @param Address The MMIO register to read.\r | |
197 | \r | |
198 | @return The value read.\r | |
199 | \r | |
200 | **/\r | |
201 | UINT32\r | |
202 | EFIAPI\r | |
203 | MmioRead32 (\r | |
204 | IN UINTN Address\r | |
205 | )\r | |
206 | {\r | |
207 | UINT32 Value;\r | |
208 | \r | |
209 | ASSERT ((Address & 3) == 0);\r | |
9095d37b | 210 | \r |
9de780dc LG |
211 | MemoryFence ();\r |
212 | Value = *(volatile UINT32*)Address;\r | |
213 | MemoryFence ();\r | |
9095d37b | 214 | \r |
9de780dc LG |
215 | return Value;\r |
216 | }\r | |
217 | \r | |
218 | /**\r | |
219 | Writes a 32-bit MMIO register.\r | |
220 | \r | |
221 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
222 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
223 | and write operations are serialized.\r | |
224 | \r | |
225 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
226 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
227 | \r | |
228 | @param Address The MMIO register to write.\r | |
229 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 230 | \r |
9de780dc LG |
231 | @return Value.\r |
232 | \r | |
233 | **/\r | |
234 | UINT32\r | |
235 | EFIAPI\r | |
236 | MmioWrite32 (\r | |
237 | IN UINTN Address,\r | |
238 | IN UINT32 Value\r | |
239 | )\r | |
240 | {\r | |
241 | ASSERT ((Address & 3) == 0);\r | |
9095d37b | 242 | \r |
9de780dc LG |
243 | MemoryFence ();\r |
244 | *(volatile UINT32*)Address = Value;\r | |
245 | MemoryFence ();\r | |
9095d37b | 246 | \r |
9de780dc LG |
247 | return Value;\r |
248 | }\r | |
249 | \r | |
250 | /**\r | |
251 | Reads a 64-bit MMIO register.\r | |
252 | \r | |
253 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
254 | returned. This function must guarantee that all MMIO read and write\r | |
255 | operations are serialized.\r | |
256 | \r | |
257 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
258 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
259 | \r | |
260 | @param Address The MMIO register to read.\r | |
261 | \r | |
262 | @return The value read.\r | |
263 | \r | |
264 | **/\r | |
265 | UINT64\r | |
266 | EFIAPI\r | |
267 | MmioRead64 (\r | |
268 | IN UINTN Address\r | |
269 | )\r | |
270 | {\r | |
271 | UINT64 Value;\r | |
272 | \r | |
273 | ASSERT ((Address & 7) == 0);\r | |
9095d37b | 274 | \r |
9de780dc LG |
275 | MemoryFence ();\r |
276 | Value = *(volatile UINT64*)Address;\r | |
277 | MemoryFence ();\r | |
278 | \r | |
279 | return Value;\r | |
280 | }\r | |
281 | \r | |
282 | /**\r | |
283 | Writes a 64-bit MMIO register.\r | |
284 | \r | |
285 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
286 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
287 | and write operations are serialized.\r | |
288 | \r | |
289 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
290 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
291 | \r | |
292 | @param Address The MMIO register to write.\r | |
293 | @param Value The value to write to the MMIO register.\r | |
294 | \r | |
295 | **/\r | |
296 | UINT64\r | |
297 | EFIAPI\r | |
298 | MmioWrite64 (\r | |
299 | IN UINTN Address,\r | |
300 | IN UINT64 Value\r | |
301 | )\r | |
302 | {\r | |
303 | ASSERT ((Address & 7) == 0);\r | |
9095d37b | 304 | \r |
9de780dc LG |
305 | MemoryFence ();\r |
306 | *(volatile UINT64*)Address = Value;\r | |
307 | MemoryFence ();\r | |
9095d37b | 308 | \r |
9de780dc LG |
309 | return Value;\r |
310 | }\r | |
311 | \r |