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e1f414b6 | 1 | /** @file\r |
2 | Common I/O Library routines.\r | |
3 | \r | |
38c8be12 | 4 | Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 6 | \r |
e1f414b6 | 7 | **/\r |
8 | \r | |
f734a10a | 9 | #include "BaseIoLibIntrinsicInternal.h"\r |
e1f414b6 | 10 | \r |
11 | /**\r | |
12 | Reads a 64-bit I/O port.\r | |
13 | \r | |
14 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
15 | This function must guarantee that all I/O read and write operations are\r | |
16 | serialized.\r | |
17 | \r | |
18 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 19 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 20 | \r |
21 | @param Port The I/O port to read.\r | |
22 | \r | |
2281e7a9 | 23 | @return The value read.\r |
e1f414b6 | 24 | \r |
25 | **/\r | |
26 | UINT64\r | |
27 | EFIAPI\r | |
28 | IoRead64 (\r | |
29 | IN UINTN Port\r | |
30 | )\r | |
31 | {\r | |
32 | ASSERT (FALSE);\r | |
33 | return 0;\r | |
34 | }\r | |
35 | \r | |
36 | /**\r | |
37 | Writes a 64-bit I/O port.\r | |
38 | \r | |
39 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
40 | and returns Value. This function must guarantee that all I/O read and write\r | |
41 | operations are serialized.\r | |
42 | \r | |
43 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
2281e7a9 | 44 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
e1f414b6 | 45 | \r |
46 | @param Port The I/O port to write.\r | |
47 | @param Value The value to write to the I/O port.\r | |
48 | \r | |
2281e7a9 | 49 | @return The value written the I/O port.\r |
e1f414b6 | 50 | \r |
51 | **/\r | |
52 | UINT64\r | |
53 | EFIAPI\r | |
54 | IoWrite64 (\r | |
55 | IN UINTN Port,\r | |
56 | IN UINT64 Value\r | |
57 | )\r | |
58 | {\r | |
59 | ASSERT (FALSE);\r | |
60 | return 0;\r | |
61 | }\r | |
62 | \r | |
9de780dc LG |
63 | \r |
64 | /**\r | |
65 | Reads an 8-bit MMIO register.\r | |
66 | \r | |
67 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
68 | returned. This function must guarantee that all MMIO read and write\r | |
69 | operations are serialized.\r | |
70 | \r | |
71 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
72 | \r | |
73 | @param Address The MMIO register to read.\r | |
74 | \r | |
75 | @return The value read.\r | |
76 | \r | |
77 | **/\r | |
78 | UINT8\r | |
79 | EFIAPI\r | |
80 | MmioRead8 (\r | |
81 | IN UINTN Address\r | |
82 | )\r | |
83 | {\r | |
84 | UINT8 Value;\r | |
38c8be12 | 85 | BOOLEAN Flag;\r |
9de780dc | 86 | \r |
38c8be12 DB |
87 | Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value);\r |
88 | if (Flag) {\r | |
89 | MemoryFence ();\r | |
90 | Value = *(volatile UINT8*)Address;\r | |
91 | MemoryFence ();\r | |
92 | }\r | |
93 | FilterAfterMmIoRead (FilterWidth8, Address, &Value);\r | |
9de780dc LG |
94 | \r |
95 | return Value;\r | |
96 | }\r | |
97 | \r | |
98 | /**\r | |
99 | Writes an 8-bit MMIO register.\r | |
100 | \r | |
101 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
102 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
103 | and write operations are serialized.\r | |
104 | \r | |
105 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
106 | \r | |
107 | @param Address The MMIO register to write.\r | |
108 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 109 | \r |
9de780dc LG |
110 | @return Value.\r |
111 | \r | |
112 | **/\r | |
113 | UINT8\r | |
114 | EFIAPI\r | |
115 | MmioWrite8 (\r | |
116 | IN UINTN Address,\r | |
117 | IN UINT8 Value\r | |
118 | )\r | |
119 | {\r | |
38c8be12 DB |
120 | BOOLEAN Flag;\r |
121 | \r | |
122 | Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value);\r | |
123 | if (Flag) {\r | |
124 | MemoryFence ();\r | |
125 | *(volatile UINT8*)Address = Value;\r | |
126 | MemoryFence ();\r | |
127 | }\r | |
128 | FilterAfterMmIoWrite (FilterWidth8, Address, &Value);\r | |
9de780dc LG |
129 | \r |
130 | return Value;\r | |
131 | }\r | |
132 | \r | |
133 | /**\r | |
134 | Reads a 16-bit MMIO register.\r | |
135 | \r | |
136 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
137 | returned. This function must guarantee that all MMIO read and write\r | |
138 | operations are serialized.\r | |
139 | \r | |
140 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
141 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
142 | \r | |
143 | @param Address The MMIO register to read.\r | |
144 | \r | |
145 | @return The value read.\r | |
146 | \r | |
147 | **/\r | |
148 | UINT16\r | |
149 | EFIAPI\r | |
150 | MmioRead16 (\r | |
151 | IN UINTN Address\r | |
152 | )\r | |
153 | {\r | |
154 | UINT16 Value;\r | |
38c8be12 | 155 | BOOLEAN Flag;\r |
9de780dc LG |
156 | \r |
157 | ASSERT ((Address & 1) == 0);\r | |
38c8be12 DB |
158 | Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value);\r |
159 | if (Flag) {\r | |
160 | MemoryFence ();\r | |
161 | Value = *(volatile UINT16*)Address;\r | |
162 | MemoryFence ();\r | |
163 | }\r | |
164 | FilterAfterMmIoRead (FilterWidth16, Address, &Value);\r | |
9de780dc LG |
165 | \r |
166 | return Value;\r | |
167 | }\r | |
168 | \r | |
169 | /**\r | |
170 | Writes a 16-bit MMIO register.\r | |
171 | \r | |
172 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
173 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
174 | and write operations are serialized.\r | |
175 | \r | |
176 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
177 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
178 | \r | |
179 | @param Address The MMIO register to write.\r | |
180 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 181 | \r |
9de780dc LG |
182 | @return Value.\r |
183 | \r | |
184 | **/\r | |
185 | UINT16\r | |
186 | EFIAPI\r | |
187 | MmioWrite16 (\r | |
188 | IN UINTN Address,\r | |
189 | IN UINT16 Value\r | |
190 | )\r | |
191 | {\r | |
38c8be12 DB |
192 | BOOLEAN Flag;\r |
193 | \r | |
9de780dc LG |
194 | ASSERT ((Address & 1) == 0);\r |
195 | \r | |
38c8be12 DB |
196 | Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value);\r |
197 | if (Flag) {\r | |
198 | MemoryFence ();\r | |
199 | *(volatile UINT16*)Address = Value;\r | |
200 | MemoryFence ();\r | |
201 | }\r | |
202 | FilterAfterMmIoWrite (FilterWidth16, Address, &Value);\r | |
9095d37b | 203 | \r |
9de780dc LG |
204 | return Value;\r |
205 | }\r | |
206 | \r | |
207 | /**\r | |
208 | Reads a 32-bit MMIO register.\r | |
209 | \r | |
210 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
211 | returned. This function must guarantee that all MMIO read and write\r | |
212 | operations are serialized.\r | |
213 | \r | |
214 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
215 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
216 | \r | |
217 | @param Address The MMIO register to read.\r | |
218 | \r | |
219 | @return The value read.\r | |
220 | \r | |
221 | **/\r | |
222 | UINT32\r | |
223 | EFIAPI\r | |
224 | MmioRead32 (\r | |
225 | IN UINTN Address\r | |
226 | )\r | |
227 | {\r | |
228 | UINT32 Value;\r | |
38c8be12 | 229 | BOOLEAN Flag;\r |
9de780dc LG |
230 | \r |
231 | ASSERT ((Address & 3) == 0);\r | |
9095d37b | 232 | \r |
38c8be12 DB |
233 | Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value);\r |
234 | if (Flag) {\r | |
235 | MemoryFence ();\r | |
236 | Value = *(volatile UINT32*)Address;\r | |
237 | MemoryFence ();\r | |
238 | }\r | |
239 | FilterAfterMmIoRead (FilterWidth32, Address, &Value);\r | |
9095d37b | 240 | \r |
9de780dc LG |
241 | return Value;\r |
242 | }\r | |
243 | \r | |
244 | /**\r | |
245 | Writes a 32-bit MMIO register.\r | |
246 | \r | |
247 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
248 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
249 | and write operations are serialized.\r | |
250 | \r | |
251 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
252 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
253 | \r | |
254 | @param Address The MMIO register to write.\r | |
255 | @param Value The value to write to the MMIO register.\r | |
9095d37b | 256 | \r |
9de780dc LG |
257 | @return Value.\r |
258 | \r | |
259 | **/\r | |
260 | UINT32\r | |
261 | EFIAPI\r | |
262 | MmioWrite32 (\r | |
263 | IN UINTN Address,\r | |
264 | IN UINT32 Value\r | |
265 | )\r | |
266 | {\r | |
38c8be12 DB |
267 | BOOLEAN Flag;\r |
268 | \r | |
9de780dc | 269 | ASSERT ((Address & 3) == 0);\r |
9095d37b | 270 | \r |
38c8be12 DB |
271 | Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value);\r |
272 | if (Flag) {\r | |
273 | MemoryFence ();\r | |
274 | *(volatile UINT32*)Address = Value;\r | |
275 | MemoryFence ();\r | |
276 | }\r | |
277 | FilterAfterMmIoWrite (FilterWidth32, Address, &Value);\r | |
9095d37b | 278 | \r |
9de780dc LG |
279 | return Value;\r |
280 | }\r | |
281 | \r | |
282 | /**\r | |
283 | Reads a 64-bit MMIO register.\r | |
284 | \r | |
285 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
286 | returned. This function must guarantee that all MMIO read and write\r | |
287 | operations are serialized.\r | |
288 | \r | |
289 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
290 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
291 | \r | |
292 | @param Address The MMIO register to read.\r | |
293 | \r | |
294 | @return The value read.\r | |
295 | \r | |
296 | **/\r | |
297 | UINT64\r | |
298 | EFIAPI\r | |
299 | MmioRead64 (\r | |
300 | IN UINTN Address\r | |
301 | )\r | |
302 | {\r | |
303 | UINT64 Value;\r | |
38c8be12 | 304 | BOOLEAN Flag;\r |
9de780dc LG |
305 | \r |
306 | ASSERT ((Address & 7) == 0);\r | |
9095d37b | 307 | \r |
38c8be12 DB |
308 | Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value);\r |
309 | if (Flag) {\r | |
310 | MemoryFence ();\r | |
311 | Value = *(volatile UINT64*)Address;\r | |
312 | MemoryFence ();\r | |
313 | }\r | |
314 | FilterAfterMmIoRead (FilterWidth64, Address, &Value);\r | |
9de780dc LG |
315 | \r |
316 | return Value;\r | |
317 | }\r | |
318 | \r | |
319 | /**\r | |
320 | Writes a 64-bit MMIO register.\r | |
321 | \r | |
322 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
323 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
324 | and write operations are serialized.\r | |
325 | \r | |
326 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
327 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
328 | \r | |
329 | @param Address The MMIO register to write.\r | |
330 | @param Value The value to write to the MMIO register.\r | |
331 | \r | |
332 | **/\r | |
333 | UINT64\r | |
334 | EFIAPI\r | |
335 | MmioWrite64 (\r | |
336 | IN UINTN Address,\r | |
337 | IN UINT64 Value\r | |
338 | )\r | |
339 | {\r | |
38c8be12 DB |
340 | BOOLEAN Flag;\r |
341 | \r | |
9de780dc | 342 | ASSERT ((Address & 7) == 0);\r |
9095d37b | 343 | \r |
38c8be12 DB |
344 | Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value);\r |
345 | if (Flag) {\r | |
346 | MemoryFence ();\r | |
347 | *(volatile UINT64*)Address = Value;\r | |
348 | MemoryFence ();\r | |
349 | }\r | |
350 | FilterAfterMmIoWrite (FilterWidth64, Address, &Value);\r | |
9095d37b | 351 | \r |
9de780dc LG |
352 | return Value;\r |
353 | }\r | |
354 | \r |