projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 19c6d9fe LD |
1 | ;------------------------------------------------------------------------------\r |
| 2 | ;\r | |
| 3 | ; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r | |
| 4 | ; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r | |
| 5 | ;\r | |
| 6 | ; This program and the accompanying materials are licensed and made available\r | |
| 7 | ; under the terms and conditions of the BSD License which accompanies this\r | |
| 8 | ; distribution. The full text of the license may be found at\r | |
| 9 | ; http://opensource.org/licenses/bsd-license.php.\r | |
| 10 | ;\r | |
| 11 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 12 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 13 | ;\r | |
| 14 | ;------------------------------------------------------------------------------\r | |
| 15 | \r | |
| 16 | .code\r | |
| 17 | \r | |
| 18 | ;------------------------------------------------------------------------------\r | |
| 19 | ; VOID\r | |
| 20 | ; EFIAPI\r | |
| 21 | ; IoReadFifo8 (\r | |
| 22 | ; IN UINTN Port, // rcx\r | |
| 23 | ; IN UINTN Size, // rdx\r | |
| 24 | ; OUT VOID *Buffer // r8\r | |
| 25 | ; );\r | |
| 26 | ;------------------------------------------------------------------------------\r | |
| 27 | IoReadFifo8 PROC\r | |
| 28 | cld\r | |
| 29 | xchg rcx, rdx\r | |
| 30 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 31 | rep insb\r | |
| 32 | mov rdi, r8 ; restore rdi\r | |
| 33 | ret\r | |
| 34 | IoReadFifo8 ENDP\r | |
| 35 | \r | |
| 36 | ;------------------------------------------------------------------------------\r | |
| 37 | ; VOID\r | |
| 38 | ; EFIAPI\r | |
| 39 | ; IoReadFifo16 (\r | |
| 40 | ; IN UINTN Port, // rcx\r | |
| 41 | ; IN UINTN Size, // rdx\r | |
| 42 | ; OUT VOID *Buffer // r8\r | |
| 43 | ; );\r | |
| 44 | ;------------------------------------------------------------------------------\r | |
| 45 | IoReadFifo16 PROC\r | |
| 46 | cld\r | |
| 47 | xchg rcx, rdx\r | |
| 48 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 49 | rep insw\r | |
| 50 | mov rdi, r8 ; restore rdi\r | |
| 51 | ret\r | |
| 52 | IoReadFifo16 ENDP\r | |
| 53 | \r | |
| 54 | ;------------------------------------------------------------------------------\r | |
| 55 | ; VOID\r | |
| 56 | ; EFIAPI\r | |
| 57 | ; IoReadFifo32 (\r | |
| 58 | ; IN UINTN Port, // rcx\r | |
| 59 | ; IN UINTN Size, // rdx\r | |
| 60 | ; OUT VOID *Buffer // r8\r | |
| 61 | ; );\r | |
| 62 | ;------------------------------------------------------------------------------\r | |
| 63 | IoReadFifo32 PROC\r | |
| 64 | cld\r | |
| 65 | xchg rcx, rdx\r | |
| 66 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 67 | rep insd\r | |
| 68 | mov rdi, r8 ; restore rdi\r | |
| 69 | ret\r | |
| 70 | IoReadFifo32 ENDP\r | |
| 71 | \r | |
| 72 | ;------------------------------------------------------------------------------\r | |
| 73 | ; VOID\r | |
| 74 | ; EFIAPI\r | |
| 75 | ; IoWriteFifo8 (\r | |
| 76 | ; IN UINTN Port, // rcx\r | |
| 77 | ; IN UINTN Size, // rdx\r | |
| 78 | ; IN VOID *Buffer // r8\r | |
| 79 | ; );\r | |
| 80 | ;------------------------------------------------------------------------------\r | |
| 81 | IoWriteFifo8 PROC\r | |
| 82 | cld\r | |
| 83 | xchg rcx, rdx\r | |
| 84 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 85 | rep outsb\r | |
| 86 | mov rsi, r8 ; restore rsi\r | |
| 87 | ret\r | |
| 88 | IoWriteFifo8 ENDP\r | |
| 89 | \r | |
| 90 | ;------------------------------------------------------------------------------\r | |
| 91 | ; VOID\r | |
| 92 | ; EFIAPI\r | |
| 93 | ; IoWriteFifo16 (\r | |
| 94 | ; IN UINTN Port, // rcx\r | |
| 95 | ; IN UINTN Size, // rdx\r | |
| 96 | ; IN VOID *Buffer // r8\r | |
| 97 | ; );\r | |
| 98 | ;------------------------------------------------------------------------------\r | |
| 99 | IoWriteFifo16 PROC\r | |
| 100 | cld\r | |
| 101 | xchg rcx, rdx\r | |
| 102 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 103 | rep outsw\r | |
| 104 | mov rsi, r8 ; restore rsi\r | |
| 105 | ret\r | |
| 106 | IoWriteFifo16 ENDP\r | |
| 107 | \r | |
| 108 | ;------------------------------------------------------------------------------\r | |
| 109 | ; VOID\r | |
| 110 | ; EFIAPI\r | |
| 111 | ; IoWriteFifo32 (\r | |
| 112 | ; IN UINTN Port, // rcx\r | |
| 113 | ; IN UINTN Size, // rdx\r | |
| 114 | ; IN VOID *Buffer // r8\r | |
| 115 | ; );\r | |
| 116 | ;------------------------------------------------------------------------------\r | |
| 117 | IoWriteFifo32 PROC\r | |
| 118 | cld\r | |
| 119 | xchg rcx, rdx\r | |
| 120 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 121 | rep outsd\r | |
| 122 | mov rsi, r8 ; restore rsi\r | |
| 123 | ret\r | |
| 124 | IoWriteFifo32 ENDP\r | |
| 125 | \r | |
| 126 | END\r | |
| 127 | \r |