projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9095d37b | 1 | ;------------------------------------------------------------------------------\r |
| ebd04fc2 | 2 | ;\r |
| 3 | ; CpuBreakpoint() for ARM\r | |
| 4 | ;\r | |
| 9095d37b | 5 | ; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| bb817c56 | 6 | ; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 9344f092 | 7 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| ebd04fc2 | 8 | ;\r |
| 9 | ;------------------------------------------------------------------------------\r | |
| 10 | \r | |
| 11 | EXPORT CpuBreakpoint\r | |
| 12 | \r | |
| 30939ff2 PB |
13 | ; Force ARM mode for this section, as MSFT assembler defaults to THUMB\r |
| 14 | AREA Cpu_Breakpoint, CODE, READONLY, ARM\r | |
| 15 | \r | |
| 16 | ARM\r | |
| ebd04fc2 | 17 | \r |
| 18 | ;/**\r | |
| 19 | ; Generates a breakpoint on the CPU.\r | |
| 20 | ;\r | |
| 21 | ; Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
| 22 | ; that code can resume normal execution after the breakpoint.\r | |
| 23 | ;\r | |
| 24 | ;**/\r | |
| 25 | ;VOID\r | |
| 26 | ;EFIAPI\r | |
| 27 | ;CpuBreakpoint (\r | |
| 28 | ; VOID\r | |
| 29 | ; );\r | |
| 30 | ;\r | |
| 31 | CpuBreakpoint\r | |
| 32 | swi 0xdbdbdb\r | |
| 33 | bx lr\r | |
| 9095d37b | 34 | \r |
| ebd04fc2 | 35 | END\r |