[mirror_edk2.git] / MdePkg / Library / BaseLib / Arm / EnableInterrupts.asm

;------------------------------------------------------------------------------\r
;\r
; EnableInterrupts() for ARM\r
;\r
; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;------------------------------------------------------------------------------\r
\r
    EXPORT EnableInterrupts\r
\r
    AREA Interrupt_enable, CODE, READONLY\r
\r
;/**\r
;  Enables CPU interrupts.\r
;\r
;**/\r
;VOID\r
;EFIAPI\r
;EnableInterrupts (\r
;  VOID\r
;  );\r
;\r
EnableInterrupts\r
    MRS     R0,CPSR\r
    BIC     R0,R0,#0x80             ;Enable IRQ interrupts\r
    MSR     CPSR_c,R0\r
    BX      LR\r
\r
    END\r
Commit	Line	Data
9095d37b	1	;------------------------------------------------------------------------------\r
ebd04fc2	2	;\r
	3	; EnableInterrupts() for ARM\r
	4	;\r
9095d37b	5	; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
bb817c56	6	; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
9344f092	7	; SPDX-License-Identifier: BSD-2-Clause-Patent\r
ebd04fc2	8	;\r
	9	;------------------------------------------------------------------------------\r
	10	\r
	11	EXPORT EnableInterrupts\r
	12	\r
	13	AREA Interrupt_enable, CODE, READONLY\r
	14	\r
	15	;/**\r
	16	; Enables CPU interrupts.\r
	17	;\r
	18	;**/\r
	19	;VOID\r
	20	;EFIAPI\r
	21	;EnableInterrupts (\r
	22	; VOID\r
	23	; );\r
	24	;\r
	25	EnableInterrupts\r
	26	MRS R0,CPSR\r
	27	BIC R0,R0,#0x80 ;Enable IRQ interrupts\r
	28	MSR CPSR_c,R0\r
	29	BX LR\r
9095d37b	30	\r
ebd04fc2	31	END\r