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35a17154 | 1 | #------------------------------------------------------------------------------ |
2 | # | |
3 | # Replacement for Math64.c that is coded to use older GCC intrinsics. | |
4 | # Doing this reduces the number of intrinsics that are required when | |
5 | # you port to a new version of gcc. | |
6 | # | |
7 | # Need to split this into multple files to size optimize the image. | |
8 | # | |
9 | # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR> | |
10 | # This program and the accompanying materials | |
11 | # are licensed and made available under the terms and conditions of the BSD License | |
12 | # which accompanies this distribution. The full text of the license may be found at | |
13 | # http://opensource.org/licenses/bsd-license.php. | |
14 | # | |
15 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
16 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
17 | # | |
18 | #------------------------------------------------------------------------------ | |
703f1d09 | 19 | |
20 | .text | |
21 | .align 2 | |
4c8a6e06 | 22 | GCC_ASM_EXPORT(InternalMathLShiftU64) |
e7cb469e | 23 | |
703f1d09 | 24 | ASM_PFX(InternalMathLShiftU64): |
25 | stmfd sp!, {r4, r5, r6} | |
26 | mov r6, r1 | |
27 | rsb ip, r2, #32 | |
28 | mov r4, r6, asl r2 | |
29 | subs r1, r2, #32 | |
30 | orr r4, r4, r0, lsr ip | |
31 | mov r3, r0, asl r2 | |
32 | movpl r4, r0, asl r1 | |
33 | mov r5, r0 | |
34 | mov r0, r3 | |
35 | mov r1, r4 | |
36 | ldmfd sp!, {r4, r5, r6} | |
37 | bx lr | |
38 | ||
39 | .align 2 | |
4c8a6e06 | 40 | GCC_ASM_EXPORT(InternalMathRShiftU64) |
e7cb469e | 41 | |
703f1d09 | 42 | ASM_PFX(InternalMathRShiftU64): |
43 | stmfd sp!, {r4, r5, r6} | |
44 | mov r5, r0 | |
45 | rsb ip, r2, #32 | |
46 | mov r3, r5, lsr r2 | |
47 | subs r0, r2, #32 | |
48 | orr r3, r3, r1, asl ip | |
49 | mov r4, r1, lsr r2 | |
50 | movpl r3, r1, lsr r0 | |
51 | mov r6, r1 | |
52 | mov r0, r3 | |
53 | mov r1, r4 | |
54 | ldmfd sp!, {r4, r5, r6} | |
55 | bx lr | |
56 | ||
57 | .align 2 | |
4c8a6e06 | 58 | GCC_ASM_EXPORT(InternalMathARShiftU64) |
e7cb469e | 59 | |
703f1d09 | 60 | ASM_PFX(InternalMathARShiftU64): |
61 | stmfd sp!, {r4, r5, r6} | |
62 | mov r5, r0 | |
63 | rsb ip, r2, #32 | |
64 | mov r3, r5, lsr r2 | |
65 | subs r0, r2, #32 | |
66 | orr r3, r3, r1, asl ip | |
67 | mov r4, r1, asr r2 | |
68 | movpl r3, r1, asr r0 | |
69 | mov r6, r1 | |
70 | mov r0, r3 | |
71 | mov r1, r4 | |
72 | ldmfd sp!, {r4, r5, r6} | |
73 | bx lr | |
74 | ||
75 | .align 2 | |
4c8a6e06 | 76 | GCC_ASM_EXPORT(InternalMathLRotU64) |
e7cb469e | 77 | |
703f1d09 | 78 | ASM_PFX(InternalMathLRotU64): |
79 | stmfd sp!, {r4, r5, r6, r7, lr} | |
80 | add r7, sp, #12 | |
81 | mov r6, r1 | |
82 | rsb ip, r2, #32 | |
83 | mov r4, r6, asl r2 | |
84 | rsb lr, r2, #64 | |
85 | subs r1, r2, #32 | |
86 | orr r4, r4, r0, lsr ip | |
87 | mov r3, r0, asl r2 | |
88 | movpl r4, r0, asl r1 | |
89 | sub ip, r2, #32 | |
90 | mov r5, r0 | |
91 | mov r0, r0, lsr lr | |
92 | rsbs r2, r2, #32 | |
93 | orr r0, r0, r6, asl ip | |
94 | mov r1, r6, lsr lr | |
95 | movpl r0, r6, lsr r2 | |
96 | orr r1, r1, r4 | |
97 | orr r0, r0, r3 | |
98 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
99 | ||
100 | ||
101 | .align 2 | |
4c8a6e06 | 102 | GCC_ASM_EXPORT(InternalMathRRotU64) |
e7cb469e | 103 | |
703f1d09 | 104 | ASM_PFX(InternalMathRRotU64): |
105 | stmfd sp!, {r4, r5, r6, r7, lr} | |
106 | add r7, sp, #12 | |
107 | mov r5, r0 | |
108 | rsb ip, r2, #32 | |
109 | mov r3, r5, lsr r2 | |
110 | rsb lr, r2, #64 | |
111 | subs r0, r2, #32 | |
112 | orr r3, r3, r1, asl ip | |
113 | mov r4, r1, lsr r2 | |
114 | movpl r3, r1, lsr r0 | |
115 | sub ip, r2, #32 | |
116 | mov r6, r1 | |
117 | mov r1, r1, asl lr | |
118 | rsbs r2, r2, #32 | |
119 | orr r1, r1, r5, lsr ip | |
120 | mov r0, r5, asl lr | |
121 | movpl r1, r5, asl r2 | |
122 | orr r0, r0, r3 | |
123 | orr r1, r1, r4 | |
124 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
125 | ||
126 | .align 2 | |
4c8a6e06 | 127 | GCC_ASM_EXPORT(InternalMathMultU64x32) |
e7cb469e | 128 | |
703f1d09 | 129 | ASM_PFX(InternalMathMultU64x32): |
130 | stmfd sp!, {r7, lr} | |
131 | add r7, sp, #0 | |
132 | mov r3, #0 | |
133 | mov ip, r0 | |
134 | mov lr, r1 | |
135 | umull r0, r1, ip, r2 | |
136 | mla r1, lr, r2, r1 | |
137 | mla r1, ip, r3, r1 | |
138 | ldmfd sp!, {r7, pc} | |
139 | ||
140 | .align 2 | |
4c8a6e06 | 141 | GCC_ASM_EXPORT(InternalMathMultU64x64) |
e7cb469e | 142 | |
703f1d09 | 143 | ASM_PFX(InternalMathMultU64x64): |
144 | stmfd sp!, {r7, lr} | |
145 | add r7, sp, #0 | |
146 | mov ip, r0 | |
147 | mov lr, r1 | |
148 | umull r0, r1, ip, r2 | |
149 | mla r1, lr, r2, r1 | |
150 | mla r1, ip, r3, r1 | |
151 | ldmfd sp!, {r7, pc} | |
152 | ||
153 | .align 2 | |
4c8a6e06 | 154 | GCC_ASM_EXPORT(InternalMathDivU64x32) |
e7cb469e | 155 | |
703f1d09 | 156 | ASM_PFX(InternalMathDivU64x32): |
157 | stmfd sp!, {r7, lr} | |
158 | add r7, sp, #0 | |
159 | mov r3, #0 | |
160 | bl ASM_PFX(__udivdi3) | |
161 | ldmfd sp!, {r7, pc} | |
162 | ||
163 | ||
164 | .align 2 | |
4c8a6e06 | 165 | GCC_ASM_EXPORT(InternalMathModU64x32) |
e7cb469e | 166 | |
703f1d09 | 167 | ASM_PFX(InternalMathModU64x32): |
168 | stmfd sp!, {r7, lr} | |
169 | add r7, sp, #0 | |
170 | mov r3, #0 | |
171 | bl ASM_PFX(__umoddi3) | |
172 | ldmfd sp!, {r7, pc} | |
173 | ||
174 | ||
175 | .align 2 | |
4c8a6e06 | 176 | GCC_ASM_EXPORT(InternalMathDivRemU64x32) |
e7cb469e | 177 | |
703f1d09 | 178 | ASM_PFX(InternalMathDivRemU64x32): |
179 | stmfd sp!, {r4, r5, r6, r7, lr} | |
180 | add r7, sp, #12 | |
181 | stmfd sp!, {r10, r11} | |
182 | subs r6, r3, #0 | |
183 | mov r10, r0 | |
184 | mov r11, r1 | |
185 | moveq r4, r2 | |
186 | moveq r5, #0 | |
187 | beq L22 | |
188 | mov r4, r2 | |
189 | mov r5, #0 | |
190 | mov r3, #0 | |
191 | bl ASM_PFX(__umoddi3) | |
192 | str r0, [r6, #0] | |
193 | L22: | |
194 | mov r0, r10 | |
195 | mov r1, r11 | |
196 | mov r2, r4 | |
197 | mov r3, r5 | |
198 | bl ASM_PFX(__udivdi3) | |
199 | ldmfd sp!, {r10, r11} | |
200 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
201 | ||
202 | ||
203 | .align 2 | |
4c8a6e06 | 204 | GCC_ASM_EXPORT(InternalMathDivRemU64x64) |
e7cb469e | 205 | |
703f1d09 | 206 | ASM_PFX(InternalMathDivRemU64x64): |
207 | stmfd sp!, {r4, r5, r6, r7, lr} | |
208 | add r7, sp, #12 | |
209 | stmfd sp!, {r10, r11} | |
210 | ldr r6, [sp, #28] | |
211 | mov r4, r0 | |
212 | cmp r6, #0 | |
213 | mov r5, r1 | |
214 | mov r10, r2 | |
215 | mov r11, r3 | |
216 | beq L26 | |
217 | bl ASM_PFX(__umoddi3) | |
218 | stmia r6, {r0-r1} | |
219 | L26: | |
220 | mov r0, r4 | |
221 | mov r1, r5 | |
222 | mov r2, r10 | |
223 | mov r3, r11 | |
224 | bl ASM_PFX(__udivdi3) | |
225 | ldmfd sp!, {r10, r11} | |
226 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
227 | ||
228 | ||
229 | .align 2 | |
4c8a6e06 | 230 | GCC_ASM_EXPORT(InternalMathDivRemS64x64) |
e7cb469e | 231 | |
703f1d09 | 232 | ASM_PFX(InternalMathDivRemS64x64): |
233 | stmfd sp!, {r4, r5, r6, r7, lr} | |
234 | add r7, sp, #12 | |
235 | stmfd sp!, {r10, r11} | |
236 | ldr r6, [sp, #28] | |
237 | mov r4, r0 | |
238 | cmp r6, #0 | |
239 | mov r5, r1 | |
240 | mov r10, r2 | |
241 | mov r11, r3 | |
242 | beq L30 | |
243 | bl ASM_PFX(__moddi3) | |
244 | stmia r6, {r0-r1} | |
245 | L30: | |
246 | mov r0, r4 | |
247 | mov r1, r5 | |
248 | mov r2, r10 | |
249 | mov r3, r11 | |
250 | bl ASM_PFX(__divdi3) | |
251 | ldmfd sp!, {r10, r11} | |
252 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
253 | ||
254 | ||
255 | .align 2 | |
4c8a6e06 | 256 | GCC_ASM_EXPORT(InternalMathSwapBytes64) |
e7cb469e | 257 | |
703f1d09 | 258 | ASM_PFX(InternalMathSwapBytes64): |
259 | @ args = 0, pretend = 0, frame = 0 | |
260 | @ frame_needed = 1, uses_anonymous_args = 0 | |
261 | stmfd sp!, {r4, r5, r6, r7, lr} | |
262 | add r7, sp, #12 | |
263 | mov r5, r1 | |
264 | bl ASM_PFX(SwapBytes32) | |
265 | mov r6, r0 | |
266 | mov r0, r5 | |
267 | bl ASM_PFX(SwapBytes32) | |
268 | mov r4, r6 | |
269 | mov r5, r4, asr #31 | |
270 | mov r2, #0 | |
271 | mov r1, r0, asr #31 | |
272 | orr r0, r0, r2 | |
273 | orr r1, r1, r4 | |
274 | ldmfd sp!, {r4, r5, r6, r7, pc} | |
275 | ||
276 | ||
277 | ASM_FUNCTION_REMOVE_IF_UNREFERENCED |