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22327b5a JJ |
1 | ;------------------------------------------------------------------------------\r |
2 | ;\r | |
3 | ; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r | |
9344f092 | 4 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
22327b5a JJ |
5 | ;\r |
6 | ; Module Name:\r | |
7 | ;\r | |
8 | ; EnableCache.Asm\r | |
9 | ;\r | |
10 | ; Abstract:\r | |
11 | ;\r | |
12 | ; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear\r | |
13 | ; the NW bit of CR0 to 0\r | |
14 | ;\r | |
15 | ; Notes:\r | |
16 | ;\r | |
17 | ;------------------------------------------------------------------------------\r | |
18 | \r | |
19 | SECTION .text\r | |
20 | \r | |
21 | ;------------------------------------------------------------------------------\r | |
22 | ; VOID\r | |
23 | ; EFIAPI\r | |
24 | ; AsmEnableCache (\r | |
25 | ; VOID\r | |
26 | ; );\r | |
27 | ;------------------------------------------------------------------------------\r | |
28 | global ASM_PFX(AsmEnableCache)\r | |
29 | ASM_PFX(AsmEnableCache):\r | |
30 | wbinvd\r | |
31 | mov eax, cr0\r | |
32 | btr eax, 29\r | |
33 | btr eax, 30\r | |
34 | mov cr0, eax\r | |
35 | ret\r | |
36 | \r |