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1 | /// @file\r |
| 2 | /// IPF specific control register reading functions\r |
| 3 | ///\r |
| 4 | /// Copyright (c) 2008, Intel Corporation\r |
| 5 | /// All rights reserved. This program and the accompanying materials\r |
| 6 | /// are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | /// which accompanies this distribution. The full text of the license may be found at\r |
| 8 | /// http://opensource.org/licenses/bsd-license.php\r |
| 9 | ///\r |
| 10 | /// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 11 | /// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 12 | ///\r |
| 13 | ///\r |
| 14 | ///\r |
| 15 | \r |
| 16 | \r |
| aad6137d |
17 | \r |
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18 | //---------------------------------------------------------------------------------\r |
| 19 | //++\r |
| 20 | // AsmReadControlRegister\r |
| 21 | //\r |
| 22 | // Reads a 64-bit control register.\r |
| 23 | //\r |
| 24 | // Reads and returns the control register specified by Index.\r |
| 25 | // If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r |
| 26 | //\r |
| 27 | // Arguments :\r |
| 28 | //\r |
| 29 | // On Entry : The index of the control register to read.\r |
| 30 | //\r |
| 31 | // Return Value: The control register specified by Index.\r |
| 32 | //\r |
| 33 | //--\r |
| 34 | //----------------------------------------------------------------------------------\r |
| 35 | .text\r |
| 36 | .type AsmReadControlRegister, @function\r |
| 37 | .proc AsmReadControlRegister\r |
| 38 | .regstk 1, 0, 0, 0\r |
| 39 | \r |
| 40 | AsmReadControlRegister::\r |
| 41 | //\r |
| 42 | // CRs are defined in the ranges 0-25 and 64-81 (with some holes).\r |
| 43 | // Compact this list by subtracting 32 from the top range.\r |
| 44 | // 0-25, 64-81 -> 0-25, 32-49\r |
| 45 | //\r |
| 46 | mov r15=2\r |
| 47 | mov r14=pr // save predicates\r |
| 48 | cmp.leu p6,p7=64,in0 // p6 = CR# >= 64\r |
| 49 | ;;\r |
| 50 | (p7) cmp.leu p7,p0=32,in0 // p7 = 32 <= CR# < 64\r |
| 51 | (p6) add in0=-32,in0 // if (CR >= 64) CR# -= 32\r |
| 52 | ;;\r |
| 53 | (p7) mov r15=0 // if bad range (32-63)\r |
| 54 | ;;\r |
| 55 | mov ret0=-1 // in case of illegal CR #\r |
| 56 | shl r15=r15,in0 // r15 = 0x2 << CR#\r |
| 57 | ;;\r |
| 58 | mov pr=r15,-1\r |
| 59 | ;;\r |
| 60 | \r |
| 61 | //\r |
| 62 | // At this point the predicates contain a bit field of the\r |
| 63 | // CR desired. (The bit is the CR+1, since pr0 is always 1.)\r |
| 64 | //\r |
| 65 | .pred.rel "mutex",p1,p2,p3,p9,p17,p18,p20,p21,p22,p23,p24,p25,p26,\\r |
| 66 | p33,p34,p35,p36,p37,p38,p39,p40,p41,p42,p43,p49,p50\r |
| 67 | (p1) mov ret0=cr.dcr // cr0\r |
| 68 | (p2) mov ret0=cr.itm // cr1\r |
| 69 | (p3) mov ret0=cr.iva // cr2\r |
| 70 | (p9) mov ret0=cr.pta // cr8\r |
| 71 | (p17) mov ret0=cr.ipsr // cr16\r |
| 72 | (p18) mov ret0=cr.isr // cr17\r |
| 73 | (p20) mov ret0=cr.iip // cr19\r |
| 74 | (p21) mov ret0=cr.ifa // cr20\r |
| 75 | (p22) mov ret0=cr.itir // cr21\r |
| 76 | (p23) mov ret0=cr.iipa // cr22\r |
| 77 | (p24) mov ret0=cr.ifs // cr23\r |
| 78 | (p25) mov ret0=cr.iim // cr24\r |
| 79 | (p26) mov ret0=cr.iha // cr25\r |
| 80 | \r |
| 81 | // This is the translated (-32) range.\r |
| 82 | \r |
| 83 | (p33) mov ret0=cr.lid // cr64\r |
| 84 | (p34) mov ret0=cr.ivr // cr65\r |
| 85 | (p35) mov ret0=cr.tpr // cr66\r |
| 86 | (p36) mov ret0=cr.eoi // cr67\r |
| 87 | (p37) mov ret0=cr.irr0 // cr68\r |
| 88 | (p38) mov ret0=cr.irr1 // cr69\r |
| 89 | (p39) mov ret0=cr.irr2 // cr70\r |
| 90 | (p40) mov ret0=cr.irr3 // cr71\r |
| 91 | (p41) mov ret0=cr.itv // cr72\r |
| 92 | (p42) mov ret0=cr.pmv // cr73\r |
| 93 | (p43) mov ret0=cr.cmcv // cr74\r |
| 94 | (p49) mov ret0=cr.lrr0 // cr80\r |
| 95 | (p50) mov ret0=cr.lrr1 // cr81\r |
| 96 | \r |
| 97 | //\r |
| 98 | // Restore predicates and return.\r |
| 99 | //\r |
| 100 | mov pr=r14,-1\r |
| 101 | br.ret.sptk b0\r |
| 102 | .endp\r |
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