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7601b251 AC |
1 | /** @file\r |
2 | CPU enable interrupt function for RISC-V\r | |
3 | \r | |
4 | Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
5 | \r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | **/\r | |
8 | \r | |
9 | #include "BaseLibInternals.h"\r | |
10 | \r | |
2f88bd3a MK |
11 | extern VOID\r |
12 | RiscVEnableSupervisorModeInterrupt (\r | |
13 | VOID\r | |
14 | );\r | |
7601b251 AC |
15 | \r |
16 | /**\r | |
17 | Enables CPU interrupts.\r | |
18 | \r | |
19 | **/\r | |
20 | VOID\r | |
21 | EFIAPI\r | |
22 | EnableInterrupts (\r | |
23 | VOID\r | |
24 | )\r | |
25 | {\r | |
26 | RiscVEnableSupervisorModeInterrupt ();\r | |
27 | }\r |