projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 56244b92 JJ |
1 | ;------------------------------------------------------------------------------\r |
| 2 | ;\r | |
| 0aac2f77 | 3 | ; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r |
| 56244b92 JJ |
4 | ; This program and the accompanying materials\r |
| 5 | ; are licensed and made available under the terms and conditions of the BSD License\r | |
| 6 | ; which accompanies this distribution. The full text of the license may be found at\r | |
| 7 | ; http://opensource.org/licenses/bsd-license.php.\r | |
| 8 | ;\r | |
| 9 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 10 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 11 | ;\r | |
| 12 | ; Module Name:\r | |
| 13 | ;\r | |
| 14 | ; LongJump.Asm\r | |
| 15 | ;\r | |
| 16 | ; Abstract:\r | |
| 17 | ;\r | |
| 18 | ; Implementation of _LongJump() on x64.\r | |
| 19 | ;\r | |
| 20 | ;------------------------------------------------------------------------------\r | |
| 21 | \r | |
| 0aac2f77 JY |
22 | %include "Nasm.inc"\r |
| 23 | \r | |
| 56244b92 JJ |
24 | DEFAULT REL\r |
| 25 | SECTION .text\r | |
| 26 | \r | |
| 0aac2f77 JY |
27 | extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))\r |
| 28 | \r | |
| 56244b92 JJ |
29 | ;------------------------------------------------------------------------------\r |
| 30 | ; VOID\r | |
| 31 | ; EFIAPI\r | |
| 32 | ; InternalLongJump (\r | |
| 33 | ; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
| 34 | ; IN UINTN Value\r | |
| 35 | ; );\r | |
| 36 | ;------------------------------------------------------------------------------\r | |
| 37 | global ASM_PFX(InternalLongJump)\r | |
| 38 | ASM_PFX(InternalLongJump):\r | |
| 0aac2f77 JY |
39 | \r |
| 40 | mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]\r | |
| 41 | test eax, eax\r | |
| 42 | jz CetDone\r | |
| 43 | mov rax, cr4\r | |
| 44 | bt eax, 23 ; check if CET is enabled\r | |
| 45 | jnc CetDone\r | |
| 46 | \r | |
| 47 | push rdx ; save rdx\r | |
| 48 | \r | |
| 49 | mov rdx, [rcx + 0xF8] ; rdx = target SSP\r | |
| 50 | READSSP_RAX\r | |
| 51 | sub rdx, rax ; rdx = delta\r | |
| 52 | mov rax, rdx ; rax = delta\r | |
| 53 | \r | |
| 54 | shr rax, 3 ; rax = delta/sizeof(UINT64)\r | |
| 55 | INCSSP_RAX\r | |
| 56 | \r | |
| 57 | pop rdx ; restore rdx\r | |
| 58 | CetDone:\r | |
| 59 | \r | |
| 56244b92 JJ |
60 | mov rbx, [rcx]\r |
| 61 | mov rsp, [rcx + 8]\r | |
| 62 | mov rbp, [rcx + 0x10]\r | |
| 63 | mov rdi, [rcx + 0x18]\r | |
| 64 | mov rsi, [rcx + 0x20]\r | |
| 65 | mov r12, [rcx + 0x28]\r | |
| 66 | mov r13, [rcx + 0x30]\r | |
| 67 | mov r14, [rcx + 0x38]\r | |
| 68 | mov r15, [rcx + 0x40]\r | |
| 69 | ; load non-volatile fp registers\r | |
| 70 | ldmxcsr [rcx + 0x50]\r | |
| 71 | movdqu xmm6, [rcx + 0x58]\r | |
| 72 | movdqu xmm7, [rcx + 0x68]\r | |
| 73 | movdqu xmm8, [rcx + 0x78]\r | |
| 74 | movdqu xmm9, [rcx + 0x88]\r | |
| 75 | movdqu xmm10, [rcx + 0x98]\r | |
| 76 | movdqu xmm11, [rcx + 0xA8]\r | |
| 77 | movdqu xmm12, [rcx + 0xB8]\r | |
| 78 | movdqu xmm13, [rcx + 0xC8]\r | |
| 79 | movdqu xmm14, [rcx + 0xD8]\r | |
| 80 | movdqu xmm15, [rcx + 0xE8]\r | |
| 81 | mov rax, rdx ; set return value\r | |
| 82 | jmp qword [rcx + 0x48]\r | |
| 83 | \r |