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MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: implement accelerated GUID functions
[mirror_edk2.git] / MdePkg / Library / BaseMemoryLibOptDxe / Arm / CompareGuid.asm
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1;\r
2; Copyright (c) 2016, Linaro Limited\r
3; All rights reserved.\r
4;\r
5; Redistribution and use in source and binary forms, with or without\r
6; modification, are permitted provided that the following conditions are met:\r
7; * Redistributions of source code must retain the above copyright\r
8; notice, this list of conditions and the following disclaimer.\r
9; * Redistributions in binary form must reproduce the above copyright\r
10; notice, this list of conditions and the following disclaimer in the\r
11; documentation and/or other materials provided with the distribution.\r
12; * Neither the name of the Linaro nor the\r
13; names of its contributors may be used to endorse or promote products\r
14; derived from this software without specific prior written permission.\r
15;\r
16; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\r
17; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\r
18; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\r
19; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\r
20; HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\r
21; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
22; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\r
23; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\r
24; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\r
25; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
26; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
27;\r
28\r
29 EXPORT InternalMemCompareGuid\r
30 THUMB\r
31 AREA CompareGuid, CODE, READONLY, CODEALIGN, ALIGN=5\r
32\r
33InternalMemCompareGuid\r
34 push {r4, lr}\r
35 ldr r2, [r0]\r
36 ldr r3, [r0, #4]\r
37 ldr r4, [r0, #8]\r
38 ldr r0, [r0, #12]\r
39 cbz r1, L1\r
40 ldr ip, [r1]\r
41 ldr lr, [r1, #4]\r
42 cmp r2, ip\r
43 it eq\r
44 cmpeq r3, lr\r
45 beq L0\r
46 movs r0, #0\r
47 pop {r4, pc}\r
48\r
49L0\r
50 ldr r2, [r1, #8]\r
51 ldr r3, [r1, #12]\r
52 cmp r4, r2\r
53 it eq\r
54 cmpeq r0, r3\r
55 bne L2\r
56 movs r0, #1\r
57 pop {r4, pc}\r
58\r
59L1\r
60 orrs r2, r2, r3\r
61 orrs r4, r4, r0\r
62 movs r0, #1\r
63 orrs r2, r2, r4\r
64\r
65L2\r
66 it ne\r
67 movne r0, #0\r
68 pop {r4, pc}\r
69\r
70 END\r