[mirror_edk2.git] / MdePkg / Library / BasePeCoffLib / Ipf / PeCoffLoaderEx.c

/** @file\r
  Fixes Intel Itanium(TM) specific relocation types.\r
\r
  Copyright (c) 2006, Intel Corporation\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  Module Name:  PeCoffLoaderEx.c\r
\r
**/\r
\r
\r
\r
\r
\r
#define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r
\r
#define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \\r
          ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
\r
#define IMM64_IMM7B_INST_WORD_X         3  \r
#define IMM64_IMM7B_SIZE_X              7  \r
#define IMM64_IMM7B_INST_WORD_POS_X     4  \r
#define IMM64_IMM7B_VAL_POS_X           0  \r
\r
#define IMM64_IMM9D_INST_WORD_X         3  \r
#define IMM64_IMM9D_SIZE_X              9  \r
#define IMM64_IMM9D_INST_WORD_POS_X     18  \r
#define IMM64_IMM9D_VAL_POS_X           7  \r
\r
#define IMM64_IMM5C_INST_WORD_X         3  \r
#define IMM64_IMM5C_SIZE_X              5  \r
#define IMM64_IMM5C_INST_WORD_POS_X     13  \r
#define IMM64_IMM5C_VAL_POS_X           16  \r
\r
#define IMM64_IC_INST_WORD_X            3  \r
#define IMM64_IC_SIZE_X                 1  \r
#define IMM64_IC_INST_WORD_POS_X        12  \r
#define IMM64_IC_VAL_POS_X              21  \r
\r
#define IMM64_IMM41a_INST_WORD_X        1  \r
#define IMM64_IMM41a_SIZE_X             10  \r
#define IMM64_IMM41a_INST_WORD_POS_X    14  \r
#define IMM64_IMM41a_VAL_POS_X          22  \r
\r
#define IMM64_IMM41b_INST_WORD_X        1  \r
#define IMM64_IMM41b_SIZE_X             8  \r
#define IMM64_IMM41b_INST_WORD_POS_X    24  \r
#define IMM64_IMM41b_VAL_POS_X          32  \r
\r
#define IMM64_IMM41c_INST_WORD_X        2  \r
#define IMM64_IMM41c_SIZE_X             23  \r
#define IMM64_IMM41c_INST_WORD_POS_X    0  \r
#define IMM64_IMM41c_VAL_POS_X          40  \r
\r
#define IMM64_SIGN_INST_WORD_X          3  \r
#define IMM64_SIGN_SIZE_X               1  \r
#define IMM64_SIGN_INST_WORD_POS_X      27  \r
#define IMM64_SIGN_VAL_POS_X            63  \r
\r
/**\r
  Performs an Itanium-based specific relocation fixup.\r
\r
  @param  Reloc       Pointer to the relocation record.\r
  @param  Fixup       Pointer to the address to fix up.\r
  @param  FixupData   Pointer to a buffer to log the fixups.\r
  @param  Adjust      The offset to adjust the fixup.\r
\r
  @return Status code.\r
\r
**/\r
RETURN_STATUS\r
PeCoffLoaderRelocateImageEx (\r
  IN UINT16      *Reloc,\r
  IN OUT CHAR8   *Fixup, \r
  IN OUT CHAR8   **FixupData,\r
  IN UINT64      Adjust\r
  )\r
{\r
  UINT64      *F64;\r
  UINT64      FixupVal;\r
\r
  switch ((*Reloc) >> 12) {\r
    case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
\r
      //\r
      // Align it to bundle address before fixing up the\r
      // 64-bit immediate value of the movl instruction.\r
      //\r
\r
      Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
      FixupVal = (UINT64)0;\r
                       \r
      // \r
      // Extract the lower 32 bits of IMM64 from bundle\r
      //\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r
                IMM64_IMM7B_SIZE_X,\r
                IMM64_IMM7B_INST_WORD_POS_X,\r
                IMM64_IMM7B_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r
                IMM64_IMM9D_SIZE_X,\r
                IMM64_IMM9D_INST_WORD_POS_X,\r
                IMM64_IMM9D_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r
                IMM64_IMM5C_SIZE_X,\r
                IMM64_IMM5C_INST_WORD_POS_X,\r
                IMM64_IMM5C_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r
                IMM64_IC_SIZE_X,\r
                IMM64_IC_INST_WORD_POS_X,\r
                IMM64_IC_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r
                IMM64_IMM41a_SIZE_X,\r
                IMM64_IMM41a_INST_WORD_POS_X,\r
                IMM64_IMM41a_VAL_POS_X\r
                );\r
                       \r
      // \r
      // Update 64-bit address\r
      //\r
      FixupVal += Adjust;\r
\r
      // \r
      // Insert IMM64 into bundle\r
      //\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r
                IMM64_IMM7B_SIZE_X,\r
                IMM64_IMM7B_INST_WORD_POS_X,\r
                IMM64_IMM7B_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r
                IMM64_IMM9D_SIZE_X,\r
                IMM64_IMM9D_INST_WORD_POS_X,\r
                IMM64_IMM9D_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r
                IMM64_IMM5C_SIZE_X,\r
                IMM64_IMM5C_INST_WORD_POS_X,\r
                IMM64_IMM5C_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r
                IMM64_IC_SIZE_X,\r
                IMM64_IC_INST_WORD_POS_X,\r
                IMM64_IC_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r
                IMM64_IMM41a_SIZE_X,\r
                IMM64_IMM41a_INST_WORD_POS_X,\r
                IMM64_IMM41a_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r
                IMM64_IMM41b_SIZE_X,\r
                IMM64_IMM41b_INST_WORD_POS_X,\r
                IMM64_IMM41b_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r
                IMM64_IMM41c_SIZE_X,\r
                IMM64_IMM41c_INST_WORD_POS_X,\r
                IMM64_IMM41c_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r
                IMM64_SIGN_SIZE_X,\r
                IMM64_SIGN_INST_WORD_POS_X,\r
                IMM64_SIGN_VAL_POS_X\r
                );\r
\r
      F64 = (UINT64 *) Fixup;\r
      if (*FixupData != NULL) {\r
        *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));\r
        *(UINT64 *)(*FixupData) = *F64;\r
        *FixupData = *FixupData + sizeof(UINT64);\r
      }\r
      break;\r
\r
    default:\r
      return RETURN_UNSUPPORTED;\r
  }\r
\r
  return RETURN_SUCCESS;\r
}\r
\r
/**\r
  Returns TRUE if the machine type of PE/COFF image is supported. Supported \r
  does not mean the image can be executed it means the PE/COFF loader supports\r
  loading and relocating of the image type. It's up to the caller to support\r
  the entry point. \r
\r
  This function implies the basic PE/COFF loader/relocator supports IA32, EBC,\r
  & X64 images. Calling the entry point in a correct mannor is up to the \r
  consumer of this library. This version also supports the special relocations\r
  for Itanium. \r
\r
  @param  Machine   Machine type from the PE Header.\r
\r
  @return TRUE if this PE/COFF loader can load the image\r
\r
**/\r
BOOLEAN\r
PeCoffLoaderImageFormatSupported (\r
  IN  UINT16  Machine\r
  )\r
{\r
  if ((Machine == EFI_IMAGE_MACHINE_IPF) || (Machine == EFI_IMAGE_MACHINE_IA32) ||\r
      (Machine ==  EFI_IMAGE_MACHINE_EBC) || (Machine == EFI_IMAGE_MACHINE_X64)) {\r
    return TRUE; \r
  }\r
\r
  return FALSE;\r
}\r
\r
\r
/**\r
  ImageRead function that operates on a memory buffer whos base is passed into\r
  FileHandle. \r
\r
  @param  Reloc             Ponter to baes of the input stream\r
  @param  Fixup             Offset to the start of the buffer\r
  @param  FixupData         Number of bytes to copy into the buffer\r
  @param  Adjust            Location to place results of read\r
\r
  @retval RETURN_SUCCESS    Data is read from FileOffset from the Handle into \r
                            the buffer.\r
**/\r
RETURN_STATUS\r
PeHotRelocateImageEx (\r
  IN UINT16      *Reloc,\r
  IN OUT CHAR8   *Fixup,\r
  IN OUT CHAR8   **FixupData,\r
  IN UINT64      Adjust\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Performs an IPF specific relocation fixup\r
\r
Arguments:\r
\r
  Reloc      - Pointer to the relocation record\r
\r
  Fixup      - Pointer to the address to fix up\r
\r
  FixupData  - Pointer to a buffer to log the fixups\r
\r
  Adjust     - The offset to adjust the fixup\r
\r
Returns:\r
\r
  None\r
\r
--*/\r
{\r
  UINT64  *F64;\r
  UINT64  FixupVal;\r
\r
  switch ((*Reloc) >> 12) {\r
  case EFI_IMAGE_REL_BASED_DIR64:\r
    F64         = (UINT64 *) Fixup;\r
    *FixupData  = ALIGN_POINTER (*FixupData, sizeof (UINT64));\r
    if (*(UINT64 *) (*FixupData) == *F64) {\r
      *F64 = *F64 + (UINT64) Adjust;\r
    }\r
\r
    *FixupData = *FixupData + sizeof (UINT64);\r
    break;\r
\r
  case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
    F64         = (UINT64 *) Fixup;\r
    *FixupData  = ALIGN_POINTER (*FixupData, sizeof (UINT64));\r
    if (*(UINT64 *) (*FixupData) == *F64) {\r
      //\r
      // Align it to bundle address before fixing up the\r
      // 64-bit immediate value of the movl instruction.\r
      //\r
      //\r
      Fixup     = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));\r
      FixupVal  = (UINT64) 0;\r
\r
      //\r
      // Extract the lower 32 bits of IMM64 from bundle\r
      //\r
      EXT_IMM64 (\r
        FixupVal,\r
        (UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,\r
        IMM64_IMM7B_SIZE_X,\r
        IMM64_IMM7B_INST_WORD_POS_X,\r
        IMM64_IMM7B_VAL_POS_X\r
        );\r
\r
      EXT_IMM64 (\r
        FixupVal,\r
        (UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,\r
        IMM64_IMM9D_SIZE_X,\r
        IMM64_IMM9D_INST_WORD_POS_X,\r
        IMM64_IMM9D_VAL_POS_X\r
        );\r
\r
      EXT_IMM64 (\r
        FixupVal,\r
        (UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,\r
        IMM64_IMM5C_SIZE_X,\r
        IMM64_IMM5C_INST_WORD_POS_X,\r
        IMM64_IMM5C_VAL_POS_X\r
        );\r
\r
      EXT_IMM64 (\r
        FixupVal,\r
        (UINT32 *) Fixup + IMM64_IC_INST_WORD_X,\r
        IMM64_IC_SIZE_X,\r
        IMM64_IC_INST_WORD_POS_X,\r
        IMM64_IC_VAL_POS_X\r
        );\r
\r
      EXT_IMM64 (\r
        FixupVal,\r
        (UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X,\r
        IMM64_IMM41a_SIZE_X,\r
        IMM64_IMM41a_INST_WORD_POS_X,\r
        IMM64_IMM41a_VAL_POS_X\r
        );\r
\r
      //\r
      // Update 64-bit address\r
      //\r
      FixupVal += Adjust;\r
\r
      //\r
      // Insert IMM64 into bundle\r
      //\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),\r
        IMM64_IMM7B_SIZE_X,\r
        IMM64_IMM7B_INST_WORD_POS_X,\r
        IMM64_IMM7B_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),\r
        IMM64_IMM9D_SIZE_X,\r
        IMM64_IMM9D_INST_WORD_POS_X,\r
        IMM64_IMM9D_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),\r
        IMM64_IMM5C_SIZE_X,\r
        IMM64_IMM5C_INST_WORD_POS_X,\r
        IMM64_IMM5C_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),\r
        IMM64_IC_SIZE_X,\r
        IMM64_IC_INST_WORD_POS_X,\r
        IMM64_IC_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X),\r
        IMM64_IMM41a_SIZE_X,\r
        IMM64_IMM41a_INST_WORD_POS_X,\r
        IMM64_IMM41a_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM41b_INST_WORD_X),\r
        IMM64_IMM41b_SIZE_X,\r
        IMM64_IMM41b_INST_WORD_POS_X,\r
        IMM64_IMM41b_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_IMM41c_INST_WORD_X),\r
        IMM64_IMM41c_SIZE_X,\r
        IMM64_IMM41c_INST_WORD_POS_X,\r
        IMM64_IMM41c_VAL_POS_X\r
        );\r
\r
      INS_IMM64 (\r
        FixupVal,\r
        ((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),\r
        IMM64_SIGN_SIZE_X,\r
        IMM64_SIGN_INST_WORD_POS_X,\r
        IMM64_SIGN_VAL_POS_X\r
        );\r
\r
      *(UINT64 *) (*FixupData) = *F64;\r
    }\r
\r
    *FixupData = *FixupData + sizeof (UINT64);\r
    break;\r
\r
  default:\r
    DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));\r
    return RETURN_UNSUPPORTED;\r
  }\r
\r
  return RETURN_SUCCESS;\r
}\r
\r
\r
\r
Commit	Line	Data
878ddf1f	1	/** @file\r
	2	Fixes Intel Itanium(TM) specific relocation types.\r
	3	\r
	4	Copyright (c) 2006, Intel Corporation\r
	5	All rights reserved. This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	Module Name: PeCoffLoaderEx.c\r
	14	\r
	15	**/\r
	16	\r
	17	\r
	18	\r
	19	\r
	20	\r
	21	#define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \\r
	22	Value \|= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r
	23	\r
	24	#define INS_IMM64(Value, Address, Size, InstPos, ValPos) \\r
	25	(UINT32)Address = ((UINT32)Address & ~(((1 << Size) - 1) << InstPos)) \| \\r
	26	((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
	27	\r
	28	#define IMM64_IMM7B_INST_WORD_X 3 \r
	29	#define IMM64_IMM7B_SIZE_X 7 \r
	30	#define IMM64_IMM7B_INST_WORD_POS_X 4 \r
	31	#define IMM64_IMM7B_VAL_POS_X 0 \r
	32	\r
	33	#define IMM64_IMM9D_INST_WORD_X 3 \r
	34	#define IMM64_IMM9D_SIZE_X 9 \r
	35	#define IMM64_IMM9D_INST_WORD_POS_X 18 \r
	36	#define IMM64_IMM9D_VAL_POS_X 7 \r
	37	\r
	38	#define IMM64_IMM5C_INST_WORD_X 3 \r
	39	#define IMM64_IMM5C_SIZE_X 5 \r
	40	#define IMM64_IMM5C_INST_WORD_POS_X 13 \r
	41	#define IMM64_IMM5C_VAL_POS_X 16 \r
	42	\r
	43	#define IMM64_IC_INST_WORD_X 3 \r
	44	#define IMM64_IC_SIZE_X 1 \r
	45	#define IMM64_IC_INST_WORD_POS_X 12 \r
	46	#define IMM64_IC_VAL_POS_X 21 \r
	47	\r
	48	#define IMM64_IMM41a_INST_WORD_X 1 \r
	49	#define IMM64_IMM41a_SIZE_X 10 \r
	50	#define IMM64_IMM41a_INST_WORD_POS_X 14 \r
	51	#define IMM64_IMM41a_VAL_POS_X 22 \r
	52	\r
	53	#define IMM64_IMM41b_INST_WORD_X 1 \r
	54	#define IMM64_IMM41b_SIZE_X 8 \r
	55	#define IMM64_IMM41b_INST_WORD_POS_X 24 \r
	56	#define IMM64_IMM41b_VAL_POS_X 32 \r
	57	\r
	58	#define IMM64_IMM41c_INST_WORD_X 2 \r
	59	#define IMM64_IMM41c_SIZE_X 23 \r
	60	#define IMM64_IMM41c_INST_WORD_POS_X 0 \r
	61	#define IMM64_IMM41c_VAL_POS_X 40 \r
	62	\r
	63	#define IMM64_SIGN_INST_WORD_X 3 \r
	64	#define IMM64_SIGN_SIZE_X 1 \r
65	#define IMM64_SIGN_INST_WORD_POS_X 27 \r
66	#define IMM64_SIGN_VAL_POS_X 63 \r
67	\r
68	/**\r
69	Performs an Itanium-based specific relocation fixup.\r
70	\r
4ba61e5e	71	@param Reloc Pointer to the relocation record.\r
	72	@param Fixup Pointer to the address to fix up.\r
	73	@param FixupData Pointer to a buffer to log the fixups.\r
	74	@param Adjust The offset to adjust the fixup.\r
878ddf1f	75	\r
	76	@return Status code.\r
	77	\r
	78	**/\r
	79	RETURN_STATUS\r
	80	PeCoffLoaderRelocateImageEx (\r
	81	IN UINT16 *Reloc,\r
	82	IN OUT CHAR8 *Fixup, \r
	83	IN OUT CHAR8 **FixupData,\r
	84	IN UINT64 Adjust\r
	85	)\r
	86	{\r
	87	UINT64 *F64;\r
	88	UINT64 FixupVal;\r
	89	\r
	90	switch ((*Reloc) >> 12) {\r
878ddf1f	91	case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
	92	\r
	93	//\r
	94	// Align it to bundle address before fixing up the\r
	95	// 64-bit immediate value of the movl instruction.\r
	96	//\r
	97	\r
	98	Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
	99	FixupVal = (UINT64)0;\r
	100	\r
	101	// \r
	102	// Extract the lower 32 bits of IMM64 from bundle\r
	103	//\r
	104	EXT_IMM64(FixupVal,\r
	105	(UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r
	106	IMM64_IMM7B_SIZE_X,\r
	107	IMM64_IMM7B_INST_WORD_POS_X,\r
	108	IMM64_IMM7B_VAL_POS_X\r
	109	);\r
	110	\r
	111	EXT_IMM64(FixupVal,\r
	112	(UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r
	113	IMM64_IMM9D_SIZE_X,\r
	114	IMM64_IMM9D_INST_WORD_POS_X,\r
	115	IMM64_IMM9D_VAL_POS_X\r
	116	);\r
	117	\r
	118	EXT_IMM64(FixupVal,\r
	119	(UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r
	120	IMM64_IMM5C_SIZE_X,\r
	121	IMM64_IMM5C_INST_WORD_POS_X,\r
	122	IMM64_IMM5C_VAL_POS_X\r
	123	);\r
	124	\r
	125	EXT_IMM64(FixupVal,\r
	126	(UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r
	127	IMM64_IC_SIZE_X,\r
	128	IMM64_IC_INST_WORD_POS_X,\r
	129	IMM64_IC_VAL_POS_X\r
	130	);\r
	131	\r
	132	EXT_IMM64(FixupVal,\r
	133	(UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r
	134	IMM64_IMM41a_SIZE_X,\r
	135	IMM64_IMM41a_INST_WORD_POS_X,\r
	136	IMM64_IMM41a_VAL_POS_X\r
	137	);\r
	138	\r
	139	// \r
	140	// Update 64-bit address\r
	141	//\r
	142	FixupVal += Adjust;\r
	143	\r
	144	// \r
	145	// Insert IMM64 into bundle\r
	146	//\r
	147	INS_IMM64(FixupVal,\r
	148	((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r
	149	IMM64_IMM7B_SIZE_X,\r
	150	IMM64_IMM7B_INST_WORD_POS_X,\r
	151	IMM64_IMM7B_VAL_POS_X\r
	152	);\r
	153	\r
	154	INS_IMM64(FixupVal,\r
155	((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r
156	IMM64_IMM9D_SIZE_X,\r
157	IMM64_IMM9D_INST_WORD_POS_X,\r
158	IMM64_IMM9D_VAL_POS_X\r
159	);\r
160	\r
161	INS_IMM64(FixupVal,\r
162	((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r
163	IMM64_IMM5C_SIZE_X,\r
164	IMM64_IMM5C_INST_WORD_POS_X,\r
165	IMM64_IMM5C_VAL_POS_X\r
166	);\r
167	\r
168	INS_IMM64(FixupVal,\r
169	((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r
170	IMM64_IC_SIZE_X,\r
171	IMM64_IC_INST_WORD_POS_X,\r
172	IMM64_IC_VAL_POS_X\r
173	);\r
174	\r
175	INS_IMM64(FixupVal,\r
176	((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r
177	IMM64_IMM41a_SIZE_X,\r
178	IMM64_IMM41a_INST_WORD_POS_X,\r
179	IMM64_IMM41a_VAL_POS_X\r
180	);\r
181	\r
182	INS_IMM64(FixupVal,\r
183	((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r
184	IMM64_IMM41b_SIZE_X,\r
185	IMM64_IMM41b_INST_WORD_POS_X,\r
186	IMM64_IMM41b_VAL_POS_X\r
187	);\r
188	\r
189	INS_IMM64(FixupVal,\r
190	((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r
191	IMM64_IMM41c_SIZE_X,\r
192	IMM64_IMM41c_INST_WORD_POS_X,\r
193	IMM64_IMM41c_VAL_POS_X\r
194	);\r
195	\r
196	INS_IMM64(FixupVal,\r
197	((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r
198	IMM64_SIGN_SIZE_X,\r
199	IMM64_SIGN_INST_WORD_POS_X,\r
200	IMM64_SIGN_VAL_POS_X\r
201	);\r
202	\r
203	F64 = (UINT64 *) Fixup;\r
204	if (*FixupData != NULL) {\r
205	FixupData = ALIGN_POINTER(FixupData, sizeof(UINT64));\r
206	(UINT64 )(FixupData) = F64;\r
207	FixupData = FixupData + sizeof(UINT64);\r
208	}\r
209	break;\r
210	\r
211	default:\r
212	return RETURN_UNSUPPORTED;\r
213	}\r
214	\r
215	return RETURN_SUCCESS;\r
216	}\r
2ce31132	217	\r
	218	/**\r
	219	Returns TRUE if the machine type of PE/COFF image is supported. Supported \r
	220	does not mean the image can be executed it means the PE/COFF loader supports\r
	221	loading and relocating of the image type. It's up to the caller to support\r
	222	the entry point. \r
	223	\r
	224	This function implies the basic PE/COFF loader/relocator supports IA32, EBC,\r
	225	& X64 images. Calling the entry point in a correct mannor is up to the \r
	226	consumer of this library. This version also supports the special relocations\r
	227	for Itanium. \r
	228	\r
	229	@param Machine Machine type from the PE Header.\r
	230	\r
	231	@return TRUE if this PE/COFF loader can load the image\r
	232	\r
	233	**/\r
	234	BOOLEAN\r
	235	PeCoffLoaderImageFormatSupported (\r
	236	IN UINT16 Machine\r
	237	)\r
	238	{\r
	239	if ((Machine == EFI_IMAGE_MACHINE_IPF) \|\| (Machine == EFI_IMAGE_MACHINE_IA32) \|\|\r
	240	(Machine == EFI_IMAGE_MACHINE_EBC) \|\| (Machine == EFI_IMAGE_MACHINE_X64)) {\r
	241	return TRUE; \r
	242	}\r
	243	\r
	244	return FALSE;\r
	245	}\r
	246	\r
	247	\r
	248	/**\r
	249	ImageRead function that operates on a memory buffer whos base is passed into\r
	250	FileHandle. \r
	251	\r
	252	@param Reloc Ponter to baes of the input stream\r
	253	@param Fixup Offset to the start of the buffer\r
	254	@param FixupData Number of bytes to copy into the buffer\r
	255	@param Adjust Location to place results of read\r
	256	\r
	257	@retval RETURN_SUCCESS Data is read from FileOffset from the Handle into \r
	258	the buffer.\r
	259	**/\r
	260	RETURN_STATUS\r
	261	PeHotRelocateImageEx (\r
	262	IN UINT16 *Reloc,\r
	263	IN OUT CHAR8 *Fixup,\r
	264	IN OUT CHAR8 **FixupData,\r
	265	IN UINT64 Adjust\r
	266	)\r
	267	/*++\r
	268	\r
	269	Routine Description:\r
	270	\r
	271	Performs an IPF specific relocation fixup\r
	272	\r
	273	Arguments:\r
	274	\r
	275	Reloc - Pointer to the relocation record\r
	276	\r
	277	Fixup - Pointer to the address to fix up\r
	278	\r
	279	FixupData - Pointer to a buffer to log the fixups\r
	280	\r
281	Adjust - The offset to adjust the fixup\r
282	\r
283	Returns:\r
284	\r
285	None\r
286	\r
287	--*/\r
288	{\r
289	UINT64 *F64;\r
290	UINT64 FixupVal;\r
291	\r
292	switch ((*Reloc) >> 12) {\r
293	case EFI_IMAGE_REL_BASED_DIR64:\r
294	F64 = (UINT64 *) Fixup;\r
295	FixupData = ALIGN_POINTER (FixupData, sizeof (UINT64));\r
296	if ((UINT64 ) (FixupData) == F64) {\r
297	F64 = F64 + (UINT64) Adjust;\r
298	}\r
299	\r
300	FixupData = FixupData + sizeof (UINT64);\r
301	break;\r
302	\r
303	case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
304	F64 = (UINT64 *) Fixup;\r
305	FixupData = ALIGN_POINTER (FixupData, sizeof (UINT64));\r
306	if ((UINT64 ) (FixupData) == F64) {\r
307	//\r
308	// Align it to bundle address before fixing up the\r
309	// 64-bit immediate value of the movl instruction.\r
310	//\r
311	//\r
312	Fixup = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));\r
313	FixupVal = (UINT64) 0;\r
314	\r
315	//\r
316	// Extract the lower 32 bits of IMM64 from bundle\r
317	//\r
318	EXT_IMM64 (\r
319	FixupVal,\r
320	(UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,\r
321	IMM64_IMM7B_SIZE_X,\r
322	IMM64_IMM7B_INST_WORD_POS_X,\r
323	IMM64_IMM7B_VAL_POS_X\r
324	);\r
325	\r
326	EXT_IMM64 (\r
327	FixupVal,\r
328	(UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,\r
329	IMM64_IMM9D_SIZE_X,\r
330	IMM64_IMM9D_INST_WORD_POS_X,\r
331	IMM64_IMM9D_VAL_POS_X\r
332	);\r
333	\r
334	EXT_IMM64 (\r
335	FixupVal,\r
336	(UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,\r
337	IMM64_IMM5C_SIZE_X,\r
338	IMM64_IMM5C_INST_WORD_POS_X,\r
339	IMM64_IMM5C_VAL_POS_X\r
340	);\r
341	\r
342	EXT_IMM64 (\r
343	FixupVal,\r
344	(UINT32 *) Fixup + IMM64_IC_INST_WORD_X,\r
345	IMM64_IC_SIZE_X,\r
346	IMM64_IC_INST_WORD_POS_X,\r
347	IMM64_IC_VAL_POS_X\r
348	);\r
349	\r
350	EXT_IMM64 (\r
351	FixupVal,\r
352	(UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X,\r
353	IMM64_IMM41a_SIZE_X,\r
354	IMM64_IMM41a_INST_WORD_POS_X,\r
355	IMM64_IMM41a_VAL_POS_X\r
356	);\r
357	\r
358	//\r
359	// Update 64-bit address\r
360	//\r
361	FixupVal += Adjust;\r
362	\r
363	//\r
364	// Insert IMM64 into bundle\r
365	//\r
366	INS_IMM64 (\r
367	FixupVal,\r
368	((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),\r
369	IMM64_IMM7B_SIZE_X,\r
370	IMM64_IMM7B_INST_WORD_POS_X,\r
371	IMM64_IMM7B_VAL_POS_X\r
372	);\r
373	\r
374	INS_IMM64 (\r
375	FixupVal,\r
376	((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),\r
377	IMM64_IMM9D_SIZE_X,\r
378	IMM64_IMM9D_INST_WORD_POS_X,\r
379	IMM64_IMM9D_VAL_POS_X\r
380	);\r
381	\r
382	INS_IMM64 (\r
383	FixupVal,\r
384	((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),\r
385	IMM64_IMM5C_SIZE_X,\r
386	IMM64_IMM5C_INST_WORD_POS_X,\r
387	IMM64_IMM5C_VAL_POS_X\r
388	);\r
389	\r
390	INS_IMM64 (\r
391	FixupVal,\r
392	((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),\r
393	IMM64_IC_SIZE_X,\r
394	IMM64_IC_INST_WORD_POS_X,\r
395	IMM64_IC_VAL_POS_X\r
396	);\r
397	\r
398	INS_IMM64 (\r
399	FixupVal,\r
400	((UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X),\r
401	IMM64_IMM41a_SIZE_X,\r
402	IMM64_IMM41a_INST_WORD_POS_X,\r
403	IMM64_IMM41a_VAL_POS_X\r
404	);\r
405	\r
406	INS_IMM64 (\r
407	FixupVal,\r
408	((UINT32 *) Fixup + IMM64_IMM41b_INST_WORD_X),\r
409	IMM64_IMM41b_SIZE_X,\r
410	IMM64_IMM41b_INST_WORD_POS_X,\r
411	IMM64_IMM41b_VAL_POS_X\r
412	);\r
413	\r
414	INS_IMM64 (\r
415	FixupVal,\r
416	((UINT32 *) Fixup + IMM64_IMM41c_INST_WORD_X),\r
417	IMM64_IMM41c_SIZE_X,\r
418	IMM64_IMM41c_INST_WORD_POS_X,\r
419	IMM64_IMM41c_VAL_POS_X\r
420	);\r
421	\r
422	INS_IMM64 (\r
423	FixupVal,\r
424	((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),\r
425	IMM64_SIGN_SIZE_X,\r
426	IMM64_SIGN_INST_WORD_POS_X,\r
427	IMM64_SIGN_VAL_POS_X\r
428	);\r
429	\r
430	(UINT64 ) (FixupData) = F64;\r
431	}\r
432	\r
433	FixupData = FixupData + sizeof (UINT64);\r
434	break;\r
435	\r
436	default:\r
437	DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));\r
438	return RETURN_UNSUPPORTED;\r
439	}\r
440	\r
441	return RETURN_SUCCESS;\r
442	}\r
443	\r
444	\r
445	\r