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ba9f8351 | 1 | /** @file\r |
2 | I/O Library instance based on EFI_CPU_IO2_PROTOCOL.\r | |
9095d37b LG |
3 | \r |
4 | Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
61e1deec LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
ba9f8351 | 7 | This program and the accompanying materials are licensed and made available\r |
8 | under the terms and conditions of the BSD License which accompanies this\r | |
9 | distribution. The full text of the license may be found at\r | |
10 | http://opensource.org/licenses/bsd-license.php.\r | |
11 | \r | |
12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | #include "DxeCpuIo2LibInternal.h"\r | |
18 | \r | |
19 | //\r | |
20 | // Globle varible to cache pointer to CpuIo2 protocol.\r | |
21 | //\r | |
22 | EFI_CPU_IO2_PROTOCOL *mCpuIo = NULL;\r | |
23 | \r | |
24 | /**\r | |
25 | The constructor function caches the pointer to CpuIo2 protocol.\r | |
26 | \r | |
27 | The constructor function locates CpuIo2 protocol from protocol database.\r | |
28 | It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r | |
29 | \r | |
30 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
31 | @param SystemTable A pointer to the EFI System Table.\r | |
32 | \r | |
33 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r | |
34 | \r | |
35 | **/\r | |
36 | EFI_STATUS\r | |
37 | EFIAPI\r | |
38 | IoLibConstructor (\r | |
39 | IN EFI_HANDLE ImageHandle,\r | |
40 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
41 | )\r | |
42 | {\r | |
43 | EFI_STATUS Status;\r | |
44 | \r | |
45 | Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo);\r | |
46 | ASSERT_EFI_ERROR (Status);\r | |
47 | \r | |
48 | return Status;\r | |
49 | }\r | |
50 | \r | |
51 | /**\r | |
52 | Reads registers in the EFI CPU I/O space.\r | |
53 | \r | |
54 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
61e1deec LD |
55 | The read value is returned.\r |
56 | \r | |
ba9f8351 | 57 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 58 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 59 | \r |
60 | @param Port The base address of the I/O operation.\r | |
61 | The caller is responsible for aligning the Address if required.\r | |
62 | @param Width The width of the I/O operation.\r | |
63 | \r | |
64 | @return Data read from registers in the EFI CPU I/O space.\r | |
65 | \r | |
66 | **/\r | |
67 | UINT64\r | |
68 | EFIAPI\r | |
69 | IoReadWorker (\r | |
70 | IN UINTN Port,\r | |
71 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
72 | )\r | |
73 | {\r | |
61e1deec LD |
74 | EFI_STATUS Status;\r |
75 | UINT64 Data;\r | |
ba9f8351 | 76 | \r |
77 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r | |
78 | ASSERT_EFI_ERROR (Status);\r | |
79 | \r | |
80 | return Data;\r | |
81 | }\r | |
82 | \r | |
83 | /**\r | |
84 | Writes registers in the EFI CPU I/O space.\r | |
85 | \r | |
86 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
61e1deec LD |
87 | and Data respectively. Data is returned.\r |
88 | \r | |
ba9f8351 | 89 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 90 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 91 | \r |
92 | @param Port The base address of the I/O operation.\r | |
93 | The caller is responsible for aligning the Address if required.\r | |
94 | @param Width The width of the I/O operation.\r | |
95 | @param Data The value to write to the I/O port.\r | |
96 | \r | |
a750b4ae | 97 | @return The parameter of Data.\r |
ba9f8351 | 98 | \r |
99 | **/\r | |
100 | UINT64\r | |
101 | EFIAPI\r | |
102 | IoWriteWorker (\r | |
103 | IN UINTN Port,\r | |
104 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
105 | IN UINT64 Data\r | |
106 | )\r | |
107 | {\r | |
108 | EFI_STATUS Status;\r | |
109 | \r | |
110 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r | |
111 | ASSERT_EFI_ERROR (Status);\r | |
112 | \r | |
113 | return Data;\r | |
114 | }\r | |
115 | \r | |
61e1deec LD |
116 | /**\r |
117 | Reads registers in the EFI CPU I/O space.\r | |
118 | \r | |
119 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
120 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
121 | \r | |
122 | This function must guarantee that all I/O read and write operations are serialized.\r | |
123 | If such operations are not supported, then ASSERT().\r | |
124 | \r | |
125 | @param Port The base address of the I/O operation.\r | |
126 | The caller is responsible for aligning the Address if required.\r | |
127 | @param Width The width of the I/O operation.\r | |
128 | @param Count The number of times to read I/O port.\r | |
129 | @param Buffer The buffer to store the read data into.\r | |
130 | \r | |
131 | **/\r | |
132 | VOID\r | |
133 | EFIAPI\r | |
134 | IoReadFifoWorker (\r | |
135 | IN UINTN Port,\r | |
136 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
137 | IN UINTN Count,\r | |
138 | IN VOID *Buffer\r | |
139 | )\r | |
140 | {\r | |
141 | EFI_STATUS Status;\r | |
142 | \r | |
143 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r | |
144 | ASSERT_EFI_ERROR (Status);\r | |
145 | }\r | |
146 | \r | |
147 | /**\r | |
148 | Writes registers in the EFI CPU I/O space.\r | |
149 | \r | |
150 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
151 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
152 | \r | |
153 | This function must guarantee that all I/O read and write operations are serialized.\r | |
154 | If such operations are not supported, then ASSERT().\r | |
155 | \r | |
156 | @param Port The base address of the I/O operation.\r | |
157 | The caller is responsible for aligning the Address if required.\r | |
158 | @param Width The width of the I/O operation.\r | |
159 | @param Count The number of times to write I/O port.\r | |
160 | @param Buffer The buffer to store the read data into.\r | |
161 | \r | |
162 | **/\r | |
163 | VOID\r | |
164 | EFIAPI\r | |
165 | IoWriteFifoWorker (\r | |
166 | IN UINTN Port,\r | |
167 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
168 | IN UINTN Count,\r | |
169 | IN VOID *Buffer\r | |
170 | )\r | |
171 | {\r | |
172 | EFI_STATUS Status;\r | |
173 | \r | |
174 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r | |
175 | ASSERT_EFI_ERROR (Status);\r | |
176 | }\r | |
177 | \r | |
ba9f8351 | 178 | /**\r |
179 | Reads memory-mapped registers in the EFI system memory space.\r | |
180 | \r | |
181 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
182 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
183 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
184 | \r | |
185 | @param Address The MMIO register to read.\r | |
186 | The caller is responsible for aligning the Address if required.\r | |
187 | @param Width The width of the I/O operation.\r | |
188 | \r | |
189 | @return Data read from registers in the EFI system memory space.\r | |
190 | \r | |
191 | **/\r | |
192 | UINT64\r | |
193 | EFIAPI\r | |
194 | MmioReadWorker (\r | |
195 | IN UINTN Address,\r | |
196 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
197 | )\r | |
198 | {\r | |
199 | EFI_STATUS Status;\r | |
200 | UINT64 Data;\r | |
201 | \r | |
202 | Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r | |
203 | ASSERT_EFI_ERROR (Status);\r | |
204 | \r | |
205 | return Data;\r | |
206 | }\r | |
207 | \r | |
208 | /**\r | |
209 | Writes memory-mapped registers in the EFI system memory space.\r | |
210 | \r | |
211 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
212 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
213 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
214 | \r | |
215 | @param Address The MMIO register to read.\r | |
216 | The caller is responsible for aligning the Address if required.\r | |
217 | @param Width The width of the I/O operation.\r | |
218 | @param Data The value to write to the I/O port.\r | |
9095d37b | 219 | \r |
ba9f8351 | 220 | @return Data read from registers in the EFI system memory space.\r |
221 | \r | |
222 | **/\r | |
223 | UINT64\r | |
224 | EFIAPI\r | |
225 | MmioWriteWorker (\r | |
226 | IN UINTN Address,\r | |
227 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
228 | IN UINT64 Data\r | |
229 | )\r | |
230 | {\r | |
231 | EFI_STATUS Status;\r | |
232 | \r | |
233 | Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r | |
234 | ASSERT_EFI_ERROR (Status);\r | |
235 | \r | |
236 | return Data;\r | |
237 | }\r | |
238 | \r | |
239 | /**\r | |
240 | Reads an 8-bit I/O port.\r | |
241 | \r | |
242 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
243 | This function must guarantee that all I/O read and write operations are\r | |
244 | serialized.\r | |
245 | \r | |
246 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
247 | \r | |
248 | @param Port The I/O port to read.\r | |
249 | \r | |
250 | @return The value read.\r | |
251 | \r | |
252 | **/\r | |
253 | UINT8\r | |
254 | EFIAPI\r | |
255 | IoRead8 (\r | |
256 | IN UINTN Port\r | |
257 | )\r | |
258 | {\r | |
259 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
260 | }\r | |
261 | \r | |
262 | /**\r | |
263 | Writes an 8-bit I/O port.\r | |
264 | \r | |
265 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
266 | and returns Value. This function must guarantee that all I/O read and write\r | |
267 | operations are serialized.\r | |
268 | \r | |
269 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
270 | \r | |
271 | @param Port The I/O port to write.\r | |
272 | @param Value The value to write to the I/O port.\r | |
273 | \r | |
274 | @return The value written the I/O port.\r | |
275 | \r | |
276 | **/\r | |
277 | UINT8\r | |
278 | EFIAPI\r | |
279 | IoWrite8 (\r | |
280 | IN UINTN Port,\r | |
281 | IN UINT8 Value\r | |
282 | )\r | |
283 | {\r | |
284 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
285 | }\r | |
286 | \r | |
287 | /**\r | |
288 | Reads a 16-bit I/O port.\r | |
289 | \r | |
290 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
291 | This function must guarantee that all I/O read and write operations are\r | |
292 | serialized.\r | |
293 | \r | |
294 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 295 | \r |
ba9f8351 | 296 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
297 | \r | |
298 | @param Port The I/O port to read.\r | |
299 | \r | |
300 | @return The value read.\r | |
301 | \r | |
302 | **/\r | |
303 | UINT16\r | |
304 | EFIAPI\r | |
305 | IoRead16 (\r | |
306 | IN UINTN Port\r | |
307 | )\r | |
308 | {\r | |
309 | //\r | |
310 | // Make sure Port is aligned on a 16-bit boundary.\r | |
311 | //\r | |
312 | ASSERT ((Port & 1) == 0);\r | |
313 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
314 | }\r | |
315 | \r | |
316 | /**\r | |
317 | Writes a 16-bit I/O port.\r | |
318 | \r | |
319 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
320 | and returns Value. This function must guarantee that all I/O read and write\r | |
321 | operations are serialized.\r | |
322 | \r | |
323 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
324 | \r | |
325 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
326 | \r | |
327 | @param Port The I/O port to write.\r | |
328 | @param Value The value to write to the I/O port.\r | |
329 | \r | |
330 | @return The value written the I/O port.\r | |
331 | \r | |
332 | **/\r | |
333 | UINT16\r | |
334 | EFIAPI\r | |
335 | IoWrite16 (\r | |
336 | IN UINTN Port,\r | |
337 | IN UINT16 Value\r | |
338 | )\r | |
339 | {\r | |
340 | //\r | |
341 | // Make sure Port is aligned on a 16-bit boundary.\r | |
342 | //\r | |
343 | ASSERT ((Port & 1) == 0);\r | |
344 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
345 | }\r | |
346 | \r | |
347 | /**\r | |
348 | Reads a 32-bit I/O port.\r | |
349 | \r | |
350 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
351 | This function must guarantee that all I/O read and write operations are\r | |
352 | serialized.\r | |
9095d37b | 353 | \r |
ba9f8351 | 354 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
355 | \r | |
356 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
357 | \r | |
358 | @param Port The I/O port to read.\r | |
359 | \r | |
360 | @return The value read.\r | |
361 | \r | |
362 | **/\r | |
363 | UINT32\r | |
364 | EFIAPI\r | |
365 | IoRead32 (\r | |
366 | IN UINTN Port\r | |
367 | )\r | |
368 | {\r | |
369 | //\r | |
370 | // Make sure Port is aligned on a 32-bit boundary.\r | |
371 | //\r | |
372 | ASSERT ((Port & 3) == 0);\r | |
373 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
374 | }\r | |
375 | \r | |
376 | /**\r | |
377 | Writes a 32-bit I/O port.\r | |
378 | \r | |
379 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
380 | and returns Value. This function must guarantee that all I/O read and write\r | |
381 | operations are serialized.\r | |
382 | \r | |
383 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r | |
384 | \r | |
385 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
386 | \r | |
387 | @param Port The I/O port to write.\r | |
388 | @param Value The value to write to the I/O port.\r | |
389 | \r | |
390 | @return The value written the I/O port.\r | |
391 | \r | |
392 | **/\r | |
393 | UINT32\r | |
394 | EFIAPI\r | |
395 | IoWrite32 (\r | |
396 | IN UINTN Port,\r | |
397 | IN UINT32 Value\r | |
398 | )\r | |
399 | {\r | |
400 | //\r | |
401 | // Make sure Port is aligned on a 32-bit boundary.\r | |
402 | //\r | |
403 | ASSERT ((Port & 3) == 0);\r | |
404 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
405 | }\r | |
406 | \r | |
407 | /**\r | |
408 | Reads a 64-bit I/O port.\r | |
409 | \r | |
410 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
411 | This function must guarantee that all I/O read and write operations are\r | |
412 | serialized.\r | |
413 | \r | |
414 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r | |
415 | \r | |
416 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
417 | \r | |
418 | @param Port The I/O port to read.\r | |
419 | \r | |
420 | @return The value read.\r | |
421 | \r | |
422 | **/\r | |
423 | UINT64\r | |
424 | EFIAPI\r | |
425 | IoRead64 (\r | |
426 | IN UINTN Port\r | |
427 | )\r | |
428 | {\r | |
429 | //\r | |
430 | // Make sure Port is aligned on a 64-bit boundary.\r | |
431 | //\r | |
432 | ASSERT ((Port & 7) == 0);\r | |
433 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
434 | }\r | |
435 | \r | |
436 | /**\r | |
437 | Writes a 64-bit I/O port.\r | |
438 | \r | |
439 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
440 | and returns Value. This function must guarantee that all I/O read and write\r | |
441 | operations are serialized.\r | |
442 | \r | |
443 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 444 | \r |
ba9f8351 | 445 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
446 | \r | |
447 | @param Port The I/O port to write.\r | |
448 | @param Value The value to write to the I/O port.\r | |
449 | \r | |
450 | @return The value written the I/O port.\r | |
451 | \r | |
452 | **/\r | |
453 | UINT64\r | |
454 | EFIAPI\r | |
455 | IoWrite64 (\r | |
456 | IN UINTN Port,\r | |
457 | IN UINT64 Value\r | |
458 | )\r | |
459 | {\r | |
460 | //\r | |
461 | // Make sure Port is aligned on a 64-bit boundary.\r | |
462 | //\r | |
463 | ASSERT ((Port & 7) == 0);\r | |
464 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
465 | }\r | |
466 | \r | |
61e1deec LD |
467 | /**\r |
468 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
469 | \r | |
470 | Reads the 8-bit I/O fifo port specified by Port.\r | |
471 | The port is read Count times, and the read data is\r | |
472 | stored in the provided Buffer.\r | |
473 | \r | |
474 | This function must guarantee that all I/O read and write operations are\r | |
475 | serialized.\r | |
476 | \r | |
477 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
478 | \r | |
479 | @param Port The I/O port to read.\r | |
480 | @param Count The number of times to read I/O port.\r | |
481 | @param Buffer The buffer to store the read data into.\r | |
482 | \r | |
483 | **/\r | |
484 | VOID\r | |
485 | EFIAPI\r | |
486 | IoReadFifo8 (\r | |
487 | IN UINTN Port,\r | |
488 | IN UINTN Count,\r | |
489 | OUT VOID *Buffer\r | |
490 | )\r | |
491 | {\r | |
492 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
493 | }\r | |
494 | \r | |
495 | /**\r | |
496 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
497 | \r | |
498 | Writes the 8-bit I/O fifo port specified by Port.\r | |
499 | The port is written Count times, and the write data is\r | |
500 | retrieved from the provided Buffer.\r | |
501 | \r | |
502 | This function must guarantee that all I/O write and write operations are\r | |
503 | serialized.\r | |
504 | \r | |
505 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
506 | \r | |
507 | @param Port The I/O port to write.\r | |
508 | @param Count The number of times to write I/O port.\r | |
509 | @param Buffer The buffer to retrieve the write data from.\r | |
510 | \r | |
511 | **/\r | |
512 | VOID\r | |
513 | EFIAPI\r | |
514 | IoWriteFifo8 (\r | |
515 | IN UINTN Port,\r | |
516 | IN UINTN Count,\r | |
517 | IN VOID *Buffer\r | |
518 | )\r | |
519 | {\r | |
520 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
521 | }\r | |
522 | \r | |
523 | /**\r | |
524 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
525 | \r | |
526 | Reads the 16-bit I/O fifo port specified by Port.\r | |
527 | The port is read Count times, and the read data is\r | |
528 | stored in the provided Buffer.\r | |
529 | \r | |
530 | This function must guarantee that all I/O read and write operations are\r | |
531 | serialized.\r | |
532 | \r | |
533 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
534 | \r | |
535 | @param Port The I/O port to read.\r | |
536 | @param Count The number of times to read I/O port.\r | |
537 | @param Buffer The buffer to store the read data into.\r | |
538 | \r | |
539 | **/\r | |
540 | VOID\r | |
541 | EFIAPI\r | |
542 | IoReadFifo16 (\r | |
543 | IN UINTN Port,\r | |
544 | IN UINTN Count,\r | |
545 | OUT VOID *Buffer\r | |
546 | )\r | |
547 | {\r | |
548 | //\r | |
549 | // Make sure Port is aligned on a 16-bit boundary.\r | |
550 | //\r | |
551 | ASSERT ((Port & 1) == 0);\r | |
552 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
553 | }\r | |
554 | \r | |
555 | /**\r | |
556 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
557 | \r | |
558 | Writes the 16-bit I/O fifo port specified by Port.\r | |
559 | The port is written Count times, and the write data is\r | |
560 | retrieved from the provided Buffer.\r | |
561 | \r | |
562 | This function must guarantee that all I/O write and write operations are\r | |
563 | serialized.\r | |
564 | \r | |
565 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
566 | \r | |
567 | @param Port The I/O port to write.\r | |
568 | @param Count The number of times to write I/O port.\r | |
569 | @param Buffer The buffer to retrieve the write data from.\r | |
570 | \r | |
571 | **/\r | |
572 | VOID\r | |
573 | EFIAPI\r | |
574 | IoWriteFifo16 (\r | |
575 | IN UINTN Port,\r | |
576 | IN UINTN Count,\r | |
577 | IN VOID *Buffer\r | |
578 | )\r | |
579 | {\r | |
580 | //\r | |
581 | // Make sure Port is aligned on a 16-bit boundary.\r | |
582 | //\r | |
583 | ASSERT ((Port & 1) == 0);\r | |
584 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
585 | }\r | |
586 | \r | |
587 | /**\r | |
588 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
589 | \r | |
590 | Reads the 32-bit I/O fifo port specified by Port.\r | |
591 | The port is read Count times, and the read data is\r | |
592 | stored in the provided Buffer.\r | |
593 | \r | |
594 | This function must guarantee that all I/O read and write operations are\r | |
595 | serialized.\r | |
596 | \r | |
597 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
598 | \r | |
599 | @param Port The I/O port to read.\r | |
600 | @param Count The number of times to read I/O port.\r | |
601 | @param Buffer The buffer to store the read data into.\r | |
602 | \r | |
603 | **/\r | |
604 | VOID\r | |
605 | EFIAPI\r | |
606 | IoReadFifo32 (\r | |
607 | IN UINTN Port,\r | |
608 | IN UINTN Count,\r | |
609 | OUT VOID *Buffer\r | |
610 | )\r | |
611 | {\r | |
612 | //\r | |
613 | // Make sure Port is aligned on a 32-bit boundary.\r | |
614 | //\r | |
615 | ASSERT ((Port & 3) == 0);\r | |
616 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
617 | }\r | |
618 | \r | |
619 | /**\r | |
620 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
621 | \r | |
622 | Writes the 32-bit I/O fifo port specified by Port.\r | |
623 | The port is written Count times, and the write data is\r | |
624 | retrieved from the provided Buffer.\r | |
625 | \r | |
626 | This function must guarantee that all I/O write and write operations are\r | |
627 | serialized.\r | |
628 | \r | |
629 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
630 | \r | |
631 | @param Port The I/O port to write.\r | |
632 | @param Count The number of times to write I/O port.\r | |
633 | @param Buffer The buffer to retrieve the write data from.\r | |
634 | \r | |
635 | **/\r | |
636 | VOID\r | |
637 | EFIAPI\r | |
638 | IoWriteFifo32 (\r | |
639 | IN UINTN Port,\r | |
640 | IN UINTN Count,\r | |
641 | IN VOID *Buffer\r | |
642 | )\r | |
643 | {\r | |
644 | //\r | |
645 | // Make sure Port is aligned on a 32-bit boundary.\r | |
646 | //\r | |
647 | ASSERT ((Port & 3) == 0);\r | |
648 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
649 | }\r | |
650 | \r | |
ba9f8351 | 651 | /**\r |
652 | Reads an 8-bit MMIO register.\r | |
653 | \r | |
654 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
655 | returned. This function must guarantee that all MMIO read and write\r | |
656 | operations are serialized.\r | |
657 | \r | |
658 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
659 | \r | |
660 | @param Address The MMIO register to read.\r | |
661 | \r | |
662 | @return The value read.\r | |
663 | \r | |
664 | **/\r | |
665 | UINT8\r | |
666 | EFIAPI\r | |
667 | MmioRead8 (\r | |
668 | IN UINTN Address\r | |
669 | )\r | |
670 | {\r | |
671 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
672 | }\r | |
673 | \r | |
674 | /**\r | |
675 | Writes an 8-bit MMIO register.\r | |
676 | \r | |
677 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
678 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
679 | and write operations are serialized.\r | |
680 | \r | |
681 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
682 | \r | |
683 | @param Address The MMIO register to write.\r | |
684 | @param Value The value to write to the MMIO register.\r | |
685 | \r | |
686 | **/\r | |
687 | UINT8\r | |
688 | EFIAPI\r | |
689 | MmioWrite8 (\r | |
690 | IN UINTN Address,\r | |
691 | IN UINT8 Value\r | |
692 | )\r | |
693 | {\r | |
694 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
695 | }\r | |
696 | \r | |
697 | /**\r | |
698 | Reads a 16-bit MMIO register.\r | |
699 | \r | |
700 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
701 | returned. This function must guarantee that all MMIO read and write\r | |
702 | operations are serialized.\r | |
703 | \r | |
704 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 705 | \r |
ba9f8351 | 706 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
707 | \r | |
708 | @param Address The MMIO register to read.\r | |
709 | \r | |
710 | @return The value read.\r | |
711 | \r | |
712 | **/\r | |
713 | UINT16\r | |
714 | EFIAPI\r | |
715 | MmioRead16 (\r | |
716 | IN UINTN Address\r | |
717 | )\r | |
718 | {\r | |
719 | //\r | |
720 | // Make sure Address is aligned on a 16-bit boundary.\r | |
721 | //\r | |
722 | ASSERT ((Address & 1) == 0);\r | |
723 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
724 | }\r | |
725 | \r | |
726 | /**\r | |
727 | Writes a 16-bit MMIO register.\r | |
728 | \r | |
729 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
730 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
731 | and write operations are serialized.\r | |
732 | \r | |
733 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 734 | \r |
ba9f8351 | 735 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
736 | \r | |
737 | @param Address The MMIO register to write.\r | |
738 | @param Value The value to write to the MMIO register.\r | |
739 | \r | |
740 | **/\r | |
741 | UINT16\r | |
742 | EFIAPI\r | |
743 | MmioWrite16 (\r | |
744 | IN UINTN Address,\r | |
745 | IN UINT16 Value\r | |
746 | )\r | |
747 | {\r | |
748 | //\r | |
749 | // Make sure Address is aligned on a 16-bit boundary.\r | |
750 | //\r | |
751 | ASSERT ((Address & 1) == 0);\r | |
752 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
753 | }\r | |
754 | \r | |
755 | /**\r | |
756 | Reads a 32-bit MMIO register.\r | |
757 | \r | |
758 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
759 | returned. This function must guarantee that all MMIO read and write\r | |
760 | operations are serialized.\r | |
761 | \r | |
762 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
9095d37b | 763 | \r |
ba9f8351 | 764 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
765 | \r | |
766 | @param Address The MMIO register to read.\r | |
767 | \r | |
768 | @return The value read.\r | |
769 | \r | |
770 | **/\r | |
771 | UINT32\r | |
772 | EFIAPI\r | |
773 | MmioRead32 (\r | |
774 | IN UINTN Address\r | |
775 | )\r | |
776 | {\r | |
777 | //\r | |
778 | // Make sure Address is aligned on a 32-bit boundary.\r | |
779 | //\r | |
780 | ASSERT ((Address & 3) == 0);\r | |
781 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
782 | }\r | |
783 | \r | |
784 | /**\r | |
785 | Writes a 32-bit MMIO register.\r | |
786 | \r | |
787 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
788 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
789 | and write operations are serialized.\r | |
790 | \r | |
791 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
9095d37b | 792 | \r |
ba9f8351 | 793 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
794 | \r | |
795 | @param Address The MMIO register to write.\r | |
796 | @param Value The value to write to the MMIO register.\r | |
797 | \r | |
798 | **/\r | |
799 | UINT32\r | |
800 | EFIAPI\r | |
801 | MmioWrite32 (\r | |
802 | IN UINTN Address,\r | |
803 | IN UINT32 Value\r | |
804 | )\r | |
805 | {\r | |
806 | //\r | |
807 | // Make sure Address is aligned on a 32-bit boundary.\r | |
808 | //\r | |
809 | ASSERT ((Address & 3) == 0);\r | |
810 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
811 | }\r | |
812 | \r | |
813 | /**\r | |
814 | Reads a 64-bit MMIO register.\r | |
815 | \r | |
816 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
817 | returned. This function must guarantee that all MMIO read and write\r | |
818 | operations are serialized.\r | |
819 | \r | |
820 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 821 | \r |
ba9f8351 | 822 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
823 | \r | |
824 | @param Address The MMIO register to read.\r | |
825 | \r | |
826 | @return The value read.\r | |
827 | \r | |
828 | **/\r | |
829 | UINT64\r | |
830 | EFIAPI\r | |
831 | MmioRead64 (\r | |
832 | IN UINTN Address\r | |
833 | )\r | |
834 | {\r | |
835 | //\r | |
836 | // Make sure Address is aligned on a 64-bit boundary.\r | |
837 | //\r | |
838 | ASSERT ((Address & 7) == 0);\r | |
839 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
840 | }\r | |
841 | \r | |
842 | /**\r | |
843 | Writes a 64-bit MMIO register.\r | |
844 | \r | |
845 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
846 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
847 | and write operations are serialized.\r | |
848 | \r | |
849 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 850 | \r |
ba9f8351 | 851 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
852 | \r | |
853 | @param Address The MMIO register to write.\r | |
854 | @param Value The value to write to the MMIO register.\r | |
855 | \r | |
856 | **/\r | |
857 | UINT64\r | |
858 | EFIAPI\r | |
859 | MmioWrite64 (\r | |
860 | IN UINTN Address,\r | |
861 | IN UINT64 Value\r | |
862 | )\r | |
863 | {\r | |
864 | //\r | |
865 | // Make sure Address is aligned on a 64-bit boundary.\r | |
866 | //\r | |
867 | ASSERT ((Address & 7) == 0);\r | |
868 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
869 | }\r |