[mirror_edk2.git] / MdePkg / Library / DxeIoLibEsal / IoLib.c

/** @file\r
  I/O Library basic function implementation and worker functions.\r
\r
  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php.\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "DxeIoLibEsalInternal.h"\r
\r
/**\r
  Reads registers in the EFI CPU I/O space.\r
\r
  Reads the I/O port specified by Port with registers width specified by Width.\r
  The read value is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all I/O read and write operations are serialized.\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
\r
  @return Data read from registers in the EFI CPU I/O space.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoReadWorker (\r
  IN      UINTN                     Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width\r
  )\r
{\r
  SAL_RETURN_REGS  ReturnReg;\r
  UINT64           Data;\r
\r
  ReturnReg = EsalCall (\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
                IoReadFunctionId, \r
                (UINT64)Width, \r
                Port, \r
                1, \r
                (UINT64)&Data, \r
                0, \r
                0, \r
                0\r
                );\r
  ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
  return Data;\r
}\r
\r
/**\r
  Writes registers in the EFI CPU I/O space.\r
\r
  Writes the I/O port specified by Port with registers width and value specified by Width\r
  and Data respectively.  Data is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all I/O read and write operations are serialized.\r
\r
  @param  Port          The base address of the I/O operation.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Data          The value to write to the I/O port.\r
\r
  @return The paramter of Data.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoWriteWorker (\r
  IN      UINTN                     Port,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
  IN      UINT64                    Data\r
  )\r
{\r
  SAL_RETURN_REGS  ReturnReg;\r
\r
  ReturnReg = EsalCall (\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
                IoWriteFunctionId, \r
                (UINT64)Width, \r
                Port, \r
                1, \r
                (UINT64)&Data, \r
                0, \r
                0, \r
                0\r
                );\r
  ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
  return Data;\r
}\r
\r
/**\r
  Reads memory-mapped registers in the EFI system memory space.\r
\r
  Reads the MMIO registers specified by Address with registers width specified by Width.\r
  The read value is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all MMIO read and write operations are serialized.\r
\r
  @param  Address       The MMIO register to read.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
\r
  @return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioReadWorker (\r
  IN      UINTN                     Address,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width\r
  )\r
{\r
  SAL_RETURN_REGS  ReturnReg;\r
  UINT64           Data;\r
\r
  ReturnReg = EsalCall (\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
                MemReadFunctionId, \r
                (UINT64)Width, \r
                Address, \r
                1, \r
                (UINT64)&Data, \r
                0, \r
                0, \r
                0\r
                );\r
  ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
  return Data;\r
}\r
\r
/**\r
  Writes memory-mapped registers in the EFI system memory space.\r
\r
  Writes the MMIO registers specified by Address with registers width and value specified by Width\r
  and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
  This function must guarantee that all MMIO read and write operations are serialized.\r
\r
  @param  Address       The MMIO register to read.\r
                        The caller is responsible for aligning the Address if required.\r
  @param  Width         The width of the I/O operation.\r
  @param  Data          The value to write to memory-mapped registers\r
\r
  @return Data read from registers in the EFI system memory space.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWriteWorker (\r
  IN      UINTN                     Address,\r
  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
  IN      UINT64                    Data\r
  )\r
{\r
  SAL_RETURN_REGS  ReturnReg;\r
\r
  ReturnReg = EsalCall (\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
                EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
                MemWriteFunctionId, \r
                (UINT64)Width, \r
                Address, \r
                1, \r
                (UINT64)&Data, \r
                0, \r
                0, \r
                0\r
                );\r
  ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
  return Data;\r
}\r
\r
/**\r
  Reads an 8-bit I/O port.\r
\r
  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT8\r
EFIAPI\r
IoRead8 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
}\r
\r
/**\r
  Writes an 8-bit I/O port.\r
\r
  Writes the 8-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If 8-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT8\r
EFIAPI\r
IoWrite8 (\r
  IN      UINTN                     Port,\r
  IN      UINT8                     Value\r
  )\r
{\r
  return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
}\r
\r
/**\r
  Reads a 16-bit I/O port.\r
\r
  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT16\r
EFIAPI\r
IoRead16 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
}\r
\r
/**\r
  Writes a 16-bit I/O port.\r
\r
  Writes the 16-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If 16-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT16\r
EFIAPI\r
IoWrite16 (\r
  IN      UINTN                     Port,\r
  IN      UINT16                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Port & 1) == 0);\r
  return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
}\r
\r
/**\r
  Reads a 32-bit I/O port.\r
\r
  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT32\r
EFIAPI\r
IoRead32 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
}\r
\r
/**\r
  Writes a 32-bit I/O port.\r
\r
  Writes the 32-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If 32-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT32\r
EFIAPI\r
IoWrite32 (\r
  IN      UINTN                     Port,\r
  IN      UINT32                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Port & 3) == 0);\r
  return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
}\r
\r
/**\r
  Reads a 64-bit I/O port.\r
\r
  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
  This function must guarantee that all I/O read and write operations are\r
  serialized.\r
\r
  If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoRead64 (\r
  IN      UINTN                     Port\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Port & 7) == 0);\r
  return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
}\r
\r
/**\r
  Writes a 64-bit I/O port.\r
\r
  Writes the 64-bit I/O port specified by Port with the value specified by Value\r
  and returns Value. This function must guarantee that all I/O read and write\r
  operations are serialized.\r
\r
  If 64-bit I/O port operations are not supported, then ASSERT().\r
\r
  @param  Port  The I/O port to write.\r
  @param  Value The value to write to the I/O port.\r
\r
  @return The value written the I/O port.\r
\r
**/\r
UINT64\r
EFIAPI\r
IoWrite64 (\r
  IN      UINTN                     Port,\r
  IN      UINT64                    Value\r
  )\r
{\r
  //\r
  // Make sure Port is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Port & 7) == 0);\r
  return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
}\r
\r
/**\r
  Reads an 8-bit MMIO register.\r
\r
  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If 8-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT8\r
EFIAPI\r
MmioRead8 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
}\r
\r
/**\r
  Writes an 8-bit MMIO register.\r
\r
  Writes the 8-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If 8-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT8\r
EFIAPI\r
MmioWrite8 (\r
  IN      UINTN                     Address,\r
  IN      UINT8                     Value\r
  )\r
{\r
  return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
}\r
\r
/**\r
  Reads a 16-bit MMIO register.\r
\r
  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT16\r
EFIAPI\r
MmioRead16 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Address & 1) == 0);\r
  return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
}\r
\r
/**\r
  Writes a 16-bit MMIO register.\r
\r
  Writes the 16-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If 16-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT16\r
EFIAPI\r
MmioWrite16 (\r
  IN      UINTN                     Address,\r
  IN      UINT16                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 16-bit boundary.\r
  //\r
  ASSERT ((Address & 1) == 0);\r
  return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
}\r
\r
/**\r
  Reads a 32-bit MMIO register.\r
\r
  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT32\r
EFIAPI\r
MmioRead32 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Address & 3) == 0);\r
  return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
}\r
\r
/**\r
  Writes a 32-bit MMIO register.\r
\r
  Writes the 32-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If 32-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT32\r
EFIAPI\r
MmioWrite32 (\r
  IN      UINTN                     Address,\r
  IN      UINT32                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 32-bit boundary.\r
  //\r
  ASSERT ((Address & 3) == 0);\r
  return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
}\r
\r
/**\r
  Reads a 64-bit MMIO register.\r
\r
  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
  returned. This function must guarantee that all MMIO read and write\r
  operations are serialized.\r
\r
  If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioRead64 (\r
  IN      UINTN                     Address\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Address & 7) == 0);\r
  return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
}\r
\r
/**\r
  Writes a 64-bit MMIO register.\r
\r
  Writes the 64-bit MMIO register specified by Address with the value specified\r
  by Value and returns Value. This function must guarantee that all MMIO read\r
  and write operations are serialized.\r
\r
  If 64-bit MMIO register operations are not supported, then ASSERT().\r
\r
  @param  Address The MMIO register to write.\r
  @param  Value   The value to write to the MMIO register.\r
\r
**/\r
UINT64\r
EFIAPI\r
MmioWrite64 (\r
  IN      UINTN                     Address,\r
  IN      UINT64                    Value\r
  )\r
{\r
  //\r
  // Make sure Address is aligned on a 64-bit boundary.\r
  //\r
  ASSERT ((Address & 7) == 0);\r
  return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
}\r
Commit	Line	Data
863be5d0	1	/** @file\r
	2	I/O Library basic function implementation and worker functions.\r
	3	\r
	4	Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php.\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include "DxeIoLibEsalInternal.h"\r
	16	\r
	17	/**\r
	18	Reads registers in the EFI CPU I/O space.\r
	19	\r
	20	Reads the I/O port specified by Port with registers width specified by Width.\r
	21	The read value is returned. If such operations are not supported, then ASSERT().\r
	22	This function must guarantee that all I/O read and write operations are serialized.\r
	23	\r
	24	@param Port The base address of the I/O operation.\r
	25	The caller is responsible for aligning the Address if required.\r
	26	@param Width The width of the I/O operation.\r
	27	\r
	28	@return Data read from registers in the EFI CPU I/O space.\r
	29	\r
	30	**/\r
	31	UINT64\r
	32	EFIAPI\r
	33	IoReadWorker (\r
	34	IN UINTN Port,\r
	35	IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
	36	)\r
	37	{\r
	38	SAL_RETURN_REGS ReturnReg;\r
	39	UINT64 Data;\r
	40	\r
	41	ReturnReg = EsalCall (\r
	42	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
	43	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
	44	IoReadFunctionId, \r
	45	(UINT64)Width, \r
	46	Port, \r
	47	1, \r
	48	(UINT64)&Data, \r
	49	0, \r
	50	0, \r
	51	0\r
	52	);\r
	53	ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
	54	return Data;\r
	55	}\r
	56	\r
	57	/**\r
	58	Writes registers in the EFI CPU I/O space.\r
	59	\r
	60	Writes the I/O port specified by Port with registers width and value specified by Width\r
	61	and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
	62	This function must guarantee that all I/O read and write operations are serialized.\r
	63	\r
	64	@param Port The base address of the I/O operation.\r
65	The caller is responsible for aligning the Address if required.\r
66	@param Width The width of the I/O operation.\r
67	@param Data The value to write to the I/O port.\r
68	\r
69	@return The paramter of Data.\r
70	\r
71	**/\r
72	UINT64\r
73	EFIAPI\r
74	IoWriteWorker (\r
75	IN UINTN Port,\r
76	IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
77	IN UINT64 Data\r
78	)\r
79	{\r
80	SAL_RETURN_REGS ReturnReg;\r
81	\r
82	ReturnReg = EsalCall (\r
83	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
84	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
85	IoWriteFunctionId, \r
86	(UINT64)Width, \r
87	Port, \r
88	1, \r
89	(UINT64)&Data, \r
90	0, \r
91	0, \r
92	0\r
93	);\r
94	ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
95	return Data;\r
96	}\r
97	\r
98	/**\r
99	Reads memory-mapped registers in the EFI system memory space.\r
100	\r
101	Reads the MMIO registers specified by Address with registers width specified by Width.\r
102	The read value is returned. If such operations are not supported, then ASSERT().\r
103	This function must guarantee that all MMIO read and write operations are serialized.\r
104	\r
105	@param Address The MMIO register to read.\r
106	The caller is responsible for aligning the Address if required.\r
107	@param Width The width of the I/O operation.\r
108	\r
109	@return Data read from registers in the EFI system memory space.\r
110	\r
111	**/\r
112	UINT64\r
113	EFIAPI\r
114	MmioReadWorker (\r
115	IN UINTN Address,\r
116	IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
117	)\r
118	{\r
119	SAL_RETURN_REGS ReturnReg;\r
120	UINT64 Data;\r
121	\r
122	ReturnReg = EsalCall (\r
123	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
124	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
125	MemReadFunctionId, \r
126	(UINT64)Width, \r
127	Address, \r
128	1, \r
129	(UINT64)&Data, \r
130	0, \r
131	0, \r
132	0\r
133	);\r
134	ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
135	return Data;\r
136	}\r
137	\r
138	/**\r
139	Writes memory-mapped registers in the EFI system memory space.\r
140	\r
141	Writes the MMIO registers specified by Address with registers width and value specified by Width\r
142	and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
143	This function must guarantee that all MMIO read and write operations are serialized.\r
144	\r
145	@param Address The MMIO register to read.\r
146	The caller is responsible for aligning the Address if required.\r
147	@param Width The width of the I/O operation.\r
148	@param Data The value to write to memory-mapped registers\r
149	\r
150	@return Data read from registers in the EFI system memory space.\r
151	\r
152	**/\r
153	UINT64\r
154	EFIAPI\r
155	MmioWriteWorker (\r
156	IN UINTN Address,\r
157	IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
158	IN UINT64 Data\r
159	)\r
160	{\r
161	SAL_RETURN_REGS ReturnReg;\r
162	\r
163	ReturnReg = EsalCall (\r
164	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
165	EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
166	MemWriteFunctionId, \r
167	(UINT64)Width, \r
168	Address, \r
169	1, \r
170	(UINT64)&Data, \r
171	0, \r
172	0, \r
173	0\r
174	);\r
175	ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
176	return Data;\r
177	}\r
178	\r
179	/**\r
180	Reads an 8-bit I/O port.\r
181	\r
182	Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
183	This function must guarantee that all I/O read and write operations are\r
184	serialized.\r
185	\r
186	If 8-bit I/O port operations are not supported, then ASSERT().\r
187	\r
188	@param Port The I/O port to read.\r
189	\r
190	@return The value read.\r
191	\r
192	**/\r
193	UINT8\r
194	EFIAPI\r
195	IoRead8 (\r
196	IN UINTN Port\r
197	)\r
198	{\r
199	return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
200	}\r
201	\r
202	/**\r
203	Writes an 8-bit I/O port.\r
204	\r
205	Writes the 8-bit I/O port specified by Port with the value specified by Value\r
206	and returns Value. This function must guarantee that all I/O read and write\r
207	operations are serialized.\r
208	\r
209	If 8-bit I/O port operations are not supported, then ASSERT().\r
210	\r
211	@param Port The I/O port to write.\r
212	@param Value The value to write to the I/O port.\r
213	\r
214	@return The value written the I/O port.\r
215	\r
216	**/\r
217	UINT8\r
218	EFIAPI\r
219	IoWrite8 (\r
220	IN UINTN Port,\r
221	IN UINT8 Value\r
222	)\r
223	{\r
224	return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
225	}\r
226	\r
227	/**\r
228	Reads a 16-bit I/O port.\r
229	\r
230	Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
231	This function must guarantee that all I/O read and write operations are\r
232	serialized.\r
233	\r
234	If 16-bit I/O port operations are not supported, then ASSERT().\r
235	\r
236	@param Port The I/O port to read.\r
237	\r
238	@return The value read.\r
239	\r
240	**/\r
241	UINT16\r
242	EFIAPI\r
243	IoRead16 (\r
244	IN UINTN Port\r
245	)\r
246	{\r
247	//\r
248	// Make sure Port is aligned on a 16-bit boundary.\r
249	//\r
250	ASSERT ((Port & 1) == 0);\r
251	return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
252	}\r
253	\r
254	/**\r
255	Writes a 16-bit I/O port.\r
256	\r
257	Writes the 16-bit I/O port specified by Port with the value specified by Value\r
258	and returns Value. This function must guarantee that all I/O read and write\r
259	operations are serialized.\r
260	\r
261	If 16-bit I/O port operations are not supported, then ASSERT().\r
262	\r
263	@param Port The I/O port to write.\r
264	@param Value The value to write to the I/O port.\r
265	\r
266	@return The value written the I/O port.\r
267	\r
268	**/\r
269	UINT16\r
270	EFIAPI\r
271	IoWrite16 (\r
272	IN UINTN Port,\r
273	IN UINT16 Value\r
274	)\r
275	{\r
276	//\r
277	// Make sure Port is aligned on a 16-bit boundary.\r
278	//\r
279	ASSERT ((Port & 1) == 0);\r
280	return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
281	}\r
282	\r
283	/**\r
284	Reads a 32-bit I/O port.\r
285	\r
286	Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
287	This function must guarantee that all I/O read and write operations are\r
288	serialized.\r
289	\r
290	If 32-bit I/O port operations are not supported, then ASSERT().\r
291	\r
292	@param Port The I/O port to read.\r
293	\r
294	@return The value read.\r
295	\r
296	**/\r
297	UINT32\r
298	EFIAPI\r
299	IoRead32 (\r
300	IN UINTN Port\r
301	)\r
302	{\r
303	//\r
304	// Make sure Port is aligned on a 32-bit boundary.\r
305	//\r
306	ASSERT ((Port & 3) == 0);\r
307	return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
308	}\r
309	\r
310	/**\r
311	Writes a 32-bit I/O port.\r
312	\r
313	Writes the 32-bit I/O port specified by Port with the value specified by Value\r
314	and returns Value. This function must guarantee that all I/O read and write\r
315	operations are serialized.\r
316	\r
317	If 32-bit I/O port operations are not supported, then ASSERT().\r
318	\r
319	@param Port The I/O port to write.\r
320	@param Value The value to write to the I/O port.\r
321	\r
322	@return The value written the I/O port.\r
323	\r
324	**/\r
325	UINT32\r
326	EFIAPI\r
327	IoWrite32 (\r
328	IN UINTN Port,\r
329	IN UINT32 Value\r
330	)\r
331	{\r
332	//\r
333	// Make sure Port is aligned on a 32-bit boundary.\r
334	//\r
335	ASSERT ((Port & 3) == 0);\r
336	return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
337	}\r
338	\r
339	/**\r
340	Reads a 64-bit I/O port.\r
341	\r
342	Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
343	This function must guarantee that all I/O read and write operations are\r
344	serialized.\r
345	\r
346	If 64-bit I/O port operations are not supported, then ASSERT().\r
347	\r
348	@param Port The I/O port to read.\r
349	\r
350	@return The value read.\r
351	\r
352	**/\r
353	UINT64\r
354	EFIAPI\r
355	IoRead64 (\r
356	IN UINTN Port\r
357	)\r
358	{\r
359	//\r
360	// Make sure Port is aligned on a 64-bit boundary.\r
361	//\r
362	ASSERT ((Port & 7) == 0);\r
363	return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
364	}\r
365	\r
366	/**\r
367	Writes a 64-bit I/O port.\r
368	\r
369	Writes the 64-bit I/O port specified by Port with the value specified by Value\r
370	and returns Value. This function must guarantee that all I/O read and write\r
371	operations are serialized.\r
372	\r
373	If 64-bit I/O port operations are not supported, then ASSERT().\r
374	\r
375	@param Port The I/O port to write.\r
376	@param Value The value to write to the I/O port.\r
377	\r
378	@return The value written the I/O port.\r
379	\r
380	**/\r
381	UINT64\r
382	EFIAPI\r
383	IoWrite64 (\r
384	IN UINTN Port,\r
385	IN UINT64 Value\r
386	)\r
387	{\r
388	//\r
389	// Make sure Port is aligned on a 64-bit boundary.\r
390	//\r
391	ASSERT ((Port & 7) == 0);\r
392	return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
393	}\r
394	\r
395	/**\r
396	Reads an 8-bit MMIO register.\r
397	\r
398	Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
399	returned. This function must guarantee that all MMIO read and write\r
400	operations are serialized.\r
401	\r
402	If 8-bit MMIO register operations are not supported, then ASSERT().\r
403	\r
404	@param Address The MMIO register to read.\r
405	\r
406	@return The value read.\r
407	\r
408	**/\r
409	UINT8\r
410	EFIAPI\r
411	MmioRead8 (\r
412	IN UINTN Address\r
413	)\r
414	{\r
415	return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
416	}\r
417	\r
418	/**\r
419	Writes an 8-bit MMIO register.\r
420	\r
421	Writes the 8-bit MMIO register specified by Address with the value specified\r
422	by Value and returns Value. This function must guarantee that all MMIO read\r
423	and write operations are serialized.\r
424	\r
425	If 8-bit MMIO register operations are not supported, then ASSERT().\r
426	\r
427	@param Address The MMIO register to write.\r
428	@param Value The value to write to the MMIO register.\r
429	\r
430	**/\r
431	UINT8\r
432	EFIAPI\r
433	MmioWrite8 (\r
434	IN UINTN Address,\r
435	IN UINT8 Value\r
436	)\r
437	{\r
438	return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
439	}\r
440	\r
441	/**\r
442	Reads a 16-bit MMIO register.\r
443	\r
444	Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
445	returned. This function must guarantee that all MMIO read and write\r
446	operations are serialized.\r
447	\r
448	If 16-bit MMIO register operations are not supported, then ASSERT().\r
449	\r
450	@param Address The MMIO register to read.\r
451	\r
452	@return The value read.\r
453	\r
454	**/\r
455	UINT16\r
456	EFIAPI\r
457	MmioRead16 (\r
458	IN UINTN Address\r
459	)\r
460	{\r
461	//\r
462	// Make sure Address is aligned on a 16-bit boundary.\r
463	//\r
464	ASSERT ((Address & 1) == 0);\r
465	return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
466	}\r
467	\r
468	/**\r
469	Writes a 16-bit MMIO register.\r
470	\r
471	Writes the 16-bit MMIO register specified by Address with the value specified\r
472	by Value and returns Value. This function must guarantee that all MMIO read\r
473	and write operations are serialized.\r
474	\r
475	If 16-bit MMIO register operations are not supported, then ASSERT().\r
476	\r
477	@param Address The MMIO register to write.\r
478	@param Value The value to write to the MMIO register.\r
479	\r
480	**/\r
481	UINT16\r
482	EFIAPI\r
483	MmioWrite16 (\r
484	IN UINTN Address,\r
485	IN UINT16 Value\r
486	)\r
487	{\r
488	//\r
489	// Make sure Address is aligned on a 16-bit boundary.\r
490	//\r
491	ASSERT ((Address & 1) == 0);\r
492	return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
493	}\r
494	\r
495	/**\r
496	Reads a 32-bit MMIO register.\r
497	\r
498	Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
499	returned. This function must guarantee that all MMIO read and write\r
500	operations are serialized.\r
501	\r
502	If 32-bit MMIO register operations are not supported, then ASSERT().\r
503	\r
504	@param Address The MMIO register to read.\r
505	\r
506	@return The value read.\r
507	\r
508	**/\r
509	UINT32\r
510	EFIAPI\r
511	MmioRead32 (\r
512	IN UINTN Address\r
513	)\r
514	{\r
515	//\r
516	// Make sure Address is aligned on a 32-bit boundary.\r
517	//\r
518	ASSERT ((Address & 3) == 0);\r
519	return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
520	}\r
521	\r
522	/**\r
523	Writes a 32-bit MMIO register.\r
524	\r
525	Writes the 32-bit MMIO register specified by Address with the value specified\r
526	by Value and returns Value. This function must guarantee that all MMIO read\r
527	and write operations are serialized.\r
528	\r
529	If 32-bit MMIO register operations are not supported, then ASSERT().\r
530	\r
531	@param Address The MMIO register to write.\r
532	@param Value The value to write to the MMIO register.\r
533	\r
534	**/\r
535	UINT32\r
536	EFIAPI\r
537	MmioWrite32 (\r
538	IN UINTN Address,\r
539	IN UINT32 Value\r
540	)\r
541	{\r
542	//\r
543	// Make sure Address is aligned on a 32-bit boundary.\r
544	//\r
545	ASSERT ((Address & 3) == 0);\r
546	return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
547	}\r
548	\r
549	/**\r
550	Reads a 64-bit MMIO register.\r
551	\r
552	Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
553	returned. This function must guarantee that all MMIO read and write\r
554	operations are serialized.\r
555	\r
556	If 64-bit MMIO register operations are not supported, then ASSERT().\r
557	\r
558	@param Address The MMIO register to read.\r
559	\r
560	@return The value read.\r
561	\r
562	**/\r
563	UINT64\r
564	EFIAPI\r
565	MmioRead64 (\r
566	IN UINTN Address\r
567	)\r
568	{\r
569	//\r
570	// Make sure Address is aligned on a 64-bit boundary.\r
571	//\r
572	ASSERT ((Address & 7) == 0);\r
573	return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
574	}\r
575	\r
576	/**\r
577	Writes a 64-bit MMIO register.\r
578	\r
579	Writes the 64-bit MMIO register specified by Address with the value specified\r
580	by Value and returns Value. This function must guarantee that all MMIO read\r
581	and write operations are serialized.\r
582	\r
583	If 64-bit MMIO register operations are not supported, then ASSERT().\r
584	\r
585	@param Address The MMIO register to write.\r
586	@param Value The value to write to the MMIO register.\r
587	\r
588	**/\r
589	UINT64\r
590	EFIAPI\r
591	MmioWrite64 (\r
592	IN UINTN Address,\r
593	IN UINT64 Value\r
594	)\r
595	{\r
596	//\r
597	// Make sure Address is aligned on a 64-bit boundary.\r
598	//\r
599	ASSERT ((Address & 7) == 0);\r
600	return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
601	}\r