projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 1ffb3e01 JJ |
1 | // /** @file\r |
| 2 | // Instance of PCI Express Library using the 256 MB PCI Express MMIO window that\r | |
| 3 | //\r | |
| 4 | // is safe for runtime use.\r | |
| 9095d37b | 5 | //\r |
| 1ffb3e01 JJ |
6 | // PCI Express Library that uses the 256 MB PCI Express MMIO window to perform\r |
| 7 | // PCI Configuration cycles. Layers on top of an I/O Library instance. A table of\r | |
| 8 | // PCI devices that are registered for for runtime access is maintained so the\r | |
| 9 | // proper virtual address is used to perform the PCI Express Configuration cycle.\r | |
| 10 | //\r | |
| 9095d37b | 11 | // Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 1ffb3e01 | 12 | //\r |
| 9344f092 | 13 | // SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 1ffb3e01 JJ |
14 | //\r |
| 15 | // **/\r | |
| 16 | \r | |
| 17 | \r | |
| 18 | #string STR_MODULE_ABSTRACT #language en-US "PCI Express Support Library"\r | |
| 19 | \r | |
| 20 | #string STR_MODULE_DESCRIPTION #language en-US "The PCI Express Library uses a 256 MB PCI Express MMIO window to perform PCI Configuration cycles. This library layers on top of an I/O Library instance. A table of PCI devices that are registered for runtime access is maintained so that the proper virtual address is used to perform the PCI Express Configuration cycle."\r | |
| 21 | \r |