| 11f43dfd |
1 | /** @file\r |
| 2 | High-level Io/Mmio functions.\r |
| 3 | \r |
| 4 | All assertions for bit field operations are handled bit field functions in the\r |
| 5 | Base Library.\r |
| 6 | \r |
| 7 | Copyright (c) 2006, Intel Corporation<BR>\r |
| 8 | All rights reserved. This program and the accompanying materials\r |
| 9 | are licensed and made available under the terms and conditions of the BSD License\r |
| 10 | which accompanies this distribution. The full text of the license may be found at\r |
| 11 | http://opensource.org/licenses/bsd-license.php\r |
| 12 | \r |
| 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 15 | \r |
| 11f43dfd |
16 | The following IoLib instances share the same version of this file:\r |
| 17 | \r |
| 18 | BaseIoLibIntrinsic\r |
| 19 | DxeIoLibCpuIo\r |
| 20 | PeiIoLibCpuIo\r |
| 21 | \r |
| 22 | **/\r |
| 23 | \r |
| c892d846 |
24 | \r |
| 11f43dfd |
25 | #include <PiPei.h>\r |
| c892d846 |
26 | \r |
| 11f43dfd |
27 | #include <Library/IoLib.h>\r |
| 28 | #include <Library/DebugLib.h>\r |
| 29 | #include <Library/BaseLib.h>\r |
| 30 | #include <Library/PeiServicesTablePointerLib.h>\r |
| 31 | \r |
| 32 | /**\r |
| 33 | Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 34 | result back to the 8-bit I/O port.\r |
| 35 | \r |
| 36 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 37 | between the read result and the value specified by OrData, and writes the\r |
| 38 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r |
| 39 | port is returned. This function must guarantee that all I/O read and write\r |
| 40 | operations are serialized.\r |
| 41 | \r |
| 42 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 43 | \r |
| 44 | @param Port The I/O port to write.\r |
| 45 | @param OrData The value to OR with the read value from the I/O port.\r |
| 46 | \r |
| 47 | @return The value written back to the I/O port.\r |
| 48 | \r |
| 49 | **/\r |
| 50 | UINT8\r |
| 51 | EFIAPI\r |
| 52 | IoOr8 (\r |
| 53 | IN UINTN Port,\r |
| 54 | IN UINT8 OrData\r |
| 55 | )\r |
| 56 | {\r |
| 57 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));\r |
| 58 | }\r |
| 59 | \r |
| 60 | /**\r |
| 61 | Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 62 | to the 8-bit I/O port.\r |
| 63 | \r |
| 64 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 65 | the read result and the value specified by AndData, and writes the result to\r |
| 66 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r |
| 67 | returned. This function must guarantee that all I/O read and write operations\r |
| 68 | are serialized.\r |
| 69 | \r |
| 70 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 71 | \r |
| 72 | @param Port The I/O port to write.\r |
| 73 | @param AndData The value to AND with the read value from the I/O port.\r |
| 74 | \r |
| 75 | @return The value written back to the I/O port.\r |
| 76 | \r |
| 77 | **/\r |
| 78 | UINT8\r |
| 79 | EFIAPI\r |
| 80 | IoAnd8 (\r |
| 81 | IN UINTN Port,\r |
| 82 | IN UINT8 AndData\r |
| 83 | )\r |
| 84 | {\r |
| 85 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));\r |
| 86 | }\r |
| 87 | \r |
| 88 | /**\r |
| 89 | Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 90 | inclusive OR, and writes the result back to the 8-bit I/O port.\r |
| 91 | \r |
| 92 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 93 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 94 | between the result of the AND operation and the value specified by OrData,\r |
| 95 | and writes the result to the 8-bit I/O port specified by Port. The value\r |
| 96 | written to the I/O port is returned. This function must guarantee that all\r |
| 97 | I/O read and write operations are serialized.\r |
| 98 | \r |
| 99 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 100 | \r |
| 101 | @param Port The I/O port to write.\r |
| 102 | @param AndData The value to AND with the read value from the I/O port.\r |
| 103 | @param OrData The value to OR with the result of the AND operation.\r |
| 104 | \r |
| 105 | @return The value written back to the I/O port.\r |
| 106 | \r |
| 107 | **/\r |
| 108 | UINT8\r |
| 109 | EFIAPI\r |
| 110 | IoAndThenOr8 (\r |
| 111 | IN UINTN Port,\r |
| 112 | IN UINT8 AndData,\r |
| 113 | IN UINT8 OrData\r |
| 114 | )\r |
| 115 | {\r |
| 116 | return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));\r |
| 117 | }\r |
| 118 | \r |
| 119 | /**\r |
| 120 | Reads a bit field of an I/O register.\r |
| 121 | \r |
| 122 | Reads the bit field in an 8-bit I/O register. The bit field is specified by\r |
| 123 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 124 | \r |
| 125 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 126 | If StartBit is greater than 7, then ASSERT().\r |
| 127 | If EndBit is greater than 7, then ASSERT().\r |
| 128 | If EndBit is less than StartBit, then ASSERT().\r |
| 129 | \r |
| 130 | @param Port The I/O port to read.\r |
| 131 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 132 | Range 0..7.\r |
| 133 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 134 | Range 0..7.\r |
| 135 | \r |
| 136 | @return The value read.\r |
| 137 | \r |
| 138 | **/\r |
| 139 | UINT8\r |
| 140 | EFIAPI\r |
| 141 | IoBitFieldRead8 (\r |
| 142 | IN UINTN Port,\r |
| 143 | IN UINTN StartBit,\r |
| 144 | IN UINTN EndBit\r |
| 145 | )\r |
| 146 | {\r |
| 147 | return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r |
| 148 | }\r |
| 149 | \r |
| 150 | /**\r |
| 151 | Writes a bit field to an I/O register.\r |
| 152 | \r |
| 153 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 154 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 155 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 156 | left bits in Value are stripped.\r |
| 157 | \r |
| 158 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 159 | If StartBit is greater than 7, then ASSERT().\r |
| 160 | If EndBit is greater than 7, then ASSERT().\r |
| 161 | If EndBit is less than StartBit, then ASSERT().\r |
| 162 | \r |
| 163 | @param Port The I/O port to write.\r |
| 164 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 165 | Range 0..7.\r |
| 166 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 167 | Range 0..7.\r |
| 168 | @param Value New value of the bit field.\r |
| 169 | \r |
| 170 | @return The value written back to the I/O port.\r |
| 171 | \r |
| 172 | **/\r |
| 173 | UINT8\r |
| 174 | EFIAPI\r |
| 175 | IoBitFieldWrite8 (\r |
| 176 | IN UINTN Port,\r |
| 177 | IN UINTN StartBit,\r |
| 178 | IN UINTN EndBit,\r |
| 179 | IN UINT8 Value\r |
| 180 | )\r |
| 181 | {\r |
| 182 | return IoWrite8 (\r |
| 183 | Port,\r |
| 184 | BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r |
| 185 | );\r |
| 186 | }\r |
| 187 | \r |
| 188 | /**\r |
| 189 | Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r |
| 190 | result back to the bit field in the 8-bit port.\r |
| 191 | \r |
| 192 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 193 | between the read result and the value specified by OrData, and writes the\r |
| 194 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r |
| 195 | port is returned. This function must guarantee that all I/O read and write\r |
| 196 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 197 | \r |
| 198 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 199 | If StartBit is greater than 7, then ASSERT().\r |
| 200 | If EndBit is greater than 7, then ASSERT().\r |
| 201 | If EndBit is less than StartBit, then ASSERT().\r |
| 202 | \r |
| 203 | @param Port The I/O port to write.\r |
| 204 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 205 | Range 0..7.\r |
| 206 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 207 | Range 0..7.\r |
| 208 | @param OrData The value to OR with the read value from the I/O port.\r |
| 209 | \r |
| 210 | @return The value written back to the I/O port.\r |
| 211 | \r |
| 212 | **/\r |
| 213 | UINT8\r |
| 214 | EFIAPI\r |
| 215 | IoBitFieldOr8 (\r |
| 216 | IN UINTN Port,\r |
| 217 | IN UINTN StartBit,\r |
| 218 | IN UINTN EndBit,\r |
| 219 | IN UINT8 OrData\r |
| 220 | )\r |
| 221 | {\r |
| 222 | return IoWrite8 (\r |
| 223 | Port,\r |
| 224 | BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r |
| 225 | );\r |
| 226 | }\r |
| 227 | \r |
| 228 | /**\r |
| 229 | Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r |
| 230 | result back to the bit field in the 8-bit port.\r |
| 231 | \r |
| 232 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 233 | the read result and the value specified by AndData, and writes the result to\r |
| 234 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r |
| 235 | returned. This function must guarantee that all I/O read and write operations\r |
| 236 | are serialized. Extra left bits in AndData are stripped.\r |
| 237 | \r |
| 238 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 239 | If StartBit is greater than 7, then ASSERT().\r |
| 240 | If EndBit is greater than 7, then ASSERT().\r |
| 241 | If EndBit is less than StartBit, then ASSERT().\r |
| 242 | \r |
| 243 | @param Port The I/O port to write.\r |
| 244 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 245 | Range 0..7.\r |
| 246 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 247 | Range 0..7.\r |
| 248 | @param AndData The value to AND with the read value from the I/O port.\r |
| 249 | \r |
| 250 | @return The value written back to the I/O port.\r |
| 251 | \r |
| 252 | **/\r |
| 253 | UINT8\r |
| 254 | EFIAPI\r |
| 255 | IoBitFieldAnd8 (\r |
| 256 | IN UINTN Port,\r |
| 257 | IN UINTN StartBit,\r |
| 258 | IN UINTN EndBit,\r |
| 259 | IN UINT8 AndData\r |
| 260 | )\r |
| 261 | {\r |
| 262 | return IoWrite8 (\r |
| 263 | Port,\r |
| 264 | BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r |
| 265 | );\r |
| 266 | }\r |
| 267 | \r |
| 268 | /**\r |
| 269 | Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r |
| 270 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 271 | 8-bit port.\r |
| 272 | \r |
| 273 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 274 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 275 | AndData, and writes the result to the 8-bit I/O port specified by Port. The\r |
| 276 | value written to the I/O port is returned. This function must guarantee that\r |
| 277 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 278 | AndData and OrData are stripped.\r |
| 279 | \r |
| 280 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 281 | If StartBit is greater than 7, then ASSERT().\r |
| 282 | If EndBit is greater than 7, then ASSERT().\r |
| 283 | If EndBit is less than StartBit, then ASSERT().\r |
| 284 | \r |
| 285 | @param Port The I/O port to write.\r |
| 286 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 287 | Range 0..7.\r |
| 288 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 289 | Range 0..7.\r |
| 290 | @param AndData The value to AND with the read value from the I/O port.\r |
| 291 | @param OrData The value to OR with the result of the AND operation.\r |
| 292 | \r |
| 293 | @return The value written back to the I/O port.\r |
| 294 | \r |
| 295 | **/\r |
| 296 | UINT8\r |
| 297 | EFIAPI\r |
| 298 | IoBitFieldAndThenOr8 (\r |
| 299 | IN UINTN Port,\r |
| 300 | IN UINTN StartBit,\r |
| 301 | IN UINTN EndBit,\r |
| 302 | IN UINT8 AndData,\r |
| 303 | IN UINT8 OrData\r |
| 304 | )\r |
| 305 | {\r |
| 306 | return IoWrite8 (\r |
| 307 | Port,\r |
| 308 | BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r |
| 309 | );\r |
| 310 | }\r |
| 311 | \r |
| 312 | /**\r |
| 313 | Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 314 | result back to the 16-bit I/O port.\r |
| 315 | \r |
| 316 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 317 | between the read result and the value specified by OrData, and writes the\r |
| 318 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r |
| 319 | port is returned. This function must guarantee that all I/O read and write\r |
| 320 | operations are serialized.\r |
| 321 | \r |
| 322 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 323 | \r |
| 324 | @param Port The I/O port to write.\r |
| 325 | @param OrData The value to OR with the read value from the I/O port.\r |
| 326 | \r |
| 327 | @return The value written back to the I/O port.\r |
| 328 | \r |
| 329 | **/\r |
| 330 | UINT16\r |
| 331 | EFIAPI\r |
| 332 | IoOr16 (\r |
| 333 | IN UINTN Port,\r |
| 334 | IN UINT16 OrData\r |
| 335 | )\r |
| 336 | {\r |
| 337 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));\r |
| 338 | }\r |
| 339 | \r |
| 340 | /**\r |
| 341 | Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 342 | to the 16-bit I/O port.\r |
| 343 | \r |
| 344 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 345 | the read result and the value specified by AndData, and writes the result to\r |
| 346 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r |
| 347 | returned. This function must guarantee that all I/O read and write operations\r |
| 348 | are serialized.\r |
| 349 | \r |
| 350 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 351 | \r |
| 352 | @param Port The I/O port to write.\r |
| 353 | @param AndData The value to AND with the read value from the I/O port.\r |
| 354 | \r |
| 355 | @return The value written back to the I/O port.\r |
| 356 | \r |
| 357 | **/\r |
| 358 | UINT16\r |
| 359 | EFIAPI\r |
| 360 | IoAnd16 (\r |
| 361 | IN UINTN Port,\r |
| 362 | IN UINT16 AndData\r |
| 363 | )\r |
| 364 | {\r |
| 365 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));\r |
| 366 | }\r |
| 367 | \r |
| 368 | /**\r |
| 369 | Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 370 | inclusive OR, and writes the result back to the 16-bit I/O port.\r |
| 371 | \r |
| 372 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 373 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 374 | between the result of the AND operation and the value specified by OrData,\r |
| 375 | and writes the result to the 16-bit I/O port specified by Port. The value\r |
| 376 | written to the I/O port is returned. This function must guarantee that all\r |
| 377 | I/O read and write operations are serialized.\r |
| 378 | \r |
| 379 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 380 | \r |
| 381 | @param Port The I/O port to write.\r |
| 382 | @param AndData The value to AND with the read value from the I/O port.\r |
| 383 | @param OrData The value to OR with the result of the AND operation.\r |
| 384 | \r |
| 385 | @return The value written back to the I/O port.\r |
| 386 | \r |
| 387 | **/\r |
| 388 | UINT16\r |
| 389 | EFIAPI\r |
| 390 | IoAndThenOr16 (\r |
| 391 | IN UINTN Port,\r |
| 392 | IN UINT16 AndData,\r |
| 393 | IN UINT16 OrData\r |
| 394 | )\r |
| 395 | {\r |
| 396 | return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));\r |
| 397 | }\r |
| 398 | \r |
| 399 | /**\r |
| 400 | Reads a bit field of an I/O register.\r |
| 401 | \r |
| 402 | Reads the bit field in a 16-bit I/O register. The bit field is specified by\r |
| 403 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 404 | \r |
| 405 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 406 | If StartBit is greater than 15, then ASSERT().\r |
| 407 | If EndBit is greater than 15, then ASSERT().\r |
| 408 | If EndBit is less than StartBit, then ASSERT().\r |
| 409 | \r |
| 410 | @param Port The I/O port to read.\r |
| 411 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 412 | Range 0..15.\r |
| 413 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 414 | Range 0..15.\r |
| 415 | \r |
| 416 | @return The value read.\r |
| 417 | \r |
| 418 | **/\r |
| 419 | UINT16\r |
| 420 | EFIAPI\r |
| 421 | IoBitFieldRead16 (\r |
| 422 | IN UINTN Port,\r |
| 423 | IN UINTN StartBit,\r |
| 424 | IN UINTN EndBit\r |
| 425 | )\r |
| 426 | {\r |
| 427 | return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r |
| 428 | }\r |
| 429 | \r |
| 430 | /**\r |
| 431 | Writes a bit field to an I/O register.\r |
| 432 | \r |
| 433 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 434 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 435 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 436 | left bits in Value are stripped.\r |
| 437 | \r |
| 438 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 439 | If StartBit is greater than 15, then ASSERT().\r |
| 440 | If EndBit is greater than 15, then ASSERT().\r |
| 441 | If EndBit is less than StartBit, then ASSERT().\r |
| 442 | \r |
| 443 | @param Port The I/O port to write.\r |
| 444 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 445 | Range 0..15.\r |
| 446 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 447 | Range 0..15.\r |
| 448 | @param Value New value of the bit field.\r |
| 449 | \r |
| 450 | @return The value written back to the I/O port.\r |
| 451 | \r |
| 452 | **/\r |
| 453 | UINT16\r |
| 454 | EFIAPI\r |
| 455 | IoBitFieldWrite16 (\r |
| 456 | IN UINTN Port,\r |
| 457 | IN UINTN StartBit,\r |
| 458 | IN UINTN EndBit,\r |
| 459 | IN UINT16 Value\r |
| 460 | )\r |
| 461 | {\r |
| 462 | return IoWrite16 (\r |
| 463 | Port,\r |
| 464 | BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r |
| 465 | );\r |
| 466 | }\r |
| 467 | \r |
| 468 | /**\r |
| 469 | Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r |
| 470 | result back to the bit field in the 16-bit port.\r |
| 471 | \r |
| 472 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 473 | between the read result and the value specified by OrData, and writes the\r |
| 474 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r |
| 475 | port is returned. This function must guarantee that all I/O read and write\r |
| 476 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 477 | \r |
| 478 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 479 | If StartBit is greater than 15, then ASSERT().\r |
| 480 | If EndBit is greater than 15, then ASSERT().\r |
| 481 | If EndBit is less than StartBit, then ASSERT().\r |
| 482 | \r |
| 483 | @param Port The I/O port to write.\r |
| 484 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 485 | Range 0..15.\r |
| 486 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 487 | Range 0..15.\r |
| 488 | @param OrData The value to OR with the read value from the I/O port.\r |
| 489 | \r |
| 490 | @return The value written back to the I/O port.\r |
| 491 | \r |
| 492 | **/\r |
| 493 | UINT16\r |
| 494 | EFIAPI\r |
| 495 | IoBitFieldOr16 (\r |
| 496 | IN UINTN Port,\r |
| 497 | IN UINTN StartBit,\r |
| 498 | IN UINTN EndBit,\r |
| 499 | IN UINT16 OrData\r |
| 500 | )\r |
| 501 | {\r |
| 502 | return IoWrite16 (\r |
| 503 | Port,\r |
| 504 | BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r |
| 505 | );\r |
| 506 | }\r |
| 507 | \r |
| 508 | /**\r |
| 509 | Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r |
| 510 | result back to the bit field in the 16-bit port.\r |
| 511 | \r |
| 512 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 513 | the read result and the value specified by AndData, and writes the result to\r |
| 514 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r |
| 515 | returned. This function must guarantee that all I/O read and write operations\r |
| 516 | are serialized. Extra left bits in AndData are stripped.\r |
| 517 | \r |
| 518 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 519 | If StartBit is greater than 15, then ASSERT().\r |
| 520 | If EndBit is greater than 15, then ASSERT().\r |
| 521 | If EndBit is less than StartBit, then ASSERT().\r |
| 522 | \r |
| 523 | @param Port The I/O port to write.\r |
| 524 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 525 | Range 0..15.\r |
| 526 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 527 | Range 0..15.\r |
| 528 | @param AndData The value to AND with the read value from the I/O port.\r |
| 529 | \r |
| 530 | @return The value written back to the I/O port.\r |
| 531 | \r |
| 532 | **/\r |
| 533 | UINT16\r |
| 534 | EFIAPI\r |
| 535 | IoBitFieldAnd16 (\r |
| 536 | IN UINTN Port,\r |
| 537 | IN UINTN StartBit,\r |
| 538 | IN UINTN EndBit,\r |
| 539 | IN UINT16 AndData\r |
| 540 | )\r |
| 541 | {\r |
| 542 | return IoWrite16 (\r |
| 543 | Port,\r |
| 544 | BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r |
| 545 | );\r |
| 546 | }\r |
| 547 | \r |
| 548 | /**\r |
| 549 | Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r |
| 550 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 551 | 16-bit port.\r |
| 552 | \r |
| 553 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 554 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 555 | AndData, and writes the result to the 16-bit I/O port specified by Port. The\r |
| 556 | value written to the I/O port is returned. This function must guarantee that\r |
| 557 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 558 | AndData and OrData are stripped.\r |
| 559 | \r |
| 560 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 561 | If StartBit is greater than 15, then ASSERT().\r |
| 562 | If EndBit is greater than 15, then ASSERT().\r |
| 563 | If EndBit is less than StartBit, then ASSERT().\r |
| 564 | \r |
| 565 | @param Port The I/O port to write.\r |
| 566 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 567 | Range 0..15.\r |
| 568 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 569 | Range 0..15.\r |
| 570 | @param AndData The value to AND with the read value from the I/O port.\r |
| 571 | @param OrData The value to OR with the result of the AND operation.\r |
| 572 | \r |
| 573 | @return The value written back to the I/O port.\r |
| 574 | \r |
| 575 | **/\r |
| 576 | UINT16\r |
| 577 | EFIAPI\r |
| 578 | IoBitFieldAndThenOr16 (\r |
| 579 | IN UINTN Port,\r |
| 580 | IN UINTN StartBit,\r |
| 581 | IN UINTN EndBit,\r |
| 582 | IN UINT16 AndData,\r |
| 583 | IN UINT16 OrData\r |
| 584 | )\r |
| 585 | {\r |
| 586 | return IoWrite16 (\r |
| 587 | Port,\r |
| 588 | BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r |
| 589 | );\r |
| 590 | }\r |
| 591 | \r |
| 592 | /**\r |
| 593 | Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 594 | result back to the 32-bit I/O port.\r |
| 595 | \r |
| 596 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 597 | between the read result and the value specified by OrData, and writes the\r |
| 598 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r |
| 599 | port is returned. This function must guarantee that all I/O read and write\r |
| 600 | operations are serialized.\r |
| 601 | \r |
| 602 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 603 | \r |
| 604 | @param Port The I/O port to write.\r |
| 605 | @param OrData The value to OR with the read value from the I/O port.\r |
| 606 | \r |
| 607 | @return The value written back to the I/O port.\r |
| 608 | \r |
| 609 | **/\r |
| 610 | UINT32\r |
| 611 | EFIAPI\r |
| 612 | IoOr32 (\r |
| 613 | IN UINTN Port,\r |
| 614 | IN UINT32 OrData\r |
| 615 | )\r |
| 616 | {\r |
| 617 | return IoWrite32 (Port, IoRead32 (Port) | OrData);\r |
| 618 | }\r |
| 619 | \r |
| 620 | /**\r |
| 621 | Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 622 | to the 32-bit I/O port.\r |
| 623 | \r |
| 624 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 625 | the read result and the value specified by AndData, and writes the result to\r |
| 626 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r |
| 627 | returned. This function must guarantee that all I/O read and write operations\r |
| 628 | are serialized.\r |
| 629 | \r |
| 630 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 631 | \r |
| 632 | @param Port The I/O port to write.\r |
| 633 | @param AndData The value to AND with the read value from the I/O port.\r |
| 634 | \r |
| 635 | @return The value written back to the I/O port.\r |
| 636 | \r |
| 637 | **/\r |
| 638 | UINT32\r |
| 639 | EFIAPI\r |
| 640 | IoAnd32 (\r |
| 641 | IN UINTN Port,\r |
| 642 | IN UINT32 AndData\r |
| 643 | )\r |
| 644 | {\r |
| 645 | return IoWrite32 (Port, IoRead32 (Port) & AndData);\r |
| 646 | }\r |
| 647 | \r |
| 648 | /**\r |
| 649 | Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 650 | inclusive OR, and writes the result back to the 32-bit I/O port.\r |
| 651 | \r |
| 652 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 653 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 654 | between the result of the AND operation and the value specified by OrData,\r |
| 655 | and writes the result to the 32-bit I/O port specified by Port. The value\r |
| 656 | written to the I/O port is returned. This function must guarantee that all\r |
| 657 | I/O read and write operations are serialized.\r |
| 658 | \r |
| 659 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 660 | \r |
| 661 | @param Port The I/O port to write.\r |
| 662 | @param AndData The value to AND with the read value from the I/O port.\r |
| 663 | @param OrData The value to OR with the result of the AND operation.\r |
| 664 | \r |
| 665 | @return The value written back to the I/O port.\r |
| 666 | \r |
| 667 | **/\r |
| 668 | UINT32\r |
| 669 | EFIAPI\r |
| 670 | IoAndThenOr32 (\r |
| 671 | IN UINTN Port,\r |
| 672 | IN UINT32 AndData,\r |
| 673 | IN UINT32 OrData\r |
| 674 | )\r |
| 675 | {\r |
| 676 | return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r |
| 677 | }\r |
| 678 | \r |
| 679 | /**\r |
| 680 | Reads a bit field of an I/O register.\r |
| 681 | \r |
| 682 | Reads the bit field in a 32-bit I/O register. The bit field is specified by\r |
| 683 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 684 | \r |
| 685 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 686 | If StartBit is greater than 31, then ASSERT().\r |
| 687 | If EndBit is greater than 31, then ASSERT().\r |
| 688 | If EndBit is less than StartBit, then ASSERT().\r |
| 689 | \r |
| 690 | @param Port The I/O port to read.\r |
| 691 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 692 | Range 0..31.\r |
| 693 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 694 | Range 0..31.\r |
| 695 | \r |
| 696 | @return The value read.\r |
| 697 | \r |
| 698 | **/\r |
| 699 | UINT32\r |
| 700 | EFIAPI\r |
| 701 | IoBitFieldRead32 (\r |
| 702 | IN UINTN Port,\r |
| 703 | IN UINTN StartBit,\r |
| 704 | IN UINTN EndBit\r |
| 705 | )\r |
| 706 | {\r |
| 707 | return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r |
| 708 | }\r |
| 709 | \r |
| 710 | /**\r |
| 711 | Writes a bit field to an I/O register.\r |
| 712 | \r |
| 713 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 714 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 715 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 716 | left bits in Value are stripped.\r |
| 717 | \r |
| 718 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 719 | If StartBit is greater than 31, then ASSERT().\r |
| 720 | If EndBit is greater than 31, then ASSERT().\r |
| 721 | If EndBit is less than StartBit, then ASSERT().\r |
| 722 | \r |
| 723 | @param Port The I/O port to write.\r |
| 724 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 725 | Range 0..31.\r |
| 726 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 727 | Range 0..31.\r |
| 728 | @param Value New value of the bit field.\r |
| 729 | \r |
| 730 | @return The value written back to the I/O port.\r |
| 731 | \r |
| 732 | **/\r |
| 733 | UINT32\r |
| 734 | EFIAPI\r |
| 735 | IoBitFieldWrite32 (\r |
| 736 | IN UINTN Port,\r |
| 737 | IN UINTN StartBit,\r |
| 738 | IN UINTN EndBit,\r |
| 739 | IN UINT32 Value\r |
| 740 | )\r |
| 741 | {\r |
| 742 | return IoWrite32 (\r |
| 743 | Port,\r |
| 744 | BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r |
| 745 | );\r |
| 746 | }\r |
| 747 | \r |
| 748 | /**\r |
| 749 | Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r |
| 750 | result back to the bit field in the 32-bit port.\r |
| 751 | \r |
| 752 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 753 | between the read result and the value specified by OrData, and writes the\r |
| 754 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r |
| 755 | port is returned. This function must guarantee that all I/O read and write\r |
| 756 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 757 | \r |
| 758 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 759 | If StartBit is greater than 31, then ASSERT().\r |
| 760 | If EndBit is greater than 31, then ASSERT().\r |
| 761 | If EndBit is less than StartBit, then ASSERT().\r |
| 762 | \r |
| 763 | @param Port The I/O port to write.\r |
| 764 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 765 | Range 0..31.\r |
| 766 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 767 | Range 0..31.\r |
| 768 | @param OrData The value to OR with the read value from the I/O port.\r |
| 769 | \r |
| 770 | @return The value written back to the I/O port.\r |
| 771 | \r |
| 772 | **/\r |
| 773 | UINT32\r |
| 774 | EFIAPI\r |
| 775 | IoBitFieldOr32 (\r |
| 776 | IN UINTN Port,\r |
| 777 | IN UINTN StartBit,\r |
| 778 | IN UINTN EndBit,\r |
| 779 | IN UINT32 OrData\r |
| 780 | )\r |
| 781 | {\r |
| 782 | return IoWrite32 (\r |
| 783 | Port,\r |
| 784 | BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r |
| 785 | );\r |
| 786 | }\r |
| 787 | \r |
| 788 | /**\r |
| 789 | Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r |
| 790 | result back to the bit field in the 32-bit port.\r |
| 791 | \r |
| 792 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 793 | the read result and the value specified by AndData, and writes the result to\r |
| 794 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r |
| 795 | returned. This function must guarantee that all I/O read and write operations\r |
| 796 | are serialized. Extra left bits in AndData are stripped.\r |
| 797 | \r |
| 798 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 799 | If StartBit is greater than 31, then ASSERT().\r |
| 800 | If EndBit is greater than 31, then ASSERT().\r |
| 801 | If EndBit is less than StartBit, then ASSERT().\r |
| 802 | \r |
| 803 | @param Port The I/O port to write.\r |
| 804 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 805 | Range 0..31.\r |
| 806 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 807 | Range 0..31.\r |
| 808 | @param AndData The value to AND with the read value from the I/O port.\r |
| 809 | \r |
| 810 | @return The value written back to the I/O port.\r |
| 811 | \r |
| 812 | **/\r |
| 813 | UINT32\r |
| 814 | EFIAPI\r |
| 815 | IoBitFieldAnd32 (\r |
| 816 | IN UINTN Port,\r |
| 817 | IN UINTN StartBit,\r |
| 818 | IN UINTN EndBit,\r |
| 819 | IN UINT32 AndData\r |
| 820 | )\r |
| 821 | {\r |
| 822 | return IoWrite32 (\r |
| 823 | Port,\r |
| 824 | BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r |
| 825 | );\r |
| 826 | }\r |
| 827 | \r |
| 828 | /**\r |
| 829 | Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r |
| 830 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 831 | 32-bit port.\r |
| 832 | \r |
| 833 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 834 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 835 | AndData, and writes the result to the 32-bit I/O port specified by Port. The\r |
| 836 | value written to the I/O port is returned. This function must guarantee that\r |
| 837 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 838 | AndData and OrData are stripped.\r |
| 839 | \r |
| 840 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 841 | If StartBit is greater than 31, then ASSERT().\r |
| 842 | If EndBit is greater than 31, then ASSERT().\r |
| 843 | If EndBit is less than StartBit, then ASSERT().\r |
| 844 | \r |
| 845 | @param Port The I/O port to write.\r |
| 846 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 847 | Range 0..31.\r |
| 848 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 849 | Range 0..31.\r |
| 850 | @param AndData The value to AND with the read value from the I/O port.\r |
| 851 | @param OrData The value to OR with the result of the AND operation.\r |
| 852 | \r |
| 853 | @return The value written back to the I/O port.\r |
| 854 | \r |
| 855 | **/\r |
| 856 | UINT32\r |
| 857 | EFIAPI\r |
| 858 | IoBitFieldAndThenOr32 (\r |
| 859 | IN UINTN Port,\r |
| 860 | IN UINTN StartBit,\r |
| 861 | IN UINTN EndBit,\r |
| 862 | IN UINT32 AndData,\r |
| 863 | IN UINT32 OrData\r |
| 864 | )\r |
| 865 | {\r |
| 866 | return IoWrite32 (\r |
| 867 | Port,\r |
| 868 | BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r |
| 869 | );\r |
| 870 | }\r |
| 871 | \r |
| 872 | /**\r |
| 873 | Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 874 | result back to the 64-bit I/O port.\r |
| 875 | \r |
| 876 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 877 | between the read result and the value specified by OrData, and writes the\r |
| 878 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r |
| 879 | port is returned. This function must guarantee that all I/O read and write\r |
| 880 | operations are serialized.\r |
| 881 | \r |
| 882 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 883 | \r |
| 884 | @param Port The I/O port to write.\r |
| 885 | @param OrData The value to OR with the read value from the I/O port.\r |
| 886 | \r |
| 887 | @return The value written back to the I/O port.\r |
| 888 | \r |
| 889 | **/\r |
| 890 | UINT64\r |
| 891 | EFIAPI\r |
| 892 | IoOr64 (\r |
| 893 | IN UINTN Port,\r |
| 894 | IN UINT64 OrData\r |
| 895 | )\r |
| 896 | {\r |
| 897 | return IoWrite64 (Port, IoRead64 (Port) | OrData);\r |
| 898 | }\r |
| 899 | \r |
| 900 | /**\r |
| 901 | Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 902 | to the 64-bit I/O port.\r |
| 903 | \r |
| 904 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 905 | the read result and the value specified by AndData, and writes the result to\r |
| 906 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r |
| 907 | returned. This function must guarantee that all I/O read and write operations\r |
| 908 | are serialized.\r |
| 909 | \r |
| 910 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 911 | \r |
| 912 | @param Port The I/O port to write.\r |
| 913 | @param AndData The value to AND with the read value from the I/O port.\r |
| 914 | \r |
| 915 | @return The value written back to the I/O port.\r |
| 916 | \r |
| 917 | **/\r |
| 918 | UINT64\r |
| 919 | EFIAPI\r |
| 920 | IoAnd64 (\r |
| 921 | IN UINTN Port,\r |
| 922 | IN UINT64 AndData\r |
| 923 | )\r |
| 924 | {\r |
| 925 | return IoWrite64 (Port, IoRead64 (Port) & AndData);\r |
| 926 | }\r |
| 927 | \r |
| 928 | /**\r |
| 929 | Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 930 | inclusive OR, and writes the result back to the 64-bit I/O port.\r |
| 931 | \r |
| 932 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 933 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 934 | between the result of the AND operation and the value specified by OrData,\r |
| 935 | and writes the result to the 64-bit I/O port specified by Port. The value\r |
| 936 | written to the I/O port is returned. This function must guarantee that all\r |
| 937 | I/O read and write operations are serialized.\r |
| 938 | \r |
| 939 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 940 | \r |
| 941 | @param Port The I/O port to write.\r |
| 942 | @param AndData The value to AND with the read value from the I/O port.\r |
| 943 | @param OrData The value to OR with the result of the AND operation.\r |
| 944 | \r |
| 945 | @return The value written back to the I/O port.\r |
| 946 | \r |
| 947 | **/\r |
| 948 | UINT64\r |
| 949 | EFIAPI\r |
| 950 | IoAndThenOr64 (\r |
| 951 | IN UINTN Port,\r |
| 952 | IN UINT64 AndData,\r |
| 953 | IN UINT64 OrData\r |
| 954 | )\r |
| 955 | {\r |
| 956 | return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r |
| 957 | }\r |
| 958 | \r |
| 959 | /**\r |
| 960 | Reads a bit field of an I/O register.\r |
| 961 | \r |
| 962 | Reads the bit field in a 64-bit I/O register. The bit field is specified by\r |
| 963 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 964 | \r |
| 965 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 966 | If StartBit is greater than 63, then ASSERT().\r |
| 967 | If EndBit is greater than 63, then ASSERT().\r |
| 968 | If EndBit is less than StartBit, then ASSERT().\r |
| 969 | \r |
| 970 | @param Port The I/O port to read.\r |
| 971 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 972 | Range 0..63.\r |
| 973 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 974 | Range 0..63.\r |
| 975 | \r |
| 976 | @return The value read.\r |
| 977 | \r |
| 978 | **/\r |
| 979 | UINT64\r |
| 980 | EFIAPI\r |
| 981 | IoBitFieldRead64 (\r |
| 982 | IN UINTN Port,\r |
| 983 | IN UINTN StartBit,\r |
| 984 | IN UINTN EndBit\r |
| 985 | )\r |
| 986 | {\r |
| 987 | return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r |
| 988 | }\r |
| 989 | \r |
| 990 | /**\r |
| 991 | Writes a bit field to an I/O register.\r |
| 992 | \r |
| 993 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 994 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 995 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 996 | left bits in Value are stripped.\r |
| 997 | \r |
| 998 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 999 | If StartBit is greater than 63, then ASSERT().\r |
| 1000 | If EndBit is greater than 63, then ASSERT().\r |
| 1001 | If EndBit is less than StartBit, then ASSERT().\r |
| 1002 | \r |
| 1003 | @param Port The I/O port to write.\r |
| 1004 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1005 | Range 0..63.\r |
| 1006 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1007 | Range 0..63.\r |
| 1008 | @param Value New value of the bit field.\r |
| 1009 | \r |
| 1010 | @return The value written back to the I/O port.\r |
| 1011 | \r |
| 1012 | **/\r |
| 1013 | UINT64\r |
| 1014 | EFIAPI\r |
| 1015 | IoBitFieldWrite64 (\r |
| 1016 | IN UINTN Port,\r |
| 1017 | IN UINTN StartBit,\r |
| 1018 | IN UINTN EndBit,\r |
| 1019 | IN UINT64 Value\r |
| 1020 | )\r |
| 1021 | {\r |
| 1022 | return IoWrite64 (\r |
| 1023 | Port,\r |
| 1024 | BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r |
| 1025 | );\r |
| 1026 | }\r |
| 1027 | \r |
| 1028 | /**\r |
| 1029 | Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r |
| 1030 | result back to the bit field in the 64-bit port.\r |
| 1031 | \r |
| 1032 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 1033 | between the read result and the value specified by OrData, and writes the\r |
| 1034 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r |
| 1035 | port is returned. This function must guarantee that all I/O read and write\r |
| 1036 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 1037 | \r |
| 1038 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1039 | If StartBit is greater than 63, then ASSERT().\r |
| 1040 | If EndBit is greater than 63, then ASSERT().\r |
| 1041 | If EndBit is less than StartBit, then ASSERT().\r |
| 1042 | \r |
| 1043 | @param Port The I/O port to write.\r |
| 1044 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1045 | Range 0..63.\r |
| 1046 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1047 | Range 0..63.\r |
| 1048 | @param OrData The value to OR with the read value from the I/O port.\r |
| 1049 | \r |
| 1050 | @return The value written back to the I/O port.\r |
| 1051 | \r |
| 1052 | **/\r |
| 1053 | UINT64\r |
| 1054 | EFIAPI\r |
| 1055 | IoBitFieldOr64 (\r |
| 1056 | IN UINTN Port,\r |
| 1057 | IN UINTN StartBit,\r |
| 1058 | IN UINTN EndBit,\r |
| 1059 | IN UINT64 OrData\r |
| 1060 | )\r |
| 1061 | {\r |
| 1062 | return IoWrite64 (\r |
| 1063 | Port,\r |
| 1064 | BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r |
| 1065 | );\r |
| 1066 | }\r |
| 1067 | \r |
| 1068 | /**\r |
| 1069 | Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r |
| 1070 | result back to the bit field in the 64-bit port.\r |
| 1071 | \r |
| 1072 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 1073 | the read result and the value specified by AndData, and writes the result to\r |
| 1074 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r |
| 1075 | returned. This function must guarantee that all I/O read and write operations\r |
| 1076 | are serialized. Extra left bits in AndData are stripped.\r |
| 1077 | \r |
| 1078 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1079 | If StartBit is greater than 63, then ASSERT().\r |
| 1080 | If EndBit is greater than 63, then ASSERT().\r |
| 1081 | If EndBit is less than StartBit, then ASSERT().\r |
| 1082 | \r |
| 1083 | @param Port The I/O port to write.\r |
| 1084 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1085 | Range 0..63.\r |
| 1086 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1087 | Range 0..63.\r |
| 1088 | @param AndData The value to AND with the read value from the I/O port.\r |
| 1089 | \r |
| 1090 | @return The value written back to the I/O port.\r |
| 1091 | \r |
| 1092 | **/\r |
| 1093 | UINT64\r |
| 1094 | EFIAPI\r |
| 1095 | IoBitFieldAnd64 (\r |
| 1096 | IN UINTN Port,\r |
| 1097 | IN UINTN StartBit,\r |
| 1098 | IN UINTN EndBit,\r |
| 1099 | IN UINT64 AndData\r |
| 1100 | )\r |
| 1101 | {\r |
| 1102 | return IoWrite64 (\r |
| 1103 | Port,\r |
| 1104 | BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r |
| 1105 | );\r |
| 1106 | }\r |
| 1107 | \r |
| 1108 | /**\r |
| 1109 | Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r |
| 1110 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1111 | 64-bit port.\r |
| 1112 | \r |
| 1113 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 1114 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 1115 | AndData, and writes the result to the 64-bit I/O port specified by Port. The\r |
| 1116 | value written to the I/O port is returned. This function must guarantee that\r |
| 1117 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 1118 | AndData and OrData are stripped.\r |
| 1119 | \r |
| 1120 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1121 | If StartBit is greater than 63, then ASSERT().\r |
| 1122 | If EndBit is greater than 63, then ASSERT().\r |
| 1123 | If EndBit is less than StartBit, then ASSERT().\r |
| 1124 | \r |
| 1125 | @param Port The I/O port to write.\r |
| 1126 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1127 | Range 0..63.\r |
| 1128 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1129 | Range 0..63.\r |
| 1130 | @param AndData The value to AND with the read value from the I/O port.\r |
| 1131 | @param OrData The value to OR with the result of the AND operation.\r |
| 1132 | \r |
| 1133 | @return The value written back to the I/O port.\r |
| 1134 | \r |
| 1135 | **/\r |
| 1136 | UINT64\r |
| 1137 | EFIAPI\r |
| 1138 | IoBitFieldAndThenOr64 (\r |
| 1139 | IN UINTN Port,\r |
| 1140 | IN UINTN StartBit,\r |
| 1141 | IN UINTN EndBit,\r |
| 1142 | IN UINT64 AndData,\r |
| 1143 | IN UINT64 OrData\r |
| 1144 | )\r |
| 1145 | {\r |
| 1146 | return IoWrite64 (\r |
| 1147 | Port,\r |
| 1148 | BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r |
| 1149 | );\r |
| 1150 | }\r |
| 1151 | \r |
| 1152 | /**\r |
| 1153 | Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1154 | result back to the 8-bit MMIO register.\r |
| 1155 | \r |
| 1156 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 1157 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1158 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1159 | written to the MMIO register is returned. This function must guarantee that\r |
| 1160 | all MMIO read and write operations are serialized.\r |
| 1161 | \r |
| 1162 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1163 | \r |
| 1164 | @param Address The MMIO register to write.\r |
| 1165 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1166 | \r |
| 1167 | @return The value written back to the MMIO register.\r |
| 1168 | \r |
| 1169 | **/\r |
| 1170 | UINT8\r |
| 1171 | EFIAPI\r |
| 1172 | MmioOr8 (\r |
| 1173 | IN UINTN Address,\r |
| 1174 | IN UINT8 OrData\r |
| 1175 | )\r |
| 1176 | {\r |
| 1177 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));\r |
| 1178 | }\r |
| 1179 | \r |
| 1180 | /**\r |
| 1181 | Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1182 | back to the 8-bit MMIO register.\r |
| 1183 | \r |
| 1184 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1185 | between the read result and the value specified by AndData, and writes the\r |
| 1186 | result to the 8-bit MMIO register specified by Address. The value written to\r |
| 1187 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1188 | read and write operations are serialized.\r |
| 1189 | \r |
| 1190 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1191 | \r |
| 1192 | @param Address The MMIO register to write.\r |
| 1193 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1194 | \r |
| 1195 | @return The value written back to the MMIO register.\r |
| 1196 | \r |
| 1197 | **/\r |
| 1198 | UINT8\r |
| 1199 | EFIAPI\r |
| 1200 | MmioAnd8 (\r |
| 1201 | IN UINTN Address,\r |
| 1202 | IN UINT8 AndData\r |
| 1203 | )\r |
| 1204 | {\r |
| 1205 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));\r |
| 1206 | }\r |
| 1207 | \r |
| 1208 | /**\r |
| 1209 | Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1210 | inclusive OR, and writes the result back to the 8-bit MMIO register.\r |
| 1211 | \r |
| 1212 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1213 | between the read result and the value specified by AndData, performs a\r |
| 1214 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1215 | OrData, and writes the result to the 8-bit MMIO register specified by\r |
| 1216 | Address. The value written to the MMIO register is returned. This function\r |
| 1217 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1218 | \r |
| 1219 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1220 | \r |
| 1221 | \r |
| 1222 | @param Address The MMIO register to write.\r |
| 1223 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1224 | @param OrData The value to OR with the result of the AND operation.\r |
| 1225 | \r |
| 1226 | @return The value written back to the MMIO register.\r |
| 1227 | \r |
| 1228 | **/\r |
| 1229 | UINT8\r |
| 1230 | EFIAPI\r |
| 1231 | MmioAndThenOr8 (\r |
| 1232 | IN UINTN Address,\r |
| 1233 | IN UINT8 AndData,\r |
| 1234 | IN UINT8 OrData\r |
| 1235 | )\r |
| 1236 | {\r |
| 1237 | return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));\r |
| 1238 | }\r |
| 1239 | \r |
| 1240 | /**\r |
| 1241 | Reads a bit field of a MMIO register.\r |
| 1242 | \r |
| 1243 | Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r |
| 1244 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1245 | \r |
| 1246 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1247 | If StartBit is greater than 7, then ASSERT().\r |
| 1248 | If EndBit is greater than 7, then ASSERT().\r |
| 1249 | If EndBit is less than StartBit, then ASSERT().\r |
| 1250 | \r |
| 1251 | @param Address MMIO register to read.\r |
| 1252 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1253 | Range 0..7.\r |
| 1254 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1255 | Range 0..7.\r |
| 1256 | \r |
| 1257 | @return The value read.\r |
| 1258 | \r |
| 1259 | **/\r |
| 1260 | UINT8\r |
| 1261 | EFIAPI\r |
| 1262 | MmioBitFieldRead8 (\r |
| 1263 | IN UINTN Address,\r |
| 1264 | IN UINTN StartBit,\r |
| 1265 | IN UINTN EndBit\r |
| 1266 | )\r |
| 1267 | {\r |
| 1268 | return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r |
| 1269 | }\r |
| 1270 | \r |
| 1271 | /**\r |
| 1272 | Writes a bit field to a MMIO register.\r |
| 1273 | \r |
| 1274 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1275 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1276 | MMIO register are preserved. The new value of the 8-bit register is returned.\r |
| 1277 | \r |
| 1278 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1279 | If StartBit is greater than 7, then ASSERT().\r |
| 1280 | If EndBit is greater than 7, then ASSERT().\r |
| 1281 | If EndBit is less than StartBit, then ASSERT().\r |
| 1282 | \r |
| 1283 | @param Address MMIO register to write.\r |
| 1284 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1285 | Range 0..7.\r |
| 1286 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1287 | Range 0..7.\r |
| 1288 | @param Value New value of the bit field.\r |
| 1289 | \r |
| 1290 | @return The value written back to the MMIO register.\r |
| 1291 | \r |
| 1292 | **/\r |
| 1293 | UINT8\r |
| 1294 | EFIAPI\r |
| 1295 | MmioBitFieldWrite8 (\r |
| 1296 | IN UINTN Address,\r |
| 1297 | IN UINTN StartBit,\r |
| 1298 | IN UINTN EndBit,\r |
| 1299 | IN UINT8 Value\r |
| 1300 | )\r |
| 1301 | {\r |
| 1302 | return MmioWrite8 (\r |
| 1303 | Address,\r |
| 1304 | BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r |
| 1305 | );\r |
| 1306 | }\r |
| 1307 | \r |
| 1308 | /**\r |
| 1309 | Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r |
| 1310 | writes the result back to the bit field in the 8-bit MMIO register.\r |
| 1311 | \r |
| 1312 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 1313 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1314 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1315 | written to the MMIO register is returned. This function must guarantee that\r |
| 1316 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1317 | are stripped.\r |
| 1318 | \r |
| 1319 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1320 | If StartBit is greater than 7, then ASSERT().\r |
| 1321 | If EndBit is greater than 7, then ASSERT().\r |
| 1322 | If EndBit is less than StartBit, then ASSERT().\r |
| 1323 | \r |
| 1324 | @param Address MMIO register to write.\r |
| 1325 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1326 | Range 0..7.\r |
| 1327 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1328 | Range 0..7.\r |
| 1329 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1330 | \r |
| 1331 | @return The value written back to the MMIO register.\r |
| 1332 | \r |
| 1333 | **/\r |
| 1334 | UINT8\r |
| 1335 | EFIAPI\r |
| 1336 | MmioBitFieldOr8 (\r |
| 1337 | IN UINTN Address,\r |
| 1338 | IN UINTN StartBit,\r |
| 1339 | IN UINTN EndBit,\r |
| 1340 | IN UINT8 OrData\r |
| 1341 | )\r |
| 1342 | {\r |
| 1343 | return MmioWrite8 (\r |
| 1344 | Address,\r |
| 1345 | BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r |
| 1346 | );\r |
| 1347 | }\r |
| 1348 | \r |
| 1349 | /**\r |
| 1350 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r |
| 1351 | writes the result back to the bit field in the 8-bit MMIO register.\r |
| 1352 | \r |
| 1353 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1354 | between the read result and the value specified by AndData, and writes the\r |
| 1355 | result to the 8-bit MMIO register specified by Address. The value written to\r |
| 1356 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1357 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1358 | stripped.\r |
| 1359 | \r |
| 1360 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1361 | If StartBit is greater than 7, then ASSERT().\r |
| 1362 | If EndBit is greater than 7, then ASSERT().\r |
| 1363 | If EndBit is less than StartBit, then ASSERT().\r |
| 1364 | \r |
| 1365 | @param Address MMIO register to write.\r |
| 1366 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1367 | Range 0..7.\r |
| 1368 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1369 | Range 0..7.\r |
| 1370 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1371 | \r |
| 1372 | @return The value written back to the MMIO register.\r |
| 1373 | \r |
| 1374 | **/\r |
| 1375 | UINT8\r |
| 1376 | EFIAPI\r |
| 1377 | MmioBitFieldAnd8 (\r |
| 1378 | IN UINTN Address,\r |
| 1379 | IN UINTN StartBit,\r |
| 1380 | IN UINTN EndBit,\r |
| 1381 | IN UINT8 AndData\r |
| 1382 | )\r |
| 1383 | {\r |
| 1384 | return MmioWrite8 (\r |
| 1385 | Address,\r |
| 1386 | BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r |
| 1387 | );\r |
| 1388 | }\r |
| 1389 | \r |
| 1390 | /**\r |
| 1391 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r |
| 1392 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1393 | 8-bit MMIO register.\r |
| 1394 | \r |
| 1395 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1396 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1397 | specified by AndData, and writes the result to the 8-bit MMIO register\r |
| 1398 | specified by Address. The value written to the MMIO register is returned.\r |
| 1399 | This function must guarantee that all MMIO read and write operations are\r |
| 1400 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1401 | \r |
| 1402 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1403 | If StartBit is greater than 7, then ASSERT().\r |
| 1404 | If EndBit is greater than 7, then ASSERT().\r |
| 1405 | If EndBit is less than StartBit, then ASSERT().\r |
| 1406 | \r |
| 1407 | @param Address MMIO register to write.\r |
| 1408 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1409 | Range 0..7.\r |
| 1410 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1411 | Range 0..7.\r |
| 1412 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1413 | @param OrData The value to OR with the result of the AND operation.\r |
| 1414 | \r |
| 1415 | @return The value written back to the MMIO register.\r |
| 1416 | \r |
| 1417 | **/\r |
| 1418 | UINT8\r |
| 1419 | EFIAPI\r |
| 1420 | MmioBitFieldAndThenOr8 (\r |
| 1421 | IN UINTN Address,\r |
| 1422 | IN UINTN StartBit,\r |
| 1423 | IN UINTN EndBit,\r |
| 1424 | IN UINT8 AndData,\r |
| 1425 | IN UINT8 OrData\r |
| 1426 | )\r |
| 1427 | {\r |
| 1428 | return MmioWrite8 (\r |
| 1429 | Address,\r |
| 1430 | BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1431 | );\r |
| 1432 | }\r |
| 1433 | \r |
| 1434 | /**\r |
| 1435 | Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1436 | result back to the 16-bit MMIO register.\r |
| 1437 | \r |
| 1438 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 1439 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1440 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1441 | written to the MMIO register is returned. This function must guarantee that\r |
| 1442 | all MMIO read and write operations are serialized.\r |
| 1443 | \r |
| 1444 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1445 | \r |
| 1446 | @param Address The MMIO register to write.\r |
| 1447 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1448 | \r |
| 1449 | @return The value written back to the MMIO register.\r |
| 1450 | \r |
| 1451 | **/\r |
| 1452 | UINT16\r |
| 1453 | EFIAPI\r |
| 1454 | MmioOr16 (\r |
| 1455 | IN UINTN Address,\r |
| 1456 | IN UINT16 OrData\r |
| 1457 | )\r |
| 1458 | {\r |
| 1459 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));\r |
| 1460 | }\r |
| 1461 | \r |
| 1462 | /**\r |
| 1463 | Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1464 | back to the 16-bit MMIO register.\r |
| 1465 | \r |
| 1466 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1467 | between the read result and the value specified by AndData, and writes the\r |
| 1468 | result to the 16-bit MMIO register specified by Address. The value written to\r |
| 1469 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1470 | read and write operations are serialized.\r |
| 1471 | \r |
| 1472 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1473 | \r |
| 1474 | @param Address The MMIO register to write.\r |
| 1475 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1476 | \r |
| 1477 | @return The value written back to the MMIO register.\r |
| 1478 | \r |
| 1479 | **/\r |
| 1480 | UINT16\r |
| 1481 | EFIAPI\r |
| 1482 | MmioAnd16 (\r |
| 1483 | IN UINTN Address,\r |
| 1484 | IN UINT16 AndData\r |
| 1485 | )\r |
| 1486 | {\r |
| 1487 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));\r |
| 1488 | }\r |
| 1489 | \r |
| 1490 | /**\r |
| 1491 | Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1492 | inclusive OR, and writes the result back to the 16-bit MMIO register.\r |
| 1493 | \r |
| 1494 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1495 | between the read result and the value specified by AndData, performs a\r |
| 1496 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1497 | OrData, and writes the result to the 16-bit MMIO register specified by\r |
| 1498 | Address. The value written to the MMIO register is returned. This function\r |
| 1499 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1500 | \r |
| 1501 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1502 | \r |
| 1503 | \r |
| 1504 | @param Address The MMIO register to write.\r |
| 1505 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1506 | @param OrData The value to OR with the result of the AND operation.\r |
| 1507 | \r |
| 1508 | @return The value written back to the MMIO register.\r |
| 1509 | \r |
| 1510 | **/\r |
| 1511 | UINT16\r |
| 1512 | EFIAPI\r |
| 1513 | MmioAndThenOr16 (\r |
| 1514 | IN UINTN Address,\r |
| 1515 | IN UINT16 AndData,\r |
| 1516 | IN UINT16 OrData\r |
| 1517 | )\r |
| 1518 | {\r |
| 1519 | return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));\r |
| 1520 | }\r |
| 1521 | \r |
| 1522 | /**\r |
| 1523 | Reads a bit field of a MMIO register.\r |
| 1524 | \r |
| 1525 | Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r |
| 1526 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1527 | \r |
| 1528 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1529 | If StartBit is greater than 15, then ASSERT().\r |
| 1530 | If EndBit is greater than 15, then ASSERT().\r |
| 1531 | If EndBit is less than StartBit, then ASSERT().\r |
| 1532 | \r |
| 1533 | @param Address MMIO register to read.\r |
| 1534 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1535 | Range 0..15.\r |
| 1536 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1537 | Range 0..15.\r |
| 1538 | \r |
| 1539 | @return The value read.\r |
| 1540 | \r |
| 1541 | **/\r |
| 1542 | UINT16\r |
| 1543 | EFIAPI\r |
| 1544 | MmioBitFieldRead16 (\r |
| 1545 | IN UINTN Address,\r |
| 1546 | IN UINTN StartBit,\r |
| 1547 | IN UINTN EndBit\r |
| 1548 | )\r |
| 1549 | {\r |
| 1550 | return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r |
| 1551 | }\r |
| 1552 | \r |
| 1553 | /**\r |
| 1554 | Writes a bit field to a MMIO register.\r |
| 1555 | \r |
| 1556 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1557 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1558 | MMIO register are preserved. The new value of the 16-bit register is returned.\r |
| 1559 | \r |
| 1560 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1561 | If StartBit is greater than 15, then ASSERT().\r |
| 1562 | If EndBit is greater than 15, then ASSERT().\r |
| 1563 | If EndBit is less than StartBit, then ASSERT().\r |
| 1564 | \r |
| 1565 | @param Address MMIO register to write.\r |
| 1566 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1567 | Range 0..15.\r |
| 1568 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1569 | Range 0..15.\r |
| 1570 | @param Value New value of the bit field.\r |
| 1571 | \r |
| 1572 | @return The value written back to the MMIO register.\r |
| 1573 | \r |
| 1574 | **/\r |
| 1575 | UINT16\r |
| 1576 | EFIAPI\r |
| 1577 | MmioBitFieldWrite16 (\r |
| 1578 | IN UINTN Address,\r |
| 1579 | IN UINTN StartBit,\r |
| 1580 | IN UINTN EndBit,\r |
| 1581 | IN UINT16 Value\r |
| 1582 | )\r |
| 1583 | {\r |
| 1584 | return MmioWrite16 (\r |
| 1585 | Address,\r |
| 1586 | BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r |
| 1587 | );\r |
| 1588 | }\r |
| 1589 | \r |
| 1590 | /**\r |
| 1591 | Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r |
| 1592 | writes the result back to the bit field in the 16-bit MMIO register.\r |
| 1593 | \r |
| 1594 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 1595 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1596 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1597 | written to the MMIO register is returned. This function must guarantee that\r |
| 1598 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1599 | are stripped.\r |
| 1600 | \r |
| 1601 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1602 | If StartBit is greater than 15, then ASSERT().\r |
| 1603 | If EndBit is greater than 15, then ASSERT().\r |
| 1604 | If EndBit is less than StartBit, then ASSERT().\r |
| 1605 | \r |
| 1606 | @param Address MMIO register to write.\r |
| 1607 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1608 | Range 0..15.\r |
| 1609 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1610 | Range 0..15.\r |
| 1611 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1612 | \r |
| 1613 | @return The value written back to the MMIO register.\r |
| 1614 | \r |
| 1615 | **/\r |
| 1616 | UINT16\r |
| 1617 | EFIAPI\r |
| 1618 | MmioBitFieldOr16 (\r |
| 1619 | IN UINTN Address,\r |
| 1620 | IN UINTN StartBit,\r |
| 1621 | IN UINTN EndBit,\r |
| 1622 | IN UINT16 OrData\r |
| 1623 | )\r |
| 1624 | {\r |
| 1625 | return MmioWrite16 (\r |
| 1626 | Address,\r |
| 1627 | BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r |
| 1628 | );\r |
| 1629 | }\r |
| 1630 | \r |
| 1631 | /**\r |
| 1632 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r |
| 1633 | writes the result back to the bit field in the 16-bit MMIO register.\r |
| 1634 | \r |
| 1635 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1636 | between the read result and the value specified by AndData, and writes the\r |
| 1637 | result to the 16-bit MMIO register specified by Address. The value written to\r |
| 1638 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1639 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1640 | stripped.\r |
| 1641 | \r |
| 1642 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1643 | If StartBit is greater than 15, then ASSERT().\r |
| 1644 | If EndBit is greater than 15, then ASSERT().\r |
| 1645 | If EndBit is less than StartBit, then ASSERT().\r |
| 1646 | \r |
| 1647 | @param Address MMIO register to write.\r |
| 1648 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1649 | Range 0..15.\r |
| 1650 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1651 | Range 0..15.\r |
| 1652 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1653 | \r |
| 1654 | @return The value written back to the MMIO register.\r |
| 1655 | \r |
| 1656 | **/\r |
| 1657 | UINT16\r |
| 1658 | EFIAPI\r |
| 1659 | MmioBitFieldAnd16 (\r |
| 1660 | IN UINTN Address,\r |
| 1661 | IN UINTN StartBit,\r |
| 1662 | IN UINTN EndBit,\r |
| 1663 | IN UINT16 AndData\r |
| 1664 | )\r |
| 1665 | {\r |
| 1666 | return MmioWrite16 (\r |
| 1667 | Address,\r |
| 1668 | BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r |
| 1669 | );\r |
| 1670 | }\r |
| 1671 | \r |
| 1672 | /**\r |
| 1673 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r |
| 1674 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1675 | 16-bit MMIO register.\r |
| 1676 | \r |
| 1677 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1678 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1679 | specified by AndData, and writes the result to the 16-bit MMIO register\r |
| 1680 | specified by Address. The value written to the MMIO register is returned.\r |
| 1681 | This function must guarantee that all MMIO read and write operations are\r |
| 1682 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1683 | \r |
| 1684 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1685 | If StartBit is greater than 15, then ASSERT().\r |
| 1686 | If EndBit is greater than 15, then ASSERT().\r |
| 1687 | If EndBit is less than StartBit, then ASSERT().\r |
| 1688 | \r |
| 1689 | @param Address MMIO register to write.\r |
| 1690 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1691 | Range 0..15.\r |
| 1692 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1693 | Range 0..15.\r |
| 1694 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1695 | @param OrData The value to OR with the result of the AND operation.\r |
| 1696 | \r |
| 1697 | @return The value written back to the MMIO register.\r |
| 1698 | \r |
| 1699 | **/\r |
| 1700 | UINT16\r |
| 1701 | EFIAPI\r |
| 1702 | MmioBitFieldAndThenOr16 (\r |
| 1703 | IN UINTN Address,\r |
| 1704 | IN UINTN StartBit,\r |
| 1705 | IN UINTN EndBit,\r |
| 1706 | IN UINT16 AndData,\r |
| 1707 | IN UINT16 OrData\r |
| 1708 | )\r |
| 1709 | {\r |
| 1710 | return MmioWrite16 (\r |
| 1711 | Address,\r |
| 1712 | BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1713 | );\r |
| 1714 | }\r |
| 1715 | \r |
| 1716 | /**\r |
| 1717 | Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1718 | result back to the 32-bit MMIO register.\r |
| 1719 | \r |
| 1720 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 1721 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1722 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1723 | written to the MMIO register is returned. This function must guarantee that\r |
| 1724 | all MMIO read and write operations are serialized.\r |
| 1725 | \r |
| 1726 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1727 | \r |
| 1728 | @param Address The MMIO register to write.\r |
| 1729 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1730 | \r |
| 1731 | @return The value written back to the MMIO register.\r |
| 1732 | \r |
| 1733 | **/\r |
| 1734 | UINT32\r |
| 1735 | EFIAPI\r |
| 1736 | MmioOr32 (\r |
| 1737 | IN UINTN Address,\r |
| 1738 | IN UINT32 OrData\r |
| 1739 | )\r |
| 1740 | {\r |
| 1741 | return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r |
| 1742 | }\r |
| 1743 | \r |
| 1744 | /**\r |
| 1745 | Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1746 | back to the 32-bit MMIO register.\r |
| 1747 | \r |
| 1748 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1749 | between the read result and the value specified by AndData, and writes the\r |
| 1750 | result to the 32-bit MMIO register specified by Address. The value written to\r |
| 1751 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1752 | read and write operations are serialized.\r |
| 1753 | \r |
| 1754 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1755 | \r |
| 1756 | @param Address The MMIO register to write.\r |
| 1757 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1758 | \r |
| 1759 | @return The value written back to the MMIO register.\r |
| 1760 | \r |
| 1761 | **/\r |
| 1762 | UINT32\r |
| 1763 | EFIAPI\r |
| 1764 | MmioAnd32 (\r |
| 1765 | IN UINTN Address,\r |
| 1766 | IN UINT32 AndData\r |
| 1767 | )\r |
| 1768 | {\r |
| 1769 | return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r |
| 1770 | }\r |
| 1771 | \r |
| 1772 | /**\r |
| 1773 | Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1774 | inclusive OR, and writes the result back to the 32-bit MMIO register.\r |
| 1775 | \r |
| 1776 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1777 | between the read result and the value specified by AndData, performs a\r |
| 1778 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1779 | OrData, and writes the result to the 32-bit MMIO register specified by\r |
| 1780 | Address. The value written to the MMIO register is returned. This function\r |
| 1781 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1782 | \r |
| 1783 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1784 | \r |
| 1785 | \r |
| 1786 | @param Address The MMIO register to write.\r |
| 1787 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1788 | @param OrData The value to OR with the result of the AND operation.\r |
| 1789 | \r |
| 1790 | @return The value written back to the MMIO register.\r |
| 1791 | \r |
| 1792 | **/\r |
| 1793 | UINT32\r |
| 1794 | EFIAPI\r |
| 1795 | MmioAndThenOr32 (\r |
| 1796 | IN UINTN Address,\r |
| 1797 | IN UINT32 AndData,\r |
| 1798 | IN UINT32 OrData\r |
| 1799 | )\r |
| 1800 | {\r |
| 1801 | return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r |
| 1802 | }\r |
| 1803 | \r |
| 1804 | /**\r |
| 1805 | Reads a bit field of a MMIO register.\r |
| 1806 | \r |
| 1807 | Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r |
| 1808 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1809 | \r |
| 1810 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1811 | If StartBit is greater than 31, then ASSERT().\r |
| 1812 | If EndBit is greater than 31, then ASSERT().\r |
| 1813 | If EndBit is less than StartBit, then ASSERT().\r |
| 1814 | \r |
| 1815 | @param Address MMIO register to read.\r |
| 1816 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1817 | Range 0..31.\r |
| 1818 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1819 | Range 0..31.\r |
| 1820 | \r |
| 1821 | @return The value read.\r |
| 1822 | \r |
| 1823 | **/\r |
| 1824 | UINT32\r |
| 1825 | EFIAPI\r |
| 1826 | MmioBitFieldRead32 (\r |
| 1827 | IN UINTN Address,\r |
| 1828 | IN UINTN StartBit,\r |
| 1829 | IN UINTN EndBit\r |
| 1830 | )\r |
| 1831 | {\r |
| 1832 | return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r |
| 1833 | }\r |
| 1834 | \r |
| 1835 | /**\r |
| 1836 | Writes a bit field to a MMIO register.\r |
| 1837 | \r |
| 1838 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1839 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1840 | MMIO register are preserved. The new value of the 32-bit register is returned.\r |
| 1841 | \r |
| 1842 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1843 | If StartBit is greater than 31, then ASSERT().\r |
| 1844 | If EndBit is greater than 31, then ASSERT().\r |
| 1845 | If EndBit is less than StartBit, then ASSERT().\r |
| 1846 | \r |
| 1847 | @param Address MMIO register to write.\r |
| 1848 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1849 | Range 0..31.\r |
| 1850 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1851 | Range 0..31.\r |
| 1852 | @param Value New value of the bit field.\r |
| 1853 | \r |
| 1854 | @return The value written back to the MMIO register.\r |
| 1855 | \r |
| 1856 | **/\r |
| 1857 | UINT32\r |
| 1858 | EFIAPI\r |
| 1859 | MmioBitFieldWrite32 (\r |
| 1860 | IN UINTN Address,\r |
| 1861 | IN UINTN StartBit,\r |
| 1862 | IN UINTN EndBit,\r |
| 1863 | IN UINT32 Value\r |
| 1864 | )\r |
| 1865 | {\r |
| 1866 | return MmioWrite32 (\r |
| 1867 | Address,\r |
| 1868 | BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r |
| 1869 | );\r |
| 1870 | }\r |
| 1871 | \r |
| 1872 | /**\r |
| 1873 | Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r |
| 1874 | writes the result back to the bit field in the 32-bit MMIO register.\r |
| 1875 | \r |
| 1876 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 1877 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1878 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1879 | written to the MMIO register is returned. This function must guarantee that\r |
| 1880 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1881 | are stripped.\r |
| 1882 | \r |
| 1883 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1884 | If StartBit is greater than 31, then ASSERT().\r |
| 1885 | If EndBit is greater than 31, then ASSERT().\r |
| 1886 | If EndBit is less than StartBit, then ASSERT().\r |
| 1887 | \r |
| 1888 | @param Address MMIO register to write.\r |
| 1889 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1890 | Range 0..31.\r |
| 1891 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1892 | Range 0..31.\r |
| 1893 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1894 | \r |
| 1895 | @return The value written back to the MMIO register.\r |
| 1896 | \r |
| 1897 | **/\r |
| 1898 | UINT32\r |
| 1899 | EFIAPI\r |
| 1900 | MmioBitFieldOr32 (\r |
| 1901 | IN UINTN Address,\r |
| 1902 | IN UINTN StartBit,\r |
| 1903 | IN UINTN EndBit,\r |
| 1904 | IN UINT32 OrData\r |
| 1905 | )\r |
| 1906 | {\r |
| 1907 | return MmioWrite32 (\r |
| 1908 | Address,\r |
| 1909 | BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r |
| 1910 | );\r |
| 1911 | }\r |
| 1912 | \r |
| 1913 | /**\r |
| 1914 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r |
| 1915 | writes the result back to the bit field in the 32-bit MMIO register.\r |
| 1916 | \r |
| 1917 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1918 | between the read result and the value specified by AndData, and writes the\r |
| 1919 | result to the 32-bit MMIO register specified by Address. The value written to\r |
| 1920 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1921 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1922 | stripped.\r |
| 1923 | \r |
| 1924 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1925 | If StartBit is greater than 31, then ASSERT().\r |
| 1926 | If EndBit is greater than 31, then ASSERT().\r |
| 1927 | If EndBit is less than StartBit, then ASSERT().\r |
| 1928 | \r |
| 1929 | @param Address MMIO register to write.\r |
| 1930 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1931 | Range 0..31.\r |
| 1932 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1933 | Range 0..31.\r |
| 1934 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1935 | \r |
| 1936 | @return The value written back to the MMIO register.\r |
| 1937 | \r |
| 1938 | **/\r |
| 1939 | UINT32\r |
| 1940 | EFIAPI\r |
| 1941 | MmioBitFieldAnd32 (\r |
| 1942 | IN UINTN Address,\r |
| 1943 | IN UINTN StartBit,\r |
| 1944 | IN UINTN EndBit,\r |
| 1945 | IN UINT32 AndData\r |
| 1946 | )\r |
| 1947 | {\r |
| 1948 | return MmioWrite32 (\r |
| 1949 | Address,\r |
| 1950 | BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r |
| 1951 | );\r |
| 1952 | }\r |
| 1953 | \r |
| 1954 | /**\r |
| 1955 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r |
| 1956 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1957 | 32-bit MMIO register.\r |
| 1958 | \r |
| 1959 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1960 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1961 | specified by AndData, and writes the result to the 32-bit MMIO register\r |
| 1962 | specified by Address. The value written to the MMIO register is returned.\r |
| 1963 | This function must guarantee that all MMIO read and write operations are\r |
| 1964 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1965 | \r |
| 1966 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1967 | If StartBit is greater than 31, then ASSERT().\r |
| 1968 | If EndBit is greater than 31, then ASSERT().\r |
| 1969 | If EndBit is less than StartBit, then ASSERT().\r |
| 1970 | \r |
| 1971 | @param Address MMIO register to write.\r |
| 1972 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1973 | Range 0..31.\r |
| 1974 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1975 | Range 0..31.\r |
| 1976 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1977 | @param OrData The value to OR with the result of the AND operation.\r |
| 1978 | \r |
| 1979 | @return The value written back to the MMIO register.\r |
| 1980 | \r |
| 1981 | **/\r |
| 1982 | UINT32\r |
| 1983 | EFIAPI\r |
| 1984 | MmioBitFieldAndThenOr32 (\r |
| 1985 | IN UINTN Address,\r |
| 1986 | IN UINTN StartBit,\r |
| 1987 | IN UINTN EndBit,\r |
| 1988 | IN UINT32 AndData,\r |
| 1989 | IN UINT32 OrData\r |
| 1990 | )\r |
| 1991 | {\r |
| 1992 | return MmioWrite32 (\r |
| 1993 | Address,\r |
| 1994 | BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1995 | );\r |
| 1996 | }\r |
| 1997 | \r |
| 1998 | /**\r |
| 1999 | Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 2000 | result back to the 64-bit MMIO register.\r |
| 2001 | \r |
| 2002 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 2003 | inclusive OR between the read result and the value specified by OrData, and\r |
| 2004 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2005 | written to the MMIO register is returned. This function must guarantee that\r |
| 2006 | all MMIO read and write operations are serialized.\r |
| 2007 | \r |
| 2008 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2009 | \r |
| 2010 | @param Address The MMIO register to write.\r |
| 2011 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 2012 | \r |
| 2013 | @return The value written back to the MMIO register.\r |
| 2014 | \r |
| 2015 | **/\r |
| 2016 | UINT64\r |
| 2017 | EFIAPI\r |
| 2018 | MmioOr64 (\r |
| 2019 | IN UINTN Address,\r |
| 2020 | IN UINT64 OrData\r |
| 2021 | )\r |
| 2022 | {\r |
| 2023 | return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r |
| 2024 | }\r |
| 2025 | \r |
| 2026 | /**\r |
| 2027 | Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 2028 | back to the 64-bit MMIO register.\r |
| 2029 | \r |
| 2030 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2031 | between the read result and the value specified by AndData, and writes the\r |
| 2032 | result to the 64-bit MMIO register specified by Address. The value written to\r |
| 2033 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 2034 | read and write operations are serialized.\r |
| 2035 | \r |
| 2036 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2037 | \r |
| 2038 | @param Address The MMIO register to write.\r |
| 2039 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 2040 | \r |
| 2041 | @return The value written back to the MMIO register.\r |
| 2042 | \r |
| 2043 | **/\r |
| 2044 | UINT64\r |
| 2045 | EFIAPI\r |
| 2046 | MmioAnd64 (\r |
| 2047 | IN UINTN Address,\r |
| 2048 | IN UINT64 AndData\r |
| 2049 | )\r |
| 2050 | {\r |
| 2051 | return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r |
| 2052 | }\r |
| 2053 | \r |
| 2054 | /**\r |
| 2055 | Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 2056 | inclusive OR, and writes the result back to the 64-bit MMIO register.\r |
| 2057 | \r |
| 2058 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2059 | between the read result and the value specified by AndData, performs a\r |
| 2060 | bitwise OR between the result of the AND operation and the value specified by\r |
| 2061 | OrData, and writes the result to the 64-bit MMIO register specified by\r |
| 2062 | Address. The value written to the MMIO register is returned. This function\r |
| 2063 | must guarantee that all MMIO read and write operations are serialized.\r |
| 2064 | \r |
| 2065 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2066 | \r |
| 2067 | \r |
| 2068 | @param Address The MMIO register to write.\r |
| 2069 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 2070 | @param OrData The value to OR with the result of the AND operation.\r |
| 2071 | \r |
| 2072 | @return The value written back to the MMIO register.\r |
| 2073 | \r |
| 2074 | **/\r |
| 2075 | UINT64\r |
| 2076 | EFIAPI\r |
| 2077 | MmioAndThenOr64 (\r |
| 2078 | IN UINTN Address,\r |
| 2079 | IN UINT64 AndData,\r |
| 2080 | IN UINT64 OrData\r |
| 2081 | )\r |
| 2082 | {\r |
| 2083 | return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r |
| 2084 | }\r |
| 2085 | \r |
| 2086 | /**\r |
| 2087 | Reads a bit field of a MMIO register.\r |
| 2088 | \r |
| 2089 | Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r |
| 2090 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 2091 | \r |
| 2092 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2093 | If StartBit is greater than 63, then ASSERT().\r |
| 2094 | If EndBit is greater than 63, then ASSERT().\r |
| 2095 | If EndBit is less than StartBit, then ASSERT().\r |
| 2096 | \r |
| 2097 | @param Address MMIO register to read.\r |
| 2098 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2099 | Range 0..63.\r |
| 2100 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2101 | Range 0..63.\r |
| 2102 | \r |
| 2103 | @return The value read.\r |
| 2104 | \r |
| 2105 | **/\r |
| 2106 | UINT64\r |
| 2107 | EFIAPI\r |
| 2108 | MmioBitFieldRead64 (\r |
| 2109 | IN UINTN Address,\r |
| 2110 | IN UINTN StartBit,\r |
| 2111 | IN UINTN EndBit\r |
| 2112 | )\r |
| 2113 | {\r |
| 2114 | return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r |
| 2115 | }\r |
| 2116 | \r |
| 2117 | /**\r |
| 2118 | Writes a bit field to a MMIO register.\r |
| 2119 | \r |
| 2120 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 2121 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 2122 | MMIO register are preserved. The new value of the 64-bit register is returned.\r |
| 2123 | \r |
| 2124 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2125 | If StartBit is greater than 63, then ASSERT().\r |
| 2126 | If EndBit is greater than 63, then ASSERT().\r |
| 2127 | If EndBit is less than StartBit, then ASSERT().\r |
| 2128 | \r |
| 2129 | @param Address MMIO register to write.\r |
| 2130 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2131 | Range 0..63.\r |
| 2132 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2133 | Range 0..63.\r |
| 2134 | @param Value New value of the bit field.\r |
| 2135 | \r |
| 2136 | @return The value written back to the MMIO register.\r |
| 2137 | \r |
| 2138 | **/\r |
| 2139 | UINT64\r |
| 2140 | EFIAPI\r |
| 2141 | MmioBitFieldWrite64 (\r |
| 2142 | IN UINTN Address,\r |
| 2143 | IN UINTN StartBit,\r |
| 2144 | IN UINTN EndBit,\r |
| 2145 | IN UINT64 Value\r |
| 2146 | )\r |
| 2147 | {\r |
| 2148 | return MmioWrite64 (\r |
| 2149 | Address,\r |
| 2150 | BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r |
| 2151 | );\r |
| 2152 | }\r |
| 2153 | \r |
| 2154 | /**\r |
| 2155 | Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r |
| 2156 | writes the result back to the bit field in the 64-bit MMIO register.\r |
| 2157 | \r |
| 2158 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 2159 | inclusive OR between the read result and the value specified by OrData, and\r |
| 2160 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2161 | written to the MMIO register is returned. This function must guarantee that\r |
| 2162 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 2163 | are stripped.\r |
| 2164 | \r |
| 2165 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2166 | If StartBit is greater than 63, then ASSERT().\r |
| 2167 | If EndBit is greater than 63, then ASSERT().\r |
| 2168 | If EndBit is less than StartBit, then ASSERT().\r |
| 2169 | \r |
| 2170 | @param Address MMIO register to write.\r |
| 2171 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2172 | Range 0..63.\r |
| 2173 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2174 | Range 0..63.\r |
| 2175 | @param OrData The value to OR with read value from the MMIO register.\r |
| 2176 | \r |
| 2177 | @return The value written back to the MMIO register.\r |
| 2178 | \r |
| 2179 | **/\r |
| 2180 | UINT64\r |
| 2181 | EFIAPI\r |
| 2182 | MmioBitFieldOr64 (\r |
| 2183 | IN UINTN Address,\r |
| 2184 | IN UINTN StartBit,\r |
| 2185 | IN UINTN EndBit,\r |
| 2186 | IN UINT64 OrData\r |
| 2187 | )\r |
| 2188 | {\r |
| 2189 | return MmioWrite64 (\r |
| 2190 | Address,\r |
| 2191 | BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r |
| 2192 | );\r |
| 2193 | }\r |
| 2194 | \r |
| 2195 | /**\r |
| 2196 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r |
| 2197 | writes the result back to the bit field in the 64-bit MMIO register.\r |
| 2198 | \r |
| 2199 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2200 | between the read result and the value specified by AndData, and writes the\r |
| 2201 | result to the 64-bit MMIO register specified by Address. The value written to\r |
| 2202 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 2203 | read and write operations are serialized. Extra left bits in AndData are\r |
| 2204 | stripped.\r |
| 2205 | \r |
| 2206 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2207 | If StartBit is greater than 63, then ASSERT().\r |
| 2208 | If EndBit is greater than 63, then ASSERT().\r |
| 2209 | If EndBit is less than StartBit, then ASSERT().\r |
| 2210 | \r |
| 2211 | @param Address MMIO register to write.\r |
| 2212 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2213 | Range 0..63.\r |
| 2214 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2215 | Range 0..63.\r |
| 2216 | @param AndData The value to AND with read value from the MMIO register.\r |
| 2217 | \r |
| 2218 | @return The value written back to the MMIO register.\r |
| 2219 | \r |
| 2220 | **/\r |
| 2221 | UINT64\r |
| 2222 | EFIAPI\r |
| 2223 | MmioBitFieldAnd64 (\r |
| 2224 | IN UINTN Address,\r |
| 2225 | IN UINTN StartBit,\r |
| 2226 | IN UINTN EndBit,\r |
| 2227 | IN UINT64 AndData\r |
| 2228 | )\r |
| 2229 | {\r |
| 2230 | return MmioWrite64 (\r |
| 2231 | Address,\r |
| 2232 | BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r |
| 2233 | );\r |
| 2234 | }\r |
| 2235 | \r |
| 2236 | /**\r |
| 2237 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r |
| 2238 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 2239 | 64-bit MMIO register.\r |
| 2240 | \r |
| 2241 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2242 | followed by a bitwise inclusive OR between the read result and the value\r |
| 2243 | specified by AndData, and writes the result to the 64-bit MMIO register\r |
| 2244 | specified by Address. The value written to the MMIO register is returned.\r |
| 2245 | This function must guarantee that all MMIO read and write operations are\r |
| 2246 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 2247 | \r |
| 2248 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2249 | If StartBit is greater than 63, then ASSERT().\r |
| 2250 | If EndBit is greater than 63, then ASSERT().\r |
| 2251 | If EndBit is less than StartBit, then ASSERT().\r |
| 2252 | \r |
| 2253 | @param Address MMIO register to write.\r |
| 2254 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2255 | Range 0..63.\r |
| 2256 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2257 | Range 0..63.\r |
| 2258 | @param AndData The value to AND with read value from the MMIO register.\r |
| 2259 | @param OrData The value to OR with the result of the AND operation.\r |
| 2260 | \r |
| 2261 | @return The value written back to the MMIO register.\r |
| 2262 | \r |
| 2263 | **/\r |
| 2264 | UINT64\r |
| 2265 | EFIAPI\r |
| 2266 | MmioBitFieldAndThenOr64 (\r |
| 2267 | IN UINTN Address,\r |
| 2268 | IN UINTN StartBit,\r |
| 2269 | IN UINTN EndBit,\r |
| 2270 | IN UINT64 AndData,\r |
| 2271 | IN UINT64 OrData\r |
| 2272 | )\r |
| 2273 | {\r |
| 2274 | return MmioWrite64 (\r |
| 2275 | Address,\r |
| 2276 | BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r |
| 2277 | );\r |
| 2278 | }\r |
projects / mirror_edk2.git / blame