| 11f43dfd |
1 | /** @file\r |
| 2 | High-level Io/Mmio functions.\r |
| 3 | \r |
| 4 | All assertions for bit field operations are handled bit field functions in the\r |
| 5 | Base Library.\r |
| 6 | \r |
| 7 | Copyright (c) 2006, Intel Corporation<BR>\r |
| 8 | All rights reserved. This program and the accompanying materials\r |
| 9 | are licensed and made available under the terms and conditions of the BSD License\r |
| 10 | which accompanies this distribution. The full text of the license may be found at\r |
| 11 | http://opensource.org/licenses/bsd-license.php\r |
| 12 | \r |
| 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| 15 | \r |
| 11f43dfd |
16 | The following IoLib instances share the same version of this file:\r |
| 17 | \r |
| 18 | BaseIoLibIntrinsic\r |
| 19 | DxeIoLibCpuIo\r |
| 20 | PeiIoLibCpuIo\r |
| 21 | \r |
| 22 | **/\r |
| 23 | \r |
| 24 | //\r |
| 25 | // The package level header files this module uses\r |
| 26 | //\r |
| 27 | #include <PiPei.h>\r |
| 28 | //\r |
| 29 | // The Library classes this module consumes\r |
| 30 | //\r |
| 31 | #include <Library/IoLib.h>\r |
| 32 | #include <Library/DebugLib.h>\r |
| 33 | #include <Library/BaseLib.h>\r |
| 34 | #include <Library/PeiServicesTablePointerLib.h>\r |
| 35 | \r |
| 36 | /**\r |
| 37 | Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 38 | result back to the 8-bit I/O port.\r |
| 39 | \r |
| 40 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 41 | between the read result and the value specified by OrData, and writes the\r |
| 42 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r |
| 43 | port is returned. This function must guarantee that all I/O read and write\r |
| 44 | operations are serialized.\r |
| 45 | \r |
| 46 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 47 | \r |
| 48 | @param Port The I/O port to write.\r |
| 49 | @param OrData The value to OR with the read value from the I/O port.\r |
| 50 | \r |
| 51 | @return The value written back to the I/O port.\r |
| 52 | \r |
| 53 | **/\r |
| 54 | UINT8\r |
| 55 | EFIAPI\r |
| 56 | IoOr8 (\r |
| 57 | IN UINTN Port,\r |
| 58 | IN UINT8 OrData\r |
| 59 | )\r |
| 60 | {\r |
| 61 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));\r |
| 62 | }\r |
| 63 | \r |
| 64 | /**\r |
| 65 | Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 66 | to the 8-bit I/O port.\r |
| 67 | \r |
| 68 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 69 | the read result and the value specified by AndData, and writes the result to\r |
| 70 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r |
| 71 | returned. This function must guarantee that all I/O read and write operations\r |
| 72 | are serialized.\r |
| 73 | \r |
| 74 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 75 | \r |
| 76 | @param Port The I/O port to write.\r |
| 77 | @param AndData The value to AND with the read value from the I/O port.\r |
| 78 | \r |
| 79 | @return The value written back to the I/O port.\r |
| 80 | \r |
| 81 | **/\r |
| 82 | UINT8\r |
| 83 | EFIAPI\r |
| 84 | IoAnd8 (\r |
| 85 | IN UINTN Port,\r |
| 86 | IN UINT8 AndData\r |
| 87 | )\r |
| 88 | {\r |
| 89 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));\r |
| 90 | }\r |
| 91 | \r |
| 92 | /**\r |
| 93 | Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 94 | inclusive OR, and writes the result back to the 8-bit I/O port.\r |
| 95 | \r |
| 96 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 97 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 98 | between the result of the AND operation and the value specified by OrData,\r |
| 99 | and writes the result to the 8-bit I/O port specified by Port. The value\r |
| 100 | written to the I/O port is returned. This function must guarantee that all\r |
| 101 | I/O read and write operations are serialized.\r |
| 102 | \r |
| 103 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 104 | \r |
| 105 | @param Port The I/O port to write.\r |
| 106 | @param AndData The value to AND with the read value from the I/O port.\r |
| 107 | @param OrData The value to OR with the result of the AND operation.\r |
| 108 | \r |
| 109 | @return The value written back to the I/O port.\r |
| 110 | \r |
| 111 | **/\r |
| 112 | UINT8\r |
| 113 | EFIAPI\r |
| 114 | IoAndThenOr8 (\r |
| 115 | IN UINTN Port,\r |
| 116 | IN UINT8 AndData,\r |
| 117 | IN UINT8 OrData\r |
| 118 | )\r |
| 119 | {\r |
| 120 | return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));\r |
| 121 | }\r |
| 122 | \r |
| 123 | /**\r |
| 124 | Reads a bit field of an I/O register.\r |
| 125 | \r |
| 126 | Reads the bit field in an 8-bit I/O register. The bit field is specified by\r |
| 127 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 128 | \r |
| 129 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 130 | If StartBit is greater than 7, then ASSERT().\r |
| 131 | If EndBit is greater than 7, then ASSERT().\r |
| 132 | If EndBit is less than StartBit, then ASSERT().\r |
| 133 | \r |
| 134 | @param Port The I/O port to read.\r |
| 135 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 136 | Range 0..7.\r |
| 137 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 138 | Range 0..7.\r |
| 139 | \r |
| 140 | @return The value read.\r |
| 141 | \r |
| 142 | **/\r |
| 143 | UINT8\r |
| 144 | EFIAPI\r |
| 145 | IoBitFieldRead8 (\r |
| 146 | IN UINTN Port,\r |
| 147 | IN UINTN StartBit,\r |
| 148 | IN UINTN EndBit\r |
| 149 | )\r |
| 150 | {\r |
| 151 | return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r |
| 152 | }\r |
| 153 | \r |
| 154 | /**\r |
| 155 | Writes a bit field to an I/O register.\r |
| 156 | \r |
| 157 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 158 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 159 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 160 | left bits in Value are stripped.\r |
| 161 | \r |
| 162 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 163 | If StartBit is greater than 7, then ASSERT().\r |
| 164 | If EndBit is greater than 7, then ASSERT().\r |
| 165 | If EndBit is less than StartBit, then ASSERT().\r |
| 166 | \r |
| 167 | @param Port The I/O port to write.\r |
| 168 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 169 | Range 0..7.\r |
| 170 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 171 | Range 0..7.\r |
| 172 | @param Value New value of the bit field.\r |
| 173 | \r |
| 174 | @return The value written back to the I/O port.\r |
| 175 | \r |
| 176 | **/\r |
| 177 | UINT8\r |
| 178 | EFIAPI\r |
| 179 | IoBitFieldWrite8 (\r |
| 180 | IN UINTN Port,\r |
| 181 | IN UINTN StartBit,\r |
| 182 | IN UINTN EndBit,\r |
| 183 | IN UINT8 Value\r |
| 184 | )\r |
| 185 | {\r |
| 186 | return IoWrite8 (\r |
| 187 | Port,\r |
| 188 | BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r |
| 189 | );\r |
| 190 | }\r |
| 191 | \r |
| 192 | /**\r |
| 193 | Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r |
| 194 | result back to the bit field in the 8-bit port.\r |
| 195 | \r |
| 196 | Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 197 | between the read result and the value specified by OrData, and writes the\r |
| 198 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r |
| 199 | port is returned. This function must guarantee that all I/O read and write\r |
| 200 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 201 | \r |
| 202 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 203 | If StartBit is greater than 7, then ASSERT().\r |
| 204 | If EndBit is greater than 7, then ASSERT().\r |
| 205 | If EndBit is less than StartBit, then ASSERT().\r |
| 206 | \r |
| 207 | @param Port The I/O port to write.\r |
| 208 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 209 | Range 0..7.\r |
| 210 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 211 | Range 0..7.\r |
| 212 | @param OrData The value to OR with the read value from the I/O port.\r |
| 213 | \r |
| 214 | @return The value written back to the I/O port.\r |
| 215 | \r |
| 216 | **/\r |
| 217 | UINT8\r |
| 218 | EFIAPI\r |
| 219 | IoBitFieldOr8 (\r |
| 220 | IN UINTN Port,\r |
| 221 | IN UINTN StartBit,\r |
| 222 | IN UINTN EndBit,\r |
| 223 | IN UINT8 OrData\r |
| 224 | )\r |
| 225 | {\r |
| 226 | return IoWrite8 (\r |
| 227 | Port,\r |
| 228 | BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r |
| 229 | );\r |
| 230 | }\r |
| 231 | \r |
| 232 | /**\r |
| 233 | Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r |
| 234 | result back to the bit field in the 8-bit port.\r |
| 235 | \r |
| 236 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r |
| 237 | the read result and the value specified by AndData, and writes the result to\r |
| 238 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r |
| 239 | returned. This function must guarantee that all I/O read and write operations\r |
| 240 | are serialized. Extra left bits in AndData are stripped.\r |
| 241 | \r |
| 242 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 243 | If StartBit is greater than 7, then ASSERT().\r |
| 244 | If EndBit is greater than 7, then ASSERT().\r |
| 245 | If EndBit is less than StartBit, then ASSERT().\r |
| 246 | \r |
| 247 | @param Port The I/O port to write.\r |
| 248 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 249 | Range 0..7.\r |
| 250 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 251 | Range 0..7.\r |
| 252 | @param AndData The value to AND with the read value from the I/O port.\r |
| 253 | \r |
| 254 | @return The value written back to the I/O port.\r |
| 255 | \r |
| 256 | **/\r |
| 257 | UINT8\r |
| 258 | EFIAPI\r |
| 259 | IoBitFieldAnd8 (\r |
| 260 | IN UINTN Port,\r |
| 261 | IN UINTN StartBit,\r |
| 262 | IN UINTN EndBit,\r |
| 263 | IN UINT8 AndData\r |
| 264 | )\r |
| 265 | {\r |
| 266 | return IoWrite8 (\r |
| 267 | Port,\r |
| 268 | BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r |
| 269 | );\r |
| 270 | }\r |
| 271 | \r |
| 272 | /**\r |
| 273 | Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r |
| 274 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 275 | 8-bit port.\r |
| 276 | \r |
| 277 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 278 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 279 | AndData, and writes the result to the 8-bit I/O port specified by Port. The\r |
| 280 | value written to the I/O port is returned. This function must guarantee that\r |
| 281 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 282 | AndData and OrData are stripped.\r |
| 283 | \r |
| 284 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| 285 | If StartBit is greater than 7, then ASSERT().\r |
| 286 | If EndBit is greater than 7, then ASSERT().\r |
| 287 | If EndBit is less than StartBit, then ASSERT().\r |
| 288 | \r |
| 289 | @param Port The I/O port to write.\r |
| 290 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 291 | Range 0..7.\r |
| 292 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 293 | Range 0..7.\r |
| 294 | @param AndData The value to AND with the read value from the I/O port.\r |
| 295 | @param OrData The value to OR with the result of the AND operation.\r |
| 296 | \r |
| 297 | @return The value written back to the I/O port.\r |
| 298 | \r |
| 299 | **/\r |
| 300 | UINT8\r |
| 301 | EFIAPI\r |
| 302 | IoBitFieldAndThenOr8 (\r |
| 303 | IN UINTN Port,\r |
| 304 | IN UINTN StartBit,\r |
| 305 | IN UINTN EndBit,\r |
| 306 | IN UINT8 AndData,\r |
| 307 | IN UINT8 OrData\r |
| 308 | )\r |
| 309 | {\r |
| 310 | return IoWrite8 (\r |
| 311 | Port,\r |
| 312 | BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r |
| 313 | );\r |
| 314 | }\r |
| 315 | \r |
| 316 | /**\r |
| 317 | Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 318 | result back to the 16-bit I/O port.\r |
| 319 | \r |
| 320 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 321 | between the read result and the value specified by OrData, and writes the\r |
| 322 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r |
| 323 | port is returned. This function must guarantee that all I/O read and write\r |
| 324 | operations are serialized.\r |
| 325 | \r |
| 326 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 327 | \r |
| 328 | @param Port The I/O port to write.\r |
| 329 | @param OrData The value to OR with the read value from the I/O port.\r |
| 330 | \r |
| 331 | @return The value written back to the I/O port.\r |
| 332 | \r |
| 333 | **/\r |
| 334 | UINT16\r |
| 335 | EFIAPI\r |
| 336 | IoOr16 (\r |
| 337 | IN UINTN Port,\r |
| 338 | IN UINT16 OrData\r |
| 339 | )\r |
| 340 | {\r |
| 341 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));\r |
| 342 | }\r |
| 343 | \r |
| 344 | /**\r |
| 345 | Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 346 | to the 16-bit I/O port.\r |
| 347 | \r |
| 348 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 349 | the read result and the value specified by AndData, and writes the result to\r |
| 350 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r |
| 351 | returned. This function must guarantee that all I/O read and write operations\r |
| 352 | are serialized.\r |
| 353 | \r |
| 354 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 355 | \r |
| 356 | @param Port The I/O port to write.\r |
| 357 | @param AndData The value to AND with the read value from the I/O port.\r |
| 358 | \r |
| 359 | @return The value written back to the I/O port.\r |
| 360 | \r |
| 361 | **/\r |
| 362 | UINT16\r |
| 363 | EFIAPI\r |
| 364 | IoAnd16 (\r |
| 365 | IN UINTN Port,\r |
| 366 | IN UINT16 AndData\r |
| 367 | )\r |
| 368 | {\r |
| 369 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));\r |
| 370 | }\r |
| 371 | \r |
| 372 | /**\r |
| 373 | Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 374 | inclusive OR, and writes the result back to the 16-bit I/O port.\r |
| 375 | \r |
| 376 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 377 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 378 | between the result of the AND operation and the value specified by OrData,\r |
| 379 | and writes the result to the 16-bit I/O port specified by Port. The value\r |
| 380 | written to the I/O port is returned. This function must guarantee that all\r |
| 381 | I/O read and write operations are serialized.\r |
| 382 | \r |
| 383 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 384 | \r |
| 385 | @param Port The I/O port to write.\r |
| 386 | @param AndData The value to AND with the read value from the I/O port.\r |
| 387 | @param OrData The value to OR with the result of the AND operation.\r |
| 388 | \r |
| 389 | @return The value written back to the I/O port.\r |
| 390 | \r |
| 391 | **/\r |
| 392 | UINT16\r |
| 393 | EFIAPI\r |
| 394 | IoAndThenOr16 (\r |
| 395 | IN UINTN Port,\r |
| 396 | IN UINT16 AndData,\r |
| 397 | IN UINT16 OrData\r |
| 398 | )\r |
| 399 | {\r |
| 400 | return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));\r |
| 401 | }\r |
| 402 | \r |
| 403 | /**\r |
| 404 | Reads a bit field of an I/O register.\r |
| 405 | \r |
| 406 | Reads the bit field in a 16-bit I/O register. The bit field is specified by\r |
| 407 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 408 | \r |
| 409 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 410 | If StartBit is greater than 15, then ASSERT().\r |
| 411 | If EndBit is greater than 15, then ASSERT().\r |
| 412 | If EndBit is less than StartBit, then ASSERT().\r |
| 413 | \r |
| 414 | @param Port The I/O port to read.\r |
| 415 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 416 | Range 0..15.\r |
| 417 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 418 | Range 0..15.\r |
| 419 | \r |
| 420 | @return The value read.\r |
| 421 | \r |
| 422 | **/\r |
| 423 | UINT16\r |
| 424 | EFIAPI\r |
| 425 | IoBitFieldRead16 (\r |
| 426 | IN UINTN Port,\r |
| 427 | IN UINTN StartBit,\r |
| 428 | IN UINTN EndBit\r |
| 429 | )\r |
| 430 | {\r |
| 431 | return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r |
| 432 | }\r |
| 433 | \r |
| 434 | /**\r |
| 435 | Writes a bit field to an I/O register.\r |
| 436 | \r |
| 437 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 438 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 439 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 440 | left bits in Value are stripped.\r |
| 441 | \r |
| 442 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 443 | If StartBit is greater than 15, then ASSERT().\r |
| 444 | If EndBit is greater than 15, then ASSERT().\r |
| 445 | If EndBit is less than StartBit, then ASSERT().\r |
| 446 | \r |
| 447 | @param Port The I/O port to write.\r |
| 448 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 449 | Range 0..15.\r |
| 450 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 451 | Range 0..15.\r |
| 452 | @param Value New value of the bit field.\r |
| 453 | \r |
| 454 | @return The value written back to the I/O port.\r |
| 455 | \r |
| 456 | **/\r |
| 457 | UINT16\r |
| 458 | EFIAPI\r |
| 459 | IoBitFieldWrite16 (\r |
| 460 | IN UINTN Port,\r |
| 461 | IN UINTN StartBit,\r |
| 462 | IN UINTN EndBit,\r |
| 463 | IN UINT16 Value\r |
| 464 | )\r |
| 465 | {\r |
| 466 | return IoWrite16 (\r |
| 467 | Port,\r |
| 468 | BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r |
| 469 | );\r |
| 470 | }\r |
| 471 | \r |
| 472 | /**\r |
| 473 | Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r |
| 474 | result back to the bit field in the 16-bit port.\r |
| 475 | \r |
| 476 | Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 477 | between the read result and the value specified by OrData, and writes the\r |
| 478 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r |
| 479 | port is returned. This function must guarantee that all I/O read and write\r |
| 480 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 481 | \r |
| 482 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 483 | If StartBit is greater than 15, then ASSERT().\r |
| 484 | If EndBit is greater than 15, then ASSERT().\r |
| 485 | If EndBit is less than StartBit, then ASSERT().\r |
| 486 | \r |
| 487 | @param Port The I/O port to write.\r |
| 488 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 489 | Range 0..15.\r |
| 490 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 491 | Range 0..15.\r |
| 492 | @param OrData The value to OR with the read value from the I/O port.\r |
| 493 | \r |
| 494 | @return The value written back to the I/O port.\r |
| 495 | \r |
| 496 | **/\r |
| 497 | UINT16\r |
| 498 | EFIAPI\r |
| 499 | IoBitFieldOr16 (\r |
| 500 | IN UINTN Port,\r |
| 501 | IN UINTN StartBit,\r |
| 502 | IN UINTN EndBit,\r |
| 503 | IN UINT16 OrData\r |
| 504 | )\r |
| 505 | {\r |
| 506 | return IoWrite16 (\r |
| 507 | Port,\r |
| 508 | BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r |
| 509 | );\r |
| 510 | }\r |
| 511 | \r |
| 512 | /**\r |
| 513 | Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r |
| 514 | result back to the bit field in the 16-bit port.\r |
| 515 | \r |
| 516 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r |
| 517 | the read result and the value specified by AndData, and writes the result to\r |
| 518 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r |
| 519 | returned. This function must guarantee that all I/O read and write operations\r |
| 520 | are serialized. Extra left bits in AndData are stripped.\r |
| 521 | \r |
| 522 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 523 | If StartBit is greater than 15, then ASSERT().\r |
| 524 | If EndBit is greater than 15, then ASSERT().\r |
| 525 | If EndBit is less than StartBit, then ASSERT().\r |
| 526 | \r |
| 527 | @param Port The I/O port to write.\r |
| 528 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 529 | Range 0..15.\r |
| 530 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 531 | Range 0..15.\r |
| 532 | @param AndData The value to AND with the read value from the I/O port.\r |
| 533 | \r |
| 534 | @return The value written back to the I/O port.\r |
| 535 | \r |
| 536 | **/\r |
| 537 | UINT16\r |
| 538 | EFIAPI\r |
| 539 | IoBitFieldAnd16 (\r |
| 540 | IN UINTN Port,\r |
| 541 | IN UINTN StartBit,\r |
| 542 | IN UINTN EndBit,\r |
| 543 | IN UINT16 AndData\r |
| 544 | )\r |
| 545 | {\r |
| 546 | return IoWrite16 (\r |
| 547 | Port,\r |
| 548 | BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r |
| 549 | );\r |
| 550 | }\r |
| 551 | \r |
| 552 | /**\r |
| 553 | Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r |
| 554 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 555 | 16-bit port.\r |
| 556 | \r |
| 557 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 558 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 559 | AndData, and writes the result to the 16-bit I/O port specified by Port. The\r |
| 560 | value written to the I/O port is returned. This function must guarantee that\r |
| 561 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 562 | AndData and OrData are stripped.\r |
| 563 | \r |
| 564 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| 565 | If StartBit is greater than 15, then ASSERT().\r |
| 566 | If EndBit is greater than 15, then ASSERT().\r |
| 567 | If EndBit is less than StartBit, then ASSERT().\r |
| 568 | \r |
| 569 | @param Port The I/O port to write.\r |
| 570 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 571 | Range 0..15.\r |
| 572 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 573 | Range 0..15.\r |
| 574 | @param AndData The value to AND with the read value from the I/O port.\r |
| 575 | @param OrData The value to OR with the result of the AND operation.\r |
| 576 | \r |
| 577 | @return The value written back to the I/O port.\r |
| 578 | \r |
| 579 | **/\r |
| 580 | UINT16\r |
| 581 | EFIAPI\r |
| 582 | IoBitFieldAndThenOr16 (\r |
| 583 | IN UINTN Port,\r |
| 584 | IN UINTN StartBit,\r |
| 585 | IN UINTN EndBit,\r |
| 586 | IN UINT16 AndData,\r |
| 587 | IN UINT16 OrData\r |
| 588 | )\r |
| 589 | {\r |
| 590 | return IoWrite16 (\r |
| 591 | Port,\r |
| 592 | BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r |
| 593 | );\r |
| 594 | }\r |
| 595 | \r |
| 596 | /**\r |
| 597 | Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 598 | result back to the 32-bit I/O port.\r |
| 599 | \r |
| 600 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 601 | between the read result and the value specified by OrData, and writes the\r |
| 602 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r |
| 603 | port is returned. This function must guarantee that all I/O read and write\r |
| 604 | operations are serialized.\r |
| 605 | \r |
| 606 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 607 | \r |
| 608 | @param Port The I/O port to write.\r |
| 609 | @param OrData The value to OR with the read value from the I/O port.\r |
| 610 | \r |
| 611 | @return The value written back to the I/O port.\r |
| 612 | \r |
| 613 | **/\r |
| 614 | UINT32\r |
| 615 | EFIAPI\r |
| 616 | IoOr32 (\r |
| 617 | IN UINTN Port,\r |
| 618 | IN UINT32 OrData\r |
| 619 | )\r |
| 620 | {\r |
| 621 | return IoWrite32 (Port, IoRead32 (Port) | OrData);\r |
| 622 | }\r |
| 623 | \r |
| 624 | /**\r |
| 625 | Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 626 | to the 32-bit I/O port.\r |
| 627 | \r |
| 628 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 629 | the read result and the value specified by AndData, and writes the result to\r |
| 630 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r |
| 631 | returned. This function must guarantee that all I/O read and write operations\r |
| 632 | are serialized.\r |
| 633 | \r |
| 634 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 635 | \r |
| 636 | @param Port The I/O port to write.\r |
| 637 | @param AndData The value to AND with the read value from the I/O port.\r |
| 638 | \r |
| 639 | @return The value written back to the I/O port.\r |
| 640 | \r |
| 641 | **/\r |
| 642 | UINT32\r |
| 643 | EFIAPI\r |
| 644 | IoAnd32 (\r |
| 645 | IN UINTN Port,\r |
| 646 | IN UINT32 AndData\r |
| 647 | )\r |
| 648 | {\r |
| 649 | return IoWrite32 (Port, IoRead32 (Port) & AndData);\r |
| 650 | }\r |
| 651 | \r |
| 652 | /**\r |
| 653 | Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 654 | inclusive OR, and writes the result back to the 32-bit I/O port.\r |
| 655 | \r |
| 656 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 657 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 658 | between the result of the AND operation and the value specified by OrData,\r |
| 659 | and writes the result to the 32-bit I/O port specified by Port. The value\r |
| 660 | written to the I/O port is returned. This function must guarantee that all\r |
| 661 | I/O read and write operations are serialized.\r |
| 662 | \r |
| 663 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 664 | \r |
| 665 | @param Port The I/O port to write.\r |
| 666 | @param AndData The value to AND with the read value from the I/O port.\r |
| 667 | @param OrData The value to OR with the result of the AND operation.\r |
| 668 | \r |
| 669 | @return The value written back to the I/O port.\r |
| 670 | \r |
| 671 | **/\r |
| 672 | UINT32\r |
| 673 | EFIAPI\r |
| 674 | IoAndThenOr32 (\r |
| 675 | IN UINTN Port,\r |
| 676 | IN UINT32 AndData,\r |
| 677 | IN UINT32 OrData\r |
| 678 | )\r |
| 679 | {\r |
| 680 | return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r |
| 681 | }\r |
| 682 | \r |
| 683 | /**\r |
| 684 | Reads a bit field of an I/O register.\r |
| 685 | \r |
| 686 | Reads the bit field in a 32-bit I/O register. The bit field is specified by\r |
| 687 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 688 | \r |
| 689 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 690 | If StartBit is greater than 31, then ASSERT().\r |
| 691 | If EndBit is greater than 31, then ASSERT().\r |
| 692 | If EndBit is less than StartBit, then ASSERT().\r |
| 693 | \r |
| 694 | @param Port The I/O port to read.\r |
| 695 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 696 | Range 0..31.\r |
| 697 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 698 | Range 0..31.\r |
| 699 | \r |
| 700 | @return The value read.\r |
| 701 | \r |
| 702 | **/\r |
| 703 | UINT32\r |
| 704 | EFIAPI\r |
| 705 | IoBitFieldRead32 (\r |
| 706 | IN UINTN Port,\r |
| 707 | IN UINTN StartBit,\r |
| 708 | IN UINTN EndBit\r |
| 709 | )\r |
| 710 | {\r |
| 711 | return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r |
| 712 | }\r |
| 713 | \r |
| 714 | /**\r |
| 715 | Writes a bit field to an I/O register.\r |
| 716 | \r |
| 717 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 718 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 719 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 720 | left bits in Value are stripped.\r |
| 721 | \r |
| 722 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 723 | If StartBit is greater than 31, then ASSERT().\r |
| 724 | If EndBit is greater than 31, then ASSERT().\r |
| 725 | If EndBit is less than StartBit, then ASSERT().\r |
| 726 | \r |
| 727 | @param Port The I/O port to write.\r |
| 728 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 729 | Range 0..31.\r |
| 730 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 731 | Range 0..31.\r |
| 732 | @param Value New value of the bit field.\r |
| 733 | \r |
| 734 | @return The value written back to the I/O port.\r |
| 735 | \r |
| 736 | **/\r |
| 737 | UINT32\r |
| 738 | EFIAPI\r |
| 739 | IoBitFieldWrite32 (\r |
| 740 | IN UINTN Port,\r |
| 741 | IN UINTN StartBit,\r |
| 742 | IN UINTN EndBit,\r |
| 743 | IN UINT32 Value\r |
| 744 | )\r |
| 745 | {\r |
| 746 | return IoWrite32 (\r |
| 747 | Port,\r |
| 748 | BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r |
| 749 | );\r |
| 750 | }\r |
| 751 | \r |
| 752 | /**\r |
| 753 | Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r |
| 754 | result back to the bit field in the 32-bit port.\r |
| 755 | \r |
| 756 | Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 757 | between the read result and the value specified by OrData, and writes the\r |
| 758 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r |
| 759 | port is returned. This function must guarantee that all I/O read and write\r |
| 760 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 761 | \r |
| 762 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 763 | If StartBit is greater than 31, then ASSERT().\r |
| 764 | If EndBit is greater than 31, then ASSERT().\r |
| 765 | If EndBit is less than StartBit, then ASSERT().\r |
| 766 | \r |
| 767 | @param Port The I/O port to write.\r |
| 768 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 769 | Range 0..31.\r |
| 770 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 771 | Range 0..31.\r |
| 772 | @param OrData The value to OR with the read value from the I/O port.\r |
| 773 | \r |
| 774 | @return The value written back to the I/O port.\r |
| 775 | \r |
| 776 | **/\r |
| 777 | UINT32\r |
| 778 | EFIAPI\r |
| 779 | IoBitFieldOr32 (\r |
| 780 | IN UINTN Port,\r |
| 781 | IN UINTN StartBit,\r |
| 782 | IN UINTN EndBit,\r |
| 783 | IN UINT32 OrData\r |
| 784 | )\r |
| 785 | {\r |
| 786 | return IoWrite32 (\r |
| 787 | Port,\r |
| 788 | BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r |
| 789 | );\r |
| 790 | }\r |
| 791 | \r |
| 792 | /**\r |
| 793 | Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r |
| 794 | result back to the bit field in the 32-bit port.\r |
| 795 | \r |
| 796 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r |
| 797 | the read result and the value specified by AndData, and writes the result to\r |
| 798 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r |
| 799 | returned. This function must guarantee that all I/O read and write operations\r |
| 800 | are serialized. Extra left bits in AndData are stripped.\r |
| 801 | \r |
| 802 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 803 | If StartBit is greater than 31, then ASSERT().\r |
| 804 | If EndBit is greater than 31, then ASSERT().\r |
| 805 | If EndBit is less than StartBit, then ASSERT().\r |
| 806 | \r |
| 807 | @param Port The I/O port to write.\r |
| 808 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 809 | Range 0..31.\r |
| 810 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 811 | Range 0..31.\r |
| 812 | @param AndData The value to AND with the read value from the I/O port.\r |
| 813 | \r |
| 814 | @return The value written back to the I/O port.\r |
| 815 | \r |
| 816 | **/\r |
| 817 | UINT32\r |
| 818 | EFIAPI\r |
| 819 | IoBitFieldAnd32 (\r |
| 820 | IN UINTN Port,\r |
| 821 | IN UINTN StartBit,\r |
| 822 | IN UINTN EndBit,\r |
| 823 | IN UINT32 AndData\r |
| 824 | )\r |
| 825 | {\r |
| 826 | return IoWrite32 (\r |
| 827 | Port,\r |
| 828 | BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r |
| 829 | );\r |
| 830 | }\r |
| 831 | \r |
| 832 | /**\r |
| 833 | Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r |
| 834 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 835 | 32-bit port.\r |
| 836 | \r |
| 837 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 838 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 839 | AndData, and writes the result to the 32-bit I/O port specified by Port. The\r |
| 840 | value written to the I/O port is returned. This function must guarantee that\r |
| 841 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 842 | AndData and OrData are stripped.\r |
| 843 | \r |
| 844 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| 845 | If StartBit is greater than 31, then ASSERT().\r |
| 846 | If EndBit is greater than 31, then ASSERT().\r |
| 847 | If EndBit is less than StartBit, then ASSERT().\r |
| 848 | \r |
| 849 | @param Port The I/O port to write.\r |
| 850 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 851 | Range 0..31.\r |
| 852 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 853 | Range 0..31.\r |
| 854 | @param AndData The value to AND with the read value from the I/O port.\r |
| 855 | @param OrData The value to OR with the result of the AND operation.\r |
| 856 | \r |
| 857 | @return The value written back to the I/O port.\r |
| 858 | \r |
| 859 | **/\r |
| 860 | UINT32\r |
| 861 | EFIAPI\r |
| 862 | IoBitFieldAndThenOr32 (\r |
| 863 | IN UINTN Port,\r |
| 864 | IN UINTN StartBit,\r |
| 865 | IN UINTN EndBit,\r |
| 866 | IN UINT32 AndData,\r |
| 867 | IN UINT32 OrData\r |
| 868 | )\r |
| 869 | {\r |
| 870 | return IoWrite32 (\r |
| 871 | Port,\r |
| 872 | BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r |
| 873 | );\r |
| 874 | }\r |
| 875 | \r |
| 876 | /**\r |
| 877 | Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r |
| 878 | result back to the 64-bit I/O port.\r |
| 879 | \r |
| 880 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 881 | between the read result and the value specified by OrData, and writes the\r |
| 882 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r |
| 883 | port is returned. This function must guarantee that all I/O read and write\r |
| 884 | operations are serialized.\r |
| 885 | \r |
| 886 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 887 | \r |
| 888 | @param Port The I/O port to write.\r |
| 889 | @param OrData The value to OR with the read value from the I/O port.\r |
| 890 | \r |
| 891 | @return The value written back to the I/O port.\r |
| 892 | \r |
| 893 | **/\r |
| 894 | UINT64\r |
| 895 | EFIAPI\r |
| 896 | IoOr64 (\r |
| 897 | IN UINTN Port,\r |
| 898 | IN UINT64 OrData\r |
| 899 | )\r |
| 900 | {\r |
| 901 | return IoWrite64 (Port, IoRead64 (Port) | OrData);\r |
| 902 | }\r |
| 903 | \r |
| 904 | /**\r |
| 905 | Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r |
| 906 | to the 64-bit I/O port.\r |
| 907 | \r |
| 908 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 909 | the read result and the value specified by AndData, and writes the result to\r |
| 910 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r |
| 911 | returned. This function must guarantee that all I/O read and write operations\r |
| 912 | are serialized.\r |
| 913 | \r |
| 914 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 915 | \r |
| 916 | @param Port The I/O port to write.\r |
| 917 | @param AndData The value to AND with the read value from the I/O port.\r |
| 918 | \r |
| 919 | @return The value written back to the I/O port.\r |
| 920 | \r |
| 921 | **/\r |
| 922 | UINT64\r |
| 923 | EFIAPI\r |
| 924 | IoAnd64 (\r |
| 925 | IN UINTN Port,\r |
| 926 | IN UINT64 AndData\r |
| 927 | )\r |
| 928 | {\r |
| 929 | return IoWrite64 (Port, IoRead64 (Port) & AndData);\r |
| 930 | }\r |
| 931 | \r |
| 932 | /**\r |
| 933 | Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 934 | inclusive OR, and writes the result back to the 64-bit I/O port.\r |
| 935 | \r |
| 936 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 937 | the read result and the value specified by AndData, performs a bitwise OR\r |
| 938 | between the result of the AND operation and the value specified by OrData,\r |
| 939 | and writes the result to the 64-bit I/O port specified by Port. The value\r |
| 940 | written to the I/O port is returned. This function must guarantee that all\r |
| 941 | I/O read and write operations are serialized.\r |
| 942 | \r |
| 943 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 944 | \r |
| 945 | @param Port The I/O port to write.\r |
| 946 | @param AndData The value to AND with the read value from the I/O port.\r |
| 947 | @param OrData The value to OR with the result of the AND operation.\r |
| 948 | \r |
| 949 | @return The value written back to the I/O port.\r |
| 950 | \r |
| 951 | **/\r |
| 952 | UINT64\r |
| 953 | EFIAPI\r |
| 954 | IoAndThenOr64 (\r |
| 955 | IN UINTN Port,\r |
| 956 | IN UINT64 AndData,\r |
| 957 | IN UINT64 OrData\r |
| 958 | )\r |
| 959 | {\r |
| 960 | return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r |
| 961 | }\r |
| 962 | \r |
| 963 | /**\r |
| 964 | Reads a bit field of an I/O register.\r |
| 965 | \r |
| 966 | Reads the bit field in a 64-bit I/O register. The bit field is specified by\r |
| 967 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 968 | \r |
| 969 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 970 | If StartBit is greater than 63, then ASSERT().\r |
| 971 | If EndBit is greater than 63, then ASSERT().\r |
| 972 | If EndBit is less than StartBit, then ASSERT().\r |
| 973 | \r |
| 974 | @param Port The I/O port to read.\r |
| 975 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 976 | Range 0..63.\r |
| 977 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 978 | Range 0..63.\r |
| 979 | \r |
| 980 | @return The value read.\r |
| 981 | \r |
| 982 | **/\r |
| 983 | UINT64\r |
| 984 | EFIAPI\r |
| 985 | IoBitFieldRead64 (\r |
| 986 | IN UINTN Port,\r |
| 987 | IN UINTN StartBit,\r |
| 988 | IN UINTN EndBit\r |
| 989 | )\r |
| 990 | {\r |
| 991 | return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r |
| 992 | }\r |
| 993 | \r |
| 994 | /**\r |
| 995 | Writes a bit field to an I/O register.\r |
| 996 | \r |
| 997 | Writes Value to the bit field of the I/O register. The bit field is specified\r |
| 998 | by the StartBit and the EndBit. All other bits in the destination I/O\r |
| 999 | register are preserved. The value written to the I/O port is returned. Extra\r |
| 1000 | left bits in Value are stripped.\r |
| 1001 | \r |
| 1002 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1003 | If StartBit is greater than 63, then ASSERT().\r |
| 1004 | If EndBit is greater than 63, then ASSERT().\r |
| 1005 | If EndBit is less than StartBit, then ASSERT().\r |
| 1006 | \r |
| 1007 | @param Port The I/O port to write.\r |
| 1008 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1009 | Range 0..63.\r |
| 1010 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1011 | Range 0..63.\r |
| 1012 | @param Value New value of the bit field.\r |
| 1013 | \r |
| 1014 | @return The value written back to the I/O port.\r |
| 1015 | \r |
| 1016 | **/\r |
| 1017 | UINT64\r |
| 1018 | EFIAPI\r |
| 1019 | IoBitFieldWrite64 (\r |
| 1020 | IN UINTN Port,\r |
| 1021 | IN UINTN StartBit,\r |
| 1022 | IN UINTN EndBit,\r |
| 1023 | IN UINT64 Value\r |
| 1024 | )\r |
| 1025 | {\r |
| 1026 | return IoWrite64 (\r |
| 1027 | Port,\r |
| 1028 | BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r |
| 1029 | );\r |
| 1030 | }\r |
| 1031 | \r |
| 1032 | /**\r |
| 1033 | Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r |
| 1034 | result back to the bit field in the 64-bit port.\r |
| 1035 | \r |
| 1036 | Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r |
| 1037 | between the read result and the value specified by OrData, and writes the\r |
| 1038 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r |
| 1039 | port is returned. This function must guarantee that all I/O read and write\r |
| 1040 | operations are serialized. Extra left bits in OrData are stripped.\r |
| 1041 | \r |
| 1042 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1043 | If StartBit is greater than 63, then ASSERT().\r |
| 1044 | If EndBit is greater than 63, then ASSERT().\r |
| 1045 | If EndBit is less than StartBit, then ASSERT().\r |
| 1046 | \r |
| 1047 | @param Port The I/O port to write.\r |
| 1048 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1049 | Range 0..63.\r |
| 1050 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1051 | Range 0..63.\r |
| 1052 | @param OrData The value to OR with the read value from the I/O port.\r |
| 1053 | \r |
| 1054 | @return The value written back to the I/O port.\r |
| 1055 | \r |
| 1056 | **/\r |
| 1057 | UINT64\r |
| 1058 | EFIAPI\r |
| 1059 | IoBitFieldOr64 (\r |
| 1060 | IN UINTN Port,\r |
| 1061 | IN UINTN StartBit,\r |
| 1062 | IN UINTN EndBit,\r |
| 1063 | IN UINT64 OrData\r |
| 1064 | )\r |
| 1065 | {\r |
| 1066 | return IoWrite64 (\r |
| 1067 | Port,\r |
| 1068 | BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r |
| 1069 | );\r |
| 1070 | }\r |
| 1071 | \r |
| 1072 | /**\r |
| 1073 | Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r |
| 1074 | result back to the bit field in the 64-bit port.\r |
| 1075 | \r |
| 1076 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r |
| 1077 | the read result and the value specified by AndData, and writes the result to\r |
| 1078 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r |
| 1079 | returned. This function must guarantee that all I/O read and write operations\r |
| 1080 | are serialized. Extra left bits in AndData are stripped.\r |
| 1081 | \r |
| 1082 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1083 | If StartBit is greater than 63, then ASSERT().\r |
| 1084 | If EndBit is greater than 63, then ASSERT().\r |
| 1085 | If EndBit is less than StartBit, then ASSERT().\r |
| 1086 | \r |
| 1087 | @param Port The I/O port to write.\r |
| 1088 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1089 | Range 0..63.\r |
| 1090 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1091 | Range 0..63.\r |
| 1092 | @param AndData The value to AND with the read value from the I/O port.\r |
| 1093 | \r |
| 1094 | @return The value written back to the I/O port.\r |
| 1095 | \r |
| 1096 | **/\r |
| 1097 | UINT64\r |
| 1098 | EFIAPI\r |
| 1099 | IoBitFieldAnd64 (\r |
| 1100 | IN UINTN Port,\r |
| 1101 | IN UINTN StartBit,\r |
| 1102 | IN UINTN EndBit,\r |
| 1103 | IN UINT64 AndData\r |
| 1104 | )\r |
| 1105 | {\r |
| 1106 | return IoWrite64 (\r |
| 1107 | Port,\r |
| 1108 | BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r |
| 1109 | );\r |
| 1110 | }\r |
| 1111 | \r |
| 1112 | /**\r |
| 1113 | Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r |
| 1114 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1115 | 64-bit port.\r |
| 1116 | \r |
| 1117 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r |
| 1118 | by a bitwise inclusive OR between the read result and the value specified by\r |
| 1119 | AndData, and writes the result to the 64-bit I/O port specified by Port. The\r |
| 1120 | value written to the I/O port is returned. This function must guarantee that\r |
| 1121 | all I/O read and write operations are serialized. Extra left bits in both\r |
| 1122 | AndData and OrData are stripped.\r |
| 1123 | \r |
| 1124 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| 1125 | If StartBit is greater than 63, then ASSERT().\r |
| 1126 | If EndBit is greater than 63, then ASSERT().\r |
| 1127 | If EndBit is less than StartBit, then ASSERT().\r |
| 1128 | \r |
| 1129 | @param Port The I/O port to write.\r |
| 1130 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1131 | Range 0..63.\r |
| 1132 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1133 | Range 0..63.\r |
| 1134 | @param AndData The value to AND with the read value from the I/O port.\r |
| 1135 | @param OrData The value to OR with the result of the AND operation.\r |
| 1136 | \r |
| 1137 | @return The value written back to the I/O port.\r |
| 1138 | \r |
| 1139 | **/\r |
| 1140 | UINT64\r |
| 1141 | EFIAPI\r |
| 1142 | IoBitFieldAndThenOr64 (\r |
| 1143 | IN UINTN Port,\r |
| 1144 | IN UINTN StartBit,\r |
| 1145 | IN UINTN EndBit,\r |
| 1146 | IN UINT64 AndData,\r |
| 1147 | IN UINT64 OrData\r |
| 1148 | )\r |
| 1149 | {\r |
| 1150 | return IoWrite64 (\r |
| 1151 | Port,\r |
| 1152 | BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r |
| 1153 | );\r |
| 1154 | }\r |
| 1155 | \r |
| 1156 | /**\r |
| 1157 | Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1158 | result back to the 8-bit MMIO register.\r |
| 1159 | \r |
| 1160 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 1161 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1162 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1163 | written to the MMIO register is returned. This function must guarantee that\r |
| 1164 | all MMIO read and write operations are serialized.\r |
| 1165 | \r |
| 1166 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1167 | \r |
| 1168 | @param Address The MMIO register to write.\r |
| 1169 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1170 | \r |
| 1171 | @return The value written back to the MMIO register.\r |
| 1172 | \r |
| 1173 | **/\r |
| 1174 | UINT8\r |
| 1175 | EFIAPI\r |
| 1176 | MmioOr8 (\r |
| 1177 | IN UINTN Address,\r |
| 1178 | IN UINT8 OrData\r |
| 1179 | )\r |
| 1180 | {\r |
| 1181 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));\r |
| 1182 | }\r |
| 1183 | \r |
| 1184 | /**\r |
| 1185 | Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1186 | back to the 8-bit MMIO register.\r |
| 1187 | \r |
| 1188 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1189 | between the read result and the value specified by AndData, and writes the\r |
| 1190 | result to the 8-bit MMIO register specified by Address. The value written to\r |
| 1191 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1192 | read and write operations are serialized.\r |
| 1193 | \r |
| 1194 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1195 | \r |
| 1196 | @param Address The MMIO register to write.\r |
| 1197 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1198 | \r |
| 1199 | @return The value written back to the MMIO register.\r |
| 1200 | \r |
| 1201 | **/\r |
| 1202 | UINT8\r |
| 1203 | EFIAPI\r |
| 1204 | MmioAnd8 (\r |
| 1205 | IN UINTN Address,\r |
| 1206 | IN UINT8 AndData\r |
| 1207 | )\r |
| 1208 | {\r |
| 1209 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));\r |
| 1210 | }\r |
| 1211 | \r |
| 1212 | /**\r |
| 1213 | Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1214 | inclusive OR, and writes the result back to the 8-bit MMIO register.\r |
| 1215 | \r |
| 1216 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1217 | between the read result and the value specified by AndData, performs a\r |
| 1218 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1219 | OrData, and writes the result to the 8-bit MMIO register specified by\r |
| 1220 | Address. The value written to the MMIO register is returned. This function\r |
| 1221 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1222 | \r |
| 1223 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1224 | \r |
| 1225 | \r |
| 1226 | @param Address The MMIO register to write.\r |
| 1227 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1228 | @param OrData The value to OR with the result of the AND operation.\r |
| 1229 | \r |
| 1230 | @return The value written back to the MMIO register.\r |
| 1231 | \r |
| 1232 | **/\r |
| 1233 | UINT8\r |
| 1234 | EFIAPI\r |
| 1235 | MmioAndThenOr8 (\r |
| 1236 | IN UINTN Address,\r |
| 1237 | IN UINT8 AndData,\r |
| 1238 | IN UINT8 OrData\r |
| 1239 | )\r |
| 1240 | {\r |
| 1241 | return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));\r |
| 1242 | }\r |
| 1243 | \r |
| 1244 | /**\r |
| 1245 | Reads a bit field of a MMIO register.\r |
| 1246 | \r |
| 1247 | Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r |
| 1248 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1249 | \r |
| 1250 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1251 | If StartBit is greater than 7, then ASSERT().\r |
| 1252 | If EndBit is greater than 7, then ASSERT().\r |
| 1253 | If EndBit is less than StartBit, then ASSERT().\r |
| 1254 | \r |
| 1255 | @param Address MMIO register to read.\r |
| 1256 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1257 | Range 0..7.\r |
| 1258 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1259 | Range 0..7.\r |
| 1260 | \r |
| 1261 | @return The value read.\r |
| 1262 | \r |
| 1263 | **/\r |
| 1264 | UINT8\r |
| 1265 | EFIAPI\r |
| 1266 | MmioBitFieldRead8 (\r |
| 1267 | IN UINTN Address,\r |
| 1268 | IN UINTN StartBit,\r |
| 1269 | IN UINTN EndBit\r |
| 1270 | )\r |
| 1271 | {\r |
| 1272 | return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r |
| 1273 | }\r |
| 1274 | \r |
| 1275 | /**\r |
| 1276 | Writes a bit field to a MMIO register.\r |
| 1277 | \r |
| 1278 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1279 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1280 | MMIO register are preserved. The new value of the 8-bit register is returned.\r |
| 1281 | \r |
| 1282 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1283 | If StartBit is greater than 7, then ASSERT().\r |
| 1284 | If EndBit is greater than 7, then ASSERT().\r |
| 1285 | If EndBit is less than StartBit, then ASSERT().\r |
| 1286 | \r |
| 1287 | @param Address MMIO register to write.\r |
| 1288 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1289 | Range 0..7.\r |
| 1290 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1291 | Range 0..7.\r |
| 1292 | @param Value New value of the bit field.\r |
| 1293 | \r |
| 1294 | @return The value written back to the MMIO register.\r |
| 1295 | \r |
| 1296 | **/\r |
| 1297 | UINT8\r |
| 1298 | EFIAPI\r |
| 1299 | MmioBitFieldWrite8 (\r |
| 1300 | IN UINTN Address,\r |
| 1301 | IN UINTN StartBit,\r |
| 1302 | IN UINTN EndBit,\r |
| 1303 | IN UINT8 Value\r |
| 1304 | )\r |
| 1305 | {\r |
| 1306 | return MmioWrite8 (\r |
| 1307 | Address,\r |
| 1308 | BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r |
| 1309 | );\r |
| 1310 | }\r |
| 1311 | \r |
| 1312 | /**\r |
| 1313 | Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r |
| 1314 | writes the result back to the bit field in the 8-bit MMIO register.\r |
| 1315 | \r |
| 1316 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 1317 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1318 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1319 | written to the MMIO register is returned. This function must guarantee that\r |
| 1320 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1321 | are stripped.\r |
| 1322 | \r |
| 1323 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1324 | If StartBit is greater than 7, then ASSERT().\r |
| 1325 | If EndBit is greater than 7, then ASSERT().\r |
| 1326 | If EndBit is less than StartBit, then ASSERT().\r |
| 1327 | \r |
| 1328 | @param Address MMIO register to write.\r |
| 1329 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1330 | Range 0..7.\r |
| 1331 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1332 | Range 0..7.\r |
| 1333 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1334 | \r |
| 1335 | @return The value written back to the MMIO register.\r |
| 1336 | \r |
| 1337 | **/\r |
| 1338 | UINT8\r |
| 1339 | EFIAPI\r |
| 1340 | MmioBitFieldOr8 (\r |
| 1341 | IN UINTN Address,\r |
| 1342 | IN UINTN StartBit,\r |
| 1343 | IN UINTN EndBit,\r |
| 1344 | IN UINT8 OrData\r |
| 1345 | )\r |
| 1346 | {\r |
| 1347 | return MmioWrite8 (\r |
| 1348 | Address,\r |
| 1349 | BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r |
| 1350 | );\r |
| 1351 | }\r |
| 1352 | \r |
| 1353 | /**\r |
| 1354 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r |
| 1355 | writes the result back to the bit field in the 8-bit MMIO register.\r |
| 1356 | \r |
| 1357 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1358 | between the read result and the value specified by AndData, and writes the\r |
| 1359 | result to the 8-bit MMIO register specified by Address. The value written to\r |
| 1360 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1361 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1362 | stripped.\r |
| 1363 | \r |
| 1364 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1365 | If StartBit is greater than 7, then ASSERT().\r |
| 1366 | If EndBit is greater than 7, then ASSERT().\r |
| 1367 | If EndBit is less than StartBit, then ASSERT().\r |
| 1368 | \r |
| 1369 | @param Address MMIO register to write.\r |
| 1370 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1371 | Range 0..7.\r |
| 1372 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1373 | Range 0..7.\r |
| 1374 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1375 | \r |
| 1376 | @return The value written back to the MMIO register.\r |
| 1377 | \r |
| 1378 | **/\r |
| 1379 | UINT8\r |
| 1380 | EFIAPI\r |
| 1381 | MmioBitFieldAnd8 (\r |
| 1382 | IN UINTN Address,\r |
| 1383 | IN UINTN StartBit,\r |
| 1384 | IN UINTN EndBit,\r |
| 1385 | IN UINT8 AndData\r |
| 1386 | )\r |
| 1387 | {\r |
| 1388 | return MmioWrite8 (\r |
| 1389 | Address,\r |
| 1390 | BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r |
| 1391 | );\r |
| 1392 | }\r |
| 1393 | \r |
| 1394 | /**\r |
| 1395 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r |
| 1396 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1397 | 8-bit MMIO register.\r |
| 1398 | \r |
| 1399 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1400 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1401 | specified by AndData, and writes the result to the 8-bit MMIO register\r |
| 1402 | specified by Address. The value written to the MMIO register is returned.\r |
| 1403 | This function must guarantee that all MMIO read and write operations are\r |
| 1404 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1405 | \r |
| 1406 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| 1407 | If StartBit is greater than 7, then ASSERT().\r |
| 1408 | If EndBit is greater than 7, then ASSERT().\r |
| 1409 | If EndBit is less than StartBit, then ASSERT().\r |
| 1410 | \r |
| 1411 | @param Address MMIO register to write.\r |
| 1412 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1413 | Range 0..7.\r |
| 1414 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1415 | Range 0..7.\r |
| 1416 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1417 | @param OrData The value to OR with the result of the AND operation.\r |
| 1418 | \r |
| 1419 | @return The value written back to the MMIO register.\r |
| 1420 | \r |
| 1421 | **/\r |
| 1422 | UINT8\r |
| 1423 | EFIAPI\r |
| 1424 | MmioBitFieldAndThenOr8 (\r |
| 1425 | IN UINTN Address,\r |
| 1426 | IN UINTN StartBit,\r |
| 1427 | IN UINTN EndBit,\r |
| 1428 | IN UINT8 AndData,\r |
| 1429 | IN UINT8 OrData\r |
| 1430 | )\r |
| 1431 | {\r |
| 1432 | return MmioWrite8 (\r |
| 1433 | Address,\r |
| 1434 | BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1435 | );\r |
| 1436 | }\r |
| 1437 | \r |
| 1438 | /**\r |
| 1439 | Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1440 | result back to the 16-bit MMIO register.\r |
| 1441 | \r |
| 1442 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 1443 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1444 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1445 | written to the MMIO register is returned. This function must guarantee that\r |
| 1446 | all MMIO read and write operations are serialized.\r |
| 1447 | \r |
| 1448 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1449 | \r |
| 1450 | @param Address The MMIO register to write.\r |
| 1451 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1452 | \r |
| 1453 | @return The value written back to the MMIO register.\r |
| 1454 | \r |
| 1455 | **/\r |
| 1456 | UINT16\r |
| 1457 | EFIAPI\r |
| 1458 | MmioOr16 (\r |
| 1459 | IN UINTN Address,\r |
| 1460 | IN UINT16 OrData\r |
| 1461 | )\r |
| 1462 | {\r |
| 1463 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));\r |
| 1464 | }\r |
| 1465 | \r |
| 1466 | /**\r |
| 1467 | Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1468 | back to the 16-bit MMIO register.\r |
| 1469 | \r |
| 1470 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1471 | between the read result and the value specified by AndData, and writes the\r |
| 1472 | result to the 16-bit MMIO register specified by Address. The value written to\r |
| 1473 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1474 | read and write operations are serialized.\r |
| 1475 | \r |
| 1476 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1477 | \r |
| 1478 | @param Address The MMIO register to write.\r |
| 1479 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1480 | \r |
| 1481 | @return The value written back to the MMIO register.\r |
| 1482 | \r |
| 1483 | **/\r |
| 1484 | UINT16\r |
| 1485 | EFIAPI\r |
| 1486 | MmioAnd16 (\r |
| 1487 | IN UINTN Address,\r |
| 1488 | IN UINT16 AndData\r |
| 1489 | )\r |
| 1490 | {\r |
| 1491 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));\r |
| 1492 | }\r |
| 1493 | \r |
| 1494 | /**\r |
| 1495 | Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1496 | inclusive OR, and writes the result back to the 16-bit MMIO register.\r |
| 1497 | \r |
| 1498 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1499 | between the read result and the value specified by AndData, performs a\r |
| 1500 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1501 | OrData, and writes the result to the 16-bit MMIO register specified by\r |
| 1502 | Address. The value written to the MMIO register is returned. This function\r |
| 1503 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1504 | \r |
| 1505 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1506 | \r |
| 1507 | \r |
| 1508 | @param Address The MMIO register to write.\r |
| 1509 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1510 | @param OrData The value to OR with the result of the AND operation.\r |
| 1511 | \r |
| 1512 | @return The value written back to the MMIO register.\r |
| 1513 | \r |
| 1514 | **/\r |
| 1515 | UINT16\r |
| 1516 | EFIAPI\r |
| 1517 | MmioAndThenOr16 (\r |
| 1518 | IN UINTN Address,\r |
| 1519 | IN UINT16 AndData,\r |
| 1520 | IN UINT16 OrData\r |
| 1521 | )\r |
| 1522 | {\r |
| 1523 | return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));\r |
| 1524 | }\r |
| 1525 | \r |
| 1526 | /**\r |
| 1527 | Reads a bit field of a MMIO register.\r |
| 1528 | \r |
| 1529 | Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r |
| 1530 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1531 | \r |
| 1532 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1533 | If StartBit is greater than 15, then ASSERT().\r |
| 1534 | If EndBit is greater than 15, then ASSERT().\r |
| 1535 | If EndBit is less than StartBit, then ASSERT().\r |
| 1536 | \r |
| 1537 | @param Address MMIO register to read.\r |
| 1538 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1539 | Range 0..15.\r |
| 1540 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1541 | Range 0..15.\r |
| 1542 | \r |
| 1543 | @return The value read.\r |
| 1544 | \r |
| 1545 | **/\r |
| 1546 | UINT16\r |
| 1547 | EFIAPI\r |
| 1548 | MmioBitFieldRead16 (\r |
| 1549 | IN UINTN Address,\r |
| 1550 | IN UINTN StartBit,\r |
| 1551 | IN UINTN EndBit\r |
| 1552 | )\r |
| 1553 | {\r |
| 1554 | return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r |
| 1555 | }\r |
| 1556 | \r |
| 1557 | /**\r |
| 1558 | Writes a bit field to a MMIO register.\r |
| 1559 | \r |
| 1560 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1561 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1562 | MMIO register are preserved. The new value of the 16-bit register is returned.\r |
| 1563 | \r |
| 1564 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1565 | If StartBit is greater than 15, then ASSERT().\r |
| 1566 | If EndBit is greater than 15, then ASSERT().\r |
| 1567 | If EndBit is less than StartBit, then ASSERT().\r |
| 1568 | \r |
| 1569 | @param Address MMIO register to write.\r |
| 1570 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1571 | Range 0..15.\r |
| 1572 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1573 | Range 0..15.\r |
| 1574 | @param Value New value of the bit field.\r |
| 1575 | \r |
| 1576 | @return The value written back to the MMIO register.\r |
| 1577 | \r |
| 1578 | **/\r |
| 1579 | UINT16\r |
| 1580 | EFIAPI\r |
| 1581 | MmioBitFieldWrite16 (\r |
| 1582 | IN UINTN Address,\r |
| 1583 | IN UINTN StartBit,\r |
| 1584 | IN UINTN EndBit,\r |
| 1585 | IN UINT16 Value\r |
| 1586 | )\r |
| 1587 | {\r |
| 1588 | return MmioWrite16 (\r |
| 1589 | Address,\r |
| 1590 | BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r |
| 1591 | );\r |
| 1592 | }\r |
| 1593 | \r |
| 1594 | /**\r |
| 1595 | Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r |
| 1596 | writes the result back to the bit field in the 16-bit MMIO register.\r |
| 1597 | \r |
| 1598 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 1599 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1600 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1601 | written to the MMIO register is returned. This function must guarantee that\r |
| 1602 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1603 | are stripped.\r |
| 1604 | \r |
| 1605 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1606 | If StartBit is greater than 15, then ASSERT().\r |
| 1607 | If EndBit is greater than 15, then ASSERT().\r |
| 1608 | If EndBit is less than StartBit, then ASSERT().\r |
| 1609 | \r |
| 1610 | @param Address MMIO register to write.\r |
| 1611 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1612 | Range 0..15.\r |
| 1613 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1614 | Range 0..15.\r |
| 1615 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1616 | \r |
| 1617 | @return The value written back to the MMIO register.\r |
| 1618 | \r |
| 1619 | **/\r |
| 1620 | UINT16\r |
| 1621 | EFIAPI\r |
| 1622 | MmioBitFieldOr16 (\r |
| 1623 | IN UINTN Address,\r |
| 1624 | IN UINTN StartBit,\r |
| 1625 | IN UINTN EndBit,\r |
| 1626 | IN UINT16 OrData\r |
| 1627 | )\r |
| 1628 | {\r |
| 1629 | return MmioWrite16 (\r |
| 1630 | Address,\r |
| 1631 | BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r |
| 1632 | );\r |
| 1633 | }\r |
| 1634 | \r |
| 1635 | /**\r |
| 1636 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r |
| 1637 | writes the result back to the bit field in the 16-bit MMIO register.\r |
| 1638 | \r |
| 1639 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1640 | between the read result and the value specified by AndData, and writes the\r |
| 1641 | result to the 16-bit MMIO register specified by Address. The value written to\r |
| 1642 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1643 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1644 | stripped.\r |
| 1645 | \r |
| 1646 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1647 | If StartBit is greater than 15, then ASSERT().\r |
| 1648 | If EndBit is greater than 15, then ASSERT().\r |
| 1649 | If EndBit is less than StartBit, then ASSERT().\r |
| 1650 | \r |
| 1651 | @param Address MMIO register to write.\r |
| 1652 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1653 | Range 0..15.\r |
| 1654 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1655 | Range 0..15.\r |
| 1656 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1657 | \r |
| 1658 | @return The value written back to the MMIO register.\r |
| 1659 | \r |
| 1660 | **/\r |
| 1661 | UINT16\r |
| 1662 | EFIAPI\r |
| 1663 | MmioBitFieldAnd16 (\r |
| 1664 | IN UINTN Address,\r |
| 1665 | IN UINTN StartBit,\r |
| 1666 | IN UINTN EndBit,\r |
| 1667 | IN UINT16 AndData\r |
| 1668 | )\r |
| 1669 | {\r |
| 1670 | return MmioWrite16 (\r |
| 1671 | Address,\r |
| 1672 | BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r |
| 1673 | );\r |
| 1674 | }\r |
| 1675 | \r |
| 1676 | /**\r |
| 1677 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r |
| 1678 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1679 | 16-bit MMIO register.\r |
| 1680 | \r |
| 1681 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1682 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1683 | specified by AndData, and writes the result to the 16-bit MMIO register\r |
| 1684 | specified by Address. The value written to the MMIO register is returned.\r |
| 1685 | This function must guarantee that all MMIO read and write operations are\r |
| 1686 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1687 | \r |
| 1688 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| 1689 | If StartBit is greater than 15, then ASSERT().\r |
| 1690 | If EndBit is greater than 15, then ASSERT().\r |
| 1691 | If EndBit is less than StartBit, then ASSERT().\r |
| 1692 | \r |
| 1693 | @param Address MMIO register to write.\r |
| 1694 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1695 | Range 0..15.\r |
| 1696 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1697 | Range 0..15.\r |
| 1698 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1699 | @param OrData The value to OR with the result of the AND operation.\r |
| 1700 | \r |
| 1701 | @return The value written back to the MMIO register.\r |
| 1702 | \r |
| 1703 | **/\r |
| 1704 | UINT16\r |
| 1705 | EFIAPI\r |
| 1706 | MmioBitFieldAndThenOr16 (\r |
| 1707 | IN UINTN Address,\r |
| 1708 | IN UINTN StartBit,\r |
| 1709 | IN UINTN EndBit,\r |
| 1710 | IN UINT16 AndData,\r |
| 1711 | IN UINT16 OrData\r |
| 1712 | )\r |
| 1713 | {\r |
| 1714 | return MmioWrite16 (\r |
| 1715 | Address,\r |
| 1716 | BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1717 | );\r |
| 1718 | }\r |
| 1719 | \r |
| 1720 | /**\r |
| 1721 | Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 1722 | result back to the 32-bit MMIO register.\r |
| 1723 | \r |
| 1724 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 1725 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1726 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1727 | written to the MMIO register is returned. This function must guarantee that\r |
| 1728 | all MMIO read and write operations are serialized.\r |
| 1729 | \r |
| 1730 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1731 | \r |
| 1732 | @param Address The MMIO register to write.\r |
| 1733 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 1734 | \r |
| 1735 | @return The value written back to the MMIO register.\r |
| 1736 | \r |
| 1737 | **/\r |
| 1738 | UINT32\r |
| 1739 | EFIAPI\r |
| 1740 | MmioOr32 (\r |
| 1741 | IN UINTN Address,\r |
| 1742 | IN UINT32 OrData\r |
| 1743 | )\r |
| 1744 | {\r |
| 1745 | return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r |
| 1746 | }\r |
| 1747 | \r |
| 1748 | /**\r |
| 1749 | Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 1750 | back to the 32-bit MMIO register.\r |
| 1751 | \r |
| 1752 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1753 | between the read result and the value specified by AndData, and writes the\r |
| 1754 | result to the 32-bit MMIO register specified by Address. The value written to\r |
| 1755 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1756 | read and write operations are serialized.\r |
| 1757 | \r |
| 1758 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1759 | \r |
| 1760 | @param Address The MMIO register to write.\r |
| 1761 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1762 | \r |
| 1763 | @return The value written back to the MMIO register.\r |
| 1764 | \r |
| 1765 | **/\r |
| 1766 | UINT32\r |
| 1767 | EFIAPI\r |
| 1768 | MmioAnd32 (\r |
| 1769 | IN UINTN Address,\r |
| 1770 | IN UINT32 AndData\r |
| 1771 | )\r |
| 1772 | {\r |
| 1773 | return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r |
| 1774 | }\r |
| 1775 | \r |
| 1776 | /**\r |
| 1777 | Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 1778 | inclusive OR, and writes the result back to the 32-bit MMIO register.\r |
| 1779 | \r |
| 1780 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1781 | between the read result and the value specified by AndData, performs a\r |
| 1782 | bitwise OR between the result of the AND operation and the value specified by\r |
| 1783 | OrData, and writes the result to the 32-bit MMIO register specified by\r |
| 1784 | Address. The value written to the MMIO register is returned. This function\r |
| 1785 | must guarantee that all MMIO read and write operations are serialized.\r |
| 1786 | \r |
| 1787 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1788 | \r |
| 1789 | \r |
| 1790 | @param Address The MMIO register to write.\r |
| 1791 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 1792 | @param OrData The value to OR with the result of the AND operation.\r |
| 1793 | \r |
| 1794 | @return The value written back to the MMIO register.\r |
| 1795 | \r |
| 1796 | **/\r |
| 1797 | UINT32\r |
| 1798 | EFIAPI\r |
| 1799 | MmioAndThenOr32 (\r |
| 1800 | IN UINTN Address,\r |
| 1801 | IN UINT32 AndData,\r |
| 1802 | IN UINT32 OrData\r |
| 1803 | )\r |
| 1804 | {\r |
| 1805 | return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r |
| 1806 | }\r |
| 1807 | \r |
| 1808 | /**\r |
| 1809 | Reads a bit field of a MMIO register.\r |
| 1810 | \r |
| 1811 | Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r |
| 1812 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 1813 | \r |
| 1814 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1815 | If StartBit is greater than 31, then ASSERT().\r |
| 1816 | If EndBit is greater than 31, then ASSERT().\r |
| 1817 | If EndBit is less than StartBit, then ASSERT().\r |
| 1818 | \r |
| 1819 | @param Address MMIO register to read.\r |
| 1820 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1821 | Range 0..31.\r |
| 1822 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1823 | Range 0..31.\r |
| 1824 | \r |
| 1825 | @return The value read.\r |
| 1826 | \r |
| 1827 | **/\r |
| 1828 | UINT32\r |
| 1829 | EFIAPI\r |
| 1830 | MmioBitFieldRead32 (\r |
| 1831 | IN UINTN Address,\r |
| 1832 | IN UINTN StartBit,\r |
| 1833 | IN UINTN EndBit\r |
| 1834 | )\r |
| 1835 | {\r |
| 1836 | return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r |
| 1837 | }\r |
| 1838 | \r |
| 1839 | /**\r |
| 1840 | Writes a bit field to a MMIO register.\r |
| 1841 | \r |
| 1842 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 1843 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 1844 | MMIO register are preserved. The new value of the 32-bit register is returned.\r |
| 1845 | \r |
| 1846 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1847 | If StartBit is greater than 31, then ASSERT().\r |
| 1848 | If EndBit is greater than 31, then ASSERT().\r |
| 1849 | If EndBit is less than StartBit, then ASSERT().\r |
| 1850 | \r |
| 1851 | @param Address MMIO register to write.\r |
| 1852 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1853 | Range 0..31.\r |
| 1854 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1855 | Range 0..31.\r |
| 1856 | @param Value New value of the bit field.\r |
| 1857 | \r |
| 1858 | @return The value written back to the MMIO register.\r |
| 1859 | \r |
| 1860 | **/\r |
| 1861 | UINT32\r |
| 1862 | EFIAPI\r |
| 1863 | MmioBitFieldWrite32 (\r |
| 1864 | IN UINTN Address,\r |
| 1865 | IN UINTN StartBit,\r |
| 1866 | IN UINTN EndBit,\r |
| 1867 | IN UINT32 Value\r |
| 1868 | )\r |
| 1869 | {\r |
| 1870 | return MmioWrite32 (\r |
| 1871 | Address,\r |
| 1872 | BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r |
| 1873 | );\r |
| 1874 | }\r |
| 1875 | \r |
| 1876 | /**\r |
| 1877 | Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r |
| 1878 | writes the result back to the bit field in the 32-bit MMIO register.\r |
| 1879 | \r |
| 1880 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 1881 | inclusive OR between the read result and the value specified by OrData, and\r |
| 1882 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1883 | written to the MMIO register is returned. This function must guarantee that\r |
| 1884 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 1885 | are stripped.\r |
| 1886 | \r |
| 1887 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1888 | If StartBit is greater than 31, then ASSERT().\r |
| 1889 | If EndBit is greater than 31, then ASSERT().\r |
| 1890 | If EndBit is less than StartBit, then ASSERT().\r |
| 1891 | \r |
| 1892 | @param Address MMIO register to write.\r |
| 1893 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1894 | Range 0..31.\r |
| 1895 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1896 | Range 0..31.\r |
| 1897 | @param OrData The value to OR with read value from the MMIO register.\r |
| 1898 | \r |
| 1899 | @return The value written back to the MMIO register.\r |
| 1900 | \r |
| 1901 | **/\r |
| 1902 | UINT32\r |
| 1903 | EFIAPI\r |
| 1904 | MmioBitFieldOr32 (\r |
| 1905 | IN UINTN Address,\r |
| 1906 | IN UINTN StartBit,\r |
| 1907 | IN UINTN EndBit,\r |
| 1908 | IN UINT32 OrData\r |
| 1909 | )\r |
| 1910 | {\r |
| 1911 | return MmioWrite32 (\r |
| 1912 | Address,\r |
| 1913 | BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r |
| 1914 | );\r |
| 1915 | }\r |
| 1916 | \r |
| 1917 | /**\r |
| 1918 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r |
| 1919 | writes the result back to the bit field in the 32-bit MMIO register.\r |
| 1920 | \r |
| 1921 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1922 | between the read result and the value specified by AndData, and writes the\r |
| 1923 | result to the 32-bit MMIO register specified by Address. The value written to\r |
| 1924 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 1925 | read and write operations are serialized. Extra left bits in AndData are\r |
| 1926 | stripped.\r |
| 1927 | \r |
| 1928 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1929 | If StartBit is greater than 31, then ASSERT().\r |
| 1930 | If EndBit is greater than 31, then ASSERT().\r |
| 1931 | If EndBit is less than StartBit, then ASSERT().\r |
| 1932 | \r |
| 1933 | @param Address MMIO register to write.\r |
| 1934 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1935 | Range 0..31.\r |
| 1936 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1937 | Range 0..31.\r |
| 1938 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1939 | \r |
| 1940 | @return The value written back to the MMIO register.\r |
| 1941 | \r |
| 1942 | **/\r |
| 1943 | UINT32\r |
| 1944 | EFIAPI\r |
| 1945 | MmioBitFieldAnd32 (\r |
| 1946 | IN UINTN Address,\r |
| 1947 | IN UINTN StartBit,\r |
| 1948 | IN UINTN EndBit,\r |
| 1949 | IN UINT32 AndData\r |
| 1950 | )\r |
| 1951 | {\r |
| 1952 | return MmioWrite32 (\r |
| 1953 | Address,\r |
| 1954 | BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r |
| 1955 | );\r |
| 1956 | }\r |
| 1957 | \r |
| 1958 | /**\r |
| 1959 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r |
| 1960 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 1961 | 32-bit MMIO register.\r |
| 1962 | \r |
| 1963 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r |
| 1964 | followed by a bitwise inclusive OR between the read result and the value\r |
| 1965 | specified by AndData, and writes the result to the 32-bit MMIO register\r |
| 1966 | specified by Address. The value written to the MMIO register is returned.\r |
| 1967 | This function must guarantee that all MMIO read and write operations are\r |
| 1968 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 1969 | \r |
| 1970 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| 1971 | If StartBit is greater than 31, then ASSERT().\r |
| 1972 | If EndBit is greater than 31, then ASSERT().\r |
| 1973 | If EndBit is less than StartBit, then ASSERT().\r |
| 1974 | \r |
| 1975 | @param Address MMIO register to write.\r |
| 1976 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1977 | Range 0..31.\r |
| 1978 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 1979 | Range 0..31.\r |
| 1980 | @param AndData The value to AND with read value from the MMIO register.\r |
| 1981 | @param OrData The value to OR with the result of the AND operation.\r |
| 1982 | \r |
| 1983 | @return The value written back to the MMIO register.\r |
| 1984 | \r |
| 1985 | **/\r |
| 1986 | UINT32\r |
| 1987 | EFIAPI\r |
| 1988 | MmioBitFieldAndThenOr32 (\r |
| 1989 | IN UINTN Address,\r |
| 1990 | IN UINTN StartBit,\r |
| 1991 | IN UINTN EndBit,\r |
| 1992 | IN UINT32 AndData,\r |
| 1993 | IN UINT32 OrData\r |
| 1994 | )\r |
| 1995 | {\r |
| 1996 | return MmioWrite32 (\r |
| 1997 | Address,\r |
| 1998 | BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r |
| 1999 | );\r |
| 2000 | }\r |
| 2001 | \r |
| 2002 | /**\r |
| 2003 | Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r |
| 2004 | result back to the 64-bit MMIO register.\r |
| 2005 | \r |
| 2006 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 2007 | inclusive OR between the read result and the value specified by OrData, and\r |
| 2008 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2009 | written to the MMIO register is returned. This function must guarantee that\r |
| 2010 | all MMIO read and write operations are serialized.\r |
| 2011 | \r |
| 2012 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2013 | \r |
| 2014 | @param Address The MMIO register to write.\r |
| 2015 | @param OrData The value to OR with the read value from the MMIO register.\r |
| 2016 | \r |
| 2017 | @return The value written back to the MMIO register.\r |
| 2018 | \r |
| 2019 | **/\r |
| 2020 | UINT64\r |
| 2021 | EFIAPI\r |
| 2022 | MmioOr64 (\r |
| 2023 | IN UINTN Address,\r |
| 2024 | IN UINT64 OrData\r |
| 2025 | )\r |
| 2026 | {\r |
| 2027 | return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r |
| 2028 | }\r |
| 2029 | \r |
| 2030 | /**\r |
| 2031 | Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r |
| 2032 | back to the 64-bit MMIO register.\r |
| 2033 | \r |
| 2034 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2035 | between the read result and the value specified by AndData, and writes the\r |
| 2036 | result to the 64-bit MMIO register specified by Address. The value written to\r |
| 2037 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 2038 | read and write operations are serialized.\r |
| 2039 | \r |
| 2040 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2041 | \r |
| 2042 | @param Address The MMIO register to write.\r |
| 2043 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 2044 | \r |
| 2045 | @return The value written back to the MMIO register.\r |
| 2046 | \r |
| 2047 | **/\r |
| 2048 | UINT64\r |
| 2049 | EFIAPI\r |
| 2050 | MmioAnd64 (\r |
| 2051 | IN UINTN Address,\r |
| 2052 | IN UINT64 AndData\r |
| 2053 | )\r |
| 2054 | {\r |
| 2055 | return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r |
| 2056 | }\r |
| 2057 | \r |
| 2058 | /**\r |
| 2059 | Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 2060 | inclusive OR, and writes the result back to the 64-bit MMIO register.\r |
| 2061 | \r |
| 2062 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2063 | between the read result and the value specified by AndData, performs a\r |
| 2064 | bitwise OR between the result of the AND operation and the value specified by\r |
| 2065 | OrData, and writes the result to the 64-bit MMIO register specified by\r |
| 2066 | Address. The value written to the MMIO register is returned. This function\r |
| 2067 | must guarantee that all MMIO read and write operations are serialized.\r |
| 2068 | \r |
| 2069 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2070 | \r |
| 2071 | \r |
| 2072 | @param Address The MMIO register to write.\r |
| 2073 | @param AndData The value to AND with the read value from the MMIO register.\r |
| 2074 | @param OrData The value to OR with the result of the AND operation.\r |
| 2075 | \r |
| 2076 | @return The value written back to the MMIO register.\r |
| 2077 | \r |
| 2078 | **/\r |
| 2079 | UINT64\r |
| 2080 | EFIAPI\r |
| 2081 | MmioAndThenOr64 (\r |
| 2082 | IN UINTN Address,\r |
| 2083 | IN UINT64 AndData,\r |
| 2084 | IN UINT64 OrData\r |
| 2085 | )\r |
| 2086 | {\r |
| 2087 | return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r |
| 2088 | }\r |
| 2089 | \r |
| 2090 | /**\r |
| 2091 | Reads a bit field of a MMIO register.\r |
| 2092 | \r |
| 2093 | Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r |
| 2094 | the StartBit and the EndBit. The value of the bit field is returned.\r |
| 2095 | \r |
| 2096 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2097 | If StartBit is greater than 63, then ASSERT().\r |
| 2098 | If EndBit is greater than 63, then ASSERT().\r |
| 2099 | If EndBit is less than StartBit, then ASSERT().\r |
| 2100 | \r |
| 2101 | @param Address MMIO register to read.\r |
| 2102 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2103 | Range 0..63.\r |
| 2104 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2105 | Range 0..63.\r |
| 2106 | \r |
| 2107 | @return The value read.\r |
| 2108 | \r |
| 2109 | **/\r |
| 2110 | UINT64\r |
| 2111 | EFIAPI\r |
| 2112 | MmioBitFieldRead64 (\r |
| 2113 | IN UINTN Address,\r |
| 2114 | IN UINTN StartBit,\r |
| 2115 | IN UINTN EndBit\r |
| 2116 | )\r |
| 2117 | {\r |
| 2118 | return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r |
| 2119 | }\r |
| 2120 | \r |
| 2121 | /**\r |
| 2122 | Writes a bit field to a MMIO register.\r |
| 2123 | \r |
| 2124 | Writes Value to the bit field of the MMIO register. The bit field is\r |
| 2125 | specified by the StartBit and the EndBit. All other bits in the destination\r |
| 2126 | MMIO register are preserved. The new value of the 64-bit register is returned.\r |
| 2127 | \r |
| 2128 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2129 | If StartBit is greater than 63, then ASSERT().\r |
| 2130 | If EndBit is greater than 63, then ASSERT().\r |
| 2131 | If EndBit is less than StartBit, then ASSERT().\r |
| 2132 | \r |
| 2133 | @param Address MMIO register to write.\r |
| 2134 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2135 | Range 0..63.\r |
| 2136 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2137 | Range 0..63.\r |
| 2138 | @param Value New value of the bit field.\r |
| 2139 | \r |
| 2140 | @return The value written back to the MMIO register.\r |
| 2141 | \r |
| 2142 | **/\r |
| 2143 | UINT64\r |
| 2144 | EFIAPI\r |
| 2145 | MmioBitFieldWrite64 (\r |
| 2146 | IN UINTN Address,\r |
| 2147 | IN UINTN StartBit,\r |
| 2148 | IN UINTN EndBit,\r |
| 2149 | IN UINT64 Value\r |
| 2150 | )\r |
| 2151 | {\r |
| 2152 | return MmioWrite64 (\r |
| 2153 | Address,\r |
| 2154 | BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r |
| 2155 | );\r |
| 2156 | }\r |
| 2157 | \r |
| 2158 | /**\r |
| 2159 | Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r |
| 2160 | writes the result back to the bit field in the 64-bit MMIO register.\r |
| 2161 | \r |
| 2162 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 2163 | inclusive OR between the read result and the value specified by OrData, and\r |
| 2164 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2165 | written to the MMIO register is returned. This function must guarantee that\r |
| 2166 | all MMIO read and write operations are serialized. Extra left bits in OrData\r |
| 2167 | are stripped.\r |
| 2168 | \r |
| 2169 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2170 | If StartBit is greater than 63, then ASSERT().\r |
| 2171 | If EndBit is greater than 63, then ASSERT().\r |
| 2172 | If EndBit is less than StartBit, then ASSERT().\r |
| 2173 | \r |
| 2174 | @param Address MMIO register to write.\r |
| 2175 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2176 | Range 0..63.\r |
| 2177 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2178 | Range 0..63.\r |
| 2179 | @param OrData The value to OR with read value from the MMIO register.\r |
| 2180 | \r |
| 2181 | @return The value written back to the MMIO register.\r |
| 2182 | \r |
| 2183 | **/\r |
| 2184 | UINT64\r |
| 2185 | EFIAPI\r |
| 2186 | MmioBitFieldOr64 (\r |
| 2187 | IN UINTN Address,\r |
| 2188 | IN UINTN StartBit,\r |
| 2189 | IN UINTN EndBit,\r |
| 2190 | IN UINT64 OrData\r |
| 2191 | )\r |
| 2192 | {\r |
| 2193 | return MmioWrite64 (\r |
| 2194 | Address,\r |
| 2195 | BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r |
| 2196 | );\r |
| 2197 | }\r |
| 2198 | \r |
| 2199 | /**\r |
| 2200 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r |
| 2201 | writes the result back to the bit field in the 64-bit MMIO register.\r |
| 2202 | \r |
| 2203 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2204 | between the read result and the value specified by AndData, and writes the\r |
| 2205 | result to the 64-bit MMIO register specified by Address. The value written to\r |
| 2206 | the MMIO register is returned. This function must guarantee that all MMIO\r |
| 2207 | read and write operations are serialized. Extra left bits in AndData are\r |
| 2208 | stripped.\r |
| 2209 | \r |
| 2210 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2211 | If StartBit is greater than 63, then ASSERT().\r |
| 2212 | If EndBit is greater than 63, then ASSERT().\r |
| 2213 | If EndBit is less than StartBit, then ASSERT().\r |
| 2214 | \r |
| 2215 | @param Address MMIO register to write.\r |
| 2216 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2217 | Range 0..63.\r |
| 2218 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2219 | Range 0..63.\r |
| 2220 | @param AndData The value to AND with read value from the MMIO register.\r |
| 2221 | \r |
| 2222 | @return The value written back to the MMIO register.\r |
| 2223 | \r |
| 2224 | **/\r |
| 2225 | UINT64\r |
| 2226 | EFIAPI\r |
| 2227 | MmioBitFieldAnd64 (\r |
| 2228 | IN UINTN Address,\r |
| 2229 | IN UINTN StartBit,\r |
| 2230 | IN UINTN EndBit,\r |
| 2231 | IN UINT64 AndData\r |
| 2232 | )\r |
| 2233 | {\r |
| 2234 | return MmioWrite64 (\r |
| 2235 | Address,\r |
| 2236 | BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r |
| 2237 | );\r |
| 2238 | }\r |
| 2239 | \r |
| 2240 | /**\r |
| 2241 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r |
| 2242 | by a bitwise inclusive OR, and writes the result back to the bit field in the\r |
| 2243 | 64-bit MMIO register.\r |
| 2244 | \r |
| 2245 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r |
| 2246 | followed by a bitwise inclusive OR between the read result and the value\r |
| 2247 | specified by AndData, and writes the result to the 64-bit MMIO register\r |
| 2248 | specified by Address. The value written to the MMIO register is returned.\r |
| 2249 | This function must guarantee that all MMIO read and write operations are\r |
| 2250 | serialized. Extra left bits in both AndData and OrData are stripped.\r |
| 2251 | \r |
| 2252 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| 2253 | If StartBit is greater than 63, then ASSERT().\r |
| 2254 | If EndBit is greater than 63, then ASSERT().\r |
| 2255 | If EndBit is less than StartBit, then ASSERT().\r |
| 2256 | \r |
| 2257 | @param Address MMIO register to write.\r |
| 2258 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2259 | Range 0..63.\r |
| 2260 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
| 2261 | Range 0..63.\r |
| 2262 | @param AndData The value to AND with read value from the MMIO register.\r |
| 2263 | @param OrData The value to OR with the result of the AND operation.\r |
| 2264 | \r |
| 2265 | @return The value written back to the MMIO register.\r |
| 2266 | \r |
| 2267 | **/\r |
| 2268 | UINT64\r |
| 2269 | EFIAPI\r |
| 2270 | MmioBitFieldAndThenOr64 (\r |
| 2271 | IN UINTN Address,\r |
| 2272 | IN UINTN StartBit,\r |
| 2273 | IN UINTN EndBit,\r |
| 2274 | IN UINT64 AndData,\r |
| 2275 | IN UINT64 OrData\r |
| 2276 | )\r |
| 2277 | {\r |
| 2278 | return MmioWrite64 (\r |
| 2279 | Address,\r |
| 2280 | BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r |
| 2281 | );\r |
| 2282 | }\r |
projects / mirror_edk2.git / blame