]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Library/PeiSmbusLibSmbus2Ppi/SmbusLib.c
Minor grammatical work--mostly adding periods. Items with ONLY period added did...
[mirror_edk2.git] / MdePkg / Library / PeiSmbusLibSmbus2Ppi / SmbusLib.c
CommitLineData
dd51a993 1/** @file\r
2Implementation of SmBusLib class library for PEI phase.\r
3\r
19388d29
HT
4Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
5This program and the accompanying materials\r
bad46384 6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
dd51a993 12\r
13\r
dd51a993 14**/\r
15\r
dd51a993 16#include "InternalSmbusLib.h"\r
17\r
18/**\r
19 Executes an SMBUS quick read command.\r
20\r
21 Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r
22 Only the SMBUS slave address field of SmBusAddress is required.\r
23 If Status is not NULL, then the status of the executed command is returned in Status.\r
24 If PEC is set in SmBusAddress, then ASSERT().\r
25 If Command in SmBusAddress is not zero, then ASSERT().\r
26 If Length in SmBusAddress is not zero, then ASSERT().\r
27 If any reserved bits of SmBusAddress are set, then ASSERT().\r
28\r
2fc59a00 29 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 30 SMBUS Command, SMBUS Data Length, and PEC.\r
31 @param Status Return status for the executed command.\r
32 This is an optional parameter and may be NULL.\r
58380e9c 33 RETURN_SUCCESS: The SMBUS command was executed.\r
34 RETURN_TIMEOUT: A timeout occurred while executing the \r
35 SMBUS command.\r
36 RETURN_DEVICE_ERROR: The request was not completed because \r
37 a failure reflected in the Host Status Register bit. \r
38 Device errors are a result of a transaction collision, \r
39 illegal command field, unclaimed cycle\r
71871514 40 (host initiated), or bus errors (collisions).\r
58380e9c 41 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 42\r
43**/\r
44VOID\r
45EFIAPI\r
46SmBusQuickRead (\r
47 IN UINTN SmBusAddress,\r
48 OUT RETURN_STATUS *Status OPTIONAL\r
49 )\r
50{\r
51 ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r
52 ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
53 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 54 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 55\r
56 InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);\r
57}\r
58\r
59/**\r
60 Executes an SMBUS quick write command.\r
61\r
62 Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r
63 Only the SMBUS slave address field of SmBusAddress is required.\r
64 If Status is not NULL, then the status of the executed command is returned in Status.\r
65 If PEC is set in SmBusAddress, then ASSERT().\r
66 If Command in SmBusAddress is not zero, then ASSERT().\r
67 If Length in SmBusAddress is not zero, then ASSERT().\r
68 If any reserved bits of SmBusAddress are set, then ASSERT().\r
69\r
2fc59a00 70 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 71 SMBUS Command, SMBUS Data Length, and PEC.\r
72 @param Status Return status for the executed command.\r
73 This is an optional parameter and may be NULL.\r
58380e9c 74 RETURN_SUCCESS: The SMBUS command was executed.\r
75 RETURN_TIMEOUT: A timeout occurred while executing the \r
76 SMBUS command.\r
77 RETURN_DEVICE_ERROR: The request was not completed because \r
78 a failure reflected in the Host Status Register bit. Device \r
79 errors are a result of a transaction collision, illegal \r
80 command field, unclaimed cycle (host initiated), or bus \r
81 errors (collisions).\r
82 RETURN_UNSUPPORTED:: The SMBus operation is not supported.\r
dd51a993 83\r
84**/\r
85VOID\r
86EFIAPI\r
87SmBusQuickWrite (\r
88 IN UINTN SmBusAddress,\r
89 OUT RETURN_STATUS *Status OPTIONAL\r
90 )\r
91{\r
92 ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r
93 ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
94 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 95 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 96\r
97 InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);\r
98}\r
99\r
100/**\r
101 Executes an SMBUS receive byte command.\r
102\r
103 Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r
104 Only the SMBUS slave address field of SmBusAddress is required.\r
105 The byte received from the SMBUS is returned.\r
106 If Status is not NULL, then the status of the executed command is returned in Status.\r
107 If Command in SmBusAddress is not zero, then ASSERT().\r
108 If Length in SmBusAddress is not zero, then ASSERT().\r
109 If any reserved bits of SmBusAddress are set, then ASSERT().\r
110\r
2fc59a00 111 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 112 SMBUS Command, SMBUS Data Length, and PEC.\r
113 @param Status Return status for the executed command.\r
114 This is an optional parameter and may be NULL.\r
58380e9c 115 RETURN_SUCCESS: The SMBUS command was executed.\r
116 RETURN_TIMEOUT: A timeout occurred while executing the \r
117 SMBUS command.\r
118 RETURN_DEVICE_ERROR: The request was not completed because \r
119 a failure reflected in the Host Status Register bit. \r
120 Device errors are a result of a transaction collision, \r
121 illegal command field, unclaimed cycle (host initiated),\r
122 or bus errors (collisions).\r
123 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
124 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 125\r
126 @return The byte received from the SMBUS.\r
127\r
128**/\r
129UINT8\r
130EFIAPI\r
131SmBusReceiveByte (\r
132 IN UINTN SmBusAddress,\r
133 OUT RETURN_STATUS *Status OPTIONAL\r
134 )\r
135{\r
136 UINT8 Byte;\r
137\r
138 ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
139 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 140 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 141\r
142 InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);\r
143\r
144 return Byte;\r
145}\r
146\r
147/**\r
148 Executes an SMBUS send byte command.\r
149\r
150 Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r
151 The byte specified by Value is sent.\r
152 Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r
153 If Status is not NULL, then the status of the executed command is returned in Status.\r
154 If Command in SmBusAddress is not zero, then ASSERT().\r
155 If Length in SmBusAddress is not zero, then ASSERT().\r
156 If any reserved bits of SmBusAddress are set, then ASSERT().\r
157\r
2fc59a00 158 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 159 SMBUS Command, SMBUS Data Length, and PEC.\r
160 @param Value The 8-bit value to send.\r
161 @param Status Return status for the executed command.\r
162 This is an optional parameter and may be NULL.\r
58380e9c 163 RETURN_SUCCESS: The SMBUS command was executed.\r
164 RETURN_TIMEOUT: A timeout occurred while executing the \r
165 SMBUS command.\r
166 RETURN_DEVICE_ERROR: The request was not completed because \r
167 a failure reflected in the Host Status Register bit. Device \r
168 errors are a result of a transaction collision, illegal \r
169 command field, unclaimed cycle (host initiated), or bus \r
170 errors (collisions).\r
171 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
172 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 173\r
174 @return The parameter of Value.\r
175\r
176**/\r
177UINT8\r
178EFIAPI\r
179SmBusSendByte (\r
180 IN UINTN SmBusAddress,\r
181 IN UINT8 Value,\r
182 OUT RETURN_STATUS *Status OPTIONAL\r
183 )\r
184{\r
185 UINT8 Byte;\r
186\r
187 ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
188 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 189 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 190\r
191 Byte = Value;\r
192 InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);\r
193\r
194 return Value;\r
195}\r
196\r
197/**\r
198 Executes an SMBUS read data byte command.\r
199\r
200 Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r
201 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
202 The 8-bit value read from the SMBUS is returned.\r
203 If Status is not NULL, then the status of the executed command is returned in Status.\r
204 If Length in SmBusAddress is not zero, then ASSERT().\r
205 If any reserved bits of SmBusAddress are set, then ASSERT().\r
206\r
2fc59a00 207 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
dd51a993 208 SMBUS Command, SMBUS Data Length, and PEC.\r
71871514 209 @param Status Return status for the executed command.\r
210 This is an optional parameter and may be NULL.\r
58380e9c 211 RETURN_SUCCESS: The SMBUS command was executed.\r
212 RETURN_TIMEOUT: A timeout occurred while executing the \r
213 SMBUS command.\r
214 RETURN_DEVICE_ERROR: The request was not completed because \r
215 a failure reflected in the Host Status Register bit. \r
216 Device errors are a result of a transaction collision, \r
217 illegal command field, unclaimed cycle (host initiated),\r
218 or bus errors (collisions).\r
219 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
220 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 221\r
222 @return The byte read from the SMBUS.\r
223\r
224**/\r
225UINT8\r
226EFIAPI\r
227SmBusReadDataByte (\r
228 IN UINTN SmBusAddress,\r
229 OUT RETURN_STATUS *Status OPTIONAL\r
230 )\r
231{\r
232 UINT8 Byte;\r
233\r
234 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 235 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 236\r
237 InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);\r
bad46384 238\r
dd51a993 239 return Byte;\r
240}\r
241\r
242/**\r
243 Executes an SMBUS write data byte command.\r
244\r
245 Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r
246 The 8-bit value specified by Value is written.\r
247 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
248 Value is returned.\r
249 If Status is not NULL, then the status of the executed command is returned in Status.\r
250 If Length in SmBusAddress is not zero, then ASSERT().\r
251 If any reserved bits of SmBusAddress are set, then ASSERT().\r
252\r
2fc59a00 253 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 254 SMBUS Command, SMBUS Data Length, and PEC.\r
255 @param Value The 8-bit value to write.\r
256 @param Status Return status for the executed command.\r
257 This is an optional parameter and may be NULL.\r
58380e9c 258 RETURN_SUCCESS: The SMBUS command was executed.\r
259 RETURN_TIMEOUT: A timeout occurred while executing the \r
260 SMBUS command.\r
261 RETURN_DEVICE_ERROR: The request was not completed because \r
262 a failure reflected in the Host Status Register bit. \r
263 Device errors are a result of a transaction collision, \r
264 illegal command field, unclaimed cycle (host initiated),\r
265 or bus errors (collisions).\r
266 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
267 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 268\r
269 @return The parameter of Value.\r
270\r
271**/\r
272UINT8\r
273EFIAPI\r
274SmBusWriteDataByte (\r
275 IN UINTN SmBusAddress,\r
276 IN UINT8 Value,\r
277 OUT RETURN_STATUS *Status OPTIONAL\r
278 )\r
279{\r
280 UINT8 Byte;\r
281\r
282 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 283 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 284\r
285 Byte = Value;\r
286 InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);\r
bad46384 287\r
dd51a993 288 return Value;\r
289}\r
290\r
291/**\r
292 Executes an SMBUS read data word command.\r
293\r
294 Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r
295 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
296 The 16-bit value read from the SMBUS is returned.\r
297 If Status is not NULL, then the status of the executed command is returned in Status.\r
298 If Length in SmBusAddress is not zero, then ASSERT().\r
299 If any reserved bits of SmBusAddress are set, then ASSERT().\r
71871514 300 \r
2fc59a00 301 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 302 SMBUS Command, SMBUS Data Length, and PEC.\r
303 @param Status Return status for the executed command.\r
304 This is an optional parameter and may be NULL.\r
58380e9c 305 RETURN_SUCCESS: The SMBUS command was executed.\r
306 RETURN_TIMEOUT: A timeout occurred while executing the \r
307 SMBUS command.\r
308 RETURN_DEVICE_ERROR: The request was not completed because \r
309 a failure reflected in the Host Status Register bit. \r
310 Device errors are a result of a transaction collision, \r
311 illegal command field, unclaimed cycle (host initiated),\r
312 or bus errors (collisions).\r
313 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
314 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 315\r
316 @return The byte read from the SMBUS.\r
317\r
318**/\r
319UINT16\r
320EFIAPI\r
321SmBusReadDataWord (\r
322 IN UINTN SmBusAddress,\r
323 OUT RETURN_STATUS *Status OPTIONAL\r
324 )\r
325{\r
326 UINT16 Word;\r
327\r
328 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 329 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 330\r
331 InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);\r
bad46384 332\r
dd51a993 333 return Word;\r
334}\r
335\r
336/**\r
337 Executes an SMBUS write data word command.\r
338\r
339 Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r
340 The 16-bit value specified by Value is written.\r
341 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
342 Value is returned.\r
343 If Status is not NULL, then the status of the executed command is returned in Status.\r
344 If Length in SmBusAddress is not zero, then ASSERT().\r
345 If any reserved bits of SmBusAddress are set, then ASSERT().\r
346\r
2fc59a00 347 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 348 SMBUS Command, SMBUS Data Length, and PEC.\r
349 @param Value The 16-bit value to write.\r
350 @param Status Return status for the executed command.\r
351 This is an optional parameter and may be NULL.\r
58380e9c 352 RETURN_SUCCESS: The SMBUS command was executed.\r
353 RETURN_TIMEOUT: A timeout occurred while executing the \r
354 SMBUS command.\r
355 RETURN_DEVICE_ERROR: The request was not completed because \r
356 a failure reflected in the Host Status Register bit. \r
357 Device errors are a result of a transaction collision, \r
358 illegal command field, unclaimed cycle (host initiated),\r
359 or bus errors (collisions).\r
360 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
361 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 362\r
363 @return The parameter of Value.\r
364\r
365**/\r
366UINT16\r
367EFIAPI\r
368SmBusWriteDataWord (\r
369 IN UINTN SmBusAddress,\r
370 IN UINT16 Value,\r
371 OUT RETURN_STATUS *Status OPTIONAL\r
372 )\r
373{\r
374 UINT16 Word;\r
375\r
376 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 377 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 378\r
379 Word = Value;\r
380 InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);\r
381\r
382 return Value;\r
383}\r
384\r
385/**\r
386 Executes an SMBUS process call command.\r
387\r
388 Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r
389 The 16-bit value specified by Value is written.\r
390 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
391 The 16-bit value returned by the process call command is returned.\r
392 If Status is not NULL, then the status of the executed command is returned in Status.\r
393 If Length in SmBusAddress is not zero, then ASSERT().\r
394 If any reserved bits of SmBusAddress are set, then ASSERT().\r
395\r
2fc59a00 396 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 397 SMBUS Command, SMBUS Data Length, and PEC.\r
398 @param Value The 16-bit value to write.\r
399 @param Status Return status for the executed command.\r
400 This is an optional parameter and may be NULL.\r
58380e9c 401 RETURN_SUCCESS: The SMBUS command was executed.\r
402 RETURN_TIMEOUT: A timeout occurred while executing the \r
403 SMBUS command.\r
404 RETURN_DEVICE_ERROR: The request was not completed because \r
405 a failure reflected in the Host Status Register bit. \r
406 Device errors are a result of a transaction collision, \r
407 illegal command field, unclaimed cycle (host initiated),\r
408 or bus errors (collisions).\r
409 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
410 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 411\r
412 @return The 16-bit value returned by the process call command.\r
413\r
414**/\r
415UINT16\r
416EFIAPI\r
417SmBusProcessCall (\r
418 IN UINTN SmBusAddress,\r
419 IN UINT16 Value,\r
420 OUT RETURN_STATUS *Status OPTIONAL\r
421 )\r
422{\r
423 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 424 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 425\r
426 InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);\r
bad46384 427\r
dd51a993 428 return Value;\r
429}\r
430\r
431/**\r
432 Executes an SMBUS read block command.\r
433\r
434 Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r
435 Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
436 Bytes are read from the SMBUS and stored in Buffer.\r
437 The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
438 If Status is not NULL, then the status of the executed command is returned in Status.\r
439 It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
440 SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
441 If Length in SmBusAddress is not zero, then ASSERT().\r
442 If Buffer is NULL, then ASSERT().\r
443 If any reserved bits of SmBusAddress are set, then ASSERT().\r
444\r
2fc59a00 445 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 446 SMBUS Command, SMBUS Data Length, and PEC.\r
2fc59a00 447 @param Buffer The pointer to the buffer to store the bytes read from the SMBUS.\r
71871514 448 @param Status Return status for the executed command.\r
449 This is an optional parameter and may be NULL.\r
58380e9c 450 RETURN_SUCCESS: The SMBUS command was executed.\r
451 RETURN_TIMEOUT: A timeout occurred while executing the \r
452 SMBUS command.\r
453 RETURN_DEVICE_ERROR: The request was not completed because \r
454 a failure reflected in the Host Status Register bit. \r
455 Device errors are a result of a transaction collision, \r
456 illegal command field, unclaimed cycle (host initiated), \r
457 or bus errors (collisions).\r
458 RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r
459 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 460\r
461 @return The number of bytes read.\r
462\r
463**/\r
464UINTN\r
465EFIAPI\r
466SmBusReadBlock (\r
467 IN UINTN SmBusAddress,\r
468 OUT VOID *Buffer,\r
469 OUT RETURN_STATUS *Status OPTIONAL\r
470 )\r
471{\r
472 ASSERT (Buffer != NULL);\r
473 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
2d8debe7 474 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 475\r
476 return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x20, Buffer, Status);\r
477}\r
478\r
479/**\r
480 Executes an SMBUS write block command.\r
481\r
482 Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r
483 The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
484 Bytes are written to the SMBUS from Buffer.\r
485 The number of bytes written is returned, and will never return a value larger than 32-bytes.\r
71871514 486 If Status is not NULL, then the status of the executed command is returned in Status. \r
dd51a993 487 If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
488 If Buffer is NULL, then ASSERT().\r
489 If any reserved bits of SmBusAddress are set, then ASSERT().\r
490\r
2fc59a00 491 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 492 MBUS Command, SMBUS Data Length, and PEC.\r
2fc59a00 493 @param Buffer The pointer to the buffer to store the bytes read from the SMBUS.\r
71871514 494 @param Status Return status for the executed command.\r
495 This is an optional parameter and may be NULL.\r
58380e9c 496 RETURN_TIMEOUT: A timeout occurred while executing the \r
497 SMBUS command.\r
498 RETURN_DEVICE_ERROR: The request was not completed because \r
499 a failure reflected in the Host Status Register bit. \r
500 Device errors are a result of a transaction collision, \r
501 illegal command field, unclaimed cycle (host initiated), \r
502 or bus errors (collisions).\r
503 RETURN_CRC_ERROR: The checksum is not correct (PEC is incorrect)\r
504 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 505\r
506 @return The number of bytes written.\r
507\r
508**/\r
509UINTN\r
510EFIAPI\r
511SmBusWriteBlock (\r
512 IN UINTN SmBusAddress,\r
513 OUT VOID *Buffer,\r
514 OUT RETURN_STATUS *Status OPTIONAL\r
515 )\r
516{\r
517 UINTN Length;\r
518\r
519 ASSERT (Buffer != NULL);\r
520 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
521 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
2d8debe7 522 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 523\r
524 Length = SMBUS_LIB_LENGTH (SmBusAddress);\r
525 return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, Length, Buffer, Status);\r
526}\r
527\r
528/**\r
529 Executes an SMBUS block process call command.\r
530\r
531 Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
532 The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
533 Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
534 If Status is not NULL, then the status of the executed command is returned in Status.\r
535 It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
536 SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
537 If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
538 If WriteBuffer is NULL, then ASSERT().\r
539 If ReadBuffer is NULL, then ASSERT().\r
540 If any reserved bits of SmBusAddress are set, then ASSERT().\r
541\r
2fc59a00 542 @param SmBusAddress The address that encodes the SMBUS Slave Address,\r
71871514 543 SMBUS Command, SMBUS Data Length, and PEC.\r
2fc59a00 544 @param WriteBuffer The pointer to the buffer of bytes to write to the SMBUS.\r
545 @param ReadBuffer The pointer to the buffer of bytes to read from the SMBUS.\r
71871514 546 @param Status Return status for the executed command.\r
547 This is an optional parameter and may be NULL.\r
58380e9c 548 RETURN_TIMEOUT: A timeout occurred while executing the \r
549 SMBUS command.\r
550 RETURN_DEVICE_ERROR: The request was not completed because \r
551 a failure reflected in the Host Status Register bit. \r
552 Device errors are a result of a transaction collision, \r
553 illegal command field, unclaimed cycle (host initiated), \r
554 or bus errors (collisions).\r
555 RETURN_CRC_ERROR The checksum is not correct. (PEC is incorrect.)\r
556 RETURN_UNSUPPORTED: The SMBus operation is not supported.\r
dd51a993 557\r
558 @return The number of bytes written.\r
559\r
560**/\r
561UINTN\r
562EFIAPI\r
563SmBusBlockProcessCall (\r
564 IN UINTN SmBusAddress,\r
565 IN VOID *WriteBuffer,\r
566 OUT VOID *ReadBuffer,\r
567 OUT RETURN_STATUS *Status OPTIONAL\r
568 )\r
569{\r
570 UINTN Length;\r
571\r
572 ASSERT (WriteBuffer != NULL);\r
573 ASSERT (ReadBuffer != NULL);\r
574 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
575 ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
2d8debe7 576 ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
dd51a993 577\r
578 Length = SMBUS_LIB_LENGTH (SmBusAddress);\r
579 //\r
580 // Assuming that ReadBuffer is large enough to save another memory copy.\r
581 //\r
582 ReadBuffer = CopyMem (ReadBuffer, WriteBuffer, Length);\r
583 return InternalSmBusExec (EfiSmbusBWBRProcessCall, SmBusAddress, Length, ReadBuffer, Status);\r
584}\r