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1a3eaf06 1/** @file\r
2 Include file of PciSegmentPciRootBridgeIo Library.\r
3\r
9095d37b 4 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
1a3eaf06 6\r
7**/\r
8\r
9#ifndef __DXE_PCI_SEGMENT_LIB__\r
10#define __DXE_PCI_SEGMENT_LIB__\r
11\r
1a3eaf06 12#include <Protocol/PciRootBridgeIo.h>\r
13\r
14#include <Library/PciSegmentLib.h>\r
15#include <Library/BaseLib.h>\r
16#include <Library/MemoryAllocationLib.h>\r
17#include <Library/UefiBootServicesTableLib.h>\r
18#include <Library/DebugLib.h>\r
19\r
20#include <IndustryStandard/Acpi.h>\r
21\r
22typedef struct {\r
23 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
24 UINT32 SegmentNumber;\r
25 UINT64 MinBusNumber;\r
26 UINT64 MaxBusNumber;\r
27} PCI_ROOT_BRIDGE_DATA;\r
28\r
29/**\r
30 Assert the validity of a PCI Segment address.\r
59ceeabe 31 A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63\r
1a3eaf06 32\r
33 @param A The address to validate.\r
34 @param M Additional bits to assert to be zero.\r
35\r
36**/\r
2f88bd3a 37#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A, M) \\r
59ceeabe 38 ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)\r
1a3eaf06 39\r
40/**\r
e43e4b3e 41 Translate PCI Lib address into format of PCI Root Bridge I/O Protocol\r
1a3eaf06 42\r
2fc59a00 43 @param A The address that encodes the PCI Bus, Device, Function and\r
1a3eaf06 44 Register.\r
45\r
46**/\r
e43e4b3e 47#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A) \\r
f5305d5a 48 ((((UINT32)(A) << 4) & 0xff000000) | (((UINT32)(A) >> 4) & 0x00000700) | (((UINT32)(A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))\r
1a3eaf06 49\r
50#endif\r