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1a3eaf06 1/** @file\r
2 Include file of PciSegmentPciRootBridgeIo Library.\r
3\r
9095d37b 4 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
1a3eaf06 6\r
7**/\r
8\r
9#ifndef __DXE_PCI_SEGMENT_LIB__\r
10#define __DXE_PCI_SEGMENT_LIB__\r
11\r
1a3eaf06 12\r
13#include <Protocol/PciRootBridgeIo.h>\r
14\r
15#include <Library/PciSegmentLib.h>\r
16#include <Library/BaseLib.h>\r
17#include <Library/MemoryAllocationLib.h>\r
18#include <Library/UefiBootServicesTableLib.h>\r
19#include <Library/DebugLib.h>\r
20\r
21#include <IndustryStandard/Acpi.h>\r
22\r
23typedef struct {\r
24 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
25 UINT32 SegmentNumber;\r
26 UINT64 MinBusNumber;\r
27 UINT64 MaxBusNumber;\r
28} PCI_ROOT_BRIDGE_DATA;\r
29\r
30/**\r
31 Assert the validity of a PCI Segment address.\r
59ceeabe 32 A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63\r
1a3eaf06 33\r
34 @param A The address to validate.\r
35 @param M Additional bits to assert to be zero.\r
36\r
37**/\r
38#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \\r
59ceeabe 39 ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)\r
1a3eaf06 40\r
41/**\r
e43e4b3e 42 Translate PCI Lib address into format of PCI Root Bridge I/O Protocol\r
1a3eaf06 43\r
2fc59a00 44 @param A The address that encodes the PCI Bus, Device, Function and\r
1a3eaf06 45 Register.\r
46\r
47**/\r
e43e4b3e 48#define PCI_TO_PCI_ROOT_BRIDGE_IO_ADDRESS(A) \\r
f5305d5a 49 ((((UINT32)(A) << 4) & 0xff000000) | (((UINT32)(A) >> 4) & 0x00000700) | (((UINT32)(A) << 1) & 0x001f0000) | (LShiftU64((A) & 0xfff, 32)))\r
1a3eaf06 50\r
51#endif\r