[mirror_edk2.git] / MdePkg / Library / UefiPciSegmentLibPciRootBridgeIo / UefiPciSegmentLibPciRootBridgeIo.inf

## @file\r
# PCI Segment Library that layers on top of the PCI Root Bridge I/O Protocol.\r
#\r
# This library produces the APIs from the PCI Library and implements these APIs\r
#  by calling into the PCI Root Bridge I/O Protocols that are present in the platform.\r
#  The PCI Root Bridge I/O Protocols are typically produced by a chipset specific DXE driver.\r
#  This library binds to all of the PCI Root Bridge I/O Protocols in the platform and handles\r
#  the translation from a PCI segment number into a specific PCI Root Bridge I/O Protocol.\r
#\r
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
#\r
##\r
\r
[Defines]\r
  INF_VERSION                    = 0x00010005\r
  BASE_NAME                      = UefiPciSegmentLibPciRootBridgeIo\r
  MODULE_UNI_FILE                = UefiPciSegmentLibPciRootBridgeIo.uni\r
  FILE_GUID                      = C6068612-B6E0-48a3-BB92-60E4A4F89EDF\r
  MODULE_TYPE                    = UEFI_DRIVER\r
  VERSION_STRING                 = 1.0\r
  LIBRARY_CLASS                  = PciSegmentLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
\r
  CONSTRUCTOR                    = PciSegmentLibConstructor\r
  DESTRUCTOR                     = PciSegmentLibDestructor\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
#  VALID_ARCHITECTURES           = IA32 X64 EBC\r
#\r
\r
[Sources]\r
  PciSegmentLib.h\r
  PciSegmentLib.c\r
\r
\r
[Packages]\r
  MdePkg/MdePkg.dec\r
\r
\r
[LibraryClasses]\r
  MemoryAllocationLib\r
  BaseLib\r
  UefiBootServicesTableLib\r
  DebugLib\r
\r
[Protocols]\r
  gEfiPciRootBridgeIoProtocolGuid               ## CONSUMES\r
\r
[Depex.common.DXE_DRIVER, Depex.common.DXE_RUNTIME_DRIVER, Depex.common.DXE_SAL_DRIVER, Depex.common.DXE_SMM_DRIVER]\r
  gEfiPciRootBridgeIoProtocolGuid\r
\r
Commit	Line	Data
6bfbb5f0	1	## @file\r
e43e4b3e	2	# PCI Segment Library that layers on top of the PCI Root Bridge I/O Protocol.\r
1a3eaf06	3	#\r
	4	# This library produces the APIs from the PCI Library and implements these APIs\r
	5	# by calling into the PCI Root Bridge I/O Protocols that are present in the platform.\r
	6	# The PCI Root Bridge I/O Protocols are typically produced by a chipset specific DXE driver.\r
	7	# This library binds to all of the PCI Root Bridge I/O Protocols in the platform and handles\r
	8	# the translation from a PCI segment number into a specific PCI Root Bridge I/O Protocol.\r
	9	#\r
3cb0a311	10	# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
1a3eaf06	11	#\r
9344f092	12	# SPDX-License-Identifier: BSD-2-Clause-Patent\r
1a3eaf06	13	#\r
1a3eaf06	14	#\r
3432b0cf	15	##\r
1a3eaf06	16	\r
	17	[Defines]\r
	18	INF_VERSION = 0x00010005\r
9504e2cd	19	BASE_NAME = UefiPciSegmentLibPciRootBridgeIo\r
c92c1790	20	MODULE_UNI_FILE = UefiPciSegmentLibPciRootBridgeIo.uni\r
1a3eaf06	21	FILE_GUID = C6068612-B6E0-48a3-BB92-60E4A4F89EDF\r
9504e2cd	22	MODULE_TYPE = UEFI_DRIVER\r
1a3eaf06	23	VERSION_STRING = 1.0\r
3cb0a311	24	LIBRARY_CLASS = PciSegmentLib\|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
1a3eaf06	25	\r
	26	CONSTRUCTOR = PciSegmentLibConstructor\r
	27	DESTRUCTOR = PciSegmentLibDestructor\r
	28	\r
	29	#\r
	30	# The following information is for reference only and not required by the build tools.\r
	31	#\r
3cb0a311	32	# VALID_ARCHITECTURES = IA32 X64 EBC\r
1a3eaf06	33	#\r
1a3eaf06	34	\r
6bfbb5f0	35	[Sources]\r
1a3eaf06	36	PciSegmentLib.h\r
	37	PciSegmentLib.c\r
	38	\r
	39	\r
	40	[Packages]\r
	41	MdePkg/MdePkg.dec\r
	42	\r
	43	\r
	44	[LibraryClasses]\r
	45	MemoryAllocationLib\r
	46	BaseLib\r
	47	UefiBootServicesTableLib\r
	48	DebugLib\r
	49	\r
	50	[Protocols]\r
1727a8c6	51	gEfiPciRootBridgeIoProtocolGuid ## CONSUMES\r
1a3eaf06	52	\r
3397c6f5	53	[Depex.common.DXE_DRIVER, Depex.common.DXE_RUNTIME_DRIVER, Depex.common.DXE_SAL_DRIVER, Depex.common.DXE_SMM_DRIVER]\r
a0720bb8	54	gEfiPciRootBridgeIoProtocolGuid\r
c92c1790	55	\r