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1e57a462 1/** @file\r
2\r
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3 Abstractions for simple OMAP DMA.\r
4 OMAP_DMA4 structure elements are described in the OMAP35xx TRM.\r
1e57a462 5\r
6 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
7\r
538311f7 8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
1e57a462 9\r
10**/\r
11\r
12#ifndef __OMAP_DMA_LIB_H__\r
13#define __OMAP_DMA_LIB_H__\r
14\r
15\r
16// Example from DMA chapter of the OMAP35xx spec\r
7f814ffd 17typedef struct {\r
18 UINT8 DataType; // DMA4_CSDPi[1:0]\r
19 UINT8 ReadPortAccessType; // DMA4_CSDPi[8:7]\r
20 UINT8 WritePortAccessType; // DMA4_CSDPi[15:14]\r
21 UINT8 SourceEndiansim; // DMA4_CSDPi[21]\r
22 UINT8 DestinationEndianism; // DMA4_CSDPi[19]\r
23 UINT8 WriteMode; // DMA4_CSDPi[17:16]\r
24 UINT8 SourcePacked; // DMA4_CSDPi[6]\r
25 UINT8 DestinationPacked; // DMA4_CSDPi[13]\r
26 UINT32 NumberOfElementPerFrame; // DMA4_CENi\r
27 UINT32 NumberOfFramePerTransferBlock; // DMA4_CFNi\r
28 UINT32 SourceStartAddress; // DMA4_CSSAi\r
29 UINT32 DestinationStartAddress; // DMA4_CDSAi\r
30 UINT32 SourceElementIndex; // DMA4_CSEi\r
31 UINT32 SourceFrameIndex; // DMA4_CSFi\r
32 UINT32 DestinationElementIndex; // DMA4_CDEi\r
33 UINT32 DestinationFrameIndex; // DMA4_CDFi\r
34 UINT8 ReadPortAccessMode; // DMA4_CCRi[13:12]\r
35 UINT8 WritePortAccessMode; // DMA4_CCRi[15:14]\r
36 UINT8 ReadPriority; // DMA4_CCRi[6]\r
37 UINT8 WritePriority; // DMA4_CCRi[23]\r
38 UINT8 ReadRequestNumber; // DMA4_CCRi[4:0]\r
1e57a462 39 UINT8 WriteRequestNumber; // DMA4_CCRi[20:19]\r
40} OMAP_DMA4;\r
41\r
42\r
3402aac7 43/**\r
7f814ffd 44 Configure OMAP DMA Channel\r
3402aac7 45\r
7f814ffd 46 @param Channel DMA Channel to configure\r
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47 @param Dma4 Pointer to structure used to initialize DMA registers for the Channel\r
48\r
7f814ffd 49 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
50 @retval EFI_INVALID_PARAMETER Channel is not valid\r
51 @retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
3402aac7 52\r
1e57a462 53**/\r
54EFI_STATUS\r
55EFIAPI\r
56EnableDmaChannel (\r
57 IN UINTN Channel,\r
58 IN OMAP_DMA4 *Dma4\r
59 );\r
60\r
3402aac7 61/**\r
7f814ffd 62 Turn of DMA channel configured by EnableDma().\r
3402aac7 63\r
7f814ffd 64 @param Channel DMA Channel to configure\r
9f6b977f 65 @param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS\r
66 @param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR\r
3402aac7 67\r
7f814ffd 68 @retval EFI_SUCCESS DMA hardware disabled\r
69 @retval EFI_INVALID_PARAMETER Channel is not valid\r
70 @retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
3402aac7 71\r
1e57a462 72**/\r
73EFI_STATUS\r
74EFIAPI\r
75DisableDmaChannel (\r
76 IN UINTN Channel,\r
77 IN UINT32 SuccessMask,\r
78 IN UINT32 ErrorMask\r
79 );\r
80\r
81\r
82\r
3402aac7 83#endif\r
1e57a462 84\r