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OvmfPkg: sync FADT with QEMU: PM Timer is 24-bit
[mirror_edk2.git] / OvmfPkg / AcpiTables / Dsdt.asl
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49ba9447 1/** @file\r
2 Contains root level name space objects for the platform\r
0228e598 3\r
56d7640a
HT		 4 Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials are\r
49ba9447 6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
0228e598 9\r
49ba9447 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
0228e598 13**/\r
49ba9447 14\r
15DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 3) {\r
16 //\r
17 // System Sleep States\r
18 //\r
19 Name (\_S0, Package () {5, 0, 0, 0})\r
20 Name (\_S4, Package () {1, 0, 0, 0})\r
21 Name (\_S5, Package () {0, 0, 0, 0})\r
22\r
23 //\r
24 // System Bus\r
25 //\r
26 Scope (\_SB) {\r
27 //\r
28 // PCI Root Bridge\r
29 //\r
30 Device (PCI0) {\r
31 Name (_HID, EISAID ("PNP0A03"))\r
32 Name (_ADR, 0x00000000)\r
33 Name (_BBN, 0x00)\r
34 Name (_UID, 0x00)\r
35\r
36 //\r
37 // BUS, I/O, and MMIO resources\r
38 //\r
cf98e61d 39 Name (CRES, ResourceTemplate () {\r
49ba9447 40 WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses\r
41 ResourceProducer, // bit 0 of general flags is 1\r
42 MinFixed, // Range is fixed\r
43 MaxFixed, // Range is fixed\r
44 PosDecode, // PosDecode\r
45 0x0000, // Granularity\r
46 0x0000, // Min\r
47 0x00FF, // Max\r
48 0x0000, // Translation\r
49 0x0100 // Range Length = Max-Min+1\r
50 )\r
51\r
52 IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)\r
53\r
54 WORDIO ( // Consumed-and-produced resource (all I/O below CF8)\r
55 ResourceProducer, // bit 0 of general flags is 0\r
56 MinFixed, // Range is fixed\r
57 MaxFixed, // Range is fixed\r
0228e598 58 PosDecode,\r
49ba9447 59 EntireRange,\r
60 0x0000, // Granularity\r
61 0x0000, // Min\r
62 0x0CF7, // Max\r
63 0x0000, // Translation\r
64 0x0CF8 // Range Length\r
65 )\r
66\r
67 WORDIO ( // Consumed-and-produced resource (all I/O above CFF)\r
68 ResourceProducer, // bit 0 of general flags is 0\r
69 MinFixed, // Range is fixed\r
70 MaxFixed, // Range is fixed\r
0228e598 71 PosDecode,\r
49ba9447 72 EntireRange,\r
73 0x0000, // Granularity\r
74 0x0D00, // Min\r
75 0xFFFF, // Max\r
76 0x0000, // Translation\r
77 0xF300 // Range Length\r
78 )\r
79\r
80 DWORDMEMORY ( // Descriptor for legacy VGA video RAM\r
81 ResourceProducer, // bit 0 of general flags is 0\r
82 PosDecode,\r
83 MinFixed, // Range is fixed\r
84 MaxFixed, // Range is Fixed\r
85 Cacheable,\r
86 ReadWrite,\r
87 0x00000000, // Granularity\r
88 0x000A0000, // Min\r
89 0x000BFFFF, // Max\r
90 0x00000000, // Translation\r
91 0x00020000 // Range Length\r
92 )\r
93\r
cf98e61d 94 DWORDMEMORY ( // Descriptor for 32-bit MMIO\r
49ba9447 95 ResourceProducer, // bit 0 of general flags is 0\r
96 PosDecode,\r
97 MinFixed, // Range is fixed\r
98 MaxFixed, // Range is Fixed\r
cf98e61d 99 NonCacheable,\r
49ba9447 100 ReadWrite,\r
101 0x00000000, // Granularity\r
102 0xF8000000, // Min\r
103 0xFFFBFFFF, // Max\r
104 0x00000000, // Translation\r
cf98e61d 105 0x07FC0000, // Range Length\r
106 , // ResourceSourceIndex\r
107 , // ResourceSource\r
108 PW32 // DescriptorName\r
49ba9447 109 )\r
110 })\r
111\r
cf98e61d 112 Name (CR64, ResourceTemplate () {\r
113 QWordMemory ( // Descriptor for 64-bit MMIO\r
114 ResourceProducer, // bit 0 of general flags is 0\r
115 PosDecode,\r
116 MinFixed, // Range is fixed\r
117 MaxFixed, // Range is Fixed\r
118 Cacheable,\r
119 ReadWrite,\r
120 0x00000000, // Granularity\r
121 0x8000000000, // Min\r
122 0xFFFFFFFFFF, // Max\r
123 0x00000000, // Translation\r
124 0x8000000000, // Range Length\r
125 , // ResourceSourceIndex\r
126 , // ResourceSource\r
127 PW64 // DescriptorName\r
128 )\r
129 })\r
130\r
131 Method (_CRS, 0) {\r
132 //\r
133 // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"\r
134 //\r
135 External (FWDT, OpRegionObj)\r
136 Field(FWDT, QWordAcc, NoLock, Preserve) {\r
137 P0S, 64, // PciWindow32.Base\r
138 P0E, 64, // PciWindow32.End\r
139 P0L, 64, // PciWindow32.Length\r
140 P1S, 64, // PciWindow64.Base\r
141 P1E, 64, // PciWindow64.End\r
142 P1L, 64 // PciWindow64.Length\r
143 }\r
144 Field(FWDT, DWordAcc, NoLock, Preserve) {\r
145 P0SL, 32, // PciWindow32.Base, low 32 bits\r
146 P0SH, 32, // PciWindow32.Base, high 32 bits\r
147 P0EL, 32, // PciWindow32.End, low 32 bits\r
148 P0EH, 32, // PciWindow32.End, high 32 bits\r
149 P0LL, 32, // PciWindow32.Length, low 32 bits\r
150 P0LH, 32, // PciWindow32.Length, high 32 bits\r
151 P1SL, 32, // PciWindow64.Base, low 32 bits\r
152 P1SH, 32, // PciWindow64.Base, high 32 bits\r
153 P1EL, 32, // PciWindow64.End, low 32 bits\r
154 P1EH, 32, // PciWindow64.End, high 32 bits\r
155 P1LL, 32, // PciWindow64.Length, low 32 bits\r
156 P1LH, 32 // PciWindow64.Length, high 32 bits\r
157 }\r
158\r
159 //\r
160 // fixup 32-bit PCI IO window\r
161 //\r
162 CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)\r
163 CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)\r
164 CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)\r
165 Store (P0SL, PS32)\r
166 Store (P0EL, PE32)\r
167 Store (P0LL, PL32)\r
168\r
169 If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {\r
170 Return (CRES)\r
171 } Else {\r
172 //\r
173 // fixup 64-bit PCI IO window\r
174 //\r
175 CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)\r
176 CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)\r
177 CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)\r
178 Store (P1S, PS64)\r
179 Store (P1E, PE64)\r
180 Store (P1L, PL64)\r
181\r
182 //\r
183 // add window and return result\r
184 //\r
185 ConcatenateResTemplate (CRES, CR64, Local0)\r
186 Return (Local0)\r
187 }\r
188 }\r
189\r
49ba9447 190 //\r
191 // PCI Interrupt Routing Table - PIC Mode Only\r
192 //\r
193 Method (_PRT, 0, NotSerialized) {\r
194 Return (\r
195 Package () {\r
196 //\r
197 // Bus 0, Device 1\r
198 //\r
199 Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
200 Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
201 Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
202 Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
203 //\r
204 // Bus 0, Device 3\r
205 //\r
206 Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
207 Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
208 Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
209 Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
210 }\r
211 )\r
212 }\r
213\r
214 //\r
215 // PCI to ISA Bridge (Bus 0, Device 1, Function 0)\r
216 //\r
217 Device (LPC) {\r
218 Name (_ADR, 0x00010000)\r
219\r
220 //\r
221 // PCI Interrupt Routing Configuration Registers\r
222 //\r
223 OperationRegion (PRR0, PCI_Config, 0x60, 0x04)\r
224 Field (PRR0, ANYACC, NOLOCK, PRESERVE) {\r
225 PIRA, 8,\r
226 PIRB, 8,\r
227 PIRC, 8,\r
228 PIRD, 8\r
229 }\r
230\r
231 //\r
232 // _STA method for LNKA, LNKB, LNKC, LNKD\r
233 //\r
234 Method (PSTA, 1, NotSerialized) {\r
235 If (And (Arg0, 0x80)) {\r
236 Return (0x9)\r
237 } Else {\r
238 Return (0xB)\r
239 }\r
240 }\r
241\r
242 //\r
243 // _DIS method for LNKA, LNKB, LNKC, LNKD\r
244 //\r
245 Method (PDIS, 1, NotSerialized) {\r
246 Or (Arg0, 0x80, Arg0)\r
247 }\r
248\r
249 //\r
250 // _CRS method for LNKA, LNKB, LNKC, LNKD\r
251 //\r
252 Method (PCRS, 1, NotSerialized) {\r
253 Name (BUF0, ResourceTemplate () {IRQ (Level, ActiveLow, Shared){0}})\r
254 //\r
255 // Define references to buffer elements\r
256 //\r
257 CreateWordField (BUF0, 0x01, IRQW) // IRQ low\r
258 //\r
259 // Write current settings into IRQ descriptor\r
260 //\r
261 If (And (Arg0, 0x80)) {\r
262 Store (Zero, Local0)\r
263 } Else {\r
264 Store (One, Local0)\r
265 }\r
266 //\r
267 // Shift 1 by value in register 70\r
268 //\r
269 ShiftLeft (Local0, And (Arg0, 0x0F), IRQW) // Save in buffer\r
0228e598 270 Return (BUF0) // Return Buf0\r
49ba9447 271 }\r
272\r
273 //\r
274 // _PRS resource for LNKA, LNKB, LNKC, LNKD\r
275 //\r
276 Name (PPRS, ResourceTemplate () {\r
277 IRQ (Level, ActiveLow, Shared) {3, 4, 5, 7, 9, 10, 11, 12, 14, 15}\r
278 })\r
279\r
280 //\r
281 // _SRS method for LNKA, LNKB, LNKC, LNKD\r
282 //\r
283 Method (PSRS, 2, NotSerialized) {\r
284 CreateWordField (Arg1, 0x01, IRQW) // IRQ low\r
285 FindSetRightBit (IRQW, Local0) // Set IRQ\r
286 If (LNotEqual (IRQW, Zero)) {\r
287 And (Local0, 0x7F, Local0)\r
288 Decrement (Local0)\r
289 } Else {\r
290 Or (Local0, 0x80, Local0)\r
291 }\r
292 Store (Local0, Arg0)\r
293 }\r
294\r
295 //\r
296 // PCI IRQ Link A\r
297 //\r
298 Device (LNKA) {\r
299 Name (_HID, EISAID("PNP0C0F"))\r
300 Name (_UID, 1)\r
301\r
302 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }\r
303 Method (_DIS, 0, NotSerialized) { PDIS (PIRA) }\r
304 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }\r
305 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
0228e598 306 Method (_SRS, 1, NotSerialized) { PSRS (PIRA, Arg0) }\r
49ba9447 307 }\r
308\r
309 //\r
310 // PCI IRQ Link B\r
311 //\r
312 Device (LNKB) {\r
313 Name (_HID, EISAID("PNP0C0F"))\r
314 Name (_UID, 2)\r
315\r
316 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }\r
317 Method (_DIS, 0, NotSerialized) { PDIS (PIRB) }\r
318 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }\r
319 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
0228e598 320 Method (_SRS, 1, NotSerialized) { PSRS (PIRB, Arg0) }\r
49ba9447 321 }\r
322\r
323 //\r
324 // PCI IRQ Link C\r
325 //\r
326 Device (LNKC) {\r
327 Name (_HID, EISAID("PNP0C0F"))\r
328 Name (_UID, 3)\r
329\r
330 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }\r
331 Method (_DIS, 0, NotSerialized) { PDIS (PIRC) }\r
332 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }\r
333 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
0228e598 334 Method (_SRS, 1, NotSerialized) { PSRS (PIRC, Arg0) }\r
49ba9447 335 }\r
336\r
337 //\r
338 // PCI IRQ Link D\r
339 //\r
340 Device (LNKD) {\r
341 Name (_HID, EISAID("PNP0C0F"))\r
342 Name (_UID, 1)\r
343\r
344 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }\r
345 Method (_DIS, 0, NotSerialized) { PDIS (PIRD) }\r
346 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }\r
347 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
0228e598 348 Method (_SRS, 1, NotSerialized) { PSRS (PIRD, Arg0) }\r
49ba9447 349 }\r
0228e598 350\r
49ba9447 351 //\r
352 // Programmable Interrupt Controller (PIC)\r
353 //\r
354 Device(PIC) {\r
355 Name (_HID, EISAID ("PNP0000"))\r
356 Name (_CRS, ResourceTemplate () {\r
357 IO (Decode16, 0x020, 0x020, 0x00, 0x02)\r
358 IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)\r
359 IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)\r
360 IRQNoFlags () {2}\r
361 })\r
362 }\r
363\r
364 //\r
0228e598 365 // ISA DMA\r
49ba9447 366 //\r
367 Device (DMAC) {\r
0228e598 368 Name (_HID, EISAID ("PNP0200"))\r
49ba9447 369 Name (_CRS, ResourceTemplate () {\r
370 IO (Decode16, 0x00, 0x00, 0, 0x10)\r
371 IO (Decode16, 0x81, 0x81, 0, 0x03)\r
372 IO (Decode16, 0x87, 0x87, 0, 0x01)\r
373 IO (Decode16, 0x89, 0x89, 0, 0x03)\r
374 IO (Decode16, 0x8f, 0x8f, 0, 0x01)\r
375 IO (Decode16, 0xc0, 0xc0, 0, 0x20)\r
376 DMA (Compatibility, NotBusMaster, Transfer8) {4}\r
377 })\r
378 }\r
379\r
380 //\r
381 // 8254 Timer\r
382 //\r
383 Device(TMR) {\r
384 Name(_HID,EISAID("PNP0100"))\r
385 Name(_CRS, ResourceTemplate () {\r
386 IO (Decode16, 0x40, 0x40, 0x00, 0x04)\r
387 IRQNoFlags () {0}\r
388 })\r
389 }\r
390\r
391 //\r
392 // Real Time Clock\r
393 //\r
394 Device (RTC) {\r
395 Name (_HID, EISAID ("PNP0B00"))\r
396 Name (_CRS, ResourceTemplate () {\r
397 IO (Decode16, 0x70, 0x70, 0x00, 0x02)\r
398 IRQNoFlags () {8}\r
399 })\r
400 }\r
401\r
402 //\r
403 // PCAT Speaker\r
404 //\r
405 Device(SPKR) {\r
406 Name (_HID, EISAID("PNP0800"))\r
407 Name (_CRS, ResourceTemplate () {\r
408 IO (Decode16, 0x61, 0x61, 0x01, 0x01)\r
409 })\r
410 }\r
411\r
412 //\r
413 // Floating Point Coprocessor\r
414 //\r
415 Device(FPU) {\r
416 Name (_HID, EISAID("PNP0C04"))\r
417 Name (_CRS, ResourceTemplate () {\r
418 IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)\r
419 IRQNoFlags () {13}\r
420 })\r
421 }\r
422\r
423 //\r
424 // Generic motherboard devices and pieces that don't fit anywhere else\r
425 //\r
426 Device(XTRA) {\r
427 Name (_HID, EISAID ("PNP0C02"))\r
428 Name (_UID, 0x01)\r
429 Name (_CRS, ResourceTemplate () {\r
430 IO (Decode16, 0x010, 0x010, 0x00, 0x10)\r
431 IO (Decode16, 0x022, 0x022, 0x00, 0x1E)\r
432 IO (Decode16, 0x044, 0x044, 0x00, 0x1C)\r
433 IO (Decode16, 0x062, 0x062, 0x00, 0x02)\r
434 IO (Decode16, 0x065, 0x065, 0x00, 0x0B)\r
435 IO (Decode16, 0x072, 0x072, 0x00, 0x0E)\r
436 IO (Decode16, 0x080, 0x080, 0x00, 0x01)\r
437 IO (Decode16, 0x084, 0x084, 0x00, 0x03)\r
438 IO (Decode16, 0x088, 0x088, 0x00, 0x01)\r
439 IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)\r
440 IO (Decode16, 0x090, 0x090, 0x00, 0x10)\r
441 IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)\r
442 IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)\r
443 IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)\r
444 IO (Decode16, 0x160, 0x160, 0x00, 0x10)\r
445 IO (Decode16, 0x278, 0x278, 0x00, 0x08)\r
446 IO (Decode16, 0x370, 0x370, 0x00, 0x02)\r
447 IO (Decode16, 0x378, 0x378, 0x00, 0x08)\r
49ba9447 448 IO (Decode16, 0x440, 0x440, 0x00, 0x10)\r
449 IO (Decode16, 0x678, 0x678, 0x00, 0x08)\r
450 IO (Decode16, 0x778, 0x778, 0x00, 0x08)\r
b2b16999 451 IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK\r
834d3ccd 452 IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1\r
49ba9447 453 Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC\r
454 Memory32Fixed (ReadOnly, 0xFEE00000, 0x1000)\r
455 })\r
456 }\r
457\r
458 //\r
459 // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102\r
460 //\r
0228e598 461 Device (PS2K) {\r
49ba9447 462 Name (_HID, EISAID ("PNP0303"))\r
463 Name (_CID, EISAID ("PNP030B"))\r
464 Name(_CRS,ResourceTemplate() {\r
465 IO (Decode16, 0x60, 0x60, 0x00, 0x01)\r
466 IO (Decode16, 0x64, 0x64, 0x00, 0x01)\r
467 IRQNoFlags () {1}\r
468 })\r
469 }\r
470\r
471 //\r
472 // PS/2 Mouse and Microsoft Mouse\r
473 //\r
474 Device (PS2M) { // PS/2 stype mouse port\r
475 Name (_HID, EISAID ("PNP0F03"))\r
476 Name (_CID, EISAID ("PNP0F13"))\r
477 Name (_CRS, ResourceTemplate() {\r
478 IRQNoFlags () {12}\r
479 })\r
480 }\r
481\r
482 //\r
483 // UART Serial Port - COM1\r
484 //\r
485 Device (UAR1) {\r
486 Name (_HID, EISAID ("PNP0501"))\r
487 Name (_DDN, "COM1")\r
488 Name (_UID, 0x01)\r
489 Name(_CRS,ResourceTemplate() {\r
490 IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)\r
491 IRQ (Edge, ActiveHigh, Exclusive, ) {4}\r
492 })\r
493 }\r
494\r
495 //\r
496 // UART Serial Port - COM2\r
497 //\r
498 Device (UAR2) {\r
499 Name (_HID, EISAID ("PNP0501"))\r
500 Name (_DDN, "COM2")\r
501 Name (_UID, 0x02)\r
502 Name(_CRS,ResourceTemplate() {\r
503 IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)\r
504 IRQ (Edge, ActiveHigh, Exclusive, ) {3}\r
505 })\r
506 }\r
507\r
508 //\r
509 // Floppy Disk Controller\r
510 //\r
511 Device (FDC) {\r
512 Name (_HID, EISAID ("PNP0700"))\r
513 Name (_CRS,ResourceTemplate() {\r
514 IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)\r
515 IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)\r
516 IRQNoFlags () {6}\r
517 DMA (Compatibility, NotBusMaster, Transfer8) {2}\r
518 })\r
519 }\r
520 }\r
521 }\r
522 }\r
523}\r
524\r
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