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OvmfPkg: fix interrupt routing in the DSDT, bump revision number
[mirror_edk2.git] / OvmfPkg / AcpiTables / Dsdt.asl
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49ba9447 1/** @file\r
2 Contains root level name space objects for the platform\r
0228e598 3\r
56d7640a
HT		 4 Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials are\r
49ba9447 6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
0228e598 9\r
49ba9447 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
0228e598 13**/\r
49ba9447 14\r
9388fd3d 15DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {\r
49ba9447 16 //\r
17 // System Sleep States\r
18 //\r
19 Name (\_S0, Package () {5, 0, 0, 0})\r
20 Name (\_S4, Package () {1, 0, 0, 0})\r
21 Name (\_S5, Package () {0, 0, 0, 0})\r
22\r
23 //\r
24 // System Bus\r
25 //\r
26 Scope (\_SB) {\r
27 //\r
28 // PCI Root Bridge\r
29 //\r
30 Device (PCI0) {\r
31 Name (_HID, EISAID ("PNP0A03"))\r
32 Name (_ADR, 0x00000000)\r
33 Name (_BBN, 0x00)\r
34 Name (_UID, 0x00)\r
35\r
36 //\r
37 // BUS, I/O, and MMIO resources\r
38 //\r
cf98e61d 39 Name (CRES, ResourceTemplate () {\r
49ba9447 40 WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses\r
41 ResourceProducer, // bit 0 of general flags is 1\r
42 MinFixed, // Range is fixed\r
43 MaxFixed, // Range is fixed\r
44 PosDecode, // PosDecode\r
45 0x0000, // Granularity\r
46 0x0000, // Min\r
47 0x00FF, // Max\r
48 0x0000, // Translation\r
49 0x0100 // Range Length = Max-Min+1\r
50 )\r
51\r
52 IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)\r
53\r
54 WORDIO ( // Consumed-and-produced resource (all I/O below CF8)\r
55 ResourceProducer, // bit 0 of general flags is 0\r
56 MinFixed, // Range is fixed\r
57 MaxFixed, // Range is fixed\r
0228e598 58 PosDecode,\r
49ba9447 59 EntireRange,\r
60 0x0000, // Granularity\r
61 0x0000, // Min\r
62 0x0CF7, // Max\r
63 0x0000, // Translation\r
64 0x0CF8 // Range Length\r
65 )\r
66\r
67 WORDIO ( // Consumed-and-produced resource (all I/O above CFF)\r
68 ResourceProducer, // bit 0 of general flags is 0\r
69 MinFixed, // Range is fixed\r
70 MaxFixed, // Range is fixed\r
0228e598 71 PosDecode,\r
49ba9447 72 EntireRange,\r
73 0x0000, // Granularity\r
74 0x0D00, // Min\r
75 0xFFFF, // Max\r
76 0x0000, // Translation\r
77 0xF300 // Range Length\r
78 )\r
79\r
80 DWORDMEMORY ( // Descriptor for legacy VGA video RAM\r
81 ResourceProducer, // bit 0 of general flags is 0\r
82 PosDecode,\r
83 MinFixed, // Range is fixed\r
84 MaxFixed, // Range is Fixed\r
85 Cacheable,\r
86 ReadWrite,\r
87 0x00000000, // Granularity\r
88 0x000A0000, // Min\r
89 0x000BFFFF, // Max\r
90 0x00000000, // Translation\r
91 0x00020000 // Range Length\r
92 )\r
93\r
cf98e61d 94 DWORDMEMORY ( // Descriptor for 32-bit MMIO\r
49ba9447 95 ResourceProducer, // bit 0 of general flags is 0\r
96 PosDecode,\r
97 MinFixed, // Range is fixed\r
98 MaxFixed, // Range is Fixed\r
cf98e61d 99 NonCacheable,\r
49ba9447 100 ReadWrite,\r
101 0x00000000, // Granularity\r
102 0xF8000000, // Min\r
103 0xFFFBFFFF, // Max\r
104 0x00000000, // Translation\r
cf98e61d 105 0x07FC0000, // Range Length\r
106 , // ResourceSourceIndex\r
107 , // ResourceSource\r
108 PW32 // DescriptorName\r
49ba9447 109 )\r
110 })\r
111\r
cf98e61d 112 Name (CR64, ResourceTemplate () {\r
113 QWordMemory ( // Descriptor for 64-bit MMIO\r
114 ResourceProducer, // bit 0 of general flags is 0\r
115 PosDecode,\r
116 MinFixed, // Range is fixed\r
117 MaxFixed, // Range is Fixed\r
118 Cacheable,\r
119 ReadWrite,\r
120 0x00000000, // Granularity\r
121 0x8000000000, // Min\r
122 0xFFFFFFFFFF, // Max\r
123 0x00000000, // Translation\r
124 0x8000000000, // Range Length\r
125 , // ResourceSourceIndex\r
126 , // ResourceSource\r
127 PW64 // DescriptorName\r
128 )\r
129 })\r
130\r
131 Method (_CRS, 0) {\r
132 //\r
133 // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"\r
134 //\r
135 External (FWDT, OpRegionObj)\r
136 Field(FWDT, QWordAcc, NoLock, Preserve) {\r
137 P0S, 64, // PciWindow32.Base\r
138 P0E, 64, // PciWindow32.End\r
139 P0L, 64, // PciWindow32.Length\r
140 P1S, 64, // PciWindow64.Base\r
141 P1E, 64, // PciWindow64.End\r
142 P1L, 64 // PciWindow64.Length\r
143 }\r
144 Field(FWDT, DWordAcc, NoLock, Preserve) {\r
145 P0SL, 32, // PciWindow32.Base, low 32 bits\r
146 P0SH, 32, // PciWindow32.Base, high 32 bits\r
147 P0EL, 32, // PciWindow32.End, low 32 bits\r
148 P0EH, 32, // PciWindow32.End, high 32 bits\r
149 P0LL, 32, // PciWindow32.Length, low 32 bits\r
150 P0LH, 32, // PciWindow32.Length, high 32 bits\r
151 P1SL, 32, // PciWindow64.Base, low 32 bits\r
152 P1SH, 32, // PciWindow64.Base, high 32 bits\r
153 P1EL, 32, // PciWindow64.End, low 32 bits\r
154 P1EH, 32, // PciWindow64.End, high 32 bits\r
155 P1LL, 32, // PciWindow64.Length, low 32 bits\r
156 P1LH, 32 // PciWindow64.Length, high 32 bits\r
157 }\r
158\r
159 //\r
160 // fixup 32-bit PCI IO window\r
161 //\r
162 CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)\r
163 CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)\r
164 CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)\r
165 Store (P0SL, PS32)\r
166 Store (P0EL, PE32)\r
167 Store (P0LL, PL32)\r
168\r
169 If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {\r
170 Return (CRES)\r
171 } Else {\r
172 //\r
173 // fixup 64-bit PCI IO window\r
174 //\r
175 CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)\r
176 CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)\r
177 CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)\r
178 Store (P1S, PS64)\r
179 Store (P1E, PE64)\r
180 Store (P1L, PL64)\r
181\r
182 //\r
183 // add window and return result\r
184 //\r
185 ConcatenateResTemplate (CRES, CR64, Local0)\r
186 Return (Local0)\r
187 }\r
188 }\r
189\r
49ba9447 190 //\r
191 // PCI Interrupt Routing Table - PIC Mode Only\r
192 //\r
193 Method (_PRT, 0, NotSerialized) {\r
194 Return (\r
195 Package () {\r
196 //\r
9388fd3d 197 // Bus 0; Devices 0 to 15\r
198 //\r
199 Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
200 Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
201 Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
202 Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
203\r
204 Package () {0x0001FFFF, 0x00, 0x00, 0x09},\r
205 //\r
206 // list of IRQs occupied thus far: 9\r
49ba9447 207 //\r
49ba9447 208 Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
209 Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
210 Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
9388fd3d 211\r
212 Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
213 Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
214 Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
215 Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
216\r
217 Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
218 Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
219 Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
220 Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
221\r
222 Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
223 Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
224 Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
225 Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
226\r
227 Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
228 Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
229 Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
230 Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
231\r
232 Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
233 Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
234 Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
235 Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
236\r
237 Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
238 Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
239 Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
240 Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
241\r
242 Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
243 Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
244 Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
245 Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
246\r
247 Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
248 Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
249 Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
250 Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
251\r
252 Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
253 Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
254 Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
255 Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
256\r
257 Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
258 Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
259 Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
260 Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
261\r
262 Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
263 Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
264 Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
265 Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
266\r
267 Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
268 Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
269 Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
270 Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
271\r
272 Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
273 Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
274 Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
275 Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
276\r
277 Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
278 Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
279 Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
280 Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}\r
49ba9447 281 }\r
282 )\r
283 }\r
284\r
285 //\r
286 // PCI to ISA Bridge (Bus 0, Device 1, Function 0)\r
b636c6e5 287 // "Low Pin Count"\r
49ba9447 288 //\r
289 Device (LPC) {\r
290 Name (_ADR, 0x00010000)\r
291\r
292 //\r
b636c6e5 293 // PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]\r
49ba9447 294 //\r
295 OperationRegion (PRR0, PCI_Config, 0x60, 0x04)\r
296 Field (PRR0, ANYACC, NOLOCK, PRESERVE) {\r
297 PIRA, 8,\r
298 PIRB, 8,\r
299 PIRC, 8,\r
300 PIRD, 8\r
301 }\r
302\r
303 //\r
304 // _STA method for LNKA, LNKB, LNKC, LNKD\r
b636c6e5 305 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD\r
49ba9447 306 //\r
307 Method (PSTA, 1, NotSerialized) {\r
b636c6e5 308 If (And (Arg0, 0x80)) { // disable-bit set?\r
309 Return (0x9) // "device present" | "functioning properly"\r
49ba9447 310 } Else {\r
b636c6e5 311 Return (0xB) // same | "enabled and decoding resources"\r
49ba9447 312 }\r
313 }\r
314\r
49ba9447 315 //\r
316 // _CRS method for LNKA, LNKB, LNKC, LNKD\r
b636c6e5 317 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD\r
49ba9447 318 //\r
319 Method (PCRS, 1, NotSerialized) {\r
49ba9447 320 //\r
cc16a929 321 // create temporary buffer with an Extended Interrupt Descriptor\r
322 // whose single vector defaults to zero\r
49ba9447 323 //\r
cc16a929 324 Name (BUF0, ResourceTemplate () {\r
56daf8b9 325 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}\r
cc16a929 326 }\r
327 )\r
328\r
49ba9447 329 //\r
cc16a929 330 // define reference to first interrupt vector in buffer\r
49ba9447 331 //\r
cc16a929 332 CreateDWordField (BUF0, 0x05, IRQW)\r
333\r
49ba9447 334 //\r
cc16a929 335 // If the disable-bit is clear, overwrite the default zero vector\r
336 // with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read\r
337 // as 0.\r
49ba9447 338 //\r
cc16a929 339 If (LNot (And (Arg0, 0x80))) {\r
340 Store (Arg0, IRQW)\r
341 }\r
342 Return (BUF0)\r
49ba9447 343 }\r
344\r
345 //\r
346 // _PRS resource for LNKA, LNKB, LNKC, LNKD\r
347 //\r
348 Name (PPRS, ResourceTemplate () {\r
9388fd3d 349 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}\r
350 //\r
351 // list of IRQs occupied thus far: 9, 5, 10, 11\r
352 //\r
49ba9447 353 })\r
354\r
49ba9447 355 //\r
356 // PCI IRQ Link A\r
357 //\r
358 Device (LNKA) {\r
359 Name (_HID, EISAID("PNP0C0F"))\r
360 Name (_UID, 1)\r
361\r
362 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }\r
a42bdfcc 363 Method (_DIS, 0, NotSerialized) {\r
364 Or (PIRA, 0x80, PIRA) // set disable-bit\r
365 }\r
49ba9447 366 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }\r
367 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 368 Method (_SRS, 1, NotSerialized) {\r
369 CreateDWordField (Arg0, 0x05, IRQW)\r
370 Store (IRQW, PIRA)\r
371 }\r
49ba9447 372 }\r
373\r
374 //\r
375 // PCI IRQ Link B\r
376 //\r
377 Device (LNKB) {\r
378 Name (_HID, EISAID("PNP0C0F"))\r
379 Name (_UID, 2)\r
380\r
381 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }\r
a42bdfcc 382 Method (_DIS, 0, NotSerialized) {\r
383 Or (PIRB, 0x80, PIRB) // set disable-bit\r
384 }\r
49ba9447 385 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }\r
386 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 387 Method (_SRS, 1, NotSerialized) {\r
388 CreateDWordField (Arg0, 0x05, IRQW)\r
389 Store (IRQW, PIRB)\r
390 }\r
49ba9447 391 }\r
392\r
393 //\r
394 // PCI IRQ Link C\r
395 //\r
396 Device (LNKC) {\r
397 Name (_HID, EISAID("PNP0C0F"))\r
398 Name (_UID, 3)\r
399\r
400 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }\r
a42bdfcc 401 Method (_DIS, 0, NotSerialized) {\r
402 Or (PIRC, 0x80, PIRC) // set disable-bit\r
403 }\r
49ba9447 404 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }\r
405 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 406 Method (_SRS, 1, NotSerialized) {\r
407 CreateDWordField (Arg0, 0x05, IRQW)\r
408 Store (IRQW, PIRC)\r
409 }\r
49ba9447 410 }\r
411\r
412 //\r
413 // PCI IRQ Link D\r
414 //\r
415 Device (LNKD) {\r
416 Name (_HID, EISAID("PNP0C0F"))\r
ba01f3b9 417 Name (_UID, 4)\r
49ba9447 418\r
419 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }\r
a42bdfcc 420 Method (_DIS, 0, NotSerialized) {\r
421 Or (PIRD, 0x80, PIRD) // set disable-bit\r
422 }\r
49ba9447 423 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }\r
424 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 425 Method (_SRS, 1, NotSerialized) {\r
426 CreateDWordField (Arg0, 0x05, IRQW)\r
427 Store (IRQW, PIRD)\r
428 }\r
49ba9447 429 }\r
0228e598 430\r
49ba9447 431 //\r
432 // Programmable Interrupt Controller (PIC)\r
433 //\r
434 Device(PIC) {\r
435 Name (_HID, EISAID ("PNP0000"))\r
436 Name (_CRS, ResourceTemplate () {\r
437 IO (Decode16, 0x020, 0x020, 0x00, 0x02)\r
438 IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)\r
439 IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)\r
440 IRQNoFlags () {2}\r
9388fd3d 441 //\r
442 // list of IRQs occupied thus far: 9, 5, 10, 11, 2\r
443 //\r
49ba9447 444 })\r
445 }\r
446\r
447 //\r
0228e598 448 // ISA DMA\r
49ba9447 449 //\r
450 Device (DMAC) {\r
0228e598 451 Name (_HID, EISAID ("PNP0200"))\r
49ba9447 452 Name (_CRS, ResourceTemplate () {\r
453 IO (Decode16, 0x00, 0x00, 0, 0x10)\r
454 IO (Decode16, 0x81, 0x81, 0, 0x03)\r
455 IO (Decode16, 0x87, 0x87, 0, 0x01)\r
456 IO (Decode16, 0x89, 0x89, 0, 0x03)\r
457 IO (Decode16, 0x8f, 0x8f, 0, 0x01)\r
458 IO (Decode16, 0xc0, 0xc0, 0, 0x20)\r
459 DMA (Compatibility, NotBusMaster, Transfer8) {4}\r
460 })\r
461 }\r
462\r
463 //\r
464 // 8254 Timer\r
465 //\r
466 Device(TMR) {\r
467 Name(_HID,EISAID("PNP0100"))\r
468 Name(_CRS, ResourceTemplate () {\r
469 IO (Decode16, 0x40, 0x40, 0x00, 0x04)\r
470 IRQNoFlags () {0}\r
9388fd3d 471 //\r
472 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0\r
473 //\r
49ba9447 474 })\r
475 }\r
476\r
477 //\r
478 // Real Time Clock\r
479 //\r
480 Device (RTC) {\r
481 Name (_HID, EISAID ("PNP0B00"))\r
482 Name (_CRS, ResourceTemplate () {\r
483 IO (Decode16, 0x70, 0x70, 0x00, 0x02)\r
484 IRQNoFlags () {8}\r
9388fd3d 485 //\r
486 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8\r
487 //\r
49ba9447 488 })\r
489 }\r
490\r
491 //\r
492 // PCAT Speaker\r
493 //\r
494 Device(SPKR) {\r
495 Name (_HID, EISAID("PNP0800"))\r
496 Name (_CRS, ResourceTemplate () {\r
497 IO (Decode16, 0x61, 0x61, 0x01, 0x01)\r
498 })\r
499 }\r
500\r
501 //\r
502 // Floating Point Coprocessor\r
503 //\r
504 Device(FPU) {\r
505 Name (_HID, EISAID("PNP0C04"))\r
506 Name (_CRS, ResourceTemplate () {\r
507 IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)\r
508 IRQNoFlags () {13}\r
9388fd3d 509 //\r
510 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13\r
511 //\r
49ba9447 512 })\r
513 }\r
514\r
515 //\r
516 // Generic motherboard devices and pieces that don't fit anywhere else\r
517 //\r
518 Device(XTRA) {\r
519 Name (_HID, EISAID ("PNP0C02"))\r
520 Name (_UID, 0x01)\r
521 Name (_CRS, ResourceTemplate () {\r
522 IO (Decode16, 0x010, 0x010, 0x00, 0x10)\r
523 IO (Decode16, 0x022, 0x022, 0x00, 0x1E)\r
524 IO (Decode16, 0x044, 0x044, 0x00, 0x1C)\r
525 IO (Decode16, 0x062, 0x062, 0x00, 0x02)\r
526 IO (Decode16, 0x065, 0x065, 0x00, 0x0B)\r
527 IO (Decode16, 0x072, 0x072, 0x00, 0x0E)\r
528 IO (Decode16, 0x080, 0x080, 0x00, 0x01)\r
529 IO (Decode16, 0x084, 0x084, 0x00, 0x03)\r
530 IO (Decode16, 0x088, 0x088, 0x00, 0x01)\r
531 IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)\r
532 IO (Decode16, 0x090, 0x090, 0x00, 0x10)\r
533 IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)\r
534 IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)\r
535 IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)\r
536 IO (Decode16, 0x160, 0x160, 0x00, 0x10)\r
537 IO (Decode16, 0x278, 0x278, 0x00, 0x08)\r
538 IO (Decode16, 0x370, 0x370, 0x00, 0x02)\r
539 IO (Decode16, 0x378, 0x378, 0x00, 0x08)\r
5e57fb75 540 IO (Decode16, 0x402, 0x402, 0x00, 0x01) // QEMU debug console, should use FixedPcdGet16 (PcdDebugIoPort)\r
49ba9447 541 IO (Decode16, 0x440, 0x440, 0x00, 0x10)\r
542 IO (Decode16, 0x678, 0x678, 0x00, 0x08)\r
543 IO (Decode16, 0x778, 0x778, 0x00, 0x08)\r
6d4f320d 544 IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK\r
545 IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1\r
546 Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC\r
547 Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC\r
49ba9447 548 })\r
549 }\r
550\r
551 //\r
552 // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102\r
553 //\r
0228e598 554 Device (PS2K) {\r
49ba9447 555 Name (_HID, EISAID ("PNP0303"))\r
556 Name (_CID, EISAID ("PNP030B"))\r
557 Name(_CRS,ResourceTemplate() {\r
558 IO (Decode16, 0x60, 0x60, 0x00, 0x01)\r
559 IO (Decode16, 0x64, 0x64, 0x00, 0x01)\r
560 IRQNoFlags () {1}\r
9388fd3d 561 //\r
562 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1\r
563 //\r
49ba9447 564 })\r
565 }\r
566\r
567 //\r
568 // PS/2 Mouse and Microsoft Mouse\r
569 //\r
570 Device (PS2M) { // PS/2 stype mouse port\r
571 Name (_HID, EISAID ("PNP0F03"))\r
572 Name (_CID, EISAID ("PNP0F13"))\r
573 Name (_CRS, ResourceTemplate() {\r
574 IRQNoFlags () {12}\r
9388fd3d 575 //\r
576 // list of IRQs occupied thus far:\r
577 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12\r
578 //\r
49ba9447 579 })\r
580 }\r
581\r
582 //\r
583 // UART Serial Port - COM1\r
584 //\r
585 Device (UAR1) {\r
586 Name (_HID, EISAID ("PNP0501"))\r
587 Name (_DDN, "COM1")\r
588 Name (_UID, 0x01)\r
589 Name(_CRS,ResourceTemplate() {\r
590 IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)\r
591 IRQ (Edge, ActiveHigh, Exclusive, ) {4}\r
9388fd3d 592 //\r
593 // list of IRQs occupied thus far:\r
594 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4\r
595 //\r
49ba9447 596 })\r
597 }\r
598\r
599 //\r
600 // UART Serial Port - COM2\r
601 //\r
602 Device (UAR2) {\r
603 Name (_HID, EISAID ("PNP0501"))\r
604 Name (_DDN, "COM2")\r
605 Name (_UID, 0x02)\r
606 Name(_CRS,ResourceTemplate() {\r
607 IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)\r
608 IRQ (Edge, ActiveHigh, Exclusive, ) {3}\r
9388fd3d 609 //\r
610 // list of IRQs occupied thus far:\r
611 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3\r
612 //\r
49ba9447 613 })\r
614 }\r
615\r
616 //\r
617 // Floppy Disk Controller\r
618 //\r
619 Device (FDC) {\r
620 Name (_HID, EISAID ("PNP0700"))\r
621 Name (_CRS,ResourceTemplate() {\r
622 IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)\r
623 IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)\r
624 IRQNoFlags () {6}\r
9388fd3d 625 //\r
626 // list of IRQs occupied thus far:\r
627 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6\r
628 //\r
49ba9447 629 DMA (Compatibility, NotBusMaster, Transfer8) {2}\r
630 })\r
631 }\r
cc2f2c41 632\r
633 //\r
634 // parallel port -- no DMA for now\r
635 //\r
636 Device (PAR1) {\r
637 Name (_HID, EISAID ("PNP0400"))\r
638 Name (_DDN, "LPT1")\r
639 Name (_UID, 0x01)\r
640 Name(_CRS, ResourceTemplate() {\r
641 IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)\r
642 IRQNoFlags () {7}\r
9388fd3d 643 //\r
644 // list of IRQs occupied thus far:\r
645 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7\r
646 // in order:\r
647 // 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13\r
648 //\r
cc2f2c41 649 })\r
650 }\r
49ba9447 651 }\r
652 }\r
653 }\r
654}\r
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