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OvmfPkg: Replace BSD License with BSD+Patent License
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49ba9447 1/** @file\r
2 Contains root level name space objects for the platform\r
0228e598 3\r
56d7640a 4 Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
b26f0cf9 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
49ba9447 6\r
0228e598 7**/\r
49ba9447 8\r
9388fd3d 9DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {\r
49ba9447 10 //\r
11 // System Sleep States\r
12 //\r
14430c55 13 // We build S3 and S4 with GetSuspendStates() in\r
14 // "OvmfPkg/AcpiPlatformDxe/Qemu.c".\r
15 //\r
4ee7f57c 16 Name (\_S0, Package () {5, 0, 0, 0}) // Working\r
4ee7f57c 17 Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off\r
49ba9447 18\r
19 //\r
20 // System Bus\r
21 //\r
22 Scope (\_SB) {\r
23 //\r
24 // PCI Root Bridge\r
25 //\r
26 Device (PCI0) {\r
27 Name (_HID, EISAID ("PNP0A03"))\r
28 Name (_ADR, 0x00000000)\r
29 Name (_BBN, 0x00)\r
30 Name (_UID, 0x00)\r
31\r
32 //\r
33 // BUS, I/O, and MMIO resources\r
34 //\r
cf98e61d 35 Name (CRES, ResourceTemplate () {\r
49ba9447 36 WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses\r
37 ResourceProducer, // bit 0 of general flags is 1\r
38 MinFixed, // Range is fixed\r
39 MaxFixed, // Range is fixed\r
40 PosDecode, // PosDecode\r
41 0x0000, // Granularity\r
42 0x0000, // Min\r
43 0x00FF, // Max\r
44 0x0000, // Translation\r
45 0x0100 // Range Length = Max-Min+1\r
46 )\r
47\r
48 IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)\r
49\r
50 WORDIO ( // Consumed-and-produced resource (all I/O below CF8)\r
51 ResourceProducer, // bit 0 of general flags is 0\r
52 MinFixed, // Range is fixed\r
53 MaxFixed, // Range is fixed\r
0228e598 54 PosDecode,\r
49ba9447 55 EntireRange,\r
56 0x0000, // Granularity\r
57 0x0000, // Min\r
58 0x0CF7, // Max\r
59 0x0000, // Translation\r
60 0x0CF8 // Range Length\r
61 )\r
62\r
63 WORDIO ( // Consumed-and-produced resource (all I/O above CFF)\r
64 ResourceProducer, // bit 0 of general flags is 0\r
65 MinFixed, // Range is fixed\r
66 MaxFixed, // Range is fixed\r
0228e598 67 PosDecode,\r
49ba9447 68 EntireRange,\r
69 0x0000, // Granularity\r
70 0x0D00, // Min\r
71 0xFFFF, // Max\r
72 0x0000, // Translation\r
73 0xF300 // Range Length\r
74 )\r
75\r
76 DWORDMEMORY ( // Descriptor for legacy VGA video RAM\r
77 ResourceProducer, // bit 0 of general flags is 0\r
78 PosDecode,\r
79 MinFixed, // Range is fixed\r
80 MaxFixed, // Range is Fixed\r
81 Cacheable,\r
82 ReadWrite,\r
83 0x00000000, // Granularity\r
84 0x000A0000, // Min\r
85 0x000BFFFF, // Max\r
86 0x00000000, // Translation\r
87 0x00020000 // Range Length\r
88 )\r
89\r
cf98e61d 90 DWORDMEMORY ( // Descriptor for 32-bit MMIO\r
49ba9447 91 ResourceProducer, // bit 0 of general flags is 0\r
92 PosDecode,\r
93 MinFixed, // Range is fixed\r
94 MaxFixed, // Range is Fixed\r
cf98e61d 95 NonCacheable,\r
49ba9447 96 ReadWrite,\r
97 0x00000000, // Granularity\r
98 0xF8000000, // Min\r
99 0xFFFBFFFF, // Max\r
100 0x00000000, // Translation\r
cf98e61d 101 0x07FC0000, // Range Length\r
102 , // ResourceSourceIndex\r
103 , // ResourceSource\r
104 PW32 // DescriptorName\r
49ba9447 105 )\r
106 })\r
107\r
cf98e61d 108 Name (CR64, ResourceTemplate () {\r
109 QWordMemory ( // Descriptor for 64-bit MMIO\r
110 ResourceProducer, // bit 0 of general flags is 0\r
111 PosDecode,\r
112 MinFixed, // Range is fixed\r
113 MaxFixed, // Range is Fixed\r
114 Cacheable,\r
115 ReadWrite,\r
116 0x00000000, // Granularity\r
117 0x8000000000, // Min\r
118 0xFFFFFFFFFF, // Max\r
119 0x00000000, // Translation\r
120 0x8000000000, // Range Length\r
121 , // ResourceSourceIndex\r
122 , // ResourceSource\r
123 PW64 // DescriptorName\r
124 )\r
125 })\r
126\r
f1cbea14 127 Method (_CRS, 0, Serialized) {\r
cf98e61d 128 //\r
129 // see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"\r
130 //\r
131 External (FWDT, OpRegionObj)\r
132 Field(FWDT, QWordAcc, NoLock, Preserve) {\r
133 P0S, 64, // PciWindow32.Base\r
134 P0E, 64, // PciWindow32.End\r
135 P0L, 64, // PciWindow32.Length\r
136 P1S, 64, // PciWindow64.Base\r
137 P1E, 64, // PciWindow64.End\r
138 P1L, 64 // PciWindow64.Length\r
139 }\r
140 Field(FWDT, DWordAcc, NoLock, Preserve) {\r
141 P0SL, 32, // PciWindow32.Base, low 32 bits\r
142 P0SH, 32, // PciWindow32.Base, high 32 bits\r
143 P0EL, 32, // PciWindow32.End, low 32 bits\r
144 P0EH, 32, // PciWindow32.End, high 32 bits\r
145 P0LL, 32, // PciWindow32.Length, low 32 bits\r
146 P0LH, 32, // PciWindow32.Length, high 32 bits\r
147 P1SL, 32, // PciWindow64.Base, low 32 bits\r
148 P1SH, 32, // PciWindow64.Base, high 32 bits\r
149 P1EL, 32, // PciWindow64.End, low 32 bits\r
150 P1EH, 32, // PciWindow64.End, high 32 bits\r
151 P1LL, 32, // PciWindow64.Length, low 32 bits\r
152 P1LH, 32 // PciWindow64.Length, high 32 bits\r
153 }\r
154\r
155 //\r
156 // fixup 32-bit PCI IO window\r
157 //\r
158 CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)\r
159 CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)\r
160 CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)\r
161 Store (P0SL, PS32)\r
162 Store (P0EL, PE32)\r
163 Store (P0LL, PL32)\r
164\r
165 If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {\r
166 Return (CRES)\r
167 } Else {\r
168 //\r
169 // fixup 64-bit PCI IO window\r
170 //\r
171 CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)\r
172 CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)\r
173 CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)\r
174 Store (P1S, PS64)\r
175 Store (P1E, PE64)\r
176 Store (P1L, PL64)\r
177\r
178 //\r
179 // add window and return result\r
180 //\r
181 ConcatenateResTemplate (CRES, CR64, Local0)\r
182 Return (Local0)\r
183 }\r
184 }\r
185\r
49ba9447 186 //\r
187 // PCI Interrupt Routing Table - PIC Mode Only\r
188 //\r
189 Method (_PRT, 0, NotSerialized) {\r
190 Return (\r
191 Package () {\r
192 //\r
9388fd3d 193 // Bus 0; Devices 0 to 15\r
194 //\r
195 Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
196 Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
197 Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
198 Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
199\r
9388fd3d 200 //\r
0c504abf 201 // Bus 0, Device 1, Pin 0 (INTA) is special; it corresponds to the\r
202 // internally generated SCI (System Control Interrupt), which is\r
203 // always routed to GSI 9. By setting the third (= Source) field to\r
204 // zero, we could use the fourth (= Source Index) field to hardwire\r
205 // the pin to GSI 9 directly.\r
206 //\r
207 // That way however, in accordance with the ACPI spec's description\r
208 // of SCI, the interrupt would be treated as "active low,\r
209 // shareable, level", and that doesn't match qemu.\r
49ba9447 210 //\r
0c504abf 211 // In QemuInstallAcpiMadtTable() [OvmfPkg/AcpiPlatformDxe/Qemu.c]\r
212 // we install an Interrupt Override Structure for the identity\r
213 // mapped IRQ#9 / GSI 9 (the corresponding bit being set in\r
214 // Pcd8259LegacyModeEdgeLevel), which describes the correct\r
215 // polarity (active high). As a consequence, some OS'en (eg. Linux)\r
216 // override the default (active low) polarity originating from the\r
217 // _PRT; others (eg. FreeBSD) don't. Therefore we need a separate\r
218 // link device just to specify a polarity that matches the MADT.\r
219 //\r
220 Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKS, 0x00},\r
221\r
49ba9447 222 Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
223 Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
224 Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
9388fd3d 225\r
226 Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
227 Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
228 Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
229 Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
230\r
231 Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
232 Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
233 Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
234 Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
235\r
236 Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
237 Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
238 Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
239 Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
240\r
241 Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
242 Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
243 Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
244 Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
245\r
246 Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
247 Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
248 Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
249 Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
250\r
251 Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
252 Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
253 Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
254 Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
255\r
256 Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
257 Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
258 Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
259 Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
260\r
261 Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
262 Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
263 Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
264 Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
265\r
266 Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
267 Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
268 Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
269 Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
270\r
271 Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
272 Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
273 Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
274 Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},\r
275\r
276 Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},\r
277 Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},\r
278 Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},\r
279 Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},\r
280\r
281 Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},\r
282 Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},\r
283 Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},\r
284 Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},\r
285\r
286 Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},\r
287 Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},\r
288 Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},\r
289 Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},\r
290\r
291 Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},\r
292 Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},\r
293 Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},\r
294 Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}\r
49ba9447 295 }\r
296 )\r
297 }\r
298\r
299 //\r
300 // PCI to ISA Bridge (Bus 0, Device 1, Function 0)\r
b636c6e5 301 // "Low Pin Count"\r
49ba9447 302 //\r
303 Device (LPC) {\r
304 Name (_ADR, 0x00010000)\r
305\r
0c504abf 306 //\r
307 // The SCI cannot be rerouted or disabled with PIRQRC[A:D]; we only\r
308 // need this link device in order to specify the polarity.\r
309 //\r
310 Device (LNKS) {\r
311 Name (_HID, EISAID("PNP0C0F"))\r
312 Name (_UID, 0)\r
313\r
314 Name (_STA, 0xB) // 0x1: device present\r
315 // 0x2: enabled and decoding resources\r
316 // 0x8: functioning properly\r
317\r
318 Method (_SRS, 1, NotSerialized) { /* no-op */ }\r
319 Method (_DIS, 0, NotSerialized) { /* no-op */ }\r
320\r
321 Name (_PRS, ResourceTemplate () {\r
322 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 9 }\r
323 //\r
324 // list of IRQs occupied thus far: 9\r
325 //\r
326 })\r
327 Method (_CRS, 0, NotSerialized) { Return (_PRS) }\r
328 }\r
329\r
49ba9447 330 //\r
b636c6e5 331 // PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]\r
49ba9447 332 //\r
333 OperationRegion (PRR0, PCI_Config, 0x60, 0x04)\r
334 Field (PRR0, ANYACC, NOLOCK, PRESERVE) {\r
335 PIRA, 8,\r
336 PIRB, 8,\r
337 PIRC, 8,\r
338 PIRD, 8\r
339 }\r
340\r
341 //\r
342 // _STA method for LNKA, LNKB, LNKC, LNKD\r
b636c6e5 343 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD\r
49ba9447 344 //\r
345 Method (PSTA, 1, NotSerialized) {\r
b636c6e5 346 If (And (Arg0, 0x80)) { // disable-bit set?\r
347 Return (0x9) // "device present" | "functioning properly"\r
49ba9447 348 } Else {\r
b636c6e5 349 Return (0xB) // same | "enabled and decoding resources"\r
49ba9447 350 }\r
351 }\r
352\r
49ba9447 353 //\r
354 // _CRS method for LNKA, LNKB, LNKC, LNKD\r
b636c6e5 355 // Arg0[in]: value of PIRA / PIRB / PIRC / PIRD\r
49ba9447 356 //\r
f1cbea14 357 Method (PCRS, 1, Serialized) {\r
49ba9447 358 //\r
cc16a929 359 // create temporary buffer with an Extended Interrupt Descriptor\r
360 // whose single vector defaults to zero\r
49ba9447 361 //\r
cc16a929 362 Name (BUF0, ResourceTemplate () {\r
56daf8b9 363 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}\r
cc16a929 364 }\r
365 )\r
366\r
49ba9447 367 //\r
cc16a929 368 // define reference to first interrupt vector in buffer\r
49ba9447 369 //\r
cc16a929 370 CreateDWordField (BUF0, 0x05, IRQW)\r
371\r
49ba9447 372 //\r
cc16a929 373 // If the disable-bit is clear, overwrite the default zero vector\r
374 // with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read\r
375 // as 0.\r
49ba9447 376 //\r
cc16a929 377 If (LNot (And (Arg0, 0x80))) {\r
378 Store (Arg0, IRQW)\r
379 }\r
380 Return (BUF0)\r
49ba9447 381 }\r
382\r
383 //\r
384 // _PRS resource for LNKA, LNKB, LNKC, LNKD\r
385 //\r
386 Name (PPRS, ResourceTemplate () {\r
9388fd3d 387 Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}\r
388 //\r
389 // list of IRQs occupied thus far: 9, 5, 10, 11\r
390 //\r
49ba9447 391 })\r
392\r
49ba9447 393 //\r
394 // PCI IRQ Link A\r
395 //\r
396 Device (LNKA) {\r
397 Name (_HID, EISAID("PNP0C0F"))\r
398 Name (_UID, 1)\r
399\r
400 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }\r
a42bdfcc 401 Method (_DIS, 0, NotSerialized) {\r
402 Or (PIRA, 0x80, PIRA) // set disable-bit\r
403 }\r
49ba9447 404 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }\r
405 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 406 Method (_SRS, 1, NotSerialized) {\r
407 CreateDWordField (Arg0, 0x05, IRQW)\r
408 Store (IRQW, PIRA)\r
409 }\r
49ba9447 410 }\r
411\r
412 //\r
413 // PCI IRQ Link B\r
414 //\r
415 Device (LNKB) {\r
416 Name (_HID, EISAID("PNP0C0F"))\r
417 Name (_UID, 2)\r
418\r
419 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }\r
a42bdfcc 420 Method (_DIS, 0, NotSerialized) {\r
421 Or (PIRB, 0x80, PIRB) // set disable-bit\r
422 }\r
49ba9447 423 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }\r
424 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 425 Method (_SRS, 1, NotSerialized) {\r
426 CreateDWordField (Arg0, 0x05, IRQW)\r
427 Store (IRQW, PIRB)\r
428 }\r
49ba9447 429 }\r
430\r
431 //\r
432 // PCI IRQ Link C\r
433 //\r
434 Device (LNKC) {\r
435 Name (_HID, EISAID("PNP0C0F"))\r
436 Name (_UID, 3)\r
437\r
438 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }\r
a42bdfcc 439 Method (_DIS, 0, NotSerialized) {\r
440 Or (PIRC, 0x80, PIRC) // set disable-bit\r
441 }\r
49ba9447 442 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }\r
443 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 444 Method (_SRS, 1, NotSerialized) {\r
445 CreateDWordField (Arg0, 0x05, IRQW)\r
446 Store (IRQW, PIRC)\r
447 }\r
49ba9447 448 }\r
449\r
450 //\r
451 // PCI IRQ Link D\r
452 //\r
453 Device (LNKD) {\r
454 Name (_HID, EISAID("PNP0C0F"))\r
ba01f3b9 455 Name (_UID, 4)\r
49ba9447 456\r
457 Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }\r
a42bdfcc 458 Method (_DIS, 0, NotSerialized) {\r
459 Or (PIRD, 0x80, PIRD) // set disable-bit\r
460 }\r
49ba9447 461 Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }\r
462 Method (_PRS, 0, NotSerialized) { Return (PPRS) }\r
a42bdfcc 463 Method (_SRS, 1, NotSerialized) {\r
464 CreateDWordField (Arg0, 0x05, IRQW)\r
465 Store (IRQW, PIRD)\r
466 }\r
49ba9447 467 }\r
0228e598 468\r
49ba9447 469 //\r
470 // Programmable Interrupt Controller (PIC)\r
471 //\r
472 Device(PIC) {\r
473 Name (_HID, EISAID ("PNP0000"))\r
474 Name (_CRS, ResourceTemplate () {\r
475 IO (Decode16, 0x020, 0x020, 0x00, 0x02)\r
476 IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)\r
477 IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)\r
478 IRQNoFlags () {2}\r
9388fd3d 479 //\r
480 // list of IRQs occupied thus far: 9, 5, 10, 11, 2\r
481 //\r
49ba9447 482 })\r
483 }\r
484\r
485 //\r
0228e598 486 // ISA DMA\r
49ba9447 487 //\r
488 Device (DMAC) {\r
0228e598 489 Name (_HID, EISAID ("PNP0200"))\r
49ba9447 490 Name (_CRS, ResourceTemplate () {\r
491 IO (Decode16, 0x00, 0x00, 0, 0x10)\r
492 IO (Decode16, 0x81, 0x81, 0, 0x03)\r
493 IO (Decode16, 0x87, 0x87, 0, 0x01)\r
494 IO (Decode16, 0x89, 0x89, 0, 0x03)\r
495 IO (Decode16, 0x8f, 0x8f, 0, 0x01)\r
496 IO (Decode16, 0xc0, 0xc0, 0, 0x20)\r
497 DMA (Compatibility, NotBusMaster, Transfer8) {4}\r
498 })\r
499 }\r
500\r
501 //\r
502 // 8254 Timer\r
503 //\r
504 Device(TMR) {\r
505 Name(_HID,EISAID("PNP0100"))\r
506 Name(_CRS, ResourceTemplate () {\r
507 IO (Decode16, 0x40, 0x40, 0x00, 0x04)\r
508 IRQNoFlags () {0}\r
9388fd3d 509 //\r
510 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0\r
511 //\r
49ba9447 512 })\r
513 }\r
514\r
515 //\r
516 // Real Time Clock\r
517 //\r
518 Device (RTC) {\r
519 Name (_HID, EISAID ("PNP0B00"))\r
520 Name (_CRS, ResourceTemplate () {\r
521 IO (Decode16, 0x70, 0x70, 0x00, 0x02)\r
522 IRQNoFlags () {8}\r
9388fd3d 523 //\r
524 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8\r
525 //\r
49ba9447 526 })\r
527 }\r
528\r
529 //\r
530 // PCAT Speaker\r
531 //\r
532 Device(SPKR) {\r
533 Name (_HID, EISAID("PNP0800"))\r
534 Name (_CRS, ResourceTemplate () {\r
535 IO (Decode16, 0x61, 0x61, 0x01, 0x01)\r
536 })\r
537 }\r
538\r
539 //\r
540 // Floating Point Coprocessor\r
541 //\r
542 Device(FPU) {\r
543 Name (_HID, EISAID("PNP0C04"))\r
544 Name (_CRS, ResourceTemplate () {\r
545 IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)\r
546 IRQNoFlags () {13}\r
9388fd3d 547 //\r
548 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13\r
549 //\r
49ba9447 550 })\r
551 }\r
552\r
553 //\r
554 // Generic motherboard devices and pieces that don't fit anywhere else\r
555 //\r
556 Device(XTRA) {\r
557 Name (_HID, EISAID ("PNP0C02"))\r
558 Name (_UID, 0x01)\r
559 Name (_CRS, ResourceTemplate () {\r
560 IO (Decode16, 0x010, 0x010, 0x00, 0x10)\r
561 IO (Decode16, 0x022, 0x022, 0x00, 0x1E)\r
562 IO (Decode16, 0x044, 0x044, 0x00, 0x1C)\r
563 IO (Decode16, 0x062, 0x062, 0x00, 0x02)\r
564 IO (Decode16, 0x065, 0x065, 0x00, 0x0B)\r
565 IO (Decode16, 0x072, 0x072, 0x00, 0x0E)\r
566 IO (Decode16, 0x080, 0x080, 0x00, 0x01)\r
567 IO (Decode16, 0x084, 0x084, 0x00, 0x03)\r
568 IO (Decode16, 0x088, 0x088, 0x00, 0x01)\r
569 IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)\r
570 IO (Decode16, 0x090, 0x090, 0x00, 0x10)\r
571 IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)\r
572 IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)\r
573 IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)\r
574 IO (Decode16, 0x160, 0x160, 0x00, 0x10)\r
575 IO (Decode16, 0x278, 0x278, 0x00, 0x08)\r
576 IO (Decode16, 0x370, 0x370, 0x00, 0x02)\r
577 IO (Decode16, 0x378, 0x378, 0x00, 0x08)\r
ad13d7d2 578 IO (Decode16, FixedPcdGet16 (PcdDebugIoPort), FixedPcdGet16 (PcdDebugIoPort), 0x00, 0x01)\r
49ba9447 579 IO (Decode16, 0x440, 0x440, 0x00, 0x10)\r
580 IO (Decode16, 0x678, 0x678, 0x00, 0x08)\r
581 IO (Decode16, 0x778, 0x778, 0x00, 0x08)\r
6d4f320d 582 IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK\r
583 IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1\r
584 Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC\r
585 Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC\r
49ba9447 586 })\r
587 }\r
588\r
589 //\r
590 // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102\r
591 //\r
0228e598 592 Device (PS2K) {\r
49ba9447 593 Name (_HID, EISAID ("PNP0303"))\r
594 Name (_CID, EISAID ("PNP030B"))\r
595 Name(_CRS,ResourceTemplate() {\r
596 IO (Decode16, 0x60, 0x60, 0x00, 0x01)\r
597 IO (Decode16, 0x64, 0x64, 0x00, 0x01)\r
598 IRQNoFlags () {1}\r
9388fd3d 599 //\r
600 // list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1\r
601 //\r
49ba9447 602 })\r
603 }\r
604\r
605 //\r
606 // PS/2 Mouse and Microsoft Mouse\r
607 //\r
608 Device (PS2M) { // PS/2 stype mouse port\r
609 Name (_HID, EISAID ("PNP0F03"))\r
610 Name (_CID, EISAID ("PNP0F13"))\r
611 Name (_CRS, ResourceTemplate() {\r
612 IRQNoFlags () {12}\r
9388fd3d 613 //\r
614 // list of IRQs occupied thus far:\r
615 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12\r
616 //\r
49ba9447 617 })\r
618 }\r
619\r
620 //\r
621 // UART Serial Port - COM1\r
622 //\r
623 Device (UAR1) {\r
624 Name (_HID, EISAID ("PNP0501"))\r
625 Name (_DDN, "COM1")\r
626 Name (_UID, 0x01)\r
627 Name(_CRS,ResourceTemplate() {\r
628 IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)\r
629 IRQ (Edge, ActiveHigh, Exclusive, ) {4}\r
9388fd3d 630 //\r
631 // list of IRQs occupied thus far:\r
632 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4\r
633 //\r
49ba9447 634 })\r
635 }\r
636\r
637 //\r
638 // UART Serial Port - COM2\r
639 //\r
640 Device (UAR2) {\r
641 Name (_HID, EISAID ("PNP0501"))\r
642 Name (_DDN, "COM2")\r
643 Name (_UID, 0x02)\r
644 Name(_CRS,ResourceTemplate() {\r
645 IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)\r
646 IRQ (Edge, ActiveHigh, Exclusive, ) {3}\r
9388fd3d 647 //\r
648 // list of IRQs occupied thus far:\r
649 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3\r
650 //\r
49ba9447 651 })\r
652 }\r
653\r
654 //\r
655 // Floppy Disk Controller\r
656 //\r
657 Device (FDC) {\r
658 Name (_HID, EISAID ("PNP0700"))\r
659 Name (_CRS,ResourceTemplate() {\r
660 IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)\r
661 IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)\r
662 IRQNoFlags () {6}\r
9388fd3d 663 //\r
664 // list of IRQs occupied thus far:\r
665 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6\r
666 //\r
49ba9447 667 DMA (Compatibility, NotBusMaster, Transfer8) {2}\r
668 })\r
669 }\r
cc2f2c41 670\r
671 //\r
672 // parallel port -- no DMA for now\r
673 //\r
674 Device (PAR1) {\r
675 Name (_HID, EISAID ("PNP0400"))\r
676 Name (_DDN, "LPT1")\r
677 Name (_UID, 0x01)\r
678 Name(_CRS, ResourceTemplate() {\r
679 IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)\r
680 IRQNoFlags () {7}\r
9388fd3d 681 //\r
682 // list of IRQs occupied thus far:\r
683 // 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7\r
684 // in order:\r
685 // 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13\r
686 //\r
cc2f2c41 687 })\r
688 }\r
49ba9447 689 }\r
690 }\r
691 }\r
692}\r
EFI Development Kit II mirror for PVE