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Commit | Line | Data |
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49ba9447 | 1 | /** @file\r |
2 | FACP Table\r | |
2712ab4f | 3 | \r |
8eb28fe7 | 4 | Copyright (c) 2013, Red Hat, Inc.\r |
ce68d3bc | 5 | Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>\r |
b26f0cf9 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
49ba9447 | 7 | \r |
2712ab4f | 8 | **/\r |
9 | \r | |
49ba9447 | 10 | #include "Platform.h"\r |
11 | \r | |
304606c0 | 12 | EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {\r |
ce68d3bc | 13 | {\r |
304606c0 | 14 | EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,\r |
15 | sizeof (EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE),\r | |
16 | EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,\r | |
ce68d3bc SZ |
17 | 0, // to make sum of entire table == 0\r |
18 | {EFI_ACPI_OEM_ID}, // OEMID is a 6 bytes long field\r | |
19 | EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long)\r | |
20 | EFI_ACPI_OEM_REVISION, // OEM revision number\r | |
21 | EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID\r | |
22 | EFI_ACPI_CREATOR_REVISION // ASL compiler revision number\r | |
23 | },\r | |
f221466e | 24 | 0, // Physical address of FACS\r |
49ba9447 | 25 | 0, // Physical address of DSDT\r |
304606c0 | 26 | RESERVED, // System Interrupt Model in ACPI 1.0, eliminated in 2.0\r |
27 | EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED, // Preferred PM profile\r | |
49ba9447 | 28 | SCI_INT_VECTOR, // System vector of SCI interrupt\r |
29 | SMI_CMD_IO_PORT, // Port address of SMI command port\r | |
30 | ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI\r | |
31 | ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI\r | |
32 | S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state\r | |
7c9ff57b | 33 | 0, // PState control\r |
49ba9447 | 34 | PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk\r |
8eb28fe7 | 35 | 0, // Power Mgt 1b Event Reg Blk unsupported\r |
49ba9447 | 36 | PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk\r |
8eb28fe7 | 37 | 0, // Power Mgt 1b Ctrl Reg Blk unsupported\r |
1e69186a | 38 | 0, // Power Mgt 2 Ctrl Reg Blk unsupported\r |
49ba9447 | 39 | PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk\r |
40 | GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk\r | |
e1fad9b3 | 41 | 0, // General Purpose Event 1 Reg Blk unsupported\r |
49ba9447 | 42 | PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk\r |
43 | PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk\r | |
1e69186a | 44 | 0, // Power Mgt 2 Ctrl Reg Blk unsupported\r |
49ba9447 | 45 | PM_TM_LEN, // Byte Length of ports at pm_tm_blk\r |
46 | GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk\r | |
e1fad9b3 | 47 | 0, // General Purpose Event 1 Reg Blk unsupported\r |
48 | 0, // General Purpose Event 1 Reg Blk unsupported\r | |
7c9ff57b | 49 | 0, // _CST support\r |
49ba9447 | 50 | P_LVL2_LAT, // worst case HW latency to enter/exit C2 state\r |
51 | P_LVL3_LAT, // worst case HW latency to enter/exit C3 state\r | |
52 | FLUSH_SIZE, // Size of area read to flush caches\r | |
53 | FLUSH_STRIDE, // Stride used in flushing caches\r | |
54 | DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg\r | |
55 | DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg\r | |
56 | DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM\r | |
57 | MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM\r | |
58 | CENTURY, // index to century in RTC CMOS RAM\r | |
304606c0 | 59 | 0x0000, // Boot architecture flag (16-bit)\r |
2712ab4f | 60 | RESERVED, // reserved\r |
304606c0 | 61 | FLAG, // Fixed feature flags\r |
1bccb20c | 62 | GAS2_IO(RESET_REG, 1), // Extended address of the Reset Register\r |
63 | RESET_VALUE, // Value for the Reset Register to reset the system\r | |
304606c0 | 64 | { RESERVED }, // reserved[3]\r |
f221466e AC |
65 | 0, // 64-bit physical address of FACS, set at installation\r |
66 | 0, // 64-bit physical address of DSDT, set at installation\r | |
304606c0 | 67 | \r |
68 | GAS2_IO(PM1a_EVT_BLK, PM1_EVT_LEN), // Ext. addr. of PM 1a Event Reg Blk\r | |
69 | { 0 }, // PM 1b Event Reg Blk unsupported\r | |
70 | GAS2_IO(PM1a_CNT_BLK, PM1_CNT_LEN), // Ext. addr. of PM 1a Ctrl Reg Blk\r | |
71 | { 0 }, // PM 1b Ctrl Reg Blk unsupported\r | |
72 | { 0 }, // PM 2 Ctrl Reg Blk unsupported\r | |
73 | GAS2_IO(PM_TMR_BLK, PM_TM_LEN), // Ext. addr. of PM Timer Ctrl Reg Blk\r | |
74 | GAS2_IO(GPE0_BLK, GPE0_BLK_LEN), // Ext. addr. of GPE 0 Reg Blk\r | |
75 | { 0 } // GPE 1 Reg Blk unsupported\r | |
49ba9447 | 76 | };\r |
77 | \r | |
78 | \r | |
79 | VOID*\r | |
80 | ReferenceAcpiTable (\r | |
81 | VOID\r | |
82 | )\r | |
83 | {\r | |
84 | //\r | |
2712ab4f | 85 | // Reference the table being generated to prevent the optimizer from removing the\r |
f221466e | 86 | // data structure from the executable\r |
49ba9447 | 87 | //\r |
88 | return (VOID*)&FACP;\r | |
89 | }\r |