projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 656419f9 RC |
1 | /** @file\r |
| 2 | Platform PEI module include file.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>\r | |
| 5 | Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 7 | \r | |
| 8 | **/\r | |
| 9 | \r | |
| 10 | #ifndef _PLATFORM_PEI_H_INCLUDED_\r | |
| 11 | #define _PLATFORM_PEI_H_INCLUDED_\r | |
| 12 | \r | |
| 13 | #include <IndustryStandard/E820.h>\r | |
| 14 | \r | |
| 15 | VOID\r | |
| 16 | AddIoMemoryBaseSizeHob (\r | |
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17 | EFI_PHYSICAL_ADDRESS MemoryBase,\r |
| 18 | UINT64 MemorySize\r | |
| 656419f9 RC |
19 | );\r |
| 20 | \r | |
| 21 | VOID\r | |
| 22 | AddIoMemoryRangeHob (\r | |
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23 | EFI_PHYSICAL_ADDRESS MemoryBase,\r |
| 24 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 656419f9 RC |
25 | );\r |
| 26 | \r | |
| 27 | VOID\r | |
| 28 | AddMemoryBaseSizeHob (\r | |
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29 | EFI_PHYSICAL_ADDRESS MemoryBase,\r |
| 30 | UINT64 MemorySize\r | |
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31 | );\r |
| 32 | \r | |
| 33 | VOID\r | |
| 34 | AddMemoryRangeHob (\r | |
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35 | EFI_PHYSICAL_ADDRESS MemoryBase,\r |
| 36 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
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37 | );\r |
| 38 | \r | |
| 39 | VOID\r | |
| 40 | AddReservedMemoryBaseSizeHob (\r | |
| ac0a286f MK |
41 | EFI_PHYSICAL_ADDRESS MemoryBase,\r |
| 42 | UINT64 MemorySize,\r | |
| 43 | BOOLEAN Cacheable\r | |
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44 | );\r |
| 45 | \r | |
| 46 | VOID\r | |
| 47 | AddressWidthInitialization (\r | |
| 48 | VOID\r | |
| 49 | );\r | |
| 50 | \r | |
| 51 | VOID\r | |
| 52 | Q35TsegMbytesInitialization (\r | |
| 53 | VOID\r | |
| 54 | );\r | |
| 55 | \r | |
| 56 | VOID\r | |
| 57 | Q35SmramAtDefaultSmbaseInitialization (\r | |
| 58 | VOID\r | |
| 59 | );\r | |
| 60 | \r | |
| 61 | EFI_STATUS\r | |
| 62 | PublishPeiMemory (\r | |
| 63 | VOID\r | |
| 64 | );\r | |
| 65 | \r | |
| 66 | UINT32\r | |
| 67 | GetSystemMemorySizeBelow4gb (\r | |
| 68 | VOID\r | |
| 69 | );\r | |
| 70 | \r | |
| 71 | VOID\r | |
| 72 | QemuUc32BaseInitialization (\r | |
| 73 | VOID\r | |
| 74 | );\r | |
| 75 | \r | |
| 76 | VOID\r | |
| 77 | InitializeRamRegions (\r | |
| 78 | VOID\r | |
| 79 | );\r | |
| 80 | \r | |
| 81 | EFI_STATUS\r | |
| 82 | PeiFvInitialization (\r | |
| 83 | VOID\r | |
| 84 | );\r | |
| 85 | \r | |
| 86 | VOID\r | |
| 87 | MemTypeInfoInitialization (\r | |
| 88 | VOID\r | |
| 89 | );\r | |
| 90 | \r | |
| 91 | VOID\r | |
| 92 | InstallFeatureControlCallback (\r | |
| 93 | VOID\r | |
| 94 | );\r | |
| 95 | \r | |
| 96 | VOID\r | |
| 97 | InstallClearCacheCallback (\r | |
| 98 | VOID\r | |
| 99 | );\r | |
| 100 | \r | |
| 101 | EFI_STATUS\r | |
| 102 | InitializeXen (\r | |
| 103 | VOID\r | |
| 104 | );\r | |
| 105 | \r | |
| 106 | BOOLEAN\r | |
| 107 | XenDetect (\r | |
| 108 | VOID\r | |
| 109 | );\r | |
| 110 | \r | |
| 111 | VOID\r | |
| 112 | AmdSevInitialize (\r | |
| 113 | VOID\r | |
| 114 | );\r | |
| 115 | \r | |
| ac0a286f | 116 | extern BOOLEAN mXen;\r |
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117 | \r |
| 118 | VOID\r | |
| 119 | XenPublishRamRegions (\r | |
| 120 | VOID\r | |
| 121 | );\r | |
| 122 | \r | |
| ac0a286f | 123 | extern EFI_BOOT_MODE mBootMode;\r |
| 656419f9 | 124 | \r |
| ac0a286f | 125 | extern BOOLEAN mS3Supported;\r |
| 656419f9 | 126 | \r |
| ac0a286f | 127 | extern UINT8 mPhysMemAddressWidth;\r |
| 656419f9 | 128 | \r |
| ac0a286f | 129 | extern UINT32 mMaxCpuCount;\r |
| 656419f9 | 130 | \r |
| ac0a286f | 131 | extern UINT16 mHostBridgeDevId;\r |
| 656419f9 | 132 | \r |
| ac0a286f | 133 | extern BOOLEAN mQ35SmramAtDefaultSmbase;\r |
| 656419f9 | 134 | \r |
| ac0a286f | 135 | extern UINT32 mQemuUc32Base;\r |
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136 | \r |
| 137 | #endif // _PLATFORM_PEI_H_INCLUDED_\r |