OvmfPkg: CsmSupportLib: Set/use platform specific legacy interrupt device

[mirror_edk2.git] / OvmfPkg / Csm / CsmSupportLib / LegacyInterrupt.c

/** @file\r
  Legacy Interrupt Support\r
\r
  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
\r
  This program and the accompanying materials are\r
  licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "LegacyInterrupt.h"\r
\r
//\r
// Handle for the Legacy Interrupt Protocol instance produced by this driver\r
//\r
STATIC EFI_HANDLE mLegacyInterruptHandle = NULL;\r
\r
//\r
// Legacy Interrupt Device number (0x01 on piix4, 0x1f on q35/mch)\r
//\r
STATIC UINT8      mLegacyInterruptDevice;\r
\r
//\r
// The Legacy Interrupt Protocol instance produced by this driver\r
//\r
STATIC EFI_LEGACY_INTERRUPT_PROTOCOL mLegacyInterrupt = {\r
  GetNumberPirqs,\r
  GetLocation,\r
  ReadPirq,\r
  WritePirq\r
};\r
\r
STATIC UINT8 PirqReg[MAX_PIRQ_NUMBER] = { PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH };\r
\r
\r
/**\r
  Return the number of PIRQs supported by this chipset.\r
\r
  @param[in]  This         Pointer to LegacyInterrupt Protocol\r
  @param[out] NumberPirqs  The pointer to return the max IRQ number supported\r
\r
  @retval EFI_SUCCESS   Max PIRQs successfully returned\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
GetNumberPirqs (\r
  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
  OUT UINT8                          *NumberPirqs\r
  )\r
{\r
  *NumberPirqs = MAX_PIRQ_NUMBER;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Return PCI location of this device.\r
  $PIR table requires this info.\r
\r
  @param[in]   This                - Protocol instance pointer.\r
  @param[out]  Bus                 - PCI Bus\r
  @param[out]  Device              - PCI Device\r
  @param[out]  Function            - PCI Function\r
\r
  @retval  EFI_SUCCESS   Bus/Device/Function returned\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
GetLocation (\r
  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
  OUT UINT8                          *Bus,\r
  OUT UINT8                          *Device,\r
  OUT UINT8                          *Function\r
  )\r
{\r
  *Bus      = LEGACY_INT_BUS;\r
  *Device   = mLegacyInterruptDevice;\r
  *Function = LEGACY_INT_FUNC;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Builds the PCI configuration address for the register specified by PirqNumber\r
\r
  @param[in]  PirqNumber - The PIRQ number to build the PCI configuration address for\r
\r
  @return  The PCI Configuration address for the PIRQ\r
**/\r
UINTN\r
GetAddress (\r
  UINT8  PirqNumber\r
  )\r
{\r
  return PCI_LIB_ADDRESS(\r
          LEGACY_INT_BUS,\r
          mLegacyInterruptDevice,\r
          LEGACY_INT_FUNC,\r
          PirqReg[PirqNumber]\r
          );\r
}\r
\r
/**\r
  Read the given PIRQ register\r
\r
  @param[in]  This        Protocol instance pointer\r
  @param[in]  PirqNumber  The Pirq register 0 = A, 1 = B etc\r
  @param[out] PirqData    Value read\r
\r
  @retval EFI_SUCCESS   Decoding change affected.\r
  @retval EFI_INVALID_PARAMETER   Invalid PIRQ number\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
ReadPirq (\r
  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
  IN  UINT8                          PirqNumber,\r
  OUT UINT8                          *PirqData\r
  )\r
{\r
  if (PirqNumber >= MAX_PIRQ_NUMBER) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  *PirqData = PciRead8 (GetAddress (PirqNumber));\r
  *PirqData = (UINT8) (*PirqData & 0x7f);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Write the given PIRQ register\r
\r
  @param[in]  This        Protocol instance pointer\r
  @param[in]  PirqNumber  The Pirq register 0 = A, 1 = B etc\r
  @param[out] PirqData    Value to write\r
\r
  @retval EFI_SUCCESS   Decoding change affected.\r
  @retval EFI_INVALID_PARAMETER   Invalid PIRQ number\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
WritePirq (\r
  IN  EFI_LEGACY_INTERRUPT_PROTOCOL  *This,\r
  IN  UINT8                          PirqNumber,\r
  IN  UINT8                          PirqData\r
  )\r
{\r
  if (PirqNumber >= MAX_PIRQ_NUMBER) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  PciWrite8 (GetAddress (PirqNumber), PirqData);\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Initialize Legacy Interrupt support\r
\r
  @retval EFI_SUCCESS   Successfully initialized\r
\r
**/\r
EFI_STATUS\r
LegacyInterruptInstall (\r
  VOID\r
  )\r
{\r
  UINT16      HostBridgeDevId;\r
  EFI_STATUS  Status;\r
\r
  //\r
  // Make sure the Legacy Interrupt Protocol is not already installed in the system\r
  //\r
  ASSERT_PROTOCOL_ALREADY_INSTALLED(NULL, &gEfiLegacyInterruptProtocolGuid);\r
\r
  //\r
  // Query Host Bridge DID to determine platform type, then set device number\r
  //\r
  HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);\r
  switch (HostBridgeDevId) {\r
    case INTEL_82441_DEVICE_ID:\r
      mLegacyInterruptDevice = LEGACY_INT_DEV_PIIX4;\r
      break;\r
    case INTEL_Q35_MCH_DEVICE_ID:\r
      mLegacyInterruptDevice = LEGACY_INT_DEV_Q35;\r
      break;\r
    default:\r
      DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r
        __FUNCTION__, HostBridgeDevId));\r
      ASSERT (FALSE);\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  //\r
  // Make a new handle and install the protocol\r
  //\r
  Status = gBS->InstallMultipleProtocolInterfaces (\r
                  &mLegacyInterruptHandle,\r
                  &gEfiLegacyInterruptProtocolGuid,\r
                  &mLegacyInterrupt,\r
                  NULL\r
                  );\r
  ASSERT_EFI_ERROR(Status);\r
\r
  return Status;\r
}\r
\r