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8016da21 | 1 | /** @file\r |
2 | Legacy Region Support\r | |
3 | \r | |
db27e9f3 | 4 | Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r |
8016da21 | 5 | \r |
b26f0cf9 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
8016da21 | 7 | \r |
8 | **/\r | |
9 | \r | |
10 | #include "LegacyRegion.h"\r | |
11 | \r | |
12 | //\r | |
db27e9f3 | 13 | // 440/Q35 PAM map.\r |
8016da21 | 14 | //\r |
db27e9f3 RN |
15 | // PAM Range Offset Bits Operation\r |
16 | // 440 Q35\r | |
17 | // =============== ==== ==== ==== ===============================================================\r | |
18 | // 0xC0000-0xC3FFF 0x5a 0x91 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
19 | // 0xC4000-0xC7FFF 0x5a 0x91 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
20 | // 0xC8000-0xCBFFF 0x5b 0x92 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
21 | // 0xCC000-0xCFFFF 0x5b 0x92 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
22 | // 0xD0000-0xD3FFF 0x5c 0x93 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
23 | // 0xD4000-0xD7FFF 0x5c 0x93 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
24 | // 0xD8000-0xDBFFF 0x5d 0x94 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
25 | // 0xDC000-0xDFFFF 0x5d 0x94 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
26 | // 0xE0000-0xE3FFF 0x5e 0x95 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
27 | // 0xE4000-0xE7FFF 0x5e 0x95 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
28 | // 0xE8000-0xEBFFF 0x5f 0x96 1:0 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
29 | // 0xEC000-0xEFFFF 0x5f 0x96 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
30 | // 0xF0000-0xFFFFF 0x59 0x90 5:4 00 = DRAM Disabled, 01= Read Only, 10 = Write Only, 11 = Normal\r | |
8016da21 | 31 | //\r |
ac0a286f MK |
32 | STATIC LEGACY_MEMORY_SECTION_INFO mSectionArray[] = {\r |
33 | { 0xC0000, SIZE_16KB, FALSE, FALSE },\r | |
34 | { 0xC4000, SIZE_16KB, FALSE, FALSE },\r | |
35 | { 0xC8000, SIZE_16KB, FALSE, FALSE },\r | |
36 | { 0xCC000, SIZE_16KB, FALSE, FALSE },\r | |
37 | { 0xD0000, SIZE_16KB, FALSE, FALSE },\r | |
38 | { 0xD4000, SIZE_16KB, FALSE, FALSE },\r | |
39 | { 0xD8000, SIZE_16KB, FALSE, FALSE },\r | |
40 | { 0xDC000, SIZE_16KB, FALSE, FALSE },\r | |
41 | { 0xE0000, SIZE_16KB, FALSE, FALSE },\r | |
42 | { 0xE4000, SIZE_16KB, FALSE, FALSE },\r | |
43 | { 0xE8000, SIZE_16KB, FALSE, FALSE },\r | |
44 | { 0xEC000, SIZE_16KB, FALSE, FALSE },\r | |
45 | { 0xF0000, SIZE_64KB, FALSE, FALSE }\r | |
8016da21 | 46 | };\r |
47 | \r | |
db27e9f3 | 48 | STATIC PAM_REGISTER_VALUE mRegisterValues440[] = {\r |
ac0a286f MK |
49 | { PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x01, 0x02 },\r |
50 | { PMC_REGISTER_PIIX4 (PIIX4_PAM1), 0x10, 0x20 },\r | |
51 | { PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x01, 0x02 },\r | |
52 | { PMC_REGISTER_PIIX4 (PIIX4_PAM2), 0x10, 0x20 },\r | |
53 | { PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x01, 0x02 },\r | |
54 | { PMC_REGISTER_PIIX4 (PIIX4_PAM3), 0x10, 0x20 },\r | |
55 | { PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x01, 0x02 },\r | |
56 | { PMC_REGISTER_PIIX4 (PIIX4_PAM4), 0x10, 0x20 },\r | |
57 | { PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x01, 0x02 },\r | |
58 | { PMC_REGISTER_PIIX4 (PIIX4_PAM5), 0x10, 0x20 },\r | |
59 | { PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x01, 0x02 },\r | |
60 | { PMC_REGISTER_PIIX4 (PIIX4_PAM6), 0x10, 0x20 },\r | |
61 | { PMC_REGISTER_PIIX4 (PIIX4_PAM0), 0x10, 0x20 }\r | |
8016da21 | 62 | };\r |
63 | \r | |
db27e9f3 | 64 | STATIC PAM_REGISTER_VALUE mRegisterValuesQ35[] = {\r |
ac0a286f MK |
65 | { DRAMC_REGISTER_Q35 (MCH_PAM1), 0x01, 0x02 },\r |
66 | { DRAMC_REGISTER_Q35 (MCH_PAM1), 0x10, 0x20 },\r | |
67 | { DRAMC_REGISTER_Q35 (MCH_PAM2), 0x01, 0x02 },\r | |
68 | { DRAMC_REGISTER_Q35 (MCH_PAM2), 0x10, 0x20 },\r | |
69 | { DRAMC_REGISTER_Q35 (MCH_PAM3), 0x01, 0x02 },\r | |
70 | { DRAMC_REGISTER_Q35 (MCH_PAM3), 0x10, 0x20 },\r | |
71 | { DRAMC_REGISTER_Q35 (MCH_PAM4), 0x01, 0x02 },\r | |
72 | { DRAMC_REGISTER_Q35 (MCH_PAM4), 0x10, 0x20 },\r | |
73 | { DRAMC_REGISTER_Q35 (MCH_PAM5), 0x01, 0x02 },\r | |
74 | { DRAMC_REGISTER_Q35 (MCH_PAM5), 0x10, 0x20 },\r | |
75 | { DRAMC_REGISTER_Q35 (MCH_PAM6), 0x01, 0x02 },\r | |
76 | { DRAMC_REGISTER_Q35 (MCH_PAM6), 0x10, 0x20 },\r | |
77 | { DRAMC_REGISTER_Q35 (MCH_PAM0), 0x10, 0x20 }\r | |
db27e9f3 RN |
78 | };\r |
79 | \r | |
ac0a286f | 80 | STATIC PAM_REGISTER_VALUE *mRegisterValues;\r |
db27e9f3 | 81 | \r |
8016da21 | 82 | //\r |
83 | // Handle used to install the Legacy Region Protocol\r | |
84 | //\r | |
85 | STATIC EFI_HANDLE mHandle = NULL;\r | |
86 | \r | |
87 | //\r | |
88 | // Instance of the Legacy Region Protocol to install into the handle database\r | |
89 | //\r | |
90 | STATIC EFI_LEGACY_REGION2_PROTOCOL mLegacyRegion2 = {\r | |
91 | LegacyRegion2Decode,\r | |
92 | LegacyRegion2Lock,\r | |
93 | LegacyRegion2BootLock,\r | |
94 | LegacyRegion2Unlock,\r | |
95 | LegacyRegionGetInfo\r | |
96 | };\r | |
97 | \r | |
98 | STATIC\r | |
99 | EFI_STATUS\r | |
100 | LegacyRegionManipulationInternal (\r | |
ac0a286f MK |
101 | IN UINT32 Start,\r |
102 | IN UINT32 Length,\r | |
103 | IN BOOLEAN *ReadEnable,\r | |
104 | IN BOOLEAN *WriteEnable,\r | |
105 | OUT UINT32 *Granularity\r | |
8016da21 | 106 | )\r |
107 | {\r | |
ac0a286f MK |
108 | UINT32 EndAddress;\r |
109 | UINTN Index;\r | |
110 | UINTN StartIndex;\r | |
8016da21 | 111 | \r |
112 | //\r | |
113 | // Validate input parameters.\r | |
114 | //\r | |
ac0a286f | 115 | if ((Length == 0) || (Granularity == NULL)) {\r |
8016da21 | 116 | return EFI_INVALID_PARAMETER;\r |
117 | }\r | |
ac0a286f | 118 | \r |
8016da21 | 119 | EndAddress = Start + Length - 1;\r |
ac0a286f | 120 | if ((Start < PAM_BASE_ADDRESS) || (EndAddress > PAM_LIMIT_ADDRESS)) {\r |
8016da21 | 121 | return EFI_INVALID_PARAMETER;\r |
122 | }\r | |
123 | \r | |
124 | //\r | |
125 | // Loop to find the start PAM.\r | |
126 | //\r | |
127 | StartIndex = 0;\r | |
5a5025e4 | 128 | for (Index = 0; Index < ARRAY_SIZE (mSectionArray); Index++) {\r |
8016da21 | 129 | if ((Start >= mSectionArray[Index].Start) && (Start < (mSectionArray[Index].Start + mSectionArray[Index].Length))) {\r |
130 | StartIndex = Index;\r | |
131 | break;\r | |
132 | }\r | |
133 | }\r | |
ac0a286f | 134 | \r |
5a5025e4 | 135 | ASSERT (Index < ARRAY_SIZE (mSectionArray));\r |
8016da21 | 136 | \r |
137 | //\r | |
138 | // Program PAM until end PAM is encountered\r | |
139 | //\r | |
5a5025e4 | 140 | for (Index = StartIndex; Index < ARRAY_SIZE (mSectionArray); Index++) {\r |
8016da21 | 141 | if (ReadEnable != NULL) {\r |
142 | if (*ReadEnable) {\r | |
143 | PciOr8 (\r | |
ba1d245f | 144 | mRegisterValues[Index].PAMRegPciLibAddress,\r |
8016da21 | 145 | mRegisterValues[Index].ReadEnableData\r |
146 | );\r | |
147 | } else {\r | |
148 | PciAnd8 (\r | |
ba1d245f | 149 | mRegisterValues[Index].PAMRegPciLibAddress,\r |
ac0a286f | 150 | (UINT8)(~mRegisterValues[Index].ReadEnableData)\r |
8016da21 | 151 | );\r |
152 | }\r | |
153 | }\r | |
ac0a286f | 154 | \r |
8016da21 | 155 | if (WriteEnable != NULL) {\r |
156 | if (*WriteEnable) {\r | |
157 | PciOr8 (\r | |
ba1d245f | 158 | mRegisterValues[Index].PAMRegPciLibAddress,\r |
8016da21 | 159 | mRegisterValues[Index].WriteEnableData\r |
160 | );\r | |
161 | } else {\r | |
162 | PciAnd8 (\r | |
ba1d245f | 163 | mRegisterValues[Index].PAMRegPciLibAddress,\r |
ac0a286f | 164 | (UINT8)(~mRegisterValues[Index].WriteEnableData)\r |
8016da21 | 165 | );\r |
166 | }\r | |
167 | }\r | |
168 | \r | |
169 | //\r | |
170 | // If the end PAM is encountered, record its length as granularity and jump out.\r | |
171 | //\r | |
172 | if ((EndAddress >= mSectionArray[Index].Start) && (EndAddress < (mSectionArray[Index].Start + mSectionArray[Index].Length))) {\r | |
173 | *Granularity = mSectionArray[Index].Length;\r | |
174 | break;\r | |
175 | }\r | |
176 | }\r | |
ac0a286f | 177 | \r |
5a5025e4 | 178 | ASSERT (Index < ARRAY_SIZE (mSectionArray));\r |
8016da21 | 179 | \r |
180 | return EFI_SUCCESS;\r | |
181 | }\r | |
182 | \r | |
183 | STATIC\r | |
184 | EFI_STATUS\r | |
185 | LegacyRegionGetInfoInternal (\r | |
ac0a286f MK |
186 | OUT UINT32 *DescriptorCount,\r |
187 | OUT LEGACY_MEMORY_SECTION_INFO **Descriptor\r | |
8016da21 | 188 | )\r |
189 | {\r | |
ac0a286f MK |
190 | UINTN Index;\r |
191 | UINT8 PamValue;\r | |
8016da21 | 192 | \r |
193 | //\r | |
194 | // Check input parameters\r | |
195 | //\r | |
ac0a286f | 196 | if ((DescriptorCount == NULL) || (Descriptor == NULL)) {\r |
8016da21 | 197 | return EFI_INVALID_PARAMETER;\r |
198 | }\r | |
199 | \r | |
200 | //\r | |
201 | // Fill in current status of legacy region.\r | |
202 | //\r | |
ac0a286f | 203 | *DescriptorCount = sizeof (mSectionArray) / sizeof (mSectionArray[0]);\r |
8016da21 | 204 | for (Index = 0; Index < *DescriptorCount; Index++) {\r |
ac0a286f | 205 | PamValue = PciRead8 (mRegisterValues[Index].PAMRegPciLibAddress);\r |
8016da21 | 206 | mSectionArray[Index].ReadEnabled = FALSE;\r |
207 | if ((PamValue & mRegisterValues[Index].ReadEnableData) != 0) {\r | |
208 | mSectionArray[Index].ReadEnabled = TRUE;\r | |
209 | }\r | |
ac0a286f | 210 | \r |
8016da21 | 211 | mSectionArray[Index].WriteEnabled = FALSE;\r |
212 | if ((PamValue & mRegisterValues[Index].WriteEnableData) != 0) {\r | |
213 | mSectionArray[Index].WriteEnabled = TRUE;\r | |
214 | }\r | |
215 | }\r | |
216 | \r | |
217 | *Descriptor = mSectionArray;\r | |
218 | return EFI_SUCCESS;\r | |
219 | }\r | |
220 | \r | |
221 | /**\r | |
222 | Modify the hardware to allow (decode) or disallow (not decode) memory reads in a region.\r | |
223 | \r | |
224 | If the On parameter evaluates to TRUE, this function enables memory reads in the address range\r | |
225 | Start to (Start + Length - 1).\r | |
226 | If the On parameter evaluates to FALSE, this function disables memory reads in the address range\r | |
227 | Start to (Start + Length - 1).\r | |
228 | \r | |
229 | @param This[in] Indicates the EFI_LEGACY_REGION_PROTOCOL instance.\r | |
230 | @param Start[in] The beginning of the physical address of the region whose attributes\r | |
231 | should be modified.\r | |
232 | @param Length[in] The number of bytes of memory whose attributes should be modified.\r | |
233 | The actual number of bytes modified may be greater than the number\r | |
234 | specified.\r | |
235 | @param Granularity[out] The number of bytes in the last region affected. This may be less\r | |
236 | than the total number of bytes affected if the starting address\r | |
237 | was not aligned to a region's starting address or if the length\r | |
238 | was greater than the number of bytes in the first region.\r | |
239 | @param On[in] Decode / Non-Decode flag.\r | |
240 | \r | |
241 | @retval EFI_SUCCESS The region's attributes were successfully modified.\r | |
242 | @retval EFI_INVALID_PARAMETER If Start or Length describe an address not in the Legacy Region.\r | |
243 | \r | |
244 | **/\r | |
245 | EFI_STATUS\r | |
246 | EFIAPI\r | |
247 | LegacyRegion2Decode (\r | |
248 | IN EFI_LEGACY_REGION2_PROTOCOL *This,\r | |
249 | IN UINT32 Start,\r | |
250 | IN UINT32 Length,\r | |
251 | OUT UINT32 *Granularity,\r | |
252 | IN BOOLEAN *On\r | |
253 | )\r | |
254 | {\r | |
255 | return LegacyRegionManipulationInternal (Start, Length, On, NULL, Granularity);\r | |
256 | }\r | |
257 | \r | |
8016da21 | 258 | /**\r |
259 | Modify the hardware to disallow memory attribute changes in a region.\r | |
260 | \r | |
261 | This function makes the attributes of a region read only. Once a region is boot-locked with this\r | |
262 | function, the read and write attributes of that region cannot be changed until a power cycle has\r | |
263 | reset the boot-lock attribute. Calls to Decode(), Lock() and Unlock() will have no effect.\r | |
264 | \r | |
265 | @param This[in] Indicates the EFI_LEGACY_REGION_PROTOCOL instance.\r | |
266 | @param Start[in] The beginning of the physical address of the region whose\r | |
267 | attributes should be modified.\r | |
268 | @param Length[in] The number of bytes of memory whose attributes should be modified.\r | |
269 | The actual number of bytes modified may be greater than the number\r | |
270 | specified.\r | |
271 | @param Granularity[out] The number of bytes in the last region affected. This may be less\r | |
272 | than the total number of bytes affected if the starting address was\r | |
273 | not aligned to a region's starting address or if the length was\r | |
274 | greater than the number of bytes in the first region.\r | |
275 | \r | |
276 | @retval EFI_SUCCESS The region's attributes were successfully modified.\r | |
277 | @retval EFI_INVALID_PARAMETER If Start or Length describe an address not in the Legacy Region.\r | |
278 | @retval EFI_UNSUPPORTED The chipset does not support locking the configuration registers in\r | |
279 | a way that will not affect memory regions outside the legacy memory\r | |
280 | region.\r | |
281 | \r | |
282 | **/\r | |
283 | EFI_STATUS\r | |
284 | EFIAPI\r | |
285 | LegacyRegion2BootLock (\r | |
ac0a286f MK |
286 | IN EFI_LEGACY_REGION2_PROTOCOL *This,\r |
287 | IN UINT32 Start,\r | |
288 | IN UINT32 Length,\r | |
289 | OUT UINT32 *Granularity\r | |
8016da21 | 290 | )\r |
291 | {\r | |
292 | if ((Start < 0xC0000) || ((Start + Length - 1) > 0xFFFFF)) {\r | |
293 | return EFI_INVALID_PARAMETER;\r | |
294 | }\r | |
295 | \r | |
296 | return EFI_UNSUPPORTED;\r | |
297 | }\r | |
298 | \r | |
8016da21 | 299 | /**\r |
300 | Modify the hardware to disallow memory writes in a region.\r | |
301 | \r | |
302 | This function changes the attributes of a memory range to not allow writes.\r | |
303 | \r | |
304 | @param This[in] Indicates the EFI_LEGACY_REGION_PROTOCOL instance.\r | |
305 | @param Start[in] The beginning of the physical address of the region whose\r | |
306 | attributes should be modified.\r | |
307 | @param Length[in] The number of bytes of memory whose attributes should be modified.\r | |
308 | The actual number of bytes modified may be greater than the number\r | |
309 | specified.\r | |
310 | @param Granularity[out] The number of bytes in the last region affected. This may be less\r | |
311 | than the total number of bytes affected if the starting address was\r | |
312 | not aligned to a region's starting address or if the length was\r | |
313 | greater than the number of bytes in the first region.\r | |
314 | \r | |
315 | @retval EFI_SUCCESS The region's attributes were successfully modified.\r | |
316 | @retval EFI_INVALID_PARAMETER If Start or Length describe an address not in the Legacy Region.\r | |
317 | \r | |
318 | **/\r | |
319 | EFI_STATUS\r | |
320 | EFIAPI\r | |
321 | LegacyRegion2Lock (\r | |
ac0a286f MK |
322 | IN EFI_LEGACY_REGION2_PROTOCOL *This,\r |
323 | IN UINT32 Start,\r | |
324 | IN UINT32 Length,\r | |
325 | OUT UINT32 *Granularity\r | |
8016da21 | 326 | )\r |
327 | {\r | |
328 | BOOLEAN WriteEnable;\r | |
329 | \r | |
330 | WriteEnable = FALSE;\r | |
331 | return LegacyRegionManipulationInternal (Start, Length, NULL, &WriteEnable, Granularity);\r | |
332 | }\r | |
333 | \r | |
8016da21 | 334 | /**\r |
335 | Modify the hardware to allow memory writes in a region.\r | |
336 | \r | |
337 | This function changes the attributes of a memory range to allow writes.\r | |
338 | \r | |
339 | @param This[in] Indicates the EFI_LEGACY_REGION_PROTOCOL instance.\r | |
340 | @param Start[in] The beginning of the physical address of the region whose\r | |
341 | attributes should be modified.\r | |
342 | @param Length[in] The number of bytes of memory whose attributes should be modified.\r | |
343 | The actual number of bytes modified may be greater than the number\r | |
344 | specified.\r | |
345 | @param Granularity[out] The number of bytes in the last region affected. This may be less\r | |
346 | than the total number of bytes affected if the starting address was\r | |
347 | not aligned to a region's starting address or if the length was\r | |
348 | greater than the number of bytes in the first region.\r | |
349 | \r | |
350 | @retval EFI_SUCCESS The region's attributes were successfully modified.\r | |
351 | @retval EFI_INVALID_PARAMETER If Start or Length describe an address not in the Legacy Region.\r | |
352 | \r | |
353 | **/\r | |
354 | EFI_STATUS\r | |
355 | EFIAPI\r | |
356 | LegacyRegion2Unlock (\r | |
357 | IN EFI_LEGACY_REGION2_PROTOCOL *This,\r | |
358 | IN UINT32 Start,\r | |
359 | IN UINT32 Length,\r | |
360 | OUT UINT32 *Granularity\r | |
361 | )\r | |
362 | {\r | |
363 | BOOLEAN WriteEnable;\r | |
364 | \r | |
365 | WriteEnable = TRUE;\r | |
366 | return LegacyRegionManipulationInternal (Start, Length, NULL, &WriteEnable, Granularity);\r | |
367 | }\r | |
368 | \r | |
369 | /**\r | |
370 | Get region information for the attributes of the Legacy Region.\r | |
371 | \r | |
372 | This function is used to discover the granularity of the attributes for the memory in the legacy\r | |
373 | region. Each attribute may have a different granularity and the granularity may not be the same\r | |
374 | for all memory ranges in the legacy region.\r | |
375 | \r | |
376 | @param This[in] Indicates the EFI_LEGACY_REGION_PROTOCOL instance.\r | |
377 | @param DescriptorCount[out] The number of region descriptor entries returned in the Descriptor\r | |
378 | buffer.\r | |
379 | @param Descriptor[out] A pointer to a pointer used to return a buffer where the legacy\r | |
380 | region information is deposited. This buffer will contain a list of\r | |
381 | DescriptorCount number of region descriptors. This function will\r | |
382 | provide the memory for the buffer.\r | |
383 | \r | |
384 | @retval EFI_SUCCESS The region's attributes were successfully modified.\r | |
385 | @retval EFI_INVALID_PARAMETER If Start or Length describe an address not in the Legacy Region.\r | |
386 | \r | |
387 | **/\r | |
388 | EFI_STATUS\r | |
389 | EFIAPI\r | |
390 | LegacyRegionGetInfo (\r | |
391 | IN EFI_LEGACY_REGION2_PROTOCOL *This,\r | |
392 | OUT UINT32 *DescriptorCount,\r | |
393 | OUT EFI_LEGACY_REGION_DESCRIPTOR **Descriptor\r | |
394 | )\r | |
395 | {\r | |
ac0a286f MK |
396 | LEGACY_MEMORY_SECTION_INFO *SectionInfo;\r |
397 | UINT32 SectionCount;\r | |
398 | EFI_LEGACY_REGION_DESCRIPTOR *DescriptorArray;\r | |
399 | UINTN Index;\r | |
400 | UINTN DescriptorIndex;\r | |
8016da21 | 401 | \r |
402 | //\r | |
403 | // Get section numbers and information\r | |
404 | //\r | |
405 | LegacyRegionGetInfoInternal (&SectionCount, &SectionInfo);\r | |
406 | \r | |
407 | //\r | |
408 | // Each section has 3 descriptors, corresponding to readability, writeability, and lock status.\r | |
409 | //\r | |
410 | DescriptorArray = AllocatePool (sizeof (EFI_LEGACY_REGION_DESCRIPTOR) * SectionCount * 3);\r | |
411 | if (DescriptorArray == NULL) {\r | |
412 | return EFI_OUT_OF_RESOURCES;\r | |
413 | }\r | |
414 | \r | |
415 | DescriptorIndex = 0;\r | |
416 | for (Index = 0; Index < SectionCount; Index++) {\r | |
417 | DescriptorArray[DescriptorIndex].Start = SectionInfo[Index].Start;\r | |
418 | DescriptorArray[DescriptorIndex].Length = SectionInfo[Index].Length;\r | |
419 | DescriptorArray[DescriptorIndex].Granularity = SectionInfo[Index].Length;\r | |
420 | if (SectionInfo[Index].ReadEnabled) {\r | |
ac0a286f | 421 | DescriptorArray[DescriptorIndex].Attribute = LegacyRegionDecoded;\r |
8016da21 | 422 | } else {\r |
ac0a286f | 423 | DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotDecoded;\r |
8016da21 | 424 | }\r |
ac0a286f | 425 | \r |
8016da21 | 426 | DescriptorIndex++;\r |
427 | \r | |
428 | //\r | |
429 | // Create descriptor for writeability, according to lock status\r | |
430 | //\r | |
431 | DescriptorArray[DescriptorIndex].Start = SectionInfo[Index].Start;\r | |
432 | DescriptorArray[DescriptorIndex].Length = SectionInfo[Index].Length;\r | |
433 | DescriptorArray[DescriptorIndex].Granularity = SectionInfo[Index].Length;\r | |
434 | if (SectionInfo[Index].WriteEnabled) {\r | |
435 | DescriptorArray[DescriptorIndex].Attribute = LegacyRegionWriteEnabled;\r | |
436 | } else {\r | |
437 | DescriptorArray[DescriptorIndex].Attribute = LegacyRegionWriteDisabled;\r | |
438 | }\r | |
ac0a286f | 439 | \r |
8016da21 | 440 | DescriptorIndex++;\r |
441 | \r | |
442 | //\r | |
443 | // Chipset does not support bootlock.\r | |
444 | //\r | |
445 | DescriptorArray[DescriptorIndex].Start = SectionInfo[Index].Start;\r | |
446 | DescriptorArray[DescriptorIndex].Length = SectionInfo[Index].Length;\r | |
447 | DescriptorArray[DescriptorIndex].Granularity = SectionInfo[Index].Length;\r | |
448 | DescriptorArray[DescriptorIndex].Attribute = LegacyRegionNotLocked;\r | |
449 | DescriptorIndex++;\r | |
450 | }\r | |
451 | \r | |
ac0a286f | 452 | *DescriptorCount = (UINT32)DescriptorIndex;\r |
8016da21 | 453 | *Descriptor = DescriptorArray;\r |
454 | \r | |
455 | return EFI_SUCCESS;\r | |
456 | }\r | |
457 | \r | |
458 | /**\r | |
459 | Initialize Legacy Region support\r | |
460 | \r | |
461 | @retval EFI_SUCCESS Successfully initialized\r | |
462 | \r | |
463 | **/\r | |
464 | EFI_STATUS\r | |
465 | LegacyRegionInit (\r | |
466 | VOID\r | |
467 | )\r | |
468 | {\r | |
469 | EFI_STATUS Status;\r | |
db27e9f3 RN |
470 | UINT16 HostBridgeDevId;\r |
471 | \r | |
472 | //\r | |
473 | // Query Host Bridge DID to determine platform type\r | |
474 | //\r | |
475 | HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);\r | |
476 | switch (HostBridgeDevId) {\r | |
ac0a286f MK |
477 | case INTEL_82441_DEVICE_ID:\r |
478 | mRegisterValues = mRegisterValues440;\r | |
479 | break;\r | |
480 | case INTEL_Q35_MCH_DEVICE_ID:\r | |
481 | mRegisterValues = mRegisterValuesQ35;\r | |
482 | break;\r | |
483 | default:\r | |
484 | DEBUG ((\r | |
485 | DEBUG_ERROR,\r | |
486 | "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r | |
487 | __FUNCTION__,\r | |
488 | HostBridgeDevId\r | |
489 | ));\r | |
490 | ASSERT (FALSE);\r | |
491 | return RETURN_UNSUPPORTED;\r | |
db27e9f3 | 492 | }\r |
8016da21 | 493 | \r |
494 | //\r | |
495 | // Install the Legacy Region Protocol on a new handle\r | |
496 | //\r | |
497 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
498 | &mHandle,\r | |
ac0a286f MK |
499 | &gEfiLegacyRegion2ProtocolGuid,\r |
500 | &mLegacyRegion2,\r | |
8016da21 | 501 | NULL\r |
502 | );\r | |
503 | ASSERT_EFI_ERROR (Status);\r | |
504 | \r | |
505 | return Status;\r | |
506 | }\r |