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b522c77b HW |
1 | /** @file\r |
2 | The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage\r | |
3 | under EFI and Legacy OS boot. This file also includes all the related\r | |
f6fc95c9 | 4 | COMPATIBILITY16 structures and definitions.\r |
b522c77b HW |
5 | \r |
6 | Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow\r | |
7 | well known naming conventions.\r | |
8 | \r | |
9 | Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r | |
10 | environment. Reverse thunk is the code that does the opposite.\r | |
11 | \r | |
12 | Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
13 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
14 | \r | |
15 | @par Revision Reference:\r | |
16 | This protocol is defined in Framework for EFI Compatibility Support Module spec\r | |
17 | Version 0.98.\r | |
18 | \r | |
19 | **/\r | |
20 | \r | |
21 | #ifndef _EFI_LEGACY_BIOS_H_\r | |
22 | #define _EFI_LEGACY_BIOS_H_\r | |
23 | \r | |
24 | ///\r | |
25 | ///\r | |
26 | ///\r | |
27 | #pragma pack(1)\r | |
28 | \r | |
ac0a286f MK |
29 | typedef UINT8 SERIAL_MODE;\r |
30 | typedef UINT8 PARALLEL_MODE;\r | |
b522c77b | 31 | \r |
ac0a286f | 32 | #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')\r |
b522c77b HW |
33 | \r |
34 | ///\r | |
35 | /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r | |
36 | /// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r | |
37 | /// entry point for the Compatibility16 functions. These functions provide the platform-specific\r | |
38 | /// information that is required by the generic EfiCompatibility code. The functions are invoked via\r | |
39 | /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r | |
40 | /// entry point.\r | |
41 | ///\r | |
42 | typedef struct {\r | |
43 | ///\r | |
44 | /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r | |
45 | /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r | |
46 | ///\r | |
ac0a286f | 47 | UINT32 Signature;\r |
b522c77b HW |
48 | \r |
49 | ///\r | |
50 | /// The value required such that byte checksum of TableLength equals zero.\r | |
51 | ///\r | |
ac0a286f | 52 | UINT8 TableChecksum;\r |
b522c77b HW |
53 | \r |
54 | ///\r | |
55 | /// The length of this table.\r | |
56 | ///\r | |
ac0a286f | 57 | UINT8 TableLength;\r |
b522c77b HW |
58 | \r |
59 | ///\r | |
60 | /// The major EFI revision for which this table was generated.\r | |
61 | ///\r | |
ac0a286f | 62 | UINT8 EfiMajorRevision;\r |
b522c77b HW |
63 | \r |
64 | ///\r | |
65 | /// The minor EFI revision for which this table was generated.\r | |
66 | ///\r | |
ac0a286f | 67 | UINT8 EfiMinorRevision;\r |
b522c77b HW |
68 | \r |
69 | ///\r | |
70 | /// The major revision of this table.\r | |
71 | ///\r | |
ac0a286f | 72 | UINT8 TableMajorRevision;\r |
b522c77b HW |
73 | \r |
74 | ///\r | |
75 | /// The minor revision of this table.\r | |
76 | ///\r | |
ac0a286f | 77 | UINT8 TableMinorRevision;\r |
b522c77b HW |
78 | \r |
79 | ///\r | |
80 | /// Reserved for future usage.\r | |
81 | ///\r | |
ac0a286f | 82 | UINT16 Reserved;\r |
b522c77b HW |
83 | \r |
84 | ///\r | |
85 | /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
86 | ///\r | |
ac0a286f | 87 | UINT16 Compatibility16CallSegment;\r |
b522c77b HW |
88 | \r |
89 | ///\r | |
90 | /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
91 | ///\r | |
ac0a286f | 92 | UINT16 Compatibility16CallOffset;\r |
b522c77b HW |
93 | \r |
94 | ///\r | |
95 | /// The segment of the entry point within the traditional BIOS for EfiCompatibility\r | |
96 | /// to invoke the PnP installation check.\r | |
97 | ///\r | |
ac0a286f | 98 | UINT16 PnPInstallationCheckSegment;\r |
b522c77b HW |
99 | \r |
100 | ///\r | |
101 | /// The Offset of the entry point within the traditional BIOS for EfiCompatibility\r | |
102 | /// to invoke the PnP installation check.\r | |
103 | ///\r | |
ac0a286f | 104 | UINT16 PnPInstallationCheckOffset;\r |
b522c77b HW |
105 | \r |
106 | ///\r | |
107 | /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform\r | |
ac0a286f | 108 | /// Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r |
b522c77b | 109 | ///\r |
ac0a286f | 110 | UINT32 EfiSystemTable;\r |
b522c77b HW |
111 | \r |
112 | ///\r | |
113 | /// The address of an OEM-provided identifier string. The string is null terminated.\r | |
114 | ///\r | |
ac0a286f | 115 | UINT32 OemIdStringPointer;\r |
b522c77b HW |
116 | \r |
117 | ///\r | |
118 | /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r | |
119 | /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r | |
120 | /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r | |
121 | /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r | |
122 | ///\r | |
ac0a286f | 123 | UINT32 AcpiRsdPtrPointer;\r |
b522c77b HW |
124 | \r |
125 | ///\r | |
126 | /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r | |
127 | ///\r | |
ac0a286f | 128 | UINT16 OemRevision;\r |
b522c77b HW |
129 | \r |
130 | ///\r | |
131 | /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r | |
132 | /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r | |
133 | /// data to the indicated area.\r | |
134 | ///\r | |
ac0a286f | 135 | UINT32 E820Pointer;\r |
b522c77b HW |
136 | \r |
137 | ///\r | |
138 | /// The length of the E820 data and is filled in by the EfiCompatibility code.\r | |
139 | ///\r | |
ac0a286f | 140 | UINT32 E820Length;\r |
b522c77b HW |
141 | \r |
142 | ///\r | |
143 | /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r | |
144 | /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r | |
145 | /// copy the data to the indicated area.\r | |
146 | ///\r | |
ac0a286f | 147 | UINT32 IrqRoutingTablePointer;\r |
b522c77b HW |
148 | \r |
149 | ///\r | |
150 | /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r | |
151 | ///\r | |
ac0a286f | 152 | UINT32 IrqRoutingTableLength;\r |
b522c77b HW |
153 | \r |
154 | ///\r | |
155 | /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r | |
156 | /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data\r | |
157 | /// to the indicated area.\r | |
158 | ///\r | |
ac0a286f | 159 | UINT32 MpTablePtr;\r |
b522c77b HW |
160 | \r |
161 | ///\r | |
162 | /// The length of the MP table and is filled in by the EfiCompatibility code.\r | |
163 | ///\r | |
ac0a286f | 164 | UINT32 MpTableLength;\r |
b522c77b HW |
165 | \r |
166 | ///\r | |
167 | /// The segment of the OEM-specific INT table/code.\r | |
168 | ///\r | |
ac0a286f | 169 | UINT16 OemIntSegment;\r |
b522c77b HW |
170 | \r |
171 | ///\r | |
172 | /// The offset of the OEM-specific INT table/code.\r | |
173 | ///\r | |
ac0a286f | 174 | UINT16 OemIntOffset;\r |
b522c77b HW |
175 | \r |
176 | ///\r | |
177 | /// The segment of the OEM-specific 32-bit table/code.\r | |
178 | ///\r | |
ac0a286f | 179 | UINT16 Oem32Segment;\r |
b522c77b HW |
180 | \r |
181 | ///\r | |
182 | /// The offset of the OEM-specific 32-bit table/code.\r | |
183 | ///\r | |
ac0a286f | 184 | UINT16 Oem32Offset;\r |
b522c77b HW |
185 | \r |
186 | ///\r | |
187 | /// The segment of the OEM-specific 16-bit table/code.\r | |
188 | ///\r | |
ac0a286f | 189 | UINT16 Oem16Segment;\r |
b522c77b HW |
190 | \r |
191 | ///\r | |
192 | /// The offset of the OEM-specific 16-bit table/code.\r | |
193 | ///\r | |
ac0a286f | 194 | UINT16 Oem16Offset;\r |
b522c77b HW |
195 | \r |
196 | ///\r | |
197 | /// The segment of the TPM binary passed to 16-bit CSM.\r | |
198 | ///\r | |
ac0a286f | 199 | UINT16 TpmSegment;\r |
b522c77b HW |
200 | \r |
201 | ///\r | |
202 | /// The offset of the TPM binary passed to 16-bit CSM.\r | |
203 | ///\r | |
ac0a286f | 204 | UINT16 TpmOffset;\r |
b522c77b HW |
205 | \r |
206 | ///\r | |
207 | /// A pointer to a string identifying the independent BIOS vendor.\r | |
208 | ///\r | |
ac0a286f | 209 | UINT32 IbvPointer;\r |
b522c77b HW |
210 | \r |
211 | ///\r | |
212 | /// This field is NULL for all systems not supporting PCI Express. This field is the base\r | |
213 | /// value of the start of the PCI Express memory-mapped configuration registers and\r | |
214 | /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r | |
215 | /// Compatibility16InitializeYourself().\r | |
48cf40b8 | 216 | /// Compatibility16InitializeYourself() is defined in Compatibility16\r |
b522c77b HW |
217 | /// Functions.\r |
218 | ///\r | |
ac0a286f | 219 | UINT32 PciExpressBase;\r |
b522c77b HW |
220 | \r |
221 | ///\r | |
222 | /// Maximum PCI bus number assigned.\r | |
223 | ///\r | |
ac0a286f | 224 | UINT8 LastPciBus;\r |
b522c77b HW |
225 | \r |
226 | ///\r | |
227 | /// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r | |
228 | /// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r | |
229 | /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.\r | |
230 | ///\r | |
ac0a286f | 231 | UINT32 UmaAddress;\r |
b522c77b HW |
232 | \r |
233 | ///\r | |
234 | /// Upper Memory Area size in bytes to be set as Read/Write. If zero, no UMA region\r | |
235 | /// will be set as Read/Write (i.e. all Shadow RAM is set as Read-Only).\r | |
236 | ///\r | |
ac0a286f | 237 | UINT32 UmaSize;\r |
b522c77b HW |
238 | \r |
239 | ///\r | |
240 | /// Start Address of high memory that can be used for permanent allocation. If zero,\r | |
241 | /// high memory is not available for permanent allocation.\r | |
242 | ///\r | |
ac0a286f | 243 | UINT32 HiPermanentMemoryAddress;\r |
b522c77b HW |
244 | \r |
245 | ///\r | |
246 | /// Size of high memory that can be used for permanent allocation in bytes. If zero,\r | |
247 | /// high memory is not available for permanent allocation.\r | |
248 | ///\r | |
ac0a286f | 249 | UINT32 HiPermanentMemorySize;\r |
b522c77b HW |
250 | } EFI_COMPATIBILITY16_TABLE;\r |
251 | \r | |
252 | ///\r | |
253 | /// Functions provided by the CSM binary which communicate between the EfiCompatibility\r | |
48cf40b8 | 254 | /// and Compatibility16 code.\r |
b522c77b HW |
255 | ///\r |
256 | /// Inconsistent with the specification here:\r | |
257 | /// The member's name started with "Compatibility16" [defined in Intel Framework\r | |
258 | /// Compatibility Support Module Specification / 0.97 version]\r | |
259 | /// has been changed to "Legacy16" since keeping backward compatible.\r | |
260 | ///\r | |
261 | typedef enum {\r | |
262 | ///\r | |
263 | /// Causes the Compatibility16 code to do any internal initialization required.\r | |
264 | /// Input:\r | |
265 | /// AX = Compatibility16InitializeYourself\r | |
266 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r | |
267 | /// Return:\r | |
268 | /// AX = Return Status codes\r | |
269 | ///\r | |
ac0a286f | 270 | Legacy16InitializeYourself = 0x0000,\r |
b522c77b HW |
271 | \r |
272 | ///\r | |
273 | /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r | |
274 | /// Input:\r | |
275 | /// AX = Compatibility16UpdateBbs\r | |
276 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r | |
277 | /// Return:\r | |
278 | /// AX = Returned status codes\r | |
279 | ///\r | |
ac0a286f | 280 | Legacy16UpdateBbs = 0x0001,\r |
b522c77b HW |
281 | \r |
282 | ///\r | |
283 | /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r | |
284 | /// code is read/write.\r | |
285 | /// Input:\r | |
286 | /// AX = Compatibility16PrepareToBoot\r | |
287 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure\r | |
288 | /// Return:\r | |
289 | /// AX = Returned status codes\r | |
290 | ///\r | |
ac0a286f | 291 | Legacy16PrepareToBoot = 0x0002,\r |
b522c77b HW |
292 | \r |
293 | ///\r | |
294 | /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r | |
295 | /// Input:\r | |
296 | /// AX = Compatibility16Boot\r | |
297 | /// Output:\r | |
298 | /// AX = Returned status codes\r | |
299 | ///\r | |
ac0a286f | 300 | Legacy16Boot = 0x0003,\r |
b522c77b HW |
301 | \r |
302 | ///\r | |
303 | /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r | |
304 | /// stored in CMOS and is the priority number of the last attempted boot device.\r | |
305 | /// Input:\r | |
306 | /// AX = Compatibility16RetrieveLastBootDevice\r | |
307 | /// Output:\r | |
308 | /// AX = Returned status codes\r | |
309 | /// BX = Priority number of the boot device.\r | |
310 | ///\r | |
311 | Legacy16RetrieveLastBootDevice = 0x0004,\r | |
312 | \r | |
313 | ///\r | |
314 | /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r | |
315 | /// Input:\r | |
316 | /// AX = Compatibility16DispatchOprom\r | |
317 | /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r | |
318 | /// Output:\r | |
319 | /// AX = Returned status codes\r | |
320 | /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r | |
321 | ///\r | |
ac0a286f | 322 | Legacy16DispatchOprom = 0x0005,\r |
b522c77b HW |
323 | \r |
324 | ///\r | |
325 | /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r | |
326 | /// of that region.\r | |
327 | /// Input:\r | |
328 | /// AX = Compatibility16GetTableAddress\r | |
329 | /// BX = Allocation region\r | |
330 | /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r | |
331 | /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r | |
332 | /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r | |
333 | /// CX = Requested length in bytes.\r | |
334 | /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r | |
335 | /// Output:\r | |
336 | /// AX = Returned status codes\r | |
337 | /// DS:BX = Address of the region\r | |
338 | ///\r | |
ac0a286f | 339 | Legacy16GetTableAddress = 0x0006,\r |
b522c77b HW |
340 | \r |
341 | ///\r | |
342 | /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r | |
343 | /// Input:\r | |
344 | /// AX = Compatibility16SetKeyboardLeds\r | |
345 | /// CL = LED status.\r | |
346 | /// Bit 0 Scroll Lock 0 = Off\r | |
347 | /// Bit 1 NumLock\r | |
348 | /// Bit 2 Caps Lock\r | |
349 | /// Output:\r | |
350 | /// AX = Returned status codes\r | |
351 | ///\r | |
ac0a286f | 352 | Legacy16SetKeyboardLeds = 0x0007,\r |
b522c77b HW |
353 | \r |
354 | ///\r | |
355 | /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r | |
356 | /// do not have an OpROM associated with them. An example is SATA.\r | |
357 | /// Input:\r | |
358 | /// AX = Compatibility16InstallPciHandler\r | |
359 | /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r | |
360 | /// Output:\r | |
361 | /// AX = Returned status codes\r | |
362 | ///\r | |
ac0a286f | 363 | Legacy16InstallPciHandler = 0x0008\r |
b522c77b HW |
364 | } EFI_COMPATIBILITY_FUNCTIONS;\r |
365 | \r | |
b522c77b HW |
366 | ///\r |
367 | /// EFI_DISPATCH_OPROM_TABLE\r | |
368 | ///\r | |
369 | typedef struct {\r | |
ac0a286f MK |
370 | UINT16 PnPInstallationCheckSegment; ///< A pointer to the PnpInstallationCheck data structure.\r |
371 | UINT16 PnPInstallationCheckOffset; ///< A pointer to the PnpInstallationCheck data structure.\r | |
372 | UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.\r | |
373 | UINT8 PciBus; ///< The PCI bus.\r | |
374 | UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.\r | |
375 | UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r | |
376 | ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r | |
377 | ///< OpROM BIOS Setup to be executed.\r | |
378 | UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r | |
379 | UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r | |
380 | ///< means that the relocation of this run time code is not supported.\r | |
381 | ///< Inconsistent with specification here:\r | |
382 | ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]\r | |
383 | ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r | |
b522c77b HW |
384 | } EFI_DISPATCH_OPROM_TABLE;\r |
385 | \r | |
386 | ///\r | |
387 | /// EFI_TO_COMPATIBILITY16_INIT_TABLE\r | |
388 | ///\r | |
389 | typedef struct {\r | |
390 | ///\r | |
391 | /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r | |
392 | ///\r | |
ac0a286f | 393 | UINT32 BiosLessThan1MB;\r |
b522c77b HW |
394 | \r |
395 | ///\r | |
396 | /// The starting address of the high memory block.\r | |
397 | ///\r | |
ac0a286f | 398 | UINT32 HiPmmMemory;\r |
b522c77b HW |
399 | \r |
400 | ///\r | |
401 | /// The length of high memory block.\r | |
402 | ///\r | |
ac0a286f | 403 | UINT32 HiPmmMemorySizeInBytes;\r |
b522c77b HW |
404 | \r |
405 | ///\r | |
406 | /// The segment of the reverse thunk call code.\r | |
407 | ///\r | |
ac0a286f | 408 | UINT16 ReverseThunkCallSegment;\r |
b522c77b HW |
409 | \r |
410 | ///\r | |
411 | /// The offset of the reverse thunk call code.\r | |
412 | ///\r | |
ac0a286f | 413 | UINT16 ReverseThunkCallOffset;\r |
b522c77b HW |
414 | \r |
415 | ///\r | |
416 | /// The number of E820 entries copied to the Compatibility16 BIOS.\r | |
417 | ///\r | |
ac0a286f | 418 | UINT32 NumberE820Entries;\r |
b522c77b HW |
419 | \r |
420 | ///\r | |
421 | /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r | |
422 | ///\r | |
ac0a286f | 423 | UINT32 OsMemoryAbove1Mb;\r |
b522c77b HW |
424 | \r |
425 | ///\r | |
426 | /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r | |
427 | ///\r | |
ac0a286f | 428 | UINT32 ThunkStart;\r |
b522c77b HW |
429 | \r |
430 | ///\r | |
431 | /// The size of the thunk code.\r | |
432 | ///\r | |
ac0a286f | 433 | UINT32 ThunkSizeInBytes;\r |
b522c77b HW |
434 | \r |
435 | ///\r | |
436 | /// Starting address of memory under 1 MB.\r | |
437 | ///\r | |
ac0a286f | 438 | UINT32 LowPmmMemory;\r |
b522c77b HW |
439 | \r |
440 | ///\r | |
441 | /// The length of low Memory block.\r | |
442 | ///\r | |
ac0a286f | 443 | UINT32 LowPmmMemorySizeInBytes;\r |
b522c77b HW |
444 | } EFI_TO_COMPATIBILITY16_INIT_TABLE;\r |
445 | \r | |
446 | ///\r | |
447 | /// DEVICE_PRODUCER_SERIAL.\r | |
448 | ///\r | |
449 | typedef struct {\r | |
ac0a286f MK |
450 | UINT16 Address; ///< I/O address assigned to the serial port.\r |
451 | UINT8 Irq; ///< IRQ assigned to the serial port.\r | |
452 | SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.\r | |
b522c77b HW |
453 | } DEVICE_PRODUCER_SERIAL;\r |
454 | \r | |
455 | ///\r | |
456 | /// DEVICE_PRODUCER_SERIAL's modes.\r | |
457 | ///@{\r | |
ac0a286f MK |
458 | #define DEVICE_SERIAL_MODE_NORMAL 0x00\r |
459 | #define DEVICE_SERIAL_MODE_IRDA 0x01\r | |
460 | #define DEVICE_SERIAL_MODE_ASK_IR 0x02\r | |
461 | #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00\r | |
462 | #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10\r | |
463 | /// @)\r | |
b522c77b HW |
464 | \r |
465 | ///\r | |
466 | /// DEVICE_PRODUCER_PARALLEL.\r | |
467 | ///\r | |
468 | typedef struct {\r | |
ac0a286f MK |
469 | UINT16 Address; ///< I/O address assigned to the parallel port.\r |
470 | UINT8 Irq; ///< IRQ assigned to the parallel port.\r | |
471 | UINT8 Dma; ///< DMA assigned to the parallel port.\r | |
472 | PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.\r | |
b522c77b HW |
473 | } DEVICE_PRODUCER_PARALLEL;\r |
474 | \r | |
475 | ///\r | |
476 | /// DEVICE_PRODUCER_PARALLEL's modes.\r | |
477 | ///@{\r | |
ac0a286f MK |
478 | #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00\r |
479 | #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01\r | |
480 | #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02\r | |
481 | #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03\r | |
b522c77b HW |
482 | ///@}\r |
483 | \r | |
484 | ///\r | |
485 | /// DEVICE_PRODUCER_FLOPPY\r | |
486 | ///\r | |
487 | typedef struct {\r | |
ac0a286f MK |
488 | UINT16 Address; ///< I/O address assigned to the floppy.\r |
489 | UINT8 Irq; ///< IRQ assigned to the floppy.\r | |
490 | UINT8 Dma; ///< DMA assigned to the floppy.\r | |
491 | UINT8 NumberOfFloppy; ///< Number of floppies in the system.\r | |
b522c77b HW |
492 | } DEVICE_PRODUCER_FLOPPY;\r |
493 | \r | |
494 | ///\r | |
495 | /// LEGACY_DEVICE_FLAGS\r | |
496 | ///\r | |
497 | typedef struct {\r | |
ac0a286f MK |
498 | UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.\r |
499 | UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.\r | |
500 | UINT32 Reserved : 30; ///< Reserved for future usage.\r | |
b522c77b HW |
501 | } LEGACY_DEVICE_FLAGS;\r |
502 | \r | |
503 | ///\r | |
504 | /// DEVICE_PRODUCER_DATA_HEADER\r | |
505 | ///\r | |
506 | typedef struct {\r | |
ac0a286f MK |
507 | DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.\r |
508 | DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.\r | |
509 | DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.\r | |
510 | UINT8 MousePresent; ///< Flag to indicate if mouse is present.\r | |
511 | LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.\r | |
b522c77b HW |
512 | } DEVICE_PRODUCER_DATA_HEADER;\r |
513 | \r | |
514 | ///\r | |
515 | /// ATAPI_IDENTIFY\r | |
516 | ///\r | |
517 | typedef struct {\r | |
ac0a286f | 518 | UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.\r |
b522c77b HW |
519 | } ATAPI_IDENTIFY;\r |
520 | \r | |
521 | ///\r | |
522 | /// HDD_INFO\r | |
523 | ///\r | |
524 | typedef struct {\r | |
525 | ///\r | |
526 | /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r | |
527 | /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r | |
528 | /// 1 is slave.\r | |
529 | ///\r | |
ac0a286f | 530 | UINT16 Status;\r |
b522c77b HW |
531 | \r |
532 | ///\r | |
533 | /// PCI bus of IDE controller.\r | |
534 | ///\r | |
ac0a286f | 535 | UINT32 Bus;\r |
b522c77b HW |
536 | \r |
537 | ///\r | |
538 | /// PCI device of IDE controller.\r | |
539 | ///\r | |
ac0a286f | 540 | UINT32 Device;\r |
b522c77b HW |
541 | \r |
542 | ///\r | |
543 | /// PCI function of IDE controller.\r | |
544 | ///\r | |
ac0a286f | 545 | UINT32 Function;\r |
b522c77b HW |
546 | \r |
547 | ///\r | |
548 | /// Command ports base address.\r | |
549 | ///\r | |
ac0a286f | 550 | UINT16 CommandBaseAddress;\r |
b522c77b HW |
551 | \r |
552 | ///\r | |
553 | /// Control ports base address.\r | |
554 | ///\r | |
ac0a286f | 555 | UINT16 ControlBaseAddress;\r |
b522c77b HW |
556 | \r |
557 | ///\r | |
558 | /// Bus master address.\r | |
559 | ///\r | |
ac0a286f | 560 | UINT16 BusMasterAddress;\r |
b522c77b | 561 | \r |
ac0a286f | 562 | UINT8 HddIrq;\r |
b522c77b HW |
563 | \r |
564 | ///\r | |
565 | /// Data that identifies the drive data; one per possible attached drive.\r | |
566 | ///\r | |
ac0a286f | 567 | ATAPI_IDENTIFY IdentifyDrive[2];\r |
b522c77b HW |
568 | } HDD_INFO;\r |
569 | \r | |
570 | ///\r | |
571 | /// HDD_INFO status bits\r | |
572 | ///\r | |
573 | #define HDD_PRIMARY 0x01\r | |
574 | #define HDD_SECONDARY 0x02\r | |
575 | #define HDD_MASTER_ATAPI_CDROM 0x04\r | |
576 | #define HDD_SLAVE_ATAPI_CDROM 0x08\r | |
577 | #define HDD_MASTER_IDE 0x20\r | |
578 | #define HDD_SLAVE_IDE 0x40\r | |
579 | #define HDD_MASTER_ATAPI_ZIPDISK 0x10\r | |
580 | #define HDD_SLAVE_ATAPI_ZIPDISK 0x80\r | |
581 | \r | |
582 | ///\r | |
583 | /// BBS_STATUS_FLAGS;\.\r | |
584 | ///\r | |
585 | typedef struct {\r | |
ac0a286f MK |
586 | UINT16 OldPosition : 4; ///< Prior priority.\r |
587 | UINT16 Reserved1 : 4; ///< Reserved for future use.\r | |
588 | UINT16 Enabled : 1; ///< If 0, ignore this entry.\r | |
589 | UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r | |
b522c77b HW |
590 | ///< 1 = Boot attempted failed.\r |
591 | \r | |
592 | ///\r | |
593 | /// State of media present.\r | |
594 | /// 00 = No bootable media is present in the device.\r | |
595 | /// 01 = Unknown if a bootable media present.\r | |
596 | /// 10 = Media is present and appears bootable.\r | |
597 | /// 11 = Reserved.\r | |
598 | ///\r | |
ac0a286f MK |
599 | UINT16 MediaPresent : 2;\r |
600 | UINT16 Reserved2 : 4; ///< Reserved for future use.\r | |
b522c77b HW |
601 | } BBS_STATUS_FLAGS;\r |
602 | \r | |
603 | ///\r | |
604 | /// BBS_TABLE, device type values & boot priority values.\r | |
605 | ///\r | |
606 | typedef struct {\r | |
607 | ///\r | |
608 | /// The boot priority for this boot device. Values are defined below.\r | |
609 | ///\r | |
ac0a286f | 610 | UINT16 BootPriority;\r |
b522c77b HW |
611 | \r |
612 | ///\r | |
613 | /// The PCI bus for this boot device.\r | |
614 | ///\r | |
ac0a286f | 615 | UINT32 Bus;\r |
b522c77b HW |
616 | \r |
617 | ///\r | |
618 | /// The PCI device for this boot device.\r | |
619 | ///\r | |
ac0a286f | 620 | UINT32 Device;\r |
b522c77b HW |
621 | \r |
622 | ///\r | |
623 | /// The PCI function for the boot device.\r | |
624 | ///\r | |
ac0a286f | 625 | UINT32 Function;\r |
b522c77b HW |
626 | \r |
627 | ///\r | |
628 | /// The PCI class for this boot device.\r | |
629 | ///\r | |
ac0a286f | 630 | UINT8 Class;\r |
b522c77b HW |
631 | \r |
632 | ///\r | |
633 | /// The PCI Subclass for this boot device.\r | |
634 | ///\r | |
ac0a286f | 635 | UINT8 SubClass;\r |
b522c77b HW |
636 | \r |
637 | ///\r | |
638 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r | |
639 | ///\r | |
ac0a286f | 640 | UINT16 MfgStringOffset;\r |
b522c77b HW |
641 | \r |
642 | ///\r | |
643 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r | |
644 | ///\r | |
ac0a286f | 645 | UINT16 MfgStringSegment;\r |
b522c77b HW |
646 | \r |
647 | ///\r | |
648 | /// BBS device type. BBS device types are defined below.\r | |
649 | ///\r | |
ac0a286f | 650 | UINT16 DeviceType;\r |
b522c77b HW |
651 | \r |
652 | ///\r | |
653 | /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r | |
654 | ///\r | |
ac0a286f | 655 | BBS_STATUS_FLAGS StatusFlags;\r |
b522c77b HW |
656 | \r |
657 | ///\r | |
658 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r | |
659 | /// BCV devices.\r | |
660 | ///\r | |
ac0a286f | 661 | UINT16 BootHandlerOffset;\r |
b522c77b HW |
662 | \r |
663 | ///\r | |
664 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r | |
665 | /// BCV devices.\r | |
666 | ///\r | |
ac0a286f | 667 | UINT16 BootHandlerSegment;\r |
b522c77b HW |
668 | \r |
669 | ///\r | |
670 | /// Segment:offset address of an ASCIIZ description string describing this device.\r | |
671 | ///\r | |
ac0a286f | 672 | UINT16 DescStringOffset;\r |
b522c77b HW |
673 | \r |
674 | ///\r | |
675 | /// Segment:offset address of an ASCIIZ description string describing this device.\r | |
676 | ///\r | |
ac0a286f | 677 | UINT16 DescStringSegment;\r |
b522c77b HW |
678 | \r |
679 | ///\r | |
680 | /// Reserved.\r | |
681 | ///\r | |
ac0a286f | 682 | UINT32 InitPerReserved;\r |
b522c77b HW |
683 | \r |
684 | ///\r | |
685 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
686 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
687 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
688 | ///\r | |
ac0a286f | 689 | UINT32 AdditionalIrq13Handler;\r |
b522c77b HW |
690 | \r |
691 | ///\r | |
692 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
693 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
694 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
695 | ///\r | |
ac0a286f | 696 | UINT32 AdditionalIrq18Handler;\r |
b522c77b HW |
697 | \r |
698 | ///\r | |
699 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
700 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
701 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
702 | ///\r | |
ac0a286f | 703 | UINT32 AdditionalIrq19Handler;\r |
b522c77b HW |
704 | \r |
705 | ///\r | |
706 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
707 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
708 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
709 | ///\r | |
ac0a286f MK |
710 | UINT32 AdditionalIrq40Handler;\r |
711 | UINT8 AssignedDriveNumber;\r | |
712 | UINT32 AdditionalIrq41Handler;\r | |
713 | UINT32 AdditionalIrq46Handler;\r | |
714 | UINT32 IBV1;\r | |
715 | UINT32 IBV2;\r | |
b522c77b HW |
716 | } BBS_TABLE;\r |
717 | \r | |
718 | ///\r | |
719 | /// BBS device type values\r | |
720 | ///@{\r | |
ac0a286f MK |
721 | #define BBS_FLOPPY 0x01\r |
722 | #define BBS_HARDDISK 0x02\r | |
723 | #define BBS_CDROM 0x03\r | |
724 | #define BBS_PCMCIA 0x04\r | |
725 | #define BBS_USB 0x05\r | |
726 | #define BBS_EMBED_NETWORK 0x06\r | |
727 | #define BBS_BEV_DEVICE 0x80\r | |
728 | #define BBS_UNKNOWN 0xff\r | |
b522c77b HW |
729 | ///@}\r |
730 | \r | |
731 | ///\r | |
732 | /// BBS boot priority values\r | |
733 | ///@{\r | |
ac0a286f MK |
734 | #define BBS_DO_NOT_BOOT_FROM 0xFFFC\r |
735 | #define BBS_LOWEST_PRIORITY 0xFFFD\r | |
736 | #define BBS_UNPRIORITIZED_ENTRY 0xFFFE\r | |
737 | #define BBS_IGNORE_ENTRY 0xFFFF\r | |
b522c77b HW |
738 | ///@}\r |
739 | \r | |
740 | ///\r | |
741 | /// SMM_ATTRIBUTES\r | |
742 | ///\r | |
743 | typedef struct {\r | |
744 | ///\r | |
745 | /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r | |
746 | /// values are reserved for future usage.\r | |
747 | ///\r | |
ac0a286f | 748 | UINT16 Type : 3;\r |
b522c77b HW |
749 | \r |
750 | ///\r | |
751 | /// The size of "port" in bits. Defined values are below.\r | |
752 | ///\r | |
ac0a286f | 753 | UINT16 PortGranularity : 3;\r |
b522c77b HW |
754 | \r |
755 | ///\r | |
756 | /// The size of data in bits. Defined values are below.\r | |
757 | ///\r | |
ac0a286f | 758 | UINT16 DataGranularity : 3;\r |
b522c77b HW |
759 | \r |
760 | ///\r | |
761 | /// Reserved for future use.\r | |
762 | ///\r | |
ac0a286f | 763 | UINT16 Reserved : 7;\r |
b522c77b HW |
764 | } SMM_ATTRIBUTES;\r |
765 | \r | |
766 | ///\r | |
767 | /// SMM_ATTRIBUTES type values.\r | |
768 | ///@{\r | |
ac0a286f MK |
769 | #define STANDARD_IO 0x00\r |
770 | #define STANDARD_MEMORY 0x01\r | |
b522c77b HW |
771 | ///@}\r |
772 | \r | |
773 | ///\r | |
774 | /// SMM_ATTRIBUTES port size constants.\r | |
775 | ///@{\r | |
ac0a286f MK |
776 | #define PORT_SIZE_8 0x00\r |
777 | #define PORT_SIZE_16 0x01\r | |
778 | #define PORT_SIZE_32 0x02\r | |
779 | #define PORT_SIZE_64 0x03\r | |
b522c77b HW |
780 | ///@}\r |
781 | \r | |
782 | ///\r | |
783 | /// SMM_ATTRIBUTES data size constants.\r | |
784 | ///@{\r | |
ac0a286f MK |
785 | #define DATA_SIZE_8 0x00\r |
786 | #define DATA_SIZE_16 0x01\r | |
787 | #define DATA_SIZE_32 0x02\r | |
788 | #define DATA_SIZE_64 0x03\r | |
b522c77b HW |
789 | ///@}\r |
790 | \r | |
791 | ///\r | |
792 | /// SMM_FUNCTION & relating constants.\r | |
793 | ///\r | |
794 | typedef struct {\r | |
ac0a286f MK |
795 | UINT16 Function : 15;\r |
796 | UINT16 Owner : 1;\r | |
b522c77b HW |
797 | } SMM_FUNCTION;\r |
798 | \r | |
799 | ///\r | |
800 | /// SMM_FUNCTION Function constants.\r | |
801 | ///@{\r | |
ac0a286f MK |
802 | #define INT15_D042 0x0000\r |
803 | #define GET_USB_BOOT_INFO 0x0001\r | |
804 | #define DMI_PNP_50_57 0x0002\r | |
b522c77b HW |
805 | ///@}\r |
806 | \r | |
807 | ///\r | |
808 | /// SMM_FUNCTION Owner constants.\r | |
809 | ///@{\r | |
ac0a286f MK |
810 | #define STANDARD_OWNER 0x0\r |
811 | #define OEM_OWNER 0x1\r | |
b522c77b HW |
812 | ///@}\r |
813 | \r | |
814 | ///\r | |
815 | /// This structure assumes both port and data sizes are 1. SmmAttribute must be\r | |
816 | /// properly to reflect that assumption.\r | |
817 | ///\r | |
818 | typedef struct {\r | |
819 | ///\r | |
820 | /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r | |
821 | /// SMM_ATTRIBUTES is defined below.\r | |
822 | ///\r | |
ac0a286f | 823 | SMM_ATTRIBUTES SmmAttributes;\r |
b522c77b HW |
824 | \r |
825 | ///\r | |
826 | /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r | |
827 | ///\r | |
ac0a286f | 828 | SMM_FUNCTION SmmFunction;\r |
b522c77b HW |
829 | \r |
830 | ///\r | |
831 | /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r | |
832 | ///\r | |
ac0a286f | 833 | UINT8 SmmPort;\r |
b522c77b HW |
834 | \r |
835 | ///\r | |
836 | /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r | |
837 | ///\r | |
ac0a286f | 838 | UINT8 SmmData;\r |
b522c77b HW |
839 | } SMM_ENTRY;\r |
840 | \r | |
841 | ///\r | |
842 | /// SMM_TABLE\r | |
843 | ///\r | |
844 | typedef struct {\r | |
ac0a286f MK |
845 | UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.\r |
846 | SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.\r | |
b522c77b HW |
847 | } SMM_TABLE;\r |
848 | \r | |
849 | ///\r | |
850 | /// UDC_ATTRIBUTES\r | |
851 | ///\r | |
852 | typedef struct {\r | |
853 | ///\r | |
854 | /// This bit set indicates that the ServiceAreaData is valid.\r | |
855 | ///\r | |
ac0a286f | 856 | UINT8 DirectoryServiceValidity : 1;\r |
b522c77b HW |
857 | \r |
858 | ///\r | |
859 | /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r | |
860 | /// DirectoryServiceValidity is 0.\r | |
861 | ///\r | |
ac0a286f | 862 | UINT8 RabcaUsedFlag : 1;\r |
b522c77b HW |
863 | \r |
864 | ///\r | |
865 | /// This bit set indicates to execute hard disk diagnostics.\r | |
866 | ///\r | |
ac0a286f | 867 | UINT8 ExecuteHddDiagnosticsFlag : 1;\r |
b522c77b HW |
868 | \r |
869 | ///\r | |
870 | /// Reserved for future use. Set to 0.\r | |
871 | ///\r | |
ac0a286f | 872 | UINT8 Reserved : 5;\r |
b522c77b HW |
873 | } UDC_ATTRIBUTES;\r |
874 | \r | |
875 | ///\r | |
876 | /// UD_TABLE\r | |
877 | ///\r | |
878 | typedef struct {\r | |
879 | ///\r | |
880 | /// This field contains the bit-mapped attributes of the PARTIES information. Type\r | |
881 | /// UDC_ATTRIBUTES is defined below.\r | |
882 | ///\r | |
ac0a286f | 883 | UDC_ATTRIBUTES Attributes;\r |
b522c77b HW |
884 | \r |
885 | ///\r | |
886 | /// This field contains the zero-based device on which the selected\r | |
887 | /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.\r | |
888 | ///\r | |
ac0a286f | 889 | UINT8 DeviceNumber;\r |
b522c77b HW |
890 | \r |
891 | ///\r | |
892 | /// This field contains the zero-based index into the BbsTable for the parent device.\r | |
893 | /// This index allows the user to reference the parent device information such as PCI\r | |
894 | /// bus, device function.\r | |
895 | ///\r | |
ac0a286f | 896 | UINT8 BbsTableEntryNumberForParentDevice;\r |
b522c77b HW |
897 | \r |
898 | ///\r | |
899 | /// This field contains the zero-based index into the BbsTable for the boot entry.\r | |
900 | ///\r | |
ac0a286f | 901 | UINT8 BbsTableEntryNumberForBoot;\r |
b522c77b HW |
902 | \r |
903 | ///\r | |
904 | /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r | |
905 | ///\r | |
ac0a286f | 906 | UINT8 BbsTableEntryNumberForHddDiag;\r |
b522c77b HW |
907 | \r |
908 | ///\r | |
909 | /// The raw Beer data.\r | |
910 | ///\r | |
ac0a286f | 911 | UINT8 BeerData[128];\r |
b522c77b HW |
912 | \r |
913 | ///\r | |
914 | /// The raw data of selected service area.\r | |
915 | ///\r | |
ac0a286f | 916 | UINT8 ServiceAreaData[64];\r |
b522c77b HW |
917 | } UD_TABLE;\r |
918 | \r | |
ac0a286f MK |
919 | #define EFI_TO_LEGACY_MAJOR_VERSION 0x02\r |
920 | #define EFI_TO_LEGACY_MINOR_VERSION 0x00\r | |
921 | #define MAX_IDE_CONTROLLER 8\r | |
b522c77b HW |
922 | \r |
923 | ///\r | |
924 | /// EFI_TO_COMPATIBILITY16_BOOT_TABLE\r | |
925 | ///\r | |
926 | typedef struct {\r | |
ac0a286f MK |
927 | UINT16 MajorVersion; ///< The EfiCompatibility major version number.\r |
928 | UINT16 MinorVersion; ///< The EfiCompatibility minor version number.\r | |
929 | UINT32 AcpiTable; ///< The location of the RSDT ACPI table. < 4G range.\r | |
930 | UINT32 SmbiosTable; ///< The location of the SMBIOS table in EFI memory. < 4G range.\r | |
931 | UINT32 SmbiosTableLength;\r | |
b522c77b HW |
932 | //\r |
933 | // Legacy SIO state\r | |
934 | //\r | |
ac0a286f MK |
935 | DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.\r |
936 | UINT16 DevicePathType; ///< The default boot type.\r | |
937 | UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.\r | |
938 | UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r | |
b522c77b HW |
939 | ///< Compatibility16InitializeYourself() function.\r |
940 | //\r | |
941 | // Controller & Drive Identify[2] per controller information\r | |
942 | //\r | |
ac0a286f MK |
943 | HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.\r |
944 | UINT32 NumberBbsEntries; ///< Number of entries in the BBS table\r | |
945 | UINT32 BbsTable; ///< A pointer to the BBS table. Type BBS_TABLE is defined below.\r | |
946 | UINT32 SmmTable; ///< A pointer to the SMM table. Type SMM_TABLE is defined below.\r | |
947 | UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r | |
b522c77b HW |
948 | ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r |
949 | ///< memory may have been discovered.\r | |
ac0a286f | 950 | UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r |
b522c77b HW |
951 | ///< UD_TABLE is defined below.\r |
952 | } EFI_TO_COMPATIBILITY16_BOOT_TABLE;\r | |
953 | \r | |
954 | ///\r | |
955 | /// EFI_LEGACY_INSTALL_PCI_HANDLER\r | |
956 | ///\r | |
957 | typedef struct {\r | |
ac0a286f MK |
958 | UINT8 PciBus; ///< The PCI bus of the device.\r |
959 | UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.\r | |
960 | UINT8 PciSegment; ///< The PCI segment of the device.\r | |
961 | UINT8 PciClass; ///< The PCI class code of the device.\r | |
962 | UINT8 PciSubclass; ///< The PCI subclass code of the device.\r | |
963 | UINT8 PciInterface; ///< The PCI interface code of the device.\r | |
b522c77b HW |
964 | //\r |
965 | // Primary section\r | |
966 | //\r | |
ac0a286f MK |
967 | UINT8 PrimaryIrq; ///< The primary device IRQ.\r |
968 | UINT8 PrimaryReserved; ///< Reserved.\r | |
969 | UINT16 PrimaryControl; ///< The primary device control I/O base.\r | |
970 | UINT16 PrimaryBase; ///< The primary device I/O base.\r | |
971 | UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.\r | |
b522c77b HW |
972 | //\r |
973 | // Secondary Section\r | |
974 | //\r | |
ac0a286f MK |
975 | UINT8 SecondaryIrq; ///< The secondary device IRQ.\r |
976 | UINT8 SecondaryReserved; ///< Reserved.\r | |
977 | UINT16 SecondaryControl; ///< The secondary device control I/O base.\r | |
978 | UINT16 SecondaryBase; ///< The secondary device I/O base.\r | |
979 | UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.\r | |
b522c77b HW |
980 | } EFI_LEGACY_INSTALL_PCI_HANDLER;\r |
981 | \r | |
982 | //\r | |
983 | // Restore default pack value\r | |
984 | //\r | |
985 | #pragma pack()\r | |
986 | \r | |
987 | #define EFI_LEGACY_BIOS_PROTOCOL_GUID \\r | |
988 | { \\r | |
989 | 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \\r | |
990 | }\r | |
991 | \r | |
992 | typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;\r | |
993 | \r | |
994 | ///\r | |
995 | /// Flags returned by CheckPciRom().\r | |
996 | ///\r | |
997 | #define NO_ROM 0x00\r | |
998 | #define ROM_FOUND 0x01\r | |
999 | #define VALID_LEGACY_ROM 0x02\r | |
1000 | #define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.\r | |
1001 | \r | |
1002 | ///\r | |
1003 | /// The following macros do not appear in the Framework CSM Specification and\r | |
1004 | /// are kept for backward compatibility only. They convert 32-bit address (_Adr)\r | |
1005 | /// to Segment:Offset 16-bit form.\r | |
1006 | ///\r | |
1007 | ///@{\r | |
ac0a286f MK |
1008 | #define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)\r |
1009 | #define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)\r | |
b522c77b HW |
1010 | ///@}\r |
1011 | \r | |
ac0a286f | 1012 | #define CARRY_FLAG 0x01\r |
b522c77b HW |
1013 | \r |
1014 | ///\r | |
1015 | /// EFI_EFLAGS_REG\r | |
1016 | ///\r | |
1017 | typedef struct {\r | |
ac0a286f MK |
1018 | UINT32 CF : 1;\r |
1019 | UINT32 Reserved1 : 1;\r | |
1020 | UINT32 PF : 1;\r | |
1021 | UINT32 Reserved2 : 1;\r | |
1022 | UINT32 AF : 1;\r | |
1023 | UINT32 Reserved3 : 1;\r | |
1024 | UINT32 ZF : 1;\r | |
1025 | UINT32 SF : 1;\r | |
1026 | UINT32 TF : 1;\r | |
1027 | UINT32 IF : 1;\r | |
1028 | UINT32 DF : 1;\r | |
1029 | UINT32 OF : 1;\r | |
1030 | UINT32 IOPL : 2;\r | |
1031 | UINT32 NT : 1;\r | |
1032 | UINT32 Reserved4 : 2;\r | |
1033 | UINT32 VM : 1;\r | |
1034 | UINT32 Reserved5 : 14;\r | |
b522c77b HW |
1035 | } EFI_EFLAGS_REG;\r |
1036 | \r | |
1037 | ///\r | |
1038 | /// EFI_DWORD_REGS\r | |
1039 | ///\r | |
1040 | typedef struct {\r | |
ac0a286f MK |
1041 | UINT32 EAX;\r |
1042 | UINT32 EBX;\r | |
1043 | UINT32 ECX;\r | |
1044 | UINT32 EDX;\r | |
1045 | UINT32 ESI;\r | |
1046 | UINT32 EDI;\r | |
1047 | EFI_EFLAGS_REG EFlags;\r | |
1048 | UINT16 ES;\r | |
1049 | UINT16 CS;\r | |
1050 | UINT16 SS;\r | |
1051 | UINT16 DS;\r | |
1052 | UINT16 FS;\r | |
1053 | UINT16 GS;\r | |
1054 | UINT32 EBP;\r | |
1055 | UINT32 ESP;\r | |
b522c77b HW |
1056 | } EFI_DWORD_REGS;\r |
1057 | \r | |
1058 | ///\r | |
1059 | /// EFI_FLAGS_REG\r | |
1060 | ///\r | |
1061 | typedef struct {\r | |
ac0a286f MK |
1062 | UINT16 CF : 1;\r |
1063 | UINT16 Reserved1 : 1;\r | |
1064 | UINT16 PF : 1;\r | |
1065 | UINT16 Reserved2 : 1;\r | |
1066 | UINT16 AF : 1;\r | |
1067 | UINT16 Reserved3 : 1;\r | |
1068 | UINT16 ZF : 1;\r | |
1069 | UINT16 SF : 1;\r | |
1070 | UINT16 TF : 1;\r | |
1071 | UINT16 IF : 1;\r | |
1072 | UINT16 DF : 1;\r | |
1073 | UINT16 OF : 1;\r | |
1074 | UINT16 IOPL : 2;\r | |
1075 | UINT16 NT : 1;\r | |
1076 | UINT16 Reserved4 : 1;\r | |
b522c77b HW |
1077 | } EFI_FLAGS_REG;\r |
1078 | \r | |
1079 | ///\r | |
1080 | /// EFI_WORD_REGS\r | |
1081 | ///\r | |
1082 | typedef struct {\r | |
ac0a286f MK |
1083 | UINT16 AX;\r |
1084 | UINT16 ReservedAX;\r | |
1085 | UINT16 BX;\r | |
1086 | UINT16 ReservedBX;\r | |
1087 | UINT16 CX;\r | |
1088 | UINT16 ReservedCX;\r | |
1089 | UINT16 DX;\r | |
1090 | UINT16 ReservedDX;\r | |
1091 | UINT16 SI;\r | |
1092 | UINT16 ReservedSI;\r | |
1093 | UINT16 DI;\r | |
1094 | UINT16 ReservedDI;\r | |
1095 | EFI_FLAGS_REG Flags;\r | |
1096 | UINT16 ReservedFlags;\r | |
1097 | UINT16 ES;\r | |
1098 | UINT16 CS;\r | |
1099 | UINT16 SS;\r | |
1100 | UINT16 DS;\r | |
1101 | UINT16 FS;\r | |
1102 | UINT16 GS;\r | |
1103 | UINT16 BP;\r | |
1104 | UINT16 ReservedBP;\r | |
1105 | UINT16 SP;\r | |
1106 | UINT16 ReservedSP;\r | |
b522c77b HW |
1107 | } EFI_WORD_REGS;\r |
1108 | \r | |
1109 | ///\r | |
1110 | /// EFI_BYTE_REGS\r | |
1111 | ///\r | |
1112 | typedef struct {\r | |
ac0a286f MK |
1113 | UINT8 AL, AH;\r |
1114 | UINT16 ReservedAX;\r | |
1115 | UINT8 BL, BH;\r | |
1116 | UINT16 ReservedBX;\r | |
1117 | UINT8 CL, CH;\r | |
1118 | UINT16 ReservedCX;\r | |
1119 | UINT8 DL, DH;\r | |
1120 | UINT16 ReservedDX;\r | |
b522c77b HW |
1121 | } EFI_BYTE_REGS;\r |
1122 | \r | |
1123 | ///\r | |
1124 | /// EFI_IA32_REGISTER_SET\r | |
1125 | ///\r | |
1126 | typedef union {\r | |
ac0a286f MK |
1127 | EFI_DWORD_REGS E;\r |
1128 | EFI_WORD_REGS X;\r | |
1129 | EFI_BYTE_REGS H;\r | |
b522c77b HW |
1130 | } EFI_IA32_REGISTER_SET;\r |
1131 | \r | |
1132 | /**\r | |
1133 | Thunk to 16-bit real mode and execute a software interrupt with a vector\r | |
1134 | of BiosInt. Regs will contain the 16-bit register context on entry and\r | |
1135 | exit.\r | |
1136 | \r | |
1137 | @param[in] This The protocol instance pointer.\r | |
1138 | @param[in] BiosInt The processor interrupt vector to invoke.\r | |
1139 | @param[in,out] Reg Register contexted passed into (and returned) from thunk to\r | |
1140 | 16-bit mode.\r | |
1141 | \r | |
1142 | @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status.\r | |
1143 | @retval FALSE There was a BIOS error in the target code.\r | |
1144 | **/\r | |
1145 | typedef\r | |
1146 | BOOLEAN\r | |
1147 | (EFIAPI *EFI_LEGACY_BIOS_INT86)(\r | |
1148 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1149 | IN UINT8 BiosInt,\r | |
1150 | IN OUT EFI_IA32_REGISTER_SET *Regs\r | |
1151 | );\r | |
1152 | \r | |
1153 | /**\r | |
1154 | Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the\r | |
1155 | 16-bit register context on entry and exit. Arguments can be passed on\r | |
1156 | the Stack argument\r | |
1157 | \r | |
1158 | @param[in] This The protocol instance pointer.\r | |
1159 | @param[in] Segment The segemnt of 16-bit mode call.\r | |
1160 | @param[in] Offset The offset of 16-bit mdoe call.\r | |
1161 | @param[in] Reg Register contexted passed into (and returned) from thunk to\r | |
1162 | 16-bit mode.\r | |
1163 | @param[in] Stack The caller allocated stack used to pass arguments.\r | |
1164 | @param[in] StackSize The size of Stack in bytes.\r | |
1165 | \r | |
1166 | @retval FALSE Thunk completed with no BIOS errors in the target code. See Regs for status. @retval TRUE There was a BIOS error in the target code.\r | |
1167 | **/\r | |
1168 | typedef\r | |
1169 | BOOLEAN\r | |
1170 | (EFIAPI *EFI_LEGACY_BIOS_FARCALL86)(\r | |
1171 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1172 | IN UINT16 Segment,\r | |
1173 | IN UINT16 Offset,\r | |
1174 | IN EFI_IA32_REGISTER_SET *Regs,\r | |
1175 | IN VOID *Stack,\r | |
1176 | IN UINTN StackSize\r | |
1177 | );\r | |
1178 | \r | |
1179 | /**\r | |
1180 | Test to see if a legacy PCI ROM exists for this device. Optionally return\r | |
1181 | the Legacy ROM instance for this PCI device.\r | |
1182 | \r | |
1183 | @param[in] This The protocol instance pointer.\r | |
1184 | @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded\r | |
1185 | @param[out] RomImage Return the legacy PCI ROM for this device.\r | |
1186 | @param[out] RomSize The size of ROM Image.\r | |
1187 | @param[out] Flags Indicates if ROM found and if PC-AT. Multiple bits can be set as follows:\r | |
1188 | - 00 = No ROM.\r | |
1189 | - 01 = ROM Found.\r | |
1190 | - 02 = ROM is a valid legacy ROM.\r | |
1191 | \r | |
1192 | @retval EFI_SUCCESS The Legacy Option ROM available for this device\r | |
1193 | @retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.\r | |
1194 | \r | |
1195 | **/\r | |
1196 | typedef\r | |
1197 | EFI_STATUS\r | |
1198 | (EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM)(\r | |
1199 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1200 | IN EFI_HANDLE PciHandle,\r | |
79d49e16 MK |
1201 | OUT VOID **RomImage OPTIONAL,\r |
1202 | OUT UINTN *RomSize OPTIONAL,\r | |
b522c77b HW |
1203 | OUT UINTN *Flags\r |
1204 | );\r | |
1205 | \r | |
1206 | /**\r | |
1207 | Load a legacy PC-AT OPROM on the PciHandle device. Return information\r | |
1208 | about how many disks were added by the OPROM and the shadow address and\r | |
1209 | size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:\r | |
1210 | \r | |
1211 | @param[in] This The protocol instance pointer.\r | |
1212 | @param[in] PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.\r | |
1213 | This value is NULL if RomImage is non-NULL. This is the normal\r | |
1214 | case.\r | |
1215 | @param[in] RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is\r | |
1216 | no hardware associated with the ROM and thus no PciHandle,\r | |
1217 | otherwise is must be NULL.\r | |
1218 | Example is PXE base code.\r | |
1219 | @param[out] Flags The type of ROM discovered. Multiple bits can be set, as follows:\r | |
1220 | - 00 = No ROM.\r | |
1221 | - 01 = ROM found.\r | |
1222 | - 02 = ROM is a valid legacy ROM.\r | |
1223 | @param[out] DiskStart The disk number of first device hooked by the ROM. If DiskStart\r | |
1224 | is the same as DiskEnd no disked were hooked.\r | |
1225 | @param[out] DiskEnd disk number of the last device hooked by the ROM.\r | |
1226 | @param[out] RomShadowAddress Shadow address of PC-AT ROM.\r | |
1227 | @param[out] RomShadowSize Size of RomShadowAddress in bytes.\r | |
1228 | \r | |
1229 | @retval EFI_SUCCESS Thunk completed, see Regs for status.\r | |
1230 | @retval EFI_INVALID_PARAMETER PciHandle not found\r | |
1231 | \r | |
1232 | **/\r | |
1233 | typedef\r | |
1234 | EFI_STATUS\r | |
1235 | (EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM)(\r | |
1236 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1237 | IN EFI_HANDLE PciHandle,\r | |
1238 | IN VOID **RomImage,\r | |
1239 | OUT UINTN *Flags,\r | |
79d49e16 MK |
1240 | OUT UINT8 *DiskStart OPTIONAL,\r |
1241 | OUT UINT8 *DiskEnd OPTIONAL,\r | |
1242 | OUT VOID **RomShadowAddress OPTIONAL,\r | |
b522c77b HW |
1243 | OUT UINT32 *ShadowedRomSize OPTIONAL\r |
1244 | );\r | |
1245 | \r | |
1246 | /**\r | |
1247 | This function attempts to traditionally boot the specified BootOption. If the EFI context has\r | |
1248 | been compromised, this function will not return. This procedure is not used for loading an EFI-aware\r | |
1249 | OS off a traditional device. The following actions occur:\r | |
1250 | - Get EFI SMBIOS data structures, convert them to a traditional format, and copy to\r | |
1251 | Compatibility16.\r | |
1252 | - Get a pointer to ACPI data structures and copy the Compatibility16 RSD PTR to F0000 block.\r | |
1253 | - Find the traditional SMI handler from a firmware volume and register the traditional SMI\r | |
1254 | handler with the EFI SMI handler.\r | |
1255 | - Build onboard IDE information and pass this information to the Compatibility16 code.\r | |
1256 | - Make sure all PCI Interrupt Line registers are programmed to match 8259.\r | |
1257 | - Reconfigure SIO devices from EFI mode (polled) into traditional mode (interrupt driven).\r | |
1258 | - Shadow all PCI ROMs.\r | |
1259 | - Set up BDA and EBDA standard areas before the legacy boot.\r | |
1260 | - Construct the Compatibility16 boot memory map and pass it to the Compatibility16 code.\r | |
1261 | - Invoke the Compatibility16 table function Compatibility16PrepareToBoot(). This\r | |
1262 | invocation causes a thunk into the Compatibility16 code, which sets all appropriate internal\r | |
1263 | data structures. The boot device list is a parameter.\r | |
1264 | - Invoke the Compatibility16 Table function Compatibility16Boot(). This invocation\r | |
1265 | causes a thunk into the Compatibility16 code, which does an INT19.\r | |
1266 | - If the Compatibility16Boot() function returns, then the boot failed in a graceful\r | |
1267 | manner--meaning that the EFI code is still valid. An ungraceful boot failure causes a reset because the state\r | |
1268 | of EFI code is unknown.\r | |
1269 | \r | |
1270 | @param[in] This The protocol instance pointer.\r | |
1271 | @param[in] BootOption The EFI Device Path from BootXXXX variable.\r | |
1272 | @param[in] LoadOptionSize The size of LoadOption in size.\r | |
1273 | @param[in] LoadOption LThe oadOption from BootXXXX variable.\r | |
1274 | \r | |
1275 | @retval EFI_DEVICE_ERROR Failed to boot from any boot device and memory is uncorrupted. Note: This function normally does not returns. It will either boot the OS or reset the system if memory has been "corrupted" by loading a boot sector and passing control to it.\r | |
1276 | **/\r | |
1277 | typedef\r | |
1278 | EFI_STATUS\r | |
1279 | (EFIAPI *EFI_LEGACY_BIOS_BOOT)(\r | |
1280 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1281 | IN BBS_BBS_DEVICE_PATH *BootOption,\r | |
1282 | IN UINT32 LoadOptionsSize,\r | |
1283 | IN VOID *LoadOptions\r | |
1284 | );\r | |
1285 | \r | |
1286 | /**\r | |
1287 | This function takes the Leds input parameter and sets/resets the BDA accordingly.\r | |
1288 | Leds is also passed to Compatibility16 code, in case any special processing is required.\r | |
1289 | This function is normally called from EFI Setup drivers that handle user-selectable\r | |
1290 | keyboard options such as boot with NUM LOCK on/off. This function does not\r | |
1291 | touch the keyboard or keyboard LEDs but only the BDA.\r | |
1292 | \r | |
1293 | @param[in] This The protocol instance pointer.\r | |
1294 | @param[in] Leds The status of current Scroll, Num & Cap lock LEDS:\r | |
1295 | - Bit 0 is Scroll Lock 0 = Not locked.\r | |
1296 | - Bit 1 is Num Lock.\r | |
1297 | - Bit 2 is Caps Lock.\r | |
1298 | \r | |
1299 | @retval EFI_SUCCESS The BDA was updated successfully.\r | |
1300 | \r | |
1301 | **/\r | |
1302 | typedef\r | |
1303 | EFI_STATUS\r | |
1304 | (EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS)(\r | |
1305 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1306 | IN UINT8 Leds\r | |
1307 | );\r | |
1308 | \r | |
1309 | /**\r | |
1310 | Retrieve legacy BBS info and assign boot priority.\r | |
1311 | \r | |
1312 | @param[in] This The protocol instance pointer.\r | |
1313 | @param[out] HddCount The number of HDD_INFO structures.\r | |
1314 | @param[out] HddInfo Onboard IDE controller information.\r | |
1315 | @param[out] BbsCount The number of BBS_TABLE structures.\r | |
1316 | @param[in,out] BbsTable Points to List of BBS_TABLE.\r | |
1317 | \r | |
1318 | @retval EFI_SUCCESS Tables were returned.\r | |
1319 | \r | |
1320 | **/\r | |
1321 | typedef\r | |
1322 | EFI_STATUS\r | |
1323 | (EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO)(\r | |
1324 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1325 | OUT UINT16 *HddCount,\r | |
1326 | OUT HDD_INFO **HddInfo,\r | |
1327 | OUT UINT16 *BbsCount,\r | |
1328 | IN OUT BBS_TABLE **BbsTable\r | |
1329 | );\r | |
1330 | \r | |
1331 | /**\r | |
1332 | Assign drive number to legacy HDD drives prior to booting an EFI\r | |
1333 | aware OS so the OS can access drives without an EFI driver.\r | |
1334 | \r | |
1335 | @param[in] This The protocol instance pointer.\r | |
1336 | @param[out] BbsCount The number of BBS_TABLE structures\r | |
1337 | @param[out] BbsTable List of BBS entries\r | |
1338 | \r | |
1339 | @retval EFI_SUCCESS Drive numbers assigned.\r | |
1340 | \r | |
1341 | **/\r | |
1342 | typedef\r | |
1343 | EFI_STATUS\r | |
1344 | (EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI)(\r | |
1345 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1346 | OUT UINT16 *BbsCount,\r | |
1347 | OUT BBS_TABLE **BbsTable\r | |
1348 | );\r | |
1349 | \r | |
1350 | /**\r | |
1351 | To boot from an unconventional device like parties and/or execute\r | |
1352 | HDD diagnostics.\r | |
1353 | \r | |
1354 | @param[in] This The protocol instance pointer.\r | |
1355 | @param[in] Attributes How to interpret the other input parameters.\r | |
1356 | @param[in] BbsEntry The 0-based index into the BbsTable for the parent\r | |
1357 | device.\r | |
1358 | @param[in] BeerData A pointer to the 128 bytes of ram BEER data.\r | |
1359 | @param[in] ServiceAreaData A pointer to the 64 bytes of raw Service Area data. The\r | |
1360 | caller must provide a pointer to the specific Service\r | |
1361 | Area and not the start all Service Areas.\r | |
1362 | \r | |
1363 | @retval EFI_INVALID_PARAMETER If error. Does NOT return if no error.\r | |
1364 | \r | |
1365 | **/\r | |
1366 | typedef\r | |
1367 | EFI_STATUS\r | |
1368 | (EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE)(\r | |
1369 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1370 | IN UDC_ATTRIBUTES Attributes,\r | |
1371 | IN UINTN BbsEntry,\r | |
1372 | IN VOID *BeerData,\r | |
1373 | IN VOID *ServiceAreaData\r | |
1374 | );\r | |
1375 | \r | |
1376 | /**\r | |
1377 | Shadow all legacy16 OPROMs that haven't been shadowed.\r | |
1378 | Warning: Use this with caution. This routine disconnects all EFI\r | |
1379 | drivers. If used externally, then the caller must re-connect EFI\r | |
1380 | drivers.\r | |
1381 | \r | |
1382 | @param[in] This The protocol instance pointer.\r | |
1383 | \r | |
1384 | @retval EFI_SUCCESS OPROMs were shadowed.\r | |
1385 | \r | |
1386 | **/\r | |
1387 | typedef\r | |
1388 | EFI_STATUS\r | |
1389 | (EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS)(\r | |
1390 | IN EFI_LEGACY_BIOS_PROTOCOL *This\r | |
1391 | );\r | |
1392 | \r | |
1393 | /**\r | |
1394 | Get a region from the LegacyBios for S3 usage.\r | |
1395 | \r | |
1396 | @param[in] This The protocol instance pointer.\r | |
1397 | @param[in] LegacyMemorySize The size of required region.\r | |
1398 | @param[in] Region The region to use.\r | |
1399 | 00 = Either 0xE0000 or 0xF0000 block.\r | |
1400 | - Bit0 = 1 0xF0000 block.\r | |
1401 | - Bit1 = 1 0xE0000 block.\r | |
1402 | @param[in] Alignment Address alignment. Bit mapped. The first non-zero\r | |
1403 | bit from right is alignment.\r | |
1404 | @param[out] LegacyMemoryAddress The Region Assigned\r | |
1405 | \r | |
1406 | @retval EFI_SUCCESS The Region was assigned.\r | |
1407 | @retval EFI_ACCESS_DENIED The function was previously invoked.\r | |
1408 | @retval Other The Region was not assigned.\r | |
1409 | \r | |
1410 | **/\r | |
1411 | typedef\r | |
1412 | EFI_STATUS\r | |
1413 | (EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION)(\r | |
1414 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1415 | IN UINTN LegacyMemorySize,\r | |
1416 | IN UINTN Region,\r | |
1417 | IN UINTN Alignment,\r | |
1418 | OUT VOID **LegacyMemoryAddress\r | |
1419 | );\r | |
1420 | \r | |
1421 | /**\r | |
1422 | Get a region from the LegacyBios for Tiano usage. Can only be invoked once.\r | |
1423 | \r | |
1424 | @param[in] This The protocol instance pointer.\r | |
1425 | @param[in] LegacyMemorySize The size of data to copy.\r | |
1426 | @param[in] LegacyMemoryAddress The Legacy Region destination address.\r | |
1427 | Note: must be in region assigned by\r | |
1428 | LegacyBiosGetLegacyRegion.\r | |
1429 | @param[in] LegacyMemorySourceAddress The source of the data to copy.\r | |
1430 | \r | |
1431 | @retval EFI_SUCCESS The Region assigned.\r | |
1432 | @retval EFI_ACCESS_DENIED Destination was outside an assigned region.\r | |
1433 | \r | |
1434 | **/\r | |
1435 | typedef\r | |
1436 | EFI_STATUS\r | |
1437 | (EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION)(\r | |
1438 | IN EFI_LEGACY_BIOS_PROTOCOL *This,\r | |
1439 | IN UINTN LegacyMemorySize,\r | |
1440 | IN VOID *LegacyMemoryAddress,\r | |
1441 | IN VOID *LegacyMemorySourceAddress\r | |
1442 | );\r | |
1443 | \r | |
1444 | ///\r | |
1445 | /// Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()\r | |
1446 | /// member function allows the BDS to support booting a traditional OS.\r | |
1447 | /// EFI thunks drivers that make EFI bindings for BIOS INT services use\r | |
1448 | /// all the other member functions.\r | |
1449 | ///\r | |
1450 | struct _EFI_LEGACY_BIOS_PROTOCOL {\r | |
1451 | ///\r | |
1452 | /// Performs traditional software INT. See the Int86() function description.\r | |
1453 | ///\r | |
ac0a286f | 1454 | EFI_LEGACY_BIOS_INT86 Int86;\r |
b522c77b HW |
1455 | \r |
1456 | ///\r | |
1457 | /// Performs a far call into Compatibility16 or traditional OpROM code.\r | |
1458 | ///\r | |
ac0a286f | 1459 | EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r |
b522c77b HW |
1460 | \r |
1461 | ///\r | |
1462 | /// Checks if a traditional OpROM exists for this device.\r | |
1463 | ///\r | |
ac0a286f | 1464 | EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r |
b522c77b HW |
1465 | \r |
1466 | ///\r | |
1467 | /// Loads a traditional OpROM in traditional OpROM address space.\r | |
1468 | ///\r | |
ac0a286f | 1469 | EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r |
b522c77b HW |
1470 | \r |
1471 | ///\r | |
1472 | /// Boots a traditional OS.\r | |
1473 | ///\r | |
ac0a286f | 1474 | EFI_LEGACY_BIOS_BOOT LegacyBoot;\r |
b522c77b HW |
1475 | \r |
1476 | ///\r | |
1477 | /// Updates BDA to reflect the current EFI keyboard LED status.\r | |
1478 | ///\r | |
ac0a286f | 1479 | EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r |
b522c77b HW |
1480 | \r |
1481 | ///\r | |
1482 | /// Allows an external agent, such as BIOS Setup, to get the BBS data.\r | |
1483 | ///\r | |
ac0a286f | 1484 | EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r |
b522c77b HW |
1485 | \r |
1486 | ///\r | |
1487 | /// Causes all legacy OpROMs to be shadowed.\r | |
1488 | ///\r | |
ac0a286f | 1489 | EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r |
b522c77b HW |
1490 | \r |
1491 | ///\r | |
1492 | /// Performs all actions prior to boot. Used when booting an EFI-aware OS\r | |
1493 | /// rather than a legacy OS.\r | |
1494 | ///\r | |
ac0a286f | 1495 | EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r |
b522c77b HW |
1496 | \r |
1497 | ///\r | |
1498 | /// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r | |
1499 | ///\r | |
ac0a286f | 1500 | EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r |
b522c77b HW |
1501 | \r |
1502 | ///\r | |
1503 | /// Allows EFI to copy data to the area specified by GetLegacyRegion.\r | |
1504 | ///\r | |
ac0a286f | 1505 | EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r |
b522c77b HW |
1506 | \r |
1507 | ///\r | |
1508 | /// Allows the user to boot off an unconventional device such as a PARTIES partition.\r | |
1509 | ///\r | |
ac0a286f | 1510 | EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r |
b522c77b HW |
1511 | };\r |
1512 | \r | |
1513 | //\r | |
1514 | // Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if\r | |
1515 | // NULL pointer detection feature is enabled. Following macro can be used to\r | |
1516 | // enable/disable page 0 before/after accessing it.\r | |
1517 | //\r | |
1518 | #define ACCESS_PAGE0_CODE(statements) \\r | |
1519 | do { \\r | |
1520 | EFI_STATUS Status_; \\r | |
1521 | EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \\r | |
1522 | \\r | |
1523 | Desc_.Attributes = 0; \\r | |
1524 | Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \\r | |
1525 | ASSERT_EFI_ERROR (Status_); \\r | |
1526 | if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r | |
1527 | Status_ = gDS->SetMemorySpaceAttributes ( \\r | |
1528 | 0, \\r | |
1529 | EFI_PAGES_TO_SIZE(1), \\r | |
1530 | Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \\r | |
1531 | ); \\r | |
1532 | ASSERT_EFI_ERROR (Status_); \\r | |
1533 | } \\r | |
1534 | \\r | |
1535 | { \\r | |
1536 | statements; \\r | |
1537 | } \\r | |
1538 | \\r | |
1539 | if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r | |
1540 | Status_ = gDS->SetMemorySpaceAttributes ( \\r | |
1541 | 0, \\r | |
1542 | EFI_PAGES_TO_SIZE(1), \\r | |
1543 | Desc_.Attributes \\r | |
1544 | ); \\r | |
1545 | ASSERT_EFI_ERROR (Status_); \\r | |
1546 | } \\r | |
1547 | } while (FALSE)\r | |
1548 | \r | |
ac0a286f | 1549 | extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r |
b522c77b HW |
1550 | \r |
1551 | #endif\r |