UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / OvmfPkg / Include / IndustryStandard / I440FxPiix4.h

/** @file\r
  Various register numbers and value bits based on the following publications:\r
  - Intel(R) datasheet 290549-001\r
  - Intel(R) datasheet 290562-001\r
  - Intel(R) datasheet 297654-006\r
  - Intel(R) datasheet 297738-017\r
\r
  Copyright (C) 2015, Red Hat, Inc.\r
  Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
#ifndef __I440FX_PIIX4_H__\r
#define __I440FX_PIIX4_H__\r
\r
#include <Library/PciLib.h>\r
\r
//\r
// Host Bridge Device ID (DID) value for I440FX\r
//\r
#define INTEL_82441_DEVICE_ID  0x1237\r
\r
//\r
// B/D/F/Type: 0/0/0/PCI\r
//\r
#define PMC_REGISTER_PIIX4(Offset)  PCI_LIB_ADDRESS (0, 0, 0, (Offset))\r
\r
#define PIIX4_PAM0  0x59\r
#define PIIX4_PAM1  0x5A\r
#define PIIX4_PAM2  0x5B\r
#define PIIX4_PAM3  0x5C\r
#define PIIX4_PAM4  0x5D\r
#define PIIX4_PAM5  0x5E\r
#define PIIX4_PAM6  0x5F\r
\r
//\r
// B/D/F/Type: 0/1/3/PCI\r
//\r
#define POWER_MGMT_REGISTER_PIIX4(Offset)  PCI_LIB_ADDRESS (0, 1, 3, (Offset))\r
\r
#define PIIX4_PMBA       0x40\r
#define PIIX4_PMBA_MASK  (BIT15 | BIT14 | BIT13 | BIT12 | BIT11 |         \\r
                                  BIT10 | BIT9  | BIT8  | BIT7  | BIT6)\r
\r
#define PIIX4_PMREGMISC         0x80\r
#define PIIX4_PMREGMISC_PMIOSE  BIT0\r
\r
//\r
// IO ports\r
//\r
#define PIIX4_CPU_HOTPLUG_BASE  0xAF00\r
\r
#endif\r