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1 | /** @file\r |
2 | Various register numbers and value bits based on the following publications:\r | |
3 | - Intel(R) datasheet 316966-002\r | |
4 | - Intel(R) datasheet 316972-004\r | |
5 | \r | |
6 | Copyright (C) 2015, Red Hat, Inc.\r | |
7 | Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r | |
8 | \r | |
9 | This program and the accompanying materials are licensed and made available\r | |
10 | under the terms and conditions of the BSD License which accompanies this\r | |
11 | distribution. The full text of the license may be found at\r | |
12 | http://opensource.org/licenses/bsd-license.php\r | |
13 | \r | |
14 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r | |
15 | WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
16 | **/\r | |
17 | \r | |
18 | #ifndef __Q35_MCH_ICH9_H__\r | |
19 | #define __Q35_MCH_ICH9_H__\r | |
20 | \r | |
21 | #include <Library/PciLib.h>\r | |
22 | \r | |
23 | //\r | |
24 | // Host Bridge Device ID (DID) value for Q35/MCH\r | |
25 | //\r | |
26 | #define INTEL_Q35_MCH_DEVICE_ID 0x29C0\r | |
27 | \r | |
28 | //\r | |
29 | // B/D/F/Type: 0/0x1f/0/PCI\r | |
30 | //\r | |
31 | #define POWER_MGMT_REGISTER_Q35(Offset) \\r | |
32 | PCI_LIB_ADDRESS (0, 0x1f, 0, (Offset))\r | |
33 | \r | |
34 | #endif\r |