projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9bcca53f PDJ |
1 | /** @file\r |
| 2 | \r | |
| 3 | Macro and enum definitions of a subset of port numbers, register identifiers\r | |
| 4 | and values required for driving the VMWare SVGA virtual display adapter,\r | |
| 5 | also implemented by Qemu.\r | |
| 6 | \r | |
| 7 | This file's contents was extracted from file lib/vmware/svga_reg.h in commit\r | |
| 8 | 329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga repository:\r | |
| 9 | git://git.code.sf.net/p/vmware-svga/git\r | |
| 10 | \r | |
| 11 | \r | |
| 12 | Copyright 1998-2009 VMware, Inc. All rights reserved.\r | |
| 13 | Portions Copyright 2017 Phil Dennis-Jordan <phil@philjordan.eu>\r | |
| 14 | \r | |
| 15 | Permission is hereby granted, free of charge, to any person\r | |
| 16 | obtaining a copy of this software and associated documentation\r | |
| 17 | files (the "Software"), to deal in the Software without\r | |
| 18 | restriction, including without limitation the rights to use, copy,\r | |
| 19 | modify, merge, publish, distribute, sublicense, and/or sell copies\r | |
| 20 | of the Software, and to permit persons to whom the Software is\r | |
| 21 | furnished to do so, subject to the following conditions:\r | |
| 22 | \r | |
| 23 | The above copyright notice and this permission notice shall be\r | |
| 24 | included in all copies or substantial portions of the Software.\r | |
| 25 | \r | |
| 26 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,\r | |
| 27 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF\r | |
| 28 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\r | |
| 29 | NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS\r | |
| 30 | BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN\r | |
| 31 | ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r | |
| 32 | CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\r | |
| 33 | SOFTWARE.\r | |
| 34 | \r | |
| 35 | **/\r | |
| 36 | \r | |
| 37 | #ifndef _VMWARE_SVGA_H_\r | |
| 38 | #define _VMWARE_SVGA_H_\r | |
| 39 | \r | |
| 40 | #include <Base.h>\r | |
| 41 | \r | |
| 42 | //\r | |
| 43 | // IDs for recognising the device\r | |
| 44 | //\r | |
| 45 | #define VMWARE_PCI_VENDOR_ID_VMWARE 0x15AD\r | |
| 46 | #define VMWARE_PCI_DEVICE_ID_VMWARE_SVGA2 0x0405\r | |
| 47 | \r | |
| 48 | //\r | |
| 49 | // I/O port BAR offsets for register selection and read/write.\r | |
| 50 | //\r | |
| 51 | // The register index is written to the 32-bit index port, followed by a 32-bit\r | |
| 52 | // read or write on the value port to read or set that register's contents.\r | |
| 53 | //\r | |
| 54 | #define VMWARE_SVGA_INDEX_PORT 0x0\r | |
| 55 | #define VMWARE_SVGA_VALUE_PORT 0x1\r | |
| 56 | \r | |
| 57 | //\r | |
| 58 | // Some of the device's register indices for basic framebuffer functionality.\r | |
| 59 | //\r | |
| 60 | typedef enum {\r | |
| 61 | VmwareSvgaRegId = 0,\r | |
| 62 | VmwareSvgaRegEnable = 1,\r | |
| 63 | VmwareSvgaRegWidth = 2,\r | |
| 64 | VmwareSvgaRegHeight = 3,\r | |
| 65 | VmwareSvgaRegMaxWidth = 4,\r | |
| 66 | VmwareSvgaRegMaxHeight = 5,\r | |
| 67 | \r | |
| 68 | VmwareSvgaRegBitsPerPixel = 7,\r | |
| 69 | \r | |
| 70 | VmwareSvgaRegRedMask = 9,\r | |
| 71 | VmwareSvgaRegGreenMask = 10,\r | |
| 72 | VmwareSvgaRegBlueMask = 11,\r | |
| 73 | VmwareSvgaRegBytesPerLine = 12,\r | |
| 74 | \r | |
| 75 | VmwareSvgaRegFbOffset = 14,\r | |
| 76 | \r | |
| 77 | VmwareSvgaRegFbSize = 16,\r | |
| 78 | VmwareSvgaRegCapabilities = 17,\r | |
| 79 | \r | |
| 80 | VmwareSvgaRegHostBitsPerPixel = 28,\r | |
| 81 | } VMWARE_SVGA_REGISTER;\r | |
| 82 | \r | |
| 83 | //\r | |
| 84 | // Values used with VmwareSvgaRegId for sanity-checking the device and getting\r | |
| 85 | // its version.\r | |
| 86 | //\r | |
| 87 | #define VMWARE_SVGA_MAGIC 0x900000U\r | |
| 88 | #define VMWARE_SVGA_MAKE_ID(ver) (VMWARE_SVGA_MAGIC << 8 | (ver))\r | |
| 89 | \r | |
| 90 | #define VMWARE_SVGA_VERSION_2 2\r | |
| 91 | #define VMWARE_SVGA_ID_2 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_2)\r | |
| 92 | \r | |
| 93 | #define VMWARE_SVGA_VERSION_1 1\r | |
| 94 | #define VMWARE_SVGA_ID_1 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_1)\r | |
| 95 | \r | |
| 96 | #define VMWARE_SVGA_VERSION_0 0\r | |
| 97 | #define VMWARE_SVGA_ID_0 VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_0)\r | |
| 98 | \r | |
| 99 | //\r | |
| 100 | // One of the capability bits advertised by VmwareSvgaRegCapabilities.\r | |
| 101 | //\r | |
| 102 | #define VMWARE_SVGA_CAP_8BIT_EMULATION BIT8\r | |
| 103 | \r | |
| 104 | #endif\r |