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57bcfc3b MX |
1 | /** @file\r |
2 | PlatformInitLib header file.\r | |
3 | \r | |
4 | Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r | |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | \r | |
7 | **/\r | |
8 | \r | |
9 | #ifndef PLATFORM_INIT_LIB_H_\r | |
10 | #define PLATFORM_INIT_LIB_H_\r | |
11 | \r | |
12 | #include <PiPei.h>\r | |
13 | \r | |
14 | #pragma pack(1)\r | |
15 | typedef struct {\r | |
16 | EFI_HOB_GUID_TYPE GuidHeader;\r | |
17 | UINT16 HostBridgeDevId;\r | |
18 | \r | |
19 | UINT64 PcdConfidentialComputingGuestAttr;\r | |
20 | BOOLEAN SevEsIsEnabled;\r | |
21 | \r | |
22 | UINT32 BootMode;\r | |
23 | BOOLEAN S3Supported;\r | |
24 | \r | |
25 | BOOLEAN SmmSmramRequire;\r | |
26 | BOOLEAN Q35SmramAtDefaultSmbase;\r | |
27 | UINT16 Q35TsegMbytes;\r | |
28 | \r | |
29 | UINT64 FirstNonAddress;\r | |
30 | UINT8 PhysMemAddressWidth;\r | |
31 | UINT32 Uc32Base;\r | |
32 | UINT32 Uc32Size;\r | |
33 | \r | |
34 | BOOLEAN PcdSetNxForStack;\r | |
35 | UINT64 PcdTdxSharedBitMask;\r | |
36 | \r | |
37 | UINT64 PcdPciMmio64Base;\r | |
38 | UINT64 PcdPciMmio64Size;\r | |
39 | UINT32 PcdPciMmio32Base;\r | |
40 | UINT32 PcdPciMmio32Size;\r | |
41 | UINT64 PcdPciIoBase;\r | |
42 | UINT64 PcdPciIoSize;\r | |
43 | \r | |
44 | UINT64 PcdEmuVariableNvStoreReserved;\r | |
45 | UINT32 PcdCpuBootLogicalProcessorNumber;\r | |
46 | UINT32 PcdCpuMaxLogicalProcessorNumber;\r | |
47 | UINT32 DefaultMaxCpuNumber;\r | |
48 | \r | |
49 | UINT32 S3AcpiReservedMemoryBase;\r | |
50 | UINT32 S3AcpiReservedMemorySize;\r | |
f6a196c7 GH |
51 | \r |
52 | UINT64 FeatureControlValue;\r | |
57bcfc3b MX |
53 | } EFI_HOB_PLATFORM_INFO;\r |
54 | #pragma pack()\r | |
55 | \r | |
56 | /**\r | |
57 | Reads 8-bits of CMOS data.\r | |
58 | \r | |
59 | Reads the 8-bits of CMOS data at the location specified by Index.\r | |
60 | The 8-bit read value is returned.\r | |
61 | \r | |
62 | @param Index The CMOS location to read.\r | |
63 | \r | |
64 | @return The value read.\r | |
65 | \r | |
66 | **/\r | |
67 | UINT8\r | |
68 | EFIAPI\r | |
69 | PlatformCmosRead8 (\r | |
70 | IN UINTN Index\r | |
71 | );\r | |
72 | \r | |
73 | /**\r | |
74 | Writes 8-bits of CMOS data.\r | |
75 | \r | |
76 | Writes 8-bits of CMOS data to the location specified by Index\r | |
77 | with the value specified by Value and returns Value.\r | |
78 | \r | |
79 | @param Index The CMOS location to write.\r | |
80 | @param Value The value to write to CMOS.\r | |
81 | \r | |
82 | @return The value written to CMOS.\r | |
83 | \r | |
84 | **/\r | |
85 | UINT8\r | |
86 | EFIAPI\r | |
87 | PlatformCmosWrite8 (\r | |
88 | IN UINTN Index,\r | |
89 | IN UINT8 Value\r | |
90 | );\r | |
91 | \r | |
92 | /**\r | |
93 | Dump the CMOS content\r | |
94 | */\r | |
95 | VOID\r | |
96 | EFIAPI\r | |
97 | PlatformDebugDumpCmos (\r | |
98 | VOID\r | |
99 | );\r | |
100 | \r | |
102cafed MX |
101 | VOID\r |
102 | EFIAPI\r | |
103 | PlatformAddIoMemoryBaseSizeHob (\r | |
104 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
105 | IN UINT64 MemorySize\r | |
106 | );\r | |
107 | \r | |
108 | VOID\r | |
109 | EFIAPI\r | |
110 | PlatformAddIoMemoryRangeHob (\r | |
111 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
112 | IN EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
113 | );\r | |
114 | \r | |
115 | VOID\r | |
116 | EFIAPI\r | |
117 | PlatformAddMemoryBaseSizeHob (\r | |
118 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
119 | IN UINT64 MemorySize\r | |
120 | );\r | |
121 | \r | |
122 | VOID\r | |
123 | EFIAPI\r | |
124 | PlatformAddMemoryRangeHob (\r | |
125 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
126 | IN EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
127 | );\r | |
128 | \r | |
129 | VOID\r | |
130 | EFIAPI\r | |
131 | PlatformAddReservedMemoryBaseSizeHob (\r | |
132 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
133 | IN UINT64 MemorySize,\r | |
134 | IN BOOLEAN Cacheable\r | |
135 | );\r | |
136 | \r | |
10460942 MX |
137 | VOID\r |
138 | EFIAPI\r | |
139 | PlatformQemuUc32BaseInitialization (\r | |
140 | IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
141 | );\r | |
142 | \r | |
143 | UINT32\r | |
144 | EFIAPI\r | |
145 | PlatformGetSystemMemorySizeBelow4gb (\r | |
146 | IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
147 | );\r | |
148 | \r | |
149 | /**\r | |
150 | Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.\r | |
151 | **/\r | |
152 | VOID\r | |
153 | EFIAPI\r | |
154 | PlatformAddressWidthInitialization (\r | |
155 | IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
156 | );\r | |
157 | \r | |
158 | /**\r | |
159 | Peform Memory Detection for QEMU / KVM\r | |
160 | \r | |
161 | **/\r | |
162 | VOID\r | |
163 | EFIAPI\r | |
164 | PlatformQemuInitializeRam (\r | |
165 | IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
166 | );\r | |
167 | \r | |
168 | VOID\r | |
169 | EFIAPI\r | |
170 | PlatformQemuInitializeRamForS3 (\r | |
171 | IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
172 | );\r | |
173 | \r | |
96047b66 MX |
174 | VOID\r |
175 | EFIAPI\r | |
176 | PlatformMemMapInitialization (\r | |
177 | IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
178 | );\r | |
179 | \r | |
180 | /**\r | |
181 | * Fetch "opt/ovmf/PcdSetNxForStack" from QEMU\r | |
182 | *\r | |
183 | * @param Setting The pointer to the setting of "/opt/ovmf/PcdSetNxForStack".\r | |
184 | * @return EFI_SUCCESS Successfully fetch the settings.\r | |
185 | */\r | |
186 | EFI_STATUS\r | |
187 | EFIAPI\r | |
188 | PlatformNoexecDxeInitialization (\r | |
189 | IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
190 | );\r | |
191 | \r | |
192 | VOID\r | |
193 | EFIAPI\r | |
194 | PlatformMiscInitialization (\r | |
195 | IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
196 | );\r | |
197 | \r | |
198 | /**\r | |
199 | Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r | |
200 | them to UefiCpuPkg modules.\r | |
201 | **/\r | |
202 | VOID\r | |
203 | EFIAPI\r | |
204 | PlatformMaxCpuCountInitialization (\r | |
205 | IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob\r | |
206 | );\r | |
207 | \r | |
b22ac35b MX |
208 | /**\r |
209 | In Tdx guest, some information need to be passed from host VMM to guest\r | |
210 | firmware. For example, the memory resource, etc. These information are\r | |
211 | prepared by host VMM and put in HobList which is described in TdxMetadata.\r | |
212 | \r | |
213 | Information in HobList is treated as external input. From the security\r | |
214 | perspective before it is consumed, it should be validated.\r | |
215 | \r | |
216 | @retval EFI_SUCCESS Successfully process the hoblist\r | |
217 | @retval Others Other error as indicated\r | |
218 | **/\r | |
219 | EFI_STATUS\r | |
220 | EFIAPI\r | |
221 | ProcessTdxHobList (\r | |
222 | VOID\r | |
223 | );\r | |
224 | \r | |
e23f8f52 MX |
225 | /**\r |
226 | In Tdx guest, the system memory is passed in TdHob by host VMM. So\r | |
227 | the major task of PlatformTdxPublishRamRegions is to walk thru the\r | |
228 | TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob\r | |
229 | to the hobs in DXE phase.\r | |
230 | \r | |
231 | MemoryAllocationHob should also be created for Mailbox and Ovmf work area.\r | |
232 | **/\r | |
233 | VOID\r | |
234 | EFIAPI\r | |
235 | PlatformTdxPublishRamRegions (\r | |
236 | VOID\r | |
237 | );\r | |
238 | \r | |
4f173db8 MX |
239 | /**\r |
240 | Check the integrity of NvVarStore.\r | |
241 | \r | |
242 | @param[in] NvVarStoreBase - A pointer to NvVarStore header\r | |
243 | @param[in] NvVarStoreSize - NvVarStore size\r | |
244 | \r | |
245 | @retval TRUE - The NvVarStore is valid.\r | |
246 | @retval FALSE - The NvVarStore is invalid.\r | |
247 | \r | |
248 | **/\r | |
249 | BOOLEAN\r | |
250 | EFIAPI\r | |
251 | PlatformValidateNvVarStore (\r | |
252 | IN UINT8 *NvVarStoreBase,\r | |
253 | IN UINT32 NvVarStoreSize\r | |
254 | );\r | |
255 | \r | |
256 | /**\r | |
257 | Allocate storage for NV variables early on so it will be\r | |
258 | at a consistent address. Since VM memory is preserved\r | |
259 | across reboots, this allows the NV variable storage to survive\r | |
260 | a VM reboot.\r | |
261 | \r | |
262 | *\r | |
263 | * @retval VOID* The pointer to the storage for NV Variables\r | |
264 | */\r | |
265 | VOID *\r | |
266 | EFIAPI\r | |
267 | PlatformReserveEmuVariableNvStore (\r | |
268 | VOID\r | |
269 | );\r | |
270 | \r | |
271 | /**\r | |
272 | When OVMF is lauched with -bios parameter, UEFI variables will be\r | |
273 | partially emulated, and non-volatile variables may lose their contents\r | |
274 | after a reboot. This makes the secure boot feature not working.\r | |
275 | \r | |
276 | This function is used to initialize the EmuVariableNvStore\r | |
277 | with the conent in PcdOvmfFlashNvStorageVariableBase.\r | |
278 | \r | |
279 | @param[in] EmuVariableNvStore - A pointer to EmuVariableNvStore\r | |
280 | \r | |
281 | @retval EFI_SUCCESS - Successfully init the EmuVariableNvStore\r | |
282 | @retval Others - As the error code indicates\r | |
283 | */\r | |
284 | EFI_STATUS\r | |
285 | EFIAPI\r | |
286 | PlatformInitEmuVariableNvStore (\r | |
287 | IN VOID *EmuVariableNvStore\r | |
288 | );\r | |
289 | \r | |
57bcfc3b | 290 | #endif // PLATFORM_INIT_LIB_H_\r |