[mirror_edk2.git] / OvmfPkg / IncompatiblePciDeviceSupportDxe / IncompatiblePciDeviceSupport.c

/** @file\r
  A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit\r
  MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM\r
  is not present), conserving 32-bit MMIO aperture for 32-bit BARs.\r
\r
  Copyright (C) 2016, Red Hat, Inc.\r
  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <IndustryStandard/Acpi10.h>\r
#include <IndustryStandard/Pci22.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/CcProbeLib.h>\r
\r
#include <Protocol/IncompatiblePciDeviceSupport.h>\r
#include <Protocol/LegacyBios.h>\r
\r
//\r
// The Legacy BIOS protocol has been located.\r
//\r
STATIC BOOLEAN  mLegacyBiosInstalled;\r
\r
//\r
// The protocol interface this driver produces.\r
//\r
STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL\r
  mIncompatiblePciDeviceSupport;\r
\r
//\r
// Configuration template for the CheckDevice() protocol member function.\r
//\r
// Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in\r
// the Platform Init 1.4a Spec, Volume 5.\r
//\r
// This structure is interpreted by the UpdatePciInfo() function in the edk2\r
// PCI Bus UEFI_DRIVER.\r
//\r
// This structure looks like:\r
// AddressDesc-1 + AddressDesc-2 + ... + AddressDesc-n + EndDesc\r
//\r
STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR  mMmio64Configuration = {\r
  ACPI_ADDRESS_SPACE_DESCRIPTOR,                   // Desc\r
  (UINT16)(                                        // Len\r
                                                   sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -\r
                                                   OFFSET_OF (\r
                                                     EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,\r
                                                     ResType\r
                                                     )\r
                                                   ),\r
  ACPI_ADDRESS_SPACE_TYPE_MEM,                     // ResType\r
  0,                                               // GenFlag\r
  0,                                               // SpecificFlag\r
  64,                                              // AddrSpaceGranularity:\r
                                                   //   aperture selection hint\r
                                                   //   for BAR allocation\r
  0,                                               // AddrRangeMin\r
  0,                                               // AddrRangeMax:\r
                                                   //   no special alignment\r
                                                   //   for affected BARs\r
  MAX_UINT64,                                      // AddrTranslationOffset:\r
                                                   //   hint covers all\r
                                                   //   eligible BARs\r
  0                                                // AddrLen:\r
                                                   //   use probed BAR size\r
};\r
\r
//\r
// mOptionRomConfiguration is present only in Td guest.\r
// Host VMM can inject option ROM which is untrusted in Td guest,\r
// so PCI option ROM needs to be ignored.\r
// According to "Table 20. ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage"\r
// PI spec 1.7, type-specific flags can be set to 0 when\r
// Address Translation Offset == 6 to skip device option ROM.\r
//\r
STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR  mOptionRomConfiguration =   {\r
  ACPI_ADDRESS_SPACE_DESCRIPTOR,                   // Desc\r
  (UINT16)(                                        // Len\r
                                                   sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -\r
                                                   OFFSET_OF (\r
                                                     EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,\r
                                                     ResType\r
                                                     )\r
                                                   ),\r
  ACPI_ADDRESS_SPACE_TYPE_MEM,                     // ResType\r
  0,                                               // GenFlag\r
  0,                                               // Disable option roms SpecificFlag\r
  64,                                              // AddrSpaceGranularity:\r
                                                   //   aperture selection hint\r
                                                   //   for BAR allocation\r
  MAX_UINT64,                                      // AddrRangeMin\r
  MAX_UINT64,                                      // AddrRangeMax:\r
                                                   //   no special alignment\r
                                                   //   for affected BARs\r
  6,                                               // AddrTranslationOffset:\r
                                                   //   hint covers all\r
                                                   //   eligible BARs\r
  0                                                // AddrLen:\r
                                                   //   use probed BAR size\r
};\r
\r
STATIC CONST EFI_ACPI_END_TAG_DESCRIPTOR  mEndDesc = {\r
  ACPI_END_TAG_DESCRIPTOR,                         // Desc\r
  0                                                // Checksum: to be ignored\r
};\r
\r
//\r
// The CheckDevice() member function has been called.\r
//\r
STATIC BOOLEAN  mCheckDeviceCalled;\r
\r
/**\r
  Notification callback for Legacy BIOS protocol installation.\r
\r
  @param[in] Event    Event whose notification function is being invoked.\r
\r
  @param[in] Context  The pointer to the notification function's context, which\r
                      is implementation-dependent.\r
**/\r
STATIC\r
VOID\r
EFIAPI\r
LegacyBiosInstalled (\r
  IN EFI_EVENT  Event,\r
  IN VOID       *Context\r
  )\r
{\r
  EFI_STATUS                Status;\r
  EFI_LEGACY_BIOS_PROTOCOL  *LegacyBios;\r
\r
  ASSERT (!mCheckDeviceCalled);\r
\r
  Status = gBS->LocateProtocol (\r
                  &gEfiLegacyBiosProtocolGuid,\r
                  NULL /* Registration */,\r
                  (VOID **)&LegacyBios\r
                  );\r
  if (EFI_ERROR (Status)) {\r
    return;\r
  }\r
\r
  mLegacyBiosInstalled = TRUE;\r
\r
  //\r
  // Close the event and deregister this callback.\r
  //\r
  Status = gBS->CloseEvent (Event);\r
  ASSERT_EFI_ERROR (Status);\r
}\r
\r
/**\r
  Returns a list of ACPI resource descriptors that detail the special resource\r
  configuration requirements for an incompatible PCI device.\r
\r
  Prior to bus enumeration, the PCI bus driver will look for the presence of\r
  the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this\r
  protocol can be present in the system. For each PCI device that the PCI bus\r
  driver discovers, the PCI bus driver calls this function with the device's\r
  vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device\r
  ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or\r
  SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The\r
  ID values that are not (UINTN)-1 will be used to identify the current device.\r
\r
  This function will only return EFI_SUCCESS. However, if the device is an\r
  incompatible PCI device, a list of ACPI resource descriptors will be returned\r
  in Configuration. Otherwise, NULL will be returned in Configuration instead.\r
  The PCI bus driver does not need to allocate memory for Configuration.\r
  However, it is the PCI bus driver's responsibility to free it. The PCI bus\r
  driver then can configure this device with the information that is derived\r
  from this list of resource nodes, rather than the result of BAR probing.\r
\r
  Only the following two resource descriptor types from the ACPI Specification\r
  may be used to describe the incompatible PCI device resource requirements:\r
  - QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)\r
  - End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)\r
\r
  The QWORD Address Space Descriptor can describe memory, I/O, and bus number\r
  ranges for dynamic or fixed resources. The configuration of a PCI root bridge\r
  is described with one or more QWORD Address Space Descriptors, followed by an\r
  End Tag. See the ACPI Specification for details on the field values.\r
\r
  @param[in]  This                Pointer to the\r
                                  EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL\r
                                  instance.\r
\r
  @param[in]  VendorId            A unique ID to identify the manufacturer of\r
                                  the PCI device.  See the Conventional PCI\r
                                  Specification 3.0 for details.\r
\r
  @param[in]  DeviceId            A unique ID to identify the particular PCI\r
                                  device. See the Conventional PCI\r
                                  Specification 3.0 for details.\r
\r
  @param[in]  RevisionId          A PCI device-specific revision identifier.\r
                                  See the Conventional PCI Specification 3.0\r
                                  for details.\r
\r
  @param[in]  SubsystemVendorId   Specifies the subsystem vendor ID. See the\r
                                  Conventional PCI Specification 3.0 for\r
                                  details.\r
\r
  @param[in]  SubsystemDeviceId   Specifies the subsystem device ID. See the\r
                                  Conventional PCI Specification 3.0 for\r
                                  details.\r
\r
  @param[out] Configuration       A list of ACPI resource descriptors that\r
                                  detail the configuration requirement.\r
\r
  @retval EFI_SUCCESS   The function always returns EFI_SUCCESS.\r
**/\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
CheckDevice (\r
  IN  EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL  *This,\r
  IN  UINTN                                         VendorId,\r
  IN  UINTN                                         DeviceId,\r
  IN  UINTN                                         RevisionId,\r
  IN  UINTN                                         SubsystemVendorId,\r
  IN  UINTN                                         SubsystemDeviceId,\r
  OUT VOID                                          **Configuration\r
  )\r
{\r
  mCheckDeviceCalled = TRUE;\r
  UINTN  Length;\r
  UINT8  *Ptr;\r
\r
  //\r
  // Unlike the general description of this protocol member suggests, there is\r
  // nothing incompatible about the PCI devices that we'll match here. We'll\r
  // match all PCI devices, and generate exactly one QWORD Address Space\r
  // Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER\r
  // not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM\r
  // BAR is present on the device.\r
  //\r
  // The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot\r
  // (via a CSM) could dispatch a legacy option ROM on the device, which might\r
  // have trouble with MMIO BARs that have been allocated outside of the 32-bit\r
  // address space. But, if we don't support legacy option ROMs at all, then\r
  // this problem cannot arise.\r
  //\r
  if (mLegacyBiosInstalled) {\r
    //\r
    // Don't interfere with resource degradation.\r
    //\r
    *Configuration = NULL;\r
    return EFI_SUCCESS;\r
  }\r
\r
  //\r
  // This member function is mis-specified actually: it is supposed to allocate\r
  // memory, but as specified, it could not return an error status. Thankfully,\r
  // the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the\r
  // UpdatePciInfo() function.\r
  //\r
  Length = sizeof mMmio64Configuration + sizeof mEndDesc;\r
\r
  //\r
  // In Td guest OptionRom is not allowed.\r
  //\r
  if (CcProbe ()) {\r
    Length += sizeof mOptionRomConfiguration;\r
  }\r
\r
  *Configuration = AllocateZeroPool (Length);\r
\r
  if (*Configuration == NULL) {\r
    DEBUG ((\r
      DEBUG_WARN,\r
      "%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",\r
      __FUNCTION__,\r
      (UINT32)VendorId,\r
      (UINT32)DeviceId,\r
      (UINT8)RevisionId\r
      ));\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  Ptr = (UINT8 *)(UINTN)*Configuration;\r
  CopyMem (Ptr, &mMmio64Configuration, sizeof mMmio64Configuration);\r
  Length = sizeof mMmio64Configuration;\r
\r
  if (CcProbe ()) {\r
    CopyMem (Ptr + Length, &mOptionRomConfiguration, sizeof mOptionRomConfiguration);\r
    Length += sizeof mOptionRomConfiguration;\r
  }\r
\r
  CopyMem (Ptr + Length, &mEndDesc, sizeof mEndDesc);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Entry point for this driver.\r
\r
  @param[in] ImageHandle  Image handle of this driver.\r
  @param[in] SystemTable  Pointer to SystemTable.\r
\r
  @retval EFI_SUCESS       Driver has loaded successfully.\r
  @retval EFI_UNSUPPORTED  PCI resource allocation has been disabled.\r
  @retval EFI_UNSUPPORTED  There is no 64-bit PCI MMIO aperture.\r
  @return                  Error codes from lower level functions.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
DriverInitialize (\r
  IN EFI_HANDLE        ImageHandle,\r
  IN EFI_SYSTEM_TABLE  *SystemTable\r
  )\r
{\r
  EFI_STATUS  Status;\r
  EFI_EVENT   Event;\r
  VOID        *Registration;\r
\r
  //\r
  // If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have to be\r
  // allocated under 4 GB unconditionally.\r
  //\r
  if (PcdGet64 (PcdPciMmio64Size) == 0) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  //\r
  // Otherwise, create a protocol notify to see if a CSM is present. (With the\r
  // CSM absent, the PCI Bus driver won't have to worry about allocating 64-bit\r
  // MMIO BARs in the 32-bit MMIO aperture, for the sake of a legacy BIOS.)\r
  //\r
  // If the Legacy BIOS Protocol is present at the time of this driver starting\r
  // up, we can mark immediately that the PCI Bus driver should perform the\r
  // usual 64-bit MMIO BAR degradation.\r
  //\r
  // Otherwise, if the Legacy BIOS Protocol is absent at startup, it may be\r
  // installed later. However, if it doesn't show up until the first\r
  // EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice() call from the\r
  // PCI Bus driver, then it never will:\r
  //\r
  // 1. The following drivers are dispatched in some unspecified order:\r
  //    - PCI Host Bridge DXE_DRIVER,\r
  //    - PCI Bus UEFI_DRIVER,\r
  //    - this DXE_DRIVER,\r
  //    - Legacy BIOS DXE_DRIVER.\r
  //\r
  // 2. The DXE_CORE enters BDS.\r
  //\r
  // 3. The platform BDS connects the PCI Root Bridge IO instances (produced by\r
  //    the PCI Host Bridge DXE_DRIVER).\r
  //\r
  // 4. The PCI Bus UEFI_DRIVER enumerates resources and calls into this\r
  //    DXE_DRIVER (CheckDevice()).\r
  //\r
  // 5. This driver remembers if EFI_LEGACY_BIOS_PROTOCOL has been installed\r
  //    sometime during step 1 (produced by the Legacy BIOS DXE_DRIVER).\r
  //\r
  // For breaking this order, the Legacy BIOS DXE_DRIVER would have to install\r
  // its protocol after the firmware enters BDS, which cannot happen.\r
  //\r
  Status = gBS->CreateEvent (\r
                  EVT_NOTIFY_SIGNAL,\r
                  TPL_CALLBACK,\r
                  LegacyBiosInstalled,\r
                  NULL /* Context */,\r
                  &Event\r
                  );\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  Status = gBS->RegisterProtocolNotify (\r
                  &gEfiLegacyBiosProtocolGuid,\r
                  Event,\r
                  &Registration\r
                  );\r
  if (EFI_ERROR (Status)) {\r
    goto CloseEvent;\r
  }\r
\r
  Status = gBS->SignalEvent (Event);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  mIncompatiblePciDeviceSupport.CheckDevice = CheckDevice;\r
  Status                                    = gBS->InstallMultipleProtocolInterfaces (\r
                                                     &ImageHandle,\r
                                                     &gEfiIncompatiblePciDeviceSupportProtocolGuid,\r
                                                     &mIncompatiblePciDeviceSupport,\r
                                                     NULL\r
                                                     );\r
  if (EFI_ERROR (Status)) {\r
    goto CloseEvent;\r
  }\r
\r
  return EFI_SUCCESS;\r
\r
CloseEvent:\r
  if (!mLegacyBiosInstalled) {\r
    EFI_STATUS  CloseStatus;\r
\r
    CloseStatus = gBS->CloseEvent (Event);\r
    ASSERT_EFI_ERROR (CloseStatus);\r
  }\r
\r
  return Status;\r
}\r
Commit	Line	Data
855743f7 LE	1	/** @file\r
	2	A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit\r
	3	MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM\r
	4	is not present), conserving 32-bit MMIO aperture for 32-bit BARs.\r
	5	\r
	6	Copyright (C) 2016, Red Hat, Inc.\r
a419fd0d	7	Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
855743f7	8	\r
b26f0cf9	9	SPDX-License-Identifier: BSD-2-Clause-Patent\r
855743f7 LE	10	**/\r
855743f7 LE	11	\r
149ed8e4 MX	12	#include <Library/BaseLib.h>\r
149ed8e4 MX	13	#include <Library/BaseMemoryLib.h>\r
855743f7 LE	14	#include <IndustryStandard/Acpi10.h>\r
	15	#include <IndustryStandard/Pci22.h>\r
	16	\r
	17	#include <Library/DebugLib.h>\r
	18	#include <Library/MemoryAllocationLib.h>\r
	19	#include <Library/PcdLib.h>\r
	20	#include <Library/UefiBootServicesTableLib.h>\r
18b5b149	21	#include <Library/CcProbeLib.h>\r
855743f7 LE	22	\r
	23	#include <Protocol/IncompatiblePciDeviceSupport.h>\r
	24	#include <Protocol/LegacyBios.h>\r
	25	\r
	26	//\r
	27	// The Legacy BIOS protocol has been located.\r
	28	//\r
ac0a286f	29	STATIC BOOLEAN mLegacyBiosInstalled;\r
855743f7 LE	30	\r
	31	//\r
	32	// The protocol interface this driver produces.\r
	33	//\r
	34	STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL\r
ac0a286f	35	mIncompatiblePciDeviceSupport;\r
855743f7 LE	36	\r
	37	//\r
	38	// Configuration template for the CheckDevice() protocol member function.\r
	39	//\r
	40	// Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in\r
	41	// the Platform Init 1.4a Spec, Volume 5.\r
	42	//\r
	43	// This structure is interpreted by the UpdatePciInfo() function in the edk2\r
	44	// PCI Bus UEFI_DRIVER.\r
	45	//\r
149ed8e4 MX	46	// This structure looks like:\r
	47	// AddressDesc-1 + AddressDesc-2 + ... + AddressDesc-n + EndDesc\r
	48	//\r
	49	STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mMmio64Configuration = {\r
	50	ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc\r
	51	(UINT16)( // Len\r
ac0a286f MK	52	sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -\r
	53	OFFSET_OF (\r
	54	EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,\r
	55	ResType\r
	56	)\r
	57	),\r
149ed8e4 MX	58	ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType\r
	59	0, // GenFlag\r
	60	0, // SpecificFlag\r
	61	64, // AddrSpaceGranularity:\r
855743f7 LE	62	// aperture selection hint\r
855743f7 LE	63	// for BAR allocation\r
149ed8e4 MX	64	0, // AddrRangeMin\r
149ed8e4 MX	65	0, // AddrRangeMax:\r
855743f7 LE	66	// no special alignment\r
855743f7 LE	67	// for affected BARs\r
149ed8e4	68	MAX_UINT64, // AddrTranslationOffset:\r
855743f7 LE	69	// hint covers all\r
855743f7 LE	70	// eligible BARs\r
149ed8e4	71	0 // AddrLen:\r
855743f7	72	// use probed BAR size\r
149ed8e4 MX	73	};\r
149ed8e4 MX	74	\r
c477b278 MX	75	//\r
	76	// mOptionRomConfiguration is present only in Td guest.\r
	77	// Host VMM can inject option ROM which is untrusted in Td guest,\r
	78	// so PCI option ROM needs to be ignored.\r
	79	// According to "Table 20. ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage"\r
	80	// PI spec 1.7, type-specific flags can be set to 0 when\r
	81	// Address Translation Offset == 6 to skip device option ROM.\r
	82	//\r
	83	STATIC CONST EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mOptionRomConfiguration = {\r
	84	ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc\r
	85	(UINT16)( // Len\r
	86	sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -\r
	87	OFFSET_OF (\r
	88	EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,\r
	89	ResType\r
	90	)\r
	91	),\r
	92	ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType\r
	93	0, // GenFlag\r
	94	0, // Disable option roms SpecificFlag\r
	95	64, // AddrSpaceGranularity:\r
	96	// aperture selection hint\r
	97	// for BAR allocation\r
	98	MAX_UINT64, // AddrRangeMin\r
	99	MAX_UINT64, // AddrRangeMax:\r
	100	// no special alignment\r
	101	// for affected BARs\r
	102	6, // AddrTranslationOffset:\r
	103	// hint covers all\r
	104	// eligible BARs\r
	105	0 // AddrLen:\r
	106	// use probed BAR size\r
	107	};\r
	108	\r
149ed8e4 MX	109	STATIC CONST EFI_ACPI_END_TAG_DESCRIPTOR mEndDesc = {\r
	110	ACPI_END_TAG_DESCRIPTOR, // Desc\r
	111	0 // Checksum: to be ignored\r
855743f7 LE	112	};\r
	113	\r
	114	//\r
	115	// The CheckDevice() member function has been called.\r
	116	//\r
ac0a286f	117	STATIC BOOLEAN mCheckDeviceCalled;\r
855743f7 LE	118	\r
	119	/**\r
	120	Notification callback for Legacy BIOS protocol installation.\r
	121	\r
	122	@param[in] Event Event whose notification function is being invoked.\r
	123	\r
	124	@param[in] Context The pointer to the notification function's context, which\r
	125	is implementation-dependent.\r
	126	**/\r
	127	STATIC\r
	128	VOID\r
	129	EFIAPI\r
	130	LegacyBiosInstalled (\r
ac0a286f MK	131	IN EFI_EVENT Event,\r
ac0a286f MK	132	IN VOID *Context\r
855743f7 LE	133	)\r
855743f7 LE	134	{\r
ac0a286f MK	135	EFI_STATUS Status;\r
ac0a286f MK	136	EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;\r
855743f7 LE	137	\r
	138	ASSERT (!mCheckDeviceCalled);\r
	139	\r
ac0a286f MK	140	Status = gBS->LocateProtocol (\r
	141	&gEfiLegacyBiosProtocolGuid,\r
	142	NULL /* Registration */,\r
	143	(VOID **)&LegacyBios\r
	144	);\r
855743f7 LE	145	if (EFI_ERROR (Status)) {\r
	146	return;\r
	147	}\r
	148	\r
	149	mLegacyBiosInstalled = TRUE;\r
	150	\r
	151	//\r
	152	// Close the event and deregister this callback.\r
	153	//\r
	154	Status = gBS->CloseEvent (Event);\r
	155	ASSERT_EFI_ERROR (Status);\r
	156	}\r
	157	\r
855743f7 LE	158	/**\r
	159	Returns a list of ACPI resource descriptors that detail the special resource\r
	160	configuration requirements for an incompatible PCI device.\r
	161	\r
	162	Prior to bus enumeration, the PCI bus driver will look for the presence of\r
	163	the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this\r
	164	protocol can be present in the system. For each PCI device that the PCI bus\r
	165	driver discovers, the PCI bus driver calls this function with the device's\r
	166	vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device\r
	167	ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or\r
	168	SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The\r
	169	ID values that are not (UINTN)-1 will be used to identify the current device.\r
	170	\r
	171	This function will only return EFI_SUCCESS. However, if the device is an\r
	172	incompatible PCI device, a list of ACPI resource descriptors will be returned\r
	173	in Configuration. Otherwise, NULL will be returned in Configuration instead.\r
	174	The PCI bus driver does not need to allocate memory for Configuration.\r
	175	However, it is the PCI bus driver's responsibility to free it. The PCI bus\r
	176	driver then can configure this device with the information that is derived\r
	177	from this list of resource nodes, rather than the result of BAR probing.\r
	178	\r
	179	Only the following two resource descriptor types from the ACPI Specification\r
	180	may be used to describe the incompatible PCI device resource requirements:\r
	181	- QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)\r
	182	- End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)\r
	183	\r
	184	The QWORD Address Space Descriptor can describe memory, I/O, and bus number\r
	185	ranges for dynamic or fixed resources. The configuration of a PCI root bridge\r
	186	is described with one or more QWORD Address Space Descriptors, followed by an\r
	187	End Tag. See the ACPI Specification for details on the field values.\r
	188	\r
	189	@param[in] This Pointer to the\r
	190	EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL\r
	191	instance.\r
	192	\r
	193	@param[in] VendorId A unique ID to identify the manufacturer of\r
	194	the PCI device. See the Conventional PCI\r
	195	Specification 3.0 for details.\r
	196	\r
	197	@param[in] DeviceId A unique ID to identify the particular PCI\r
	198	device. See the Conventional PCI\r
	199	Specification 3.0 for details.\r
	200	\r
	201	@param[in] RevisionId A PCI device-specific revision identifier.\r
	202	See the Conventional PCI Specification 3.0\r
	203	for details.\r
	204	\r
	205	@param[in] SubsystemVendorId Specifies the subsystem vendor ID. See the\r
	206	Conventional PCI Specification 3.0 for\r
	207	details.\r
	208	\r
	209	@param[in] SubsystemDeviceId Specifies the subsystem device ID. See the\r
	210	Conventional PCI Specification 3.0 for\r
	211	details.\r
	212	\r
	213	@param[out] Configuration A list of ACPI resource descriptors that\r
	214	detail the configuration requirement.\r
	215	\r
	216	@retval EFI_SUCCESS The function always returns EFI_SUCCESS.\r
	217	**/\r
	218	STATIC\r
	219	EFI_STATUS\r
	220	EFIAPI\r
	221	CheckDevice (\r
222	IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,\r
223	IN UINTN VendorId,\r
224	IN UINTN DeviceId,\r
225	IN UINTN RevisionId,\r
226	IN UINTN SubsystemVendorId,\r
227	IN UINTN SubsystemDeviceId,\r
228	OUT VOID **Configuration\r
229	)\r
230	{\r
231	mCheckDeviceCalled = TRUE;\r
149ed8e4 MX	232	UINTN Length;\r
149ed8e4 MX	233	UINT8 *Ptr;\r
855743f7 LE	234	\r
	235	//\r
	236	// Unlike the general description of this protocol member suggests, there is\r
	237	// nothing incompatible about the PCI devices that we'll match here. We'll\r
	238	// match all PCI devices, and generate exactly one QWORD Address Space\r
	239	// Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER\r
	240	// not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM\r
	241	// BAR is present on the device.\r
	242	//\r
	243	// The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot\r
	244	// (via a CSM) could dispatch a legacy option ROM on the device, which might\r
	245	// have trouble with MMIO BARs that have been allocated outside of the 32-bit\r
	246	// address space. But, if we don't support legacy option ROMs at all, then\r
	247	// this problem cannot arise.\r
	248	//\r
	249	if (mLegacyBiosInstalled) {\r
	250	//\r
	251	// Don't interfere with resource degradation.\r
	252	//\r
	253	*Configuration = NULL;\r
	254	return EFI_SUCCESS;\r
	255	}\r
	256	\r
	257	//\r
	258	// This member function is mis-specified actually: it is supposed to allocate\r
	259	// memory, but as specified, it could not return an error status. Thankfully,\r
	260	// the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the\r
	261	// UpdatePciInfo() function.\r
	262	//\r
149ed8e4 MX	263	Length = sizeof mMmio64Configuration + sizeof mEndDesc;\r
149ed8e4 MX	264	\r
c477b278 MX	265	//\r
	266	// In Td guest OptionRom is not allowed.\r
	267	//\r
18b5b149	268	if (CcProbe ()) {\r
c477b278 MX	269	Length += sizeof mOptionRomConfiguration;\r
	270	}\r
	271	\r
149ed8e4 MX	272	*Configuration = AllocateZeroPool (Length);\r
149ed8e4 MX	273	\r
855743f7	274	if (*Configuration == NULL) {\r
ac0a286f MK	275	DEBUG ((\r
ac0a286f MK	276	DEBUG_WARN,\r
855743f7	277	"%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",\r
ac0a286f MK	278	__FUNCTION__,\r
	279	(UINT32)VendorId,\r
	280	(UINT32)DeviceId,\r
	281	(UINT8)RevisionId\r
	282	));\r
855743f7 LE	283	return EFI_OUT_OF_RESOURCES;\r
855743f7 LE	284	}\r
ac0a286f	285	\r
149ed8e4 MX	286	Ptr = (UINT8 )(UINTN)Configuration;\r
	287	CopyMem (Ptr, &mMmio64Configuration, sizeof mMmio64Configuration);\r
	288	Length = sizeof mMmio64Configuration;\r
	289	\r
18b5b149	290	if (CcProbe ()) {\r
c477b278 MX	291	CopyMem (Ptr + Length, &mOptionRomConfiguration, sizeof mOptionRomConfiguration);\r
	292	Length += sizeof mOptionRomConfiguration;\r
	293	}\r
	294	\r
149ed8e4 MX	295	CopyMem (Ptr + Length, &mEndDesc, sizeof mEndDesc);\r
149ed8e4 MX	296	\r
855743f7 LE	297	return EFI_SUCCESS;\r
	298	}\r
	299	\r
855743f7 LE	300	/**\r
	301	Entry point for this driver.\r
	302	\r
	303	@param[in] ImageHandle Image handle of this driver.\r
	304	@param[in] SystemTable Pointer to SystemTable.\r
	305	\r
	306	@retval EFI_SUCESS Driver has loaded successfully.\r
	307	@retval EFI_UNSUPPORTED PCI resource allocation has been disabled.\r
	308	@retval EFI_UNSUPPORTED There is no 64-bit PCI MMIO aperture.\r
	309	@return Error codes from lower level functions.\r
	310	\r
	311	**/\r
	312	EFI_STATUS\r
	313	EFIAPI\r
	314	DriverInitialize (\r
ac0a286f MK	315	IN EFI_HANDLE ImageHandle,\r
ac0a286f MK	316	IN EFI_SYSTEM_TABLE *SystemTable\r
855743f7 LE	317	)\r
855743f7 LE	318	{\r
ac0a286f MK	319	EFI_STATUS Status;\r
	320	EFI_EVENT Event;\r
	321	VOID *Registration;\r
855743f7 LE	322	\r
855743f7 LE	323	//\r
984c93ec LE	324	// If there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs have to be\r
984c93ec LE	325	// allocated under 4 GB unconditionally.\r
855743f7	326	//\r
984c93ec	327	if (PcdGet64 (PcdPciMmio64Size) == 0) {\r
855743f7 LE	328	return EFI_UNSUPPORTED;\r
	329	}\r
	330	\r
	331	//\r
	332	// Otherwise, create a protocol notify to see if a CSM is present. (With the\r
	333	// CSM absent, the PCI Bus driver won't have to worry about allocating 64-bit\r
	334	// MMIO BARs in the 32-bit MMIO aperture, for the sake of a legacy BIOS.)\r
	335	//\r
	336	// If the Legacy BIOS Protocol is present at the time of this driver starting\r
	337	// up, we can mark immediately that the PCI Bus driver should perform the\r
	338	// usual 64-bit MMIO BAR degradation.\r
	339	//\r
	340	// Otherwise, if the Legacy BIOS Protocol is absent at startup, it may be\r
	341	// installed later. However, if it doesn't show up until the first\r
	342	// EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice() call from the\r
	343	// PCI Bus driver, then it never will:\r
	344	//\r
	345	// 1. The following drivers are dispatched in some unspecified order:\r
	346	// - PCI Host Bridge DXE_DRIVER,\r
	347	// - PCI Bus UEFI_DRIVER,\r
	348	// - this DXE_DRIVER,\r
	349	// - Legacy BIOS DXE_DRIVER.\r
	350	//\r
	351	// 2. The DXE_CORE enters BDS.\r
	352	//\r
	353	// 3. The platform BDS connects the PCI Root Bridge IO instances (produced by\r
	354	// the PCI Host Bridge DXE_DRIVER).\r
	355	//\r
	356	// 4. The PCI Bus UEFI_DRIVER enumerates resources and calls into this\r
	357	// DXE_DRIVER (CheckDevice()).\r
	358	//\r
	359	// 5. This driver remembers if EFI_LEGACY_BIOS_PROTOCOL has been installed\r
	360	// sometime during step 1 (produced by the Legacy BIOS DXE_DRIVER).\r
	361	//\r
	362	// For breaking this order, the Legacy BIOS DXE_DRIVER would have to install\r
	363	// its protocol after the firmware enters BDS, which cannot happen.\r
	364	//\r
ac0a286f MK	365	Status = gBS->CreateEvent (\r
	366	EVT_NOTIFY_SIGNAL,\r
	367	TPL_CALLBACK,\r
	368	LegacyBiosInstalled,\r
	369	NULL /* Context */,\r
	370	&Event\r
	371	);\r
855743f7 LE	372	if (EFI_ERROR (Status)) {\r
	373	return Status;\r
	374	}\r
	375	\r
ac0a286f MK	376	Status = gBS->RegisterProtocolNotify (\r
	377	&gEfiLegacyBiosProtocolGuid,\r
	378	Event,\r
	379	&Registration\r
	380	);\r
855743f7 LE	381	if (EFI_ERROR (Status)) {\r
	382	goto CloseEvent;\r
	383	}\r
	384	\r
	385	Status = gBS->SignalEvent (Event);\r
	386	ASSERT_EFI_ERROR (Status);\r
	387	\r
	388	mIncompatiblePciDeviceSupport.CheckDevice = CheckDevice;\r
ac0a286f MK	389	Status = gBS->InstallMultipleProtocolInterfaces (\r
	390	&ImageHandle,\r
	391	&gEfiIncompatiblePciDeviceSupportProtocolGuid,\r
	392	&mIncompatiblePciDeviceSupport,\r
	393	NULL\r
	394	);\r
855743f7 LE	395	if (EFI_ERROR (Status)) {\r
	396	goto CloseEvent;\r
	397	}\r
	398	\r
	399	return EFI_SUCCESS;\r
	400	\r
	401	CloseEvent:\r
	402	if (!mLegacyBiosInstalled) {\r
ac0a286f	403	EFI_STATUS CloseStatus;\r
855743f7 LE	404	\r
	405	CloseStatus = gBS->CloseEvent (Event);\r
	406	ASSERT_EFI_ERROR (CloseStatus);\r
	407	}\r
	408	\r
	409	return Status;\r
	410	}\r